1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 //===----------------------------------------------------------------------===// 58 // Defines specific to certain operating systems. 59 //===----------------------------------------------------------------------===// 60 61 namespace { 62 template<typename TgtInfo> 63 class OSTargetInfo : public TgtInfo { 64 protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67 public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75 }; 76 } // end anonymous namespace 77 78 79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 104 // mode; then they become normal, C-style casts. 105 Builder.defineMacro("__bridge", ""); 106 Builder.defineMacro("__bridge_transfer", ""); 107 Builder.defineMacro("__bridge_retained", ""); 108 Builder.defineMacro("__bridge_retain", ""); 109 } 110 111 if (Opts.Static) 112 Builder.defineMacro("__STATIC__"); 113 else 114 Builder.defineMacro("__DYNAMIC__"); 115 116 if (Opts.POSIXThreads) 117 Builder.defineMacro("_REENTRANT"); 118 119 // Get the platform type and version number from the triple. 120 unsigned Maj, Min, Rev; 121 122 // If no version was given, default to to 10.4.0, for simplifying tests. 123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 124 PlatformName = "macosx"; 125 Min = Rev = 0; 126 Maj = 8; 127 } else { 128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 129 // "-osxNNN", and "-iosNNN"). 130 131 if (Triple.getOS() == llvm::Triple::Darwin) { 132 // For historical reasons that make little sense, the version passed here 133 // is the "darwin" version, which drops the 10 and offsets by 4. 134 Triple.getOSVersion(Maj, Min, Rev); 135 136 if (Triple.getEnvironmentName() == "iphoneos") { 137 PlatformName = "ios"; 138 } else { 139 PlatformName = "macosx"; 140 Rev = Min; 141 Min = Maj - 4; 142 Maj = 10; 143 } 144 } else { 145 Triple.getOSVersion(Maj, Min, Rev); 146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 147 } 148 } 149 150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 151 // generating code for Win32 ABI. No need to emit 152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 153 if (PlatformName == "win32") { 154 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 155 return; 156 } 157 158 // Set the appropriate OS version define. 159 if (PlatformName == "ios") { 160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 161 char Str[6]; 162 Str[0] = '0' + Maj; 163 Str[1] = '0' + (Min / 10); 164 Str[2] = '0' + (Min % 10); 165 Str[3] = '0' + (Rev / 10); 166 Str[4] = '0' + (Rev % 10); 167 Str[5] = '\0'; 168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 169 } else { 170 // Note that the Driver allows versions which aren't representable in the 171 // define (because we only get a single digit for the minor and micro 172 // revision numbers). So, we limit them to the maximum representable 173 // version. 174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 176 char Str[5]; 177 Str[0] = '0' + (Maj / 10); 178 Str[1] = '0' + (Maj % 10); 179 Str[2] = '0' + std::min(Min, 9U); 180 Str[3] = '0' + std::min(Rev, 9U); 181 Str[4] = '\0'; 182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 183 } 184 185 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 186 } 187 188 namespace { 189 template<typename Target> 190 class DarwinTargetInfo : public OSTargetInfo<Target> { 191 protected: 192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 193 MacroBuilder &Builder) const { 194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 195 this->PlatformMinVersion); 196 } 197 198 public: 199 DarwinTargetInfo(const std::string& triple) : 200 OSTargetInfo<Target>(triple) { 201 llvm::Triple T = llvm::Triple(triple); 202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 203 this->MCountName = "\01mcount"; 204 } 205 206 virtual std::string isValidSectionSpecifier(StringRef SR) const { 207 // Let MCSectionMachO validate this. 208 StringRef Segment, Section; 209 unsigned TAA, StubSize; 210 bool HasTAA; 211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 212 TAA, HasTAA, StubSize); 213 } 214 215 virtual const char *getStaticInitSectionSpecifier() const { 216 // FIXME: We should return 0 when building kexts. 217 return "__TEXT,__StaticInit,regular,pure_instructions"; 218 } 219 220 }; 221 222 223 // DragonFlyBSD Target 224 template<typename Target> 225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 226 protected: 227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 228 MacroBuilder &Builder) const { 229 // DragonFly defines; list based off of gcc output 230 Builder.defineMacro("__DragonFly__"); 231 Builder.defineMacro("__DragonFly_cc_version", "100001"); 232 Builder.defineMacro("__ELF__"); 233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 234 Builder.defineMacro("__tune_i386__"); 235 DefineStd(Builder, "unix", Opts); 236 } 237 public: 238 DragonFlyBSDTargetInfo(const std::string &triple) 239 : OSTargetInfo<Target>(triple) {} 240 }; 241 242 // FreeBSD Target 243 template<typename Target> 244 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 245 protected: 246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 247 MacroBuilder &Builder) const { 248 // FreeBSD defines; list based off of gcc output 249 250 // FIXME: Move version number handling to llvm::Triple. 251 StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1); 252 253 Builder.defineMacro("__FreeBSD__", Release); 254 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001"); 255 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 256 DefineStd(Builder, "unix", Opts); 257 Builder.defineMacro("__ELF__"); 258 } 259 public: 260 FreeBSDTargetInfo(const std::string &triple) 261 : OSTargetInfo<Target>(triple) { 262 this->UserLabelPrefix = ""; 263 264 llvm::Triple Triple(triple); 265 switch (Triple.getArch()) { 266 default: 267 case llvm::Triple::x86: 268 case llvm::Triple::x86_64: 269 this->MCountName = ".mcount"; 270 break; 271 case llvm::Triple::mips: 272 case llvm::Triple::mipsel: 273 case llvm::Triple::ppc: 274 case llvm::Triple::ppc64: 275 this->MCountName = "_mcount"; 276 break; 277 case llvm::Triple::arm: 278 this->MCountName = "__mcount"; 279 break; 280 } 281 282 } 283 }; 284 285 // Minix Target 286 template<typename Target> 287 class MinixTargetInfo : public OSTargetInfo<Target> { 288 protected: 289 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 290 MacroBuilder &Builder) const { 291 // Minix defines 292 293 Builder.defineMacro("__minix", "3"); 294 Builder.defineMacro("_EM_WSIZE", "4"); 295 Builder.defineMacro("_EM_PSIZE", "4"); 296 Builder.defineMacro("_EM_SSIZE", "2"); 297 Builder.defineMacro("_EM_LSIZE", "4"); 298 Builder.defineMacro("_EM_FSIZE", "4"); 299 Builder.defineMacro("_EM_DSIZE", "8"); 300 DefineStd(Builder, "unix", Opts); 301 } 302 public: 303 MinixTargetInfo(const std::string &triple) 304 : OSTargetInfo<Target>(triple) { 305 this->UserLabelPrefix = ""; 306 } 307 }; 308 309 // Linux target 310 template<typename Target> 311 class LinuxTargetInfo : public OSTargetInfo<Target> { 312 protected: 313 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 314 MacroBuilder &Builder) const { 315 // Linux defines; list based off of gcc output 316 DefineStd(Builder, "unix", Opts); 317 DefineStd(Builder, "linux", Opts); 318 Builder.defineMacro("__gnu_linux__"); 319 Builder.defineMacro("__ELF__"); 320 if (Opts.POSIXThreads) 321 Builder.defineMacro("_REENTRANT"); 322 if (Opts.CPlusPlus) 323 Builder.defineMacro("_GNU_SOURCE"); 324 } 325 public: 326 LinuxTargetInfo(const std::string& triple) 327 : OSTargetInfo<Target>(triple) { 328 this->UserLabelPrefix = ""; 329 this->WIntType = TargetInfo::UnsignedInt; 330 } 331 }; 332 333 // NetBSD Target 334 template<typename Target> 335 class NetBSDTargetInfo : public OSTargetInfo<Target> { 336 protected: 337 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 338 MacroBuilder &Builder) const { 339 // NetBSD defines; list based off of gcc output 340 Builder.defineMacro("__NetBSD__"); 341 Builder.defineMacro("__unix__"); 342 Builder.defineMacro("__ELF__"); 343 if (Opts.POSIXThreads) 344 Builder.defineMacro("_POSIX_THREADS"); 345 } 346 public: 347 NetBSDTargetInfo(const std::string &triple) 348 : OSTargetInfo<Target>(triple) { 349 this->UserLabelPrefix = ""; 350 } 351 }; 352 353 // OpenBSD Target 354 template<typename Target> 355 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 356 protected: 357 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 358 MacroBuilder &Builder) const { 359 // OpenBSD defines; list based off of gcc output 360 361 Builder.defineMacro("__OpenBSD__"); 362 DefineStd(Builder, "unix", Opts); 363 Builder.defineMacro("__ELF__"); 364 if (Opts.POSIXThreads) 365 Builder.defineMacro("_POSIX_THREADS"); 366 } 367 public: 368 OpenBSDTargetInfo(const std::string &triple) 369 : OSTargetInfo<Target>(triple) {} 370 }; 371 372 // PSP Target 373 template<typename Target> 374 class PSPTargetInfo : public OSTargetInfo<Target> { 375 protected: 376 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 377 MacroBuilder &Builder) const { 378 // PSP defines; list based on the output of the pspdev gcc toolchain. 379 Builder.defineMacro("PSP"); 380 Builder.defineMacro("_PSP"); 381 Builder.defineMacro("__psp__"); 382 Builder.defineMacro("__ELF__"); 383 } 384 public: 385 PSPTargetInfo(const std::string& triple) 386 : OSTargetInfo<Target>(triple) { 387 this->UserLabelPrefix = ""; 388 } 389 }; 390 391 // PS3 PPU Target 392 template<typename Target> 393 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 394 protected: 395 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 396 MacroBuilder &Builder) const { 397 // PS3 PPU defines. 398 Builder.defineMacro("__PPC__"); 399 Builder.defineMacro("__PPU__"); 400 Builder.defineMacro("__CELLOS_LV2__"); 401 Builder.defineMacro("__ELF__"); 402 Builder.defineMacro("__LP32__"); 403 Builder.defineMacro("_ARCH_PPC64"); 404 Builder.defineMacro("__powerpc64__"); 405 } 406 public: 407 PS3PPUTargetInfo(const std::string& triple) 408 : OSTargetInfo<Target>(triple) { 409 this->UserLabelPrefix = ""; 410 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 411 this->IntMaxType = TargetInfo::SignedLongLong; 412 this->UIntMaxType = TargetInfo::UnsignedLongLong; 413 this->Int64Type = TargetInfo::SignedLongLong; 414 this->SizeType = TargetInfo::UnsignedInt; 415 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 416 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 417 } 418 }; 419 420 // FIXME: Need a real SPU target. 421 // PS3 SPU Target 422 template<typename Target> 423 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 424 protected: 425 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 426 MacroBuilder &Builder) const { 427 // PS3 PPU defines. 428 Builder.defineMacro("__SPU__"); 429 Builder.defineMacro("__ELF__"); 430 } 431 public: 432 PS3SPUTargetInfo(const std::string& triple) 433 : OSTargetInfo<Target>(triple) { 434 this->UserLabelPrefix = ""; 435 } 436 }; 437 438 // AuroraUX target 439 template<typename Target> 440 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 441 protected: 442 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 443 MacroBuilder &Builder) const { 444 DefineStd(Builder, "sun", Opts); 445 DefineStd(Builder, "unix", Opts); 446 Builder.defineMacro("__ELF__"); 447 Builder.defineMacro("__svr4__"); 448 Builder.defineMacro("__SVR4"); 449 } 450 public: 451 AuroraUXTargetInfo(const std::string& triple) 452 : OSTargetInfo<Target>(triple) { 453 this->UserLabelPrefix = ""; 454 this->WCharType = this->SignedLong; 455 // FIXME: WIntType should be SignedLong 456 } 457 }; 458 459 // Solaris target 460 template<typename Target> 461 class SolarisTargetInfo : public OSTargetInfo<Target> { 462 protected: 463 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 464 MacroBuilder &Builder) const { 465 DefineStd(Builder, "sun", Opts); 466 DefineStd(Builder, "unix", Opts); 467 Builder.defineMacro("__ELF__"); 468 Builder.defineMacro("__svr4__"); 469 Builder.defineMacro("__SVR4"); 470 } 471 public: 472 SolarisTargetInfo(const std::string& triple) 473 : OSTargetInfo<Target>(triple) { 474 this->UserLabelPrefix = ""; 475 this->WCharType = this->SignedLong; 476 // FIXME: WIntType should be SignedLong 477 } 478 }; 479 480 // Windows target 481 template<typename Target> 482 class WindowsTargetInfo : public OSTargetInfo<Target> { 483 protected: 484 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 485 MacroBuilder &Builder) const { 486 Builder.defineMacro("_WIN32"); 487 } 488 void getVisualStudioDefines(const LangOptions &Opts, 489 MacroBuilder &Builder) const { 490 if (Opts.CPlusPlus) { 491 if (Opts.RTTI) 492 Builder.defineMacro("_CPPRTTI"); 493 494 if (Opts.Exceptions) 495 Builder.defineMacro("_CPPUNWIND"); 496 } 497 498 if (!Opts.CharIsSigned) 499 Builder.defineMacro("_CHAR_UNSIGNED"); 500 501 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 502 // but it works for now. 503 if (Opts.POSIXThreads) 504 Builder.defineMacro("_MT"); 505 506 if (Opts.MSCVersion != 0) 507 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 508 509 if (Opts.MicrosoftExt) { 510 Builder.defineMacro("_MSC_EXTENSIONS"); 511 512 if (Opts.CPlusPlus0x) { 513 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 514 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 515 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 516 } 517 } 518 519 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 520 } 521 522 public: 523 WindowsTargetInfo(const std::string &triple) 524 : OSTargetInfo<Target>(triple) {} 525 }; 526 527 } // end anonymous namespace. 528 529 //===----------------------------------------------------------------------===// 530 // Specific target implementations. 531 //===----------------------------------------------------------------------===// 532 533 namespace { 534 // PPC abstract base class 535 class PPCTargetInfo : public TargetInfo { 536 static const Builtin::Info BuiltinInfo[]; 537 static const char * const GCCRegNames[]; 538 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 539 public: 540 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 541 542 virtual void getTargetBuiltins(const Builtin::Info *&Records, 543 unsigned &NumRecords) const { 544 Records = BuiltinInfo; 545 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 546 } 547 548 virtual void getTargetDefines(const LangOptions &Opts, 549 MacroBuilder &Builder) const; 550 551 virtual void getGCCRegNames(const char * const *&Names, 552 unsigned &NumNames) const; 553 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 554 unsigned &NumAliases) const; 555 virtual bool validateAsmConstraint(const char *&Name, 556 TargetInfo::ConstraintInfo &Info) const { 557 switch (*Name) { 558 default: return false; 559 case 'O': // Zero 560 break; 561 case 'b': // Base register 562 case 'f': // Floating point register 563 Info.setAllowsRegister(); 564 break; 565 // FIXME: The following are added to allow parsing. 566 // I just took a guess at what the actions should be. 567 // Also, is more specific checking needed? I.e. specific registers? 568 case 'd': // Floating point register (containing 64-bit value) 569 case 'v': // Altivec vector register 570 Info.setAllowsRegister(); 571 break; 572 case 'w': 573 switch (Name[1]) { 574 case 'd':// VSX vector register to hold vector double data 575 case 'f':// VSX vector register to hold vector float data 576 case 's':// VSX vector register to hold scalar float data 577 case 'a':// Any VSX register 578 break; 579 default: 580 return false; 581 } 582 Info.setAllowsRegister(); 583 Name++; // Skip over 'w'. 584 break; 585 case 'h': // `MQ', `CTR', or `LINK' register 586 case 'q': // `MQ' register 587 case 'c': // `CTR' register 588 case 'l': // `LINK' register 589 case 'x': // `CR' register (condition register) number 0 590 case 'y': // `CR' register (condition register) 591 case 'z': // `XER[CA]' carry bit (part of the XER register) 592 Info.setAllowsRegister(); 593 break; 594 case 'I': // Signed 16-bit constant 595 case 'J': // Unsigned 16-bit constant shifted left 16 bits 596 // (use `L' instead for SImode constants) 597 case 'K': // Unsigned 16-bit constant 598 case 'L': // Signed 16-bit constant shifted left 16 bits 599 case 'M': // Constant larger than 31 600 case 'N': // Exact power of 2 601 case 'P': // Constant whose negation is a signed 16-bit constant 602 case 'G': // Floating point constant that can be loaded into a 603 // register with one instruction per word 604 case 'H': // Integer/Floating point constant that can be loaded 605 // into a register using three instructions 606 break; 607 case 'm': // Memory operand. Note that on PowerPC targets, m can 608 // include addresses that update the base register. It 609 // is therefore only safe to use `m' in an asm statement 610 // if that asm statement accesses the operand exactly once. 611 // The asm statement must also use `%U<opno>' as a 612 // placeholder for the "update" flag in the corresponding 613 // load or store instruction. For example: 614 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 615 // is correct but: 616 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 617 // is not. Use es rather than m if you don't want the base 618 // register to be updated. 619 case 'e': 620 if (Name[1] != 's') 621 return false; 622 // es: A "stable" memory operand; that is, one which does not 623 // include any automodification of the base register. Unlike 624 // `m', this constraint can be used in asm statements that 625 // might access the operand several times, or that might not 626 // access it at all. 627 Info.setAllowsMemory(); 628 Name++; // Skip over 'e'. 629 break; 630 case 'Q': // Memory operand that is an offset from a register (it is 631 // usually better to use `m' or `es' in asm statements) 632 case 'Z': // Memory operand that is an indexed or indirect from a 633 // register (it is usually better to use `m' or `es' in 634 // asm statements) 635 Info.setAllowsMemory(); 636 Info.setAllowsRegister(); 637 break; 638 case 'R': // AIX TOC entry 639 case 'a': // Address operand that is an indexed or indirect from a 640 // register (`p' is preferable for asm statements) 641 case 'S': // Constant suitable as a 64-bit mask operand 642 case 'T': // Constant suitable as a 32-bit mask operand 643 case 'U': // System V Release 4 small data area reference 644 case 't': // AND masks that can be performed by two rldic{l, r} 645 // instructions 646 case 'W': // Vector constant that does not require memory 647 case 'j': // Vector constant that is all zeros. 648 break; 649 // End FIXME. 650 } 651 return true; 652 } 653 virtual const char *getClobbers() const { 654 return ""; 655 } 656 }; 657 658 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 659 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 660 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 661 ALL_LANGUAGES }, 662 #include "clang/Basic/BuiltinsPPC.def" 663 }; 664 665 666 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 667 /// #defines that are not tied to a specific subtarget. 668 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 669 MacroBuilder &Builder) const { 670 // Target identification. 671 Builder.defineMacro("__ppc__"); 672 Builder.defineMacro("_ARCH_PPC"); 673 Builder.defineMacro("__powerpc__"); 674 Builder.defineMacro("__POWERPC__"); 675 if (PointerWidth == 64) { 676 Builder.defineMacro("_ARCH_PPC64"); 677 Builder.defineMacro("_LP64"); 678 Builder.defineMacro("__LP64__"); 679 Builder.defineMacro("__powerpc64__"); 680 Builder.defineMacro("__ppc64__"); 681 } else { 682 Builder.defineMacro("__ppc__"); 683 } 684 685 // Target properties. 686 if (getTriple().getOS() != llvm::Triple::NetBSD) 687 Builder.defineMacro("_BIG_ENDIAN"); 688 Builder.defineMacro("__BIG_ENDIAN__"); 689 690 // Subtarget options. 691 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 692 Builder.defineMacro("__REGISTER_PREFIX__", ""); 693 694 // FIXME: Should be controlled by command line option. 695 Builder.defineMacro("__LONG_DOUBLE_128__"); 696 697 if (Opts.AltiVec) { 698 Builder.defineMacro("__VEC__", "10206"); 699 Builder.defineMacro("__ALTIVEC__"); 700 } 701 } 702 703 704 const char * const PPCTargetInfo::GCCRegNames[] = { 705 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 706 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 707 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 708 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 709 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 710 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 711 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 712 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 713 "mq", "lr", "ctr", "ap", 714 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 715 "xer", 716 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 717 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 718 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 719 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 720 "vrsave", "vscr", 721 "spe_acc", "spefscr", 722 "sfp" 723 }; 724 725 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 726 unsigned &NumNames) const { 727 Names = GCCRegNames; 728 NumNames = llvm::array_lengthof(GCCRegNames); 729 } 730 731 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 732 // While some of these aliases do map to different registers 733 // they still share the same register name. 734 { { "0" }, "r0" }, 735 { { "1"}, "r1" }, 736 { { "2" }, "r2" }, 737 { { "3" }, "r3" }, 738 { { "4" }, "r4" }, 739 { { "5" }, "r5" }, 740 { { "6" }, "r6" }, 741 { { "7" }, "r7" }, 742 { { "8" }, "r8" }, 743 { { "9" }, "r9" }, 744 { { "10" }, "r10" }, 745 { { "11" }, "r11" }, 746 { { "12" }, "r12" }, 747 { { "13" }, "r13" }, 748 { { "14" }, "r14" }, 749 { { "15" }, "r15" }, 750 { { "16" }, "r16" }, 751 { { "17" }, "r17" }, 752 { { "18" }, "r18" }, 753 { { "19" }, "r19" }, 754 { { "20" }, "r20" }, 755 { { "21" }, "r21" }, 756 { { "22" }, "r22" }, 757 { { "23" }, "r23" }, 758 { { "24" }, "r24" }, 759 { { "25" }, "r25" }, 760 { { "26" }, "r26" }, 761 { { "27" }, "r27" }, 762 { { "28" }, "r28" }, 763 { { "29" }, "r29" }, 764 { { "30" }, "r30" }, 765 { { "31" }, "r31" }, 766 { { "fr0" }, "f0" }, 767 { { "fr1" }, "f1" }, 768 { { "fr2" }, "f2" }, 769 { { "fr3" }, "f3" }, 770 { { "fr4" }, "f4" }, 771 { { "fr5" }, "f5" }, 772 { { "fr6" }, "f6" }, 773 { { "fr7" }, "f7" }, 774 { { "fr8" }, "f8" }, 775 { { "fr9" }, "f9" }, 776 { { "fr10" }, "f10" }, 777 { { "fr11" }, "f11" }, 778 { { "fr12" }, "f12" }, 779 { { "fr13" }, "f13" }, 780 { { "fr14" }, "f14" }, 781 { { "fr15" }, "f15" }, 782 { { "fr16" }, "f16" }, 783 { { "fr17" }, "f17" }, 784 { { "fr18" }, "f18" }, 785 { { "fr19" }, "f19" }, 786 { { "fr20" }, "f20" }, 787 { { "fr21" }, "f21" }, 788 { { "fr22" }, "f22" }, 789 { { "fr23" }, "f23" }, 790 { { "fr24" }, "f24" }, 791 { { "fr25" }, "f25" }, 792 { { "fr26" }, "f26" }, 793 { { "fr27" }, "f27" }, 794 { { "fr28" }, "f28" }, 795 { { "fr29" }, "f29" }, 796 { { "fr30" }, "f30" }, 797 { { "fr31" }, "f31" }, 798 { { "cc" }, "cr0" }, 799 }; 800 801 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 802 unsigned &NumAliases) const { 803 Aliases = GCCRegAliases; 804 NumAliases = llvm::array_lengthof(GCCRegAliases); 805 } 806 } // end anonymous namespace. 807 808 namespace { 809 class PPC32TargetInfo : public PPCTargetInfo { 810 public: 811 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 812 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 813 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 814 815 switch (getTriple().getOS()) { 816 case llvm::Triple::FreeBSD: 817 case llvm::Triple::NetBSD: 818 SizeType = UnsignedInt; 819 break; 820 default: 821 break; 822 } 823 } 824 825 virtual const char *getVAListDeclaration() const { 826 // This is the ELF definition, and is overridden by the Darwin sub-target 827 return "typedef struct __va_list_tag {" 828 " unsigned char gpr;" 829 " unsigned char fpr;" 830 " unsigned short reserved;" 831 " void* overflow_arg_area;" 832 " void* reg_save_area;" 833 "} __builtin_va_list[1];"; 834 } 835 }; 836 } // end anonymous namespace. 837 838 namespace { 839 class PPC64TargetInfo : public PPCTargetInfo { 840 public: 841 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 842 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 843 IntMaxType = SignedLong; 844 UIntMaxType = UnsignedLong; 845 Int64Type = SignedLong; 846 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 847 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 848 } 849 virtual const char *getVAListDeclaration() const { 850 return "typedef char* __builtin_va_list;"; 851 } 852 }; 853 } // end anonymous namespace. 854 855 856 namespace { 857 class DarwinPPC32TargetInfo : 858 public DarwinTargetInfo<PPC32TargetInfo> { 859 public: 860 DarwinPPC32TargetInfo(const std::string& triple) 861 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 862 HasAlignMac68kSupport = true; 863 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 864 } 865 virtual const char *getVAListDeclaration() const { 866 return "typedef char* __builtin_va_list;"; 867 } 868 }; 869 870 class DarwinPPC64TargetInfo : 871 public DarwinTargetInfo<PPC64TargetInfo> { 872 public: 873 DarwinPPC64TargetInfo(const std::string& triple) 874 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 875 HasAlignMac68kSupport = true; 876 } 877 }; 878 } // end anonymous namespace. 879 880 namespace { 881 class PTXTargetInfo : public TargetInfo { 882 static const char * const GCCRegNames[]; 883 static const Builtin::Info BuiltinInfo[]; 884 std::vector<llvm::StringRef> AvailableFeatures; 885 public: 886 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 887 TLSSupported = false; 888 LongWidth = LongAlign = 64; 889 // Define available target features 890 // These must be defined in sorted order! 891 AvailableFeatures.push_back("compute10"); 892 AvailableFeatures.push_back("compute11"); 893 AvailableFeatures.push_back("compute12"); 894 AvailableFeatures.push_back("compute13"); 895 AvailableFeatures.push_back("compute20"); 896 AvailableFeatures.push_back("double"); 897 AvailableFeatures.push_back("no-fma"); 898 AvailableFeatures.push_back("ptx20"); 899 AvailableFeatures.push_back("ptx21"); 900 AvailableFeatures.push_back("ptx22"); 901 AvailableFeatures.push_back("ptx23"); 902 AvailableFeatures.push_back("sm10"); 903 AvailableFeatures.push_back("sm11"); 904 AvailableFeatures.push_back("sm12"); 905 AvailableFeatures.push_back("sm13"); 906 AvailableFeatures.push_back("sm20"); 907 AvailableFeatures.push_back("sm21"); 908 AvailableFeatures.push_back("sm22"); 909 AvailableFeatures.push_back("sm23"); 910 } 911 virtual void getTargetDefines(const LangOptions &Opts, 912 MacroBuilder &Builder) const { 913 Builder.defineMacro("__PTX__"); 914 } 915 virtual void getTargetBuiltins(const Builtin::Info *&Records, 916 unsigned &NumRecords) const { 917 Records = BuiltinInfo; 918 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 919 } 920 921 virtual void getGCCRegNames(const char * const *&Names, 922 unsigned &NumNames) const; 923 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 924 unsigned &NumAliases) const { 925 // No aliases. 926 Aliases = 0; 927 NumAliases = 0; 928 } 929 virtual bool validateAsmConstraint(const char *&Name, 930 TargetInfo::ConstraintInfo &info) const { 931 // FIXME: implement 932 return true; 933 } 934 virtual const char *getClobbers() const { 935 // FIXME: Is this really right? 936 return ""; 937 } 938 virtual const char *getVAListDeclaration() const { 939 // FIXME: implement 940 return "typedef char* __builtin_va_list;"; 941 } 942 943 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 944 const std::string &Name, 945 bool Enabled) const; 946 }; 947 948 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 949 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 950 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 951 ALL_LANGUAGES }, 952 #include "clang/Basic/BuiltinsPTX.def" 953 }; 954 955 const char * const PTXTargetInfo::GCCRegNames[] = { 956 "r0" 957 }; 958 959 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 960 unsigned &NumNames) const { 961 Names = GCCRegNames; 962 NumNames = llvm::array_lengthof(GCCRegNames); 963 } 964 965 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 966 const std::string &Name, 967 bool Enabled) const { 968 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 969 Name)) { 970 Features[Name] = Enabled; 971 return true; 972 } else { 973 return false; 974 } 975 } 976 977 class PTX32TargetInfo : public PTXTargetInfo { 978 public: 979 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 980 PointerWidth = PointerAlign = 32; 981 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 982 DescriptionString 983 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 984 } 985 }; 986 987 class PTX64TargetInfo : public PTXTargetInfo { 988 public: 989 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 990 PointerWidth = PointerAlign = 64; 991 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 992 DescriptionString 993 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 994 } 995 }; 996 } 997 998 namespace { 999 // MBlaze abstract base class 1000 class MBlazeTargetInfo : public TargetInfo { 1001 static const char * const GCCRegNames[]; 1002 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1003 1004 public: 1005 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1006 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1007 } 1008 1009 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1010 unsigned &NumRecords) const { 1011 // FIXME: Implement. 1012 Records = 0; 1013 NumRecords = 0; 1014 } 1015 1016 virtual void getTargetDefines(const LangOptions &Opts, 1017 MacroBuilder &Builder) const; 1018 1019 virtual const char *getVAListDeclaration() const { 1020 return "typedef char* __builtin_va_list;"; 1021 } 1022 virtual const char *getTargetPrefix() const { 1023 return "mblaze"; 1024 } 1025 virtual void getGCCRegNames(const char * const *&Names, 1026 unsigned &NumNames) const; 1027 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1028 unsigned &NumAliases) const; 1029 virtual bool validateAsmConstraint(const char *&Name, 1030 TargetInfo::ConstraintInfo &Info) const { 1031 switch (*Name) { 1032 default: return false; 1033 case 'O': // Zero 1034 return true; 1035 case 'b': // Base register 1036 case 'f': // Floating point register 1037 Info.setAllowsRegister(); 1038 return true; 1039 } 1040 } 1041 virtual const char *getClobbers() const { 1042 return ""; 1043 } 1044 }; 1045 1046 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1047 /// #defines that are not tied to a specific subtarget. 1048 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1049 MacroBuilder &Builder) const { 1050 // Target identification. 1051 Builder.defineMacro("__microblaze__"); 1052 Builder.defineMacro("_ARCH_MICROBLAZE"); 1053 Builder.defineMacro("__MICROBLAZE__"); 1054 1055 // Target properties. 1056 Builder.defineMacro("_BIG_ENDIAN"); 1057 Builder.defineMacro("__BIG_ENDIAN__"); 1058 1059 // Subtarget options. 1060 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1061 } 1062 1063 1064 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1065 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1066 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1067 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1068 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1069 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1070 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1071 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1072 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1073 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1074 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1075 }; 1076 1077 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1078 unsigned &NumNames) const { 1079 Names = GCCRegNames; 1080 NumNames = llvm::array_lengthof(GCCRegNames); 1081 } 1082 1083 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1084 { {"f0"}, "r0" }, 1085 { {"f1"}, "r1" }, 1086 { {"f2"}, "r2" }, 1087 { {"f3"}, "r3" }, 1088 { {"f4"}, "r4" }, 1089 { {"f5"}, "r5" }, 1090 { {"f6"}, "r6" }, 1091 { {"f7"}, "r7" }, 1092 { {"f8"}, "r8" }, 1093 { {"f9"}, "r9" }, 1094 { {"f10"}, "r10" }, 1095 { {"f11"}, "r11" }, 1096 { {"f12"}, "r12" }, 1097 { {"f13"}, "r13" }, 1098 { {"f14"}, "r14" }, 1099 { {"f15"}, "r15" }, 1100 { {"f16"}, "r16" }, 1101 { {"f17"}, "r17" }, 1102 { {"f18"}, "r18" }, 1103 { {"f19"}, "r19" }, 1104 { {"f20"}, "r20" }, 1105 { {"f21"}, "r21" }, 1106 { {"f22"}, "r22" }, 1107 { {"f23"}, "r23" }, 1108 { {"f24"}, "r24" }, 1109 { {"f25"}, "r25" }, 1110 { {"f26"}, "r26" }, 1111 { {"f27"}, "r27" }, 1112 { {"f28"}, "r28" }, 1113 { {"f29"}, "r29" }, 1114 { {"f30"}, "r30" }, 1115 { {"f31"}, "r31" }, 1116 }; 1117 1118 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1119 unsigned &NumAliases) const { 1120 Aliases = GCCRegAliases; 1121 NumAliases = llvm::array_lengthof(GCCRegAliases); 1122 } 1123 } // end anonymous namespace. 1124 1125 namespace { 1126 // Namespace for x86 abstract base class 1127 const Builtin::Info BuiltinInfo[] = { 1128 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1129 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1130 ALL_LANGUAGES }, 1131 #include "clang/Basic/BuiltinsX86.def" 1132 }; 1133 1134 static const char* const GCCRegNames[] = { 1135 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1136 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1137 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1138 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1139 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1140 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1141 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1142 }; 1143 1144 const TargetInfo::AddlRegName AddlRegNames[] = { 1145 { { "al", "ah", "eax", "rax" }, 0 }, 1146 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1147 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1148 { { "dl", "dh", "edx", "rdx" }, 1 }, 1149 { { "esi", "rsi" }, 4 }, 1150 { { "edi", "rdi" }, 5 }, 1151 { { "esp", "rsp" }, 7 }, 1152 { { "ebp", "rbp" }, 6 }, 1153 }; 1154 1155 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1156 // most of the implementation can be shared. 1157 class X86TargetInfo : public TargetInfo { 1158 enum X86SSEEnum { 1159 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1160 } SSELevel; 1161 enum MMX3DNowEnum { 1162 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1163 } MMX3DNowLevel; 1164 1165 bool HasAES; 1166 bool HasAVX; 1167 1168 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1169 /// 1170 /// Each enumeration represents a particular CPU supported by Clang. These 1171 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1172 enum CPUKind { 1173 CK_Generic, 1174 1175 /// \name i386 1176 /// i386-generation processors. 1177 //@{ 1178 CK_i386, 1179 //@} 1180 1181 /// \name i486 1182 /// i486-generation processors. 1183 //@{ 1184 CK_i486, 1185 CK_WinChipC6, 1186 CK_WinChip2, 1187 CK_C3, 1188 //@} 1189 1190 /// \name i586 1191 /// i586-generation processors, P5 microarchitecture based. 1192 //@{ 1193 CK_i586, 1194 CK_Pentium, 1195 CK_PentiumMMX, 1196 //@} 1197 1198 /// \name i686 1199 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1200 //@{ 1201 CK_i686, 1202 CK_PentiumPro, 1203 CK_Pentium2, 1204 CK_Pentium3, 1205 CK_Pentium3M, 1206 CK_PentiumM, 1207 CK_C3_2, 1208 1209 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1210 /// Clang however has some logic to suport this. 1211 // FIXME: Warn, deprecate, and potentially remove this. 1212 CK_Yonah, 1213 //@} 1214 1215 /// \name Netburst 1216 /// Netburst microarchitecture based processors. 1217 //@{ 1218 CK_Pentium4, 1219 CK_Pentium4M, 1220 CK_Prescott, 1221 CK_Nocona, 1222 //@} 1223 1224 /// \name Core 1225 /// Core microarchitecture based processors. 1226 //@{ 1227 CK_Core2, 1228 1229 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1230 /// codename which GCC no longer accepts as an option to -march, but Clang 1231 /// has some logic for recognizing it. 1232 // FIXME: Warn, deprecate, and potentially remove this. 1233 CK_Penryn, 1234 //@} 1235 1236 /// \name Atom 1237 /// Atom processors 1238 //@{ 1239 CK_Atom, 1240 //@} 1241 1242 /// \name Nehalem 1243 /// Nehalem microarchitecture based processors. 1244 //@{ 1245 CK_Corei7, 1246 CK_Corei7AVX, 1247 CK_CoreAVXi, 1248 //@} 1249 1250 /// \name K6 1251 /// K6 architecture processors. 1252 //@{ 1253 CK_K6, 1254 CK_K6_2, 1255 CK_K6_3, 1256 //@} 1257 1258 /// \name K7 1259 /// K7 architecture processors. 1260 //@{ 1261 CK_Athlon, 1262 CK_AthlonThunderbird, 1263 CK_Athlon4, 1264 CK_AthlonXP, 1265 CK_AthlonMP, 1266 //@} 1267 1268 /// \name K8 1269 /// K8 architecture processors. 1270 //@{ 1271 CK_Athlon64, 1272 CK_Athlon64SSE3, 1273 CK_AthlonFX, 1274 CK_K8, 1275 CK_K8SSE3, 1276 CK_Opteron, 1277 CK_OpteronSSE3, 1278 1279 /// This specification is deprecated and will be removed in the future. 1280 /// Users should prefer \see CK_K8. 1281 // FIXME: Warn on this when the CPU is set to it. 1282 CK_x86_64, 1283 //@} 1284 1285 /// \name Geode 1286 /// Geode processors. 1287 //@{ 1288 CK_Geode 1289 //@} 1290 } CPU; 1291 1292 public: 1293 X86TargetInfo(const std::string& triple) 1294 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1295 HasAES(false), HasAVX(false), CPU(CK_Generic) { 1296 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1297 } 1298 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1299 unsigned &NumRecords) const { 1300 Records = BuiltinInfo; 1301 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1302 } 1303 virtual void getGCCRegNames(const char * const *&Names, 1304 unsigned &NumNames) const { 1305 Names = GCCRegNames; 1306 NumNames = llvm::array_lengthof(GCCRegNames); 1307 } 1308 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1309 unsigned &NumAliases) const { 1310 Aliases = 0; 1311 NumAliases = 0; 1312 } 1313 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1314 unsigned &NumNames) const { 1315 Names = AddlRegNames; 1316 NumNames = llvm::array_lengthof(AddlRegNames); 1317 } 1318 virtual bool validateAsmConstraint(const char *&Name, 1319 TargetInfo::ConstraintInfo &info) const; 1320 virtual std::string convertConstraint(const char *&Constraint) const; 1321 virtual const char *getClobbers() const { 1322 return "~{dirflag},~{fpsr},~{flags}"; 1323 } 1324 virtual void getTargetDefines(const LangOptions &Opts, 1325 MacroBuilder &Builder) const; 1326 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1327 const std::string &Name, 1328 bool Enabled) const; 1329 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1330 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1331 virtual const char* getABI() const { 1332 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : ""; 1333 } 1334 virtual bool setCPU(const std::string &Name) { 1335 CPU = llvm::StringSwitch<CPUKind>(Name) 1336 .Case("i386", CK_i386) 1337 .Case("i486", CK_i486) 1338 .Case("winchip-c6", CK_WinChipC6) 1339 .Case("winchip2", CK_WinChip2) 1340 .Case("c3", CK_C3) 1341 .Case("i586", CK_i586) 1342 .Case("pentium", CK_Pentium) 1343 .Case("pentium-mmx", CK_PentiumMMX) 1344 .Case("i686", CK_i686) 1345 .Case("pentiumpro", CK_PentiumPro) 1346 .Case("pentium2", CK_Pentium2) 1347 .Case("pentium3", CK_Pentium3) 1348 .Case("pentium3m", CK_Pentium3M) 1349 .Case("pentium-m", CK_PentiumM) 1350 .Case("c3-2", CK_C3_2) 1351 .Case("yonah", CK_Yonah) 1352 .Case("pentium4", CK_Pentium4) 1353 .Case("pentium4m", CK_Pentium4M) 1354 .Case("prescott", CK_Prescott) 1355 .Case("nocona", CK_Nocona) 1356 .Case("core2", CK_Core2) 1357 .Case("penryn", CK_Penryn) 1358 .Case("atom", CK_Atom) 1359 .Case("corei7", CK_Corei7) 1360 .Case("corei7-avx", CK_Corei7AVX) 1361 .Case("core-avx-i", CK_CoreAVXi) 1362 .Case("k6", CK_K6) 1363 .Case("k6-2", CK_K6_2) 1364 .Case("k6-3", CK_K6_3) 1365 .Case("athlon", CK_Athlon) 1366 .Case("athlon-tbird", CK_AthlonThunderbird) 1367 .Case("athlon-4", CK_Athlon4) 1368 .Case("athlon-xp", CK_AthlonXP) 1369 .Case("athlon-mp", CK_AthlonMP) 1370 .Case("athlon64", CK_Athlon64) 1371 .Case("athlon64-sse3", CK_Athlon64SSE3) 1372 .Case("athlon-fx", CK_AthlonFX) 1373 .Case("k8", CK_K8) 1374 .Case("k8-sse3", CK_K8SSE3) 1375 .Case("opteron", CK_Opteron) 1376 .Case("opteron-sse3", CK_OpteronSSE3) 1377 .Case("x86-64", CK_x86_64) 1378 .Case("geode", CK_Geode) 1379 .Default(CK_Generic); 1380 1381 // Perform any per-CPU checks necessary to determine if this CPU is 1382 // acceptable. 1383 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1384 // invalid without explaining *why*. 1385 switch (CPU) { 1386 case CK_Generic: 1387 // No processor selected! 1388 return false; 1389 1390 case CK_i386: 1391 case CK_i486: 1392 case CK_WinChipC6: 1393 case CK_WinChip2: 1394 case CK_C3: 1395 case CK_i586: 1396 case CK_Pentium: 1397 case CK_PentiumMMX: 1398 case CK_i686: 1399 case CK_PentiumPro: 1400 case CK_Pentium2: 1401 case CK_Pentium3: 1402 case CK_Pentium3M: 1403 case CK_PentiumM: 1404 case CK_Yonah: 1405 case CK_C3_2: 1406 case CK_Pentium4: 1407 case CK_Pentium4M: 1408 case CK_Prescott: 1409 case CK_K6: 1410 case CK_K6_2: 1411 case CK_K6_3: 1412 case CK_Athlon: 1413 case CK_AthlonThunderbird: 1414 case CK_Athlon4: 1415 case CK_AthlonXP: 1416 case CK_AthlonMP: 1417 case CK_Geode: 1418 // Only accept certain architectures when compiling in 32-bit mode. 1419 if (PointerWidth != 32) 1420 return false; 1421 1422 // Fallthrough 1423 case CK_Nocona: 1424 case CK_Core2: 1425 case CK_Penryn: 1426 case CK_Atom: 1427 case CK_Corei7: 1428 case CK_Corei7AVX: 1429 case CK_CoreAVXi: 1430 case CK_Athlon64: 1431 case CK_Athlon64SSE3: 1432 case CK_AthlonFX: 1433 case CK_K8: 1434 case CK_K8SSE3: 1435 case CK_Opteron: 1436 case CK_OpteronSSE3: 1437 case CK_x86_64: 1438 return true; 1439 } 1440 llvm_unreachable("Unhandled CPU kind"); 1441 } 1442 }; 1443 1444 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1445 // FIXME: This should not be here. 1446 Features["3dnow"] = false; 1447 Features["3dnowa"] = false; 1448 Features["mmx"] = false; 1449 Features["sse"] = false; 1450 Features["sse2"] = false; 1451 Features["sse3"] = false; 1452 Features["ssse3"] = false; 1453 Features["sse41"] = false; 1454 Features["sse42"] = false; 1455 Features["aes"] = false; 1456 Features["avx"] = false; 1457 1458 // LLVM does not currently recognize this. 1459 // Features["sse4a"] = false; 1460 1461 // FIXME: This *really* should not be here. 1462 1463 // X86_64 always has SSE2. 1464 if (PointerWidth == 64) 1465 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1466 1467 switch (CPU) { 1468 case CK_Generic: 1469 case CK_i386: 1470 case CK_i486: 1471 case CK_i586: 1472 case CK_Pentium: 1473 case CK_i686: 1474 case CK_PentiumPro: 1475 break; 1476 case CK_PentiumMMX: 1477 case CK_Pentium2: 1478 setFeatureEnabled(Features, "mmx", true); 1479 break; 1480 case CK_Pentium3: 1481 case CK_Pentium3M: 1482 setFeatureEnabled(Features, "mmx", true); 1483 setFeatureEnabled(Features, "sse", true); 1484 break; 1485 case CK_PentiumM: 1486 case CK_Pentium4: 1487 case CK_Pentium4M: 1488 case CK_x86_64: 1489 setFeatureEnabled(Features, "mmx", true); 1490 setFeatureEnabled(Features, "sse2", true); 1491 break; 1492 case CK_Yonah: 1493 case CK_Prescott: 1494 case CK_Nocona: 1495 setFeatureEnabled(Features, "mmx", true); 1496 setFeatureEnabled(Features, "sse3", true); 1497 break; 1498 case CK_Core2: 1499 setFeatureEnabled(Features, "mmx", true); 1500 setFeatureEnabled(Features, "ssse3", true); 1501 break; 1502 case CK_Penryn: 1503 setFeatureEnabled(Features, "mmx", true); 1504 setFeatureEnabled(Features, "sse4", true); 1505 Features["sse42"] = false; 1506 break; 1507 case CK_Atom: 1508 setFeatureEnabled(Features, "mmx", true); 1509 setFeatureEnabled(Features, "ssse3", true); 1510 break; 1511 case CK_Corei7: 1512 setFeatureEnabled(Features, "mmx", true); 1513 setFeatureEnabled(Features, "sse4", true); 1514 setFeatureEnabled(Features, "aes", true); 1515 break; 1516 case CK_Corei7AVX: 1517 case CK_CoreAVXi: 1518 setFeatureEnabled(Features, "mmx", true); 1519 setFeatureEnabled(Features, "sse4", true); 1520 setFeatureEnabled(Features, "aes", true); 1521 //setFeatureEnabled(Features, "avx", true); 1522 break; 1523 case CK_K6: 1524 case CK_WinChipC6: 1525 setFeatureEnabled(Features, "mmx", true); 1526 break; 1527 case CK_K6_2: 1528 case CK_K6_3: 1529 case CK_WinChip2: 1530 case CK_C3: 1531 setFeatureEnabled(Features, "3dnow", true); 1532 break; 1533 case CK_Athlon: 1534 case CK_AthlonThunderbird: 1535 case CK_Geode: 1536 setFeatureEnabled(Features, "3dnowa", true); 1537 break; 1538 case CK_Athlon4: 1539 case CK_AthlonXP: 1540 case CK_AthlonMP: 1541 setFeatureEnabled(Features, "sse", true); 1542 setFeatureEnabled(Features, "3dnowa", true); 1543 break; 1544 case CK_K8: 1545 case CK_Opteron: 1546 case CK_Athlon64: 1547 case CK_AthlonFX: 1548 setFeatureEnabled(Features, "sse2", true); 1549 setFeatureEnabled(Features, "3dnowa", true); 1550 break; 1551 case CK_K8SSE3: 1552 case CK_OpteronSSE3: 1553 case CK_Athlon64SSE3: 1554 setFeatureEnabled(Features, "sse3", true); 1555 setFeatureEnabled(Features, "3dnowa", true); 1556 break; 1557 case CK_C3_2: 1558 setFeatureEnabled(Features, "mmx", true); 1559 setFeatureEnabled(Features, "sse", true); 1560 break; 1561 } 1562 } 1563 1564 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1565 const std::string &Name, 1566 bool Enabled) const { 1567 // FIXME: This *really* should not be here. We need some way of translating 1568 // options into llvm subtarget features. 1569 if (!Features.count(Name) && 1570 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1571 return false; 1572 1573 if (Enabled) { 1574 if (Name == "mmx") 1575 Features["mmx"] = true; 1576 else if (Name == "sse") 1577 Features["sse"] = true; 1578 else if (Name == "sse2") 1579 Features["sse"] = Features["sse2"] = true; 1580 else if (Name == "sse3") 1581 Features["sse"] = Features["sse2"] = Features["sse3"] = true; 1582 else if (Name == "ssse3") 1583 Features["sse"] = Features["sse2"] = Features["sse3"] = 1584 Features["ssse3"] = true; 1585 else if (Name == "sse4" || Name == "sse4.2") 1586 Features["sse"] = Features["sse2"] = Features["sse3"] = 1587 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1588 else if (Name == "sse4.1") 1589 Features["sse"] = Features["sse2"] = Features["sse3"] = 1590 Features["ssse3"] = Features["sse41"] = true; 1591 else if (Name == "3dnow") 1592 Features["mmx"] = Features["3dnow"] = true; 1593 else if (Name == "3dnowa") 1594 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1595 else if (Name == "aes") 1596 Features["aes"] = true; 1597 else if (Name == "avx") 1598 Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1599 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1600 } else { 1601 if (Name == "mmx") 1602 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1603 else if (Name == "sse") 1604 Features["sse"] = Features["sse2"] = Features["sse3"] = 1605 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1606 else if (Name == "sse2") 1607 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1608 Features["sse41"] = Features["sse42"] = false; 1609 else if (Name == "sse3") 1610 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1611 Features["sse42"] = false; 1612 else if (Name == "ssse3") 1613 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1614 else if (Name == "sse4" || Name == "sse4.1") 1615 Features["sse41"] = Features["sse42"] = false; 1616 else if (Name == "sse4.2") 1617 Features["sse42"] = false; 1618 else if (Name == "3dnow") 1619 Features["3dnow"] = Features["3dnowa"] = false; 1620 else if (Name == "3dnowa") 1621 Features["3dnowa"] = false; 1622 else if (Name == "aes") 1623 Features["aes"] = false; 1624 else if (Name == "avx") 1625 Features["avx"] = false; 1626 } 1627 1628 return true; 1629 } 1630 1631 /// HandleTargetOptions - Perform initialization based on the user 1632 /// configured set of features. 1633 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1634 // Remember the maximum enabled sselevel. 1635 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1636 // Ignore disabled features. 1637 if (Features[i][0] == '-') 1638 continue; 1639 1640 if (Features[i].substr(1) == "aes") { 1641 HasAES = true; 1642 continue; 1643 } 1644 1645 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1646 // For now let it be enabled together with other SSE levels. 1647 if (Features[i].substr(1) == "avx") { 1648 HasAVX = true; 1649 continue; 1650 } 1651 1652 assert(Features[i][0] == '+' && "Invalid target feature!"); 1653 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1654 .Case("sse42", SSE42) 1655 .Case("sse41", SSE41) 1656 .Case("ssse3", SSSE3) 1657 .Case("sse3", SSE3) 1658 .Case("sse2", SSE2) 1659 .Case("sse", SSE1) 1660 .Default(NoSSE); 1661 SSELevel = std::max(SSELevel, Level); 1662 1663 MMX3DNowEnum ThreeDNowLevel = 1664 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1665 .Case("3dnowa", AMD3DNowAthlon) 1666 .Case("3dnow", AMD3DNow) 1667 .Case("mmx", MMX) 1668 .Default(NoMMX3DNow); 1669 1670 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1671 } 1672 1673 // Don't tell the backend if we're turning off mmx; it will end up disabling 1674 // SSE, which we don't want. 1675 std::vector<std::string>::iterator it; 1676 it = std::find(Features.begin(), Features.end(), "-mmx"); 1677 if (it != Features.end()) 1678 Features.erase(it); 1679 } 1680 1681 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1682 /// definitions for this particular subtarget. 1683 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1684 MacroBuilder &Builder) const { 1685 // Target identification. 1686 if (PointerWidth == 64) { 1687 Builder.defineMacro("_LP64"); 1688 Builder.defineMacro("__LP64__"); 1689 Builder.defineMacro("__amd64__"); 1690 Builder.defineMacro("__amd64"); 1691 Builder.defineMacro("__x86_64"); 1692 Builder.defineMacro("__x86_64__"); 1693 } else { 1694 DefineStd(Builder, "i386", Opts); 1695 } 1696 1697 // Subtarget options. 1698 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1699 // truly should be based on -mtune options. 1700 switch (CPU) { 1701 case CK_Generic: 1702 break; 1703 case CK_i386: 1704 // The rest are coming from the i386 define above. 1705 Builder.defineMacro("__tune_i386__"); 1706 break; 1707 case CK_i486: 1708 case CK_WinChipC6: 1709 case CK_WinChip2: 1710 case CK_C3: 1711 Builder.defineMacro("__i486"); 1712 Builder.defineMacro("__i486__"); 1713 Builder.defineMacro("__tune_i486__"); 1714 break; 1715 case CK_PentiumMMX: 1716 Builder.defineMacro("__pentium_mmx__"); 1717 Builder.defineMacro("__tune_pentium_mmx__"); 1718 // Fallthrough 1719 case CK_i586: 1720 case CK_Pentium: 1721 Builder.defineMacro("__i586"); 1722 Builder.defineMacro("__i586__"); 1723 Builder.defineMacro("__tune_i586__"); 1724 Builder.defineMacro("__pentium"); 1725 Builder.defineMacro("__pentium__"); 1726 Builder.defineMacro("__tune_pentium__"); 1727 break; 1728 case CK_Pentium3: 1729 case CK_Pentium3M: 1730 case CK_PentiumM: 1731 Builder.defineMacro("__tune_pentium3__"); 1732 // Fallthrough 1733 case CK_Pentium2: 1734 case CK_C3_2: 1735 Builder.defineMacro("__tune_pentium2__"); 1736 // Fallthrough 1737 case CK_PentiumPro: 1738 Builder.defineMacro("__tune_i686__"); 1739 Builder.defineMacro("__tune_pentiumpro__"); 1740 // Fallthrough 1741 case CK_i686: 1742 Builder.defineMacro("__i686"); 1743 Builder.defineMacro("__i686__"); 1744 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1745 Builder.defineMacro("__pentiumpro"); 1746 Builder.defineMacro("__pentiumpro__"); 1747 break; 1748 case CK_Pentium4: 1749 case CK_Pentium4M: 1750 Builder.defineMacro("__pentium4"); 1751 Builder.defineMacro("__pentium4__"); 1752 Builder.defineMacro("__tune_pentium4__"); 1753 break; 1754 case CK_Yonah: 1755 case CK_Prescott: 1756 case CK_Nocona: 1757 Builder.defineMacro("__nocona"); 1758 Builder.defineMacro("__nocona__"); 1759 Builder.defineMacro("__tune_nocona__"); 1760 break; 1761 case CK_Core2: 1762 case CK_Penryn: 1763 Builder.defineMacro("__core2"); 1764 Builder.defineMacro("__core2__"); 1765 Builder.defineMacro("__tune_core2__"); 1766 break; 1767 case CK_Atom: 1768 Builder.defineMacro("__atom"); 1769 Builder.defineMacro("__atom__"); 1770 Builder.defineMacro("__tune_atom__"); 1771 break; 1772 case CK_Corei7: 1773 case CK_Corei7AVX: 1774 case CK_CoreAVXi: 1775 Builder.defineMacro("__corei7"); 1776 Builder.defineMacro("__corei7__"); 1777 Builder.defineMacro("__tune_corei7__"); 1778 break; 1779 case CK_K6_2: 1780 Builder.defineMacro("__k6_2__"); 1781 Builder.defineMacro("__tune_k6_2__"); 1782 // Fallthrough 1783 case CK_K6_3: 1784 if (CPU != CK_K6_2) { // In case of fallthrough 1785 // FIXME: GCC may be enabling these in cases where some other k6 1786 // architecture is specified but -m3dnow is explicitly provided. The 1787 // exact semantics need to be determined and emulated here. 1788 Builder.defineMacro("__k6_3__"); 1789 Builder.defineMacro("__tune_k6_3__"); 1790 } 1791 // Fallthrough 1792 case CK_K6: 1793 Builder.defineMacro("__k6"); 1794 Builder.defineMacro("__k6__"); 1795 Builder.defineMacro("__tune_k6__"); 1796 break; 1797 case CK_Athlon: 1798 case CK_AthlonThunderbird: 1799 case CK_Athlon4: 1800 case CK_AthlonXP: 1801 case CK_AthlonMP: 1802 Builder.defineMacro("__athlon"); 1803 Builder.defineMacro("__athlon__"); 1804 Builder.defineMacro("__tune_athlon__"); 1805 if (SSELevel != NoSSE) { 1806 Builder.defineMacro("__athlon_sse__"); 1807 Builder.defineMacro("__tune_athlon_sse__"); 1808 } 1809 break; 1810 case CK_K8: 1811 case CK_K8SSE3: 1812 case CK_x86_64: 1813 case CK_Opteron: 1814 case CK_OpteronSSE3: 1815 case CK_Athlon64: 1816 case CK_Athlon64SSE3: 1817 case CK_AthlonFX: 1818 Builder.defineMacro("__k8"); 1819 Builder.defineMacro("__k8__"); 1820 Builder.defineMacro("__tune_k8__"); 1821 break; 1822 case CK_Geode: 1823 Builder.defineMacro("__geode"); 1824 Builder.defineMacro("__geode__"); 1825 Builder.defineMacro("__tune_geode__"); 1826 break; 1827 } 1828 1829 // Target properties. 1830 Builder.defineMacro("__LITTLE_ENDIAN__"); 1831 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1832 1833 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1834 // functions in glibc header files that use FP Stack inline asm which the 1835 // backend can't deal with (PR879). 1836 Builder.defineMacro("__NO_MATH_INLINES"); 1837 1838 if (HasAES) 1839 Builder.defineMacro("__AES__"); 1840 1841 if (HasAVX) 1842 Builder.defineMacro("__AVX__"); 1843 1844 // Each case falls through to the previous one here. 1845 switch (SSELevel) { 1846 case SSE42: 1847 Builder.defineMacro("__SSE4_2__"); 1848 case SSE41: 1849 Builder.defineMacro("__SSE4_1__"); 1850 case SSSE3: 1851 Builder.defineMacro("__SSSE3__"); 1852 case SSE3: 1853 Builder.defineMacro("__SSE3__"); 1854 case SSE2: 1855 Builder.defineMacro("__SSE2__"); 1856 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1857 case SSE1: 1858 Builder.defineMacro("__SSE__"); 1859 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1860 case NoSSE: 1861 break; 1862 } 1863 1864 if (Opts.MicrosoftExt && PointerWidth == 32) { 1865 switch (SSELevel) { 1866 case SSE42: 1867 case SSE41: 1868 case SSSE3: 1869 case SSE3: 1870 case SSE2: 1871 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1872 break; 1873 case SSE1: 1874 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1875 break; 1876 default: 1877 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1878 } 1879 } 1880 1881 // Each case falls through to the previous one here. 1882 switch (MMX3DNowLevel) { 1883 case AMD3DNowAthlon: 1884 Builder.defineMacro("__3dNOW_A__"); 1885 case AMD3DNow: 1886 Builder.defineMacro("__3dNOW__"); 1887 case MMX: 1888 Builder.defineMacro("__MMX__"); 1889 case NoMMX3DNow: 1890 break; 1891 } 1892 } 1893 1894 1895 bool 1896 X86TargetInfo::validateAsmConstraint(const char *&Name, 1897 TargetInfo::ConstraintInfo &Info) const { 1898 switch (*Name) { 1899 default: return false; 1900 case 'Y': // first letter of a pair: 1901 switch (*(Name+1)) { 1902 default: return false; 1903 case '0': // First SSE register. 1904 case 't': // Any SSE register, when SSE2 is enabled. 1905 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1906 case 'm': // any MMX register, when inter-unit moves enabled. 1907 break; // falls through to setAllowsRegister. 1908 } 1909 case 'a': // eax. 1910 case 'b': // ebx. 1911 case 'c': // ecx. 1912 case 'd': // edx. 1913 case 'S': // esi. 1914 case 'D': // edi. 1915 case 'A': // edx:eax. 1916 case 'f': // any x87 floating point stack register. 1917 case 't': // top of floating point stack. 1918 case 'u': // second from top of floating point stack. 1919 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1920 case 'y': // Any MMX register. 1921 case 'x': // Any SSE register. 1922 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1923 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1924 case 'l': // "Index" registers: any general register that can be used as an 1925 // index in a base+index memory access. 1926 Info.setAllowsRegister(); 1927 return true; 1928 case 'C': // SSE floating point constant. 1929 case 'G': // x87 floating point constant. 1930 case 'e': // 32-bit signed integer constant for use with zero-extending 1931 // x86_64 instructions. 1932 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1933 // x86_64 instructions. 1934 return true; 1935 } 1936 return false; 1937 } 1938 1939 1940 std::string 1941 X86TargetInfo::convertConstraint(const char *&Constraint) const { 1942 switch (*Constraint) { 1943 case 'a': return std::string("{ax}"); 1944 case 'b': return std::string("{bx}"); 1945 case 'c': return std::string("{cx}"); 1946 case 'd': return std::string("{dx}"); 1947 case 'S': return std::string("{si}"); 1948 case 'D': return std::string("{di}"); 1949 case 'p': // address 1950 return std::string("im"); 1951 case 't': // top of floating point stack. 1952 return std::string("{st}"); 1953 case 'u': // second from top of floating point stack. 1954 return std::string("{st(1)}"); // second from top of floating point stack. 1955 default: 1956 return std::string(1, *Constraint); 1957 } 1958 } 1959 } // end anonymous namespace 1960 1961 namespace { 1962 // X86-32 generic target 1963 class X86_32TargetInfo : public X86TargetInfo { 1964 public: 1965 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1966 DoubleAlign = LongLongAlign = 32; 1967 LongDoubleWidth = 96; 1968 LongDoubleAlign = 32; 1969 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1970 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1971 "a0:0:64-f80:32:32-n8:16:32"; 1972 SizeType = UnsignedInt; 1973 PtrDiffType = SignedInt; 1974 IntPtrType = SignedInt; 1975 RegParmMax = 3; 1976 1977 // Use fpret for all types. 1978 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1979 (1 << TargetInfo::Double) | 1980 (1 << TargetInfo::LongDouble)); 1981 } 1982 virtual const char *getVAListDeclaration() const { 1983 return "typedef char* __builtin_va_list;"; 1984 } 1985 1986 int getEHDataRegisterNumber(unsigned RegNo) const { 1987 if (RegNo == 0) return 0; 1988 if (RegNo == 1) return 2; 1989 return -1; 1990 } 1991 }; 1992 } // end anonymous namespace 1993 1994 namespace { 1995 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 1996 public: 1997 OpenBSDI386TargetInfo(const std::string& triple) : 1998 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 1999 SizeType = UnsignedLong; 2000 IntPtrType = SignedLong; 2001 PtrDiffType = SignedLong; 2002 } 2003 }; 2004 } // end anonymous namespace 2005 2006 namespace { 2007 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2008 public: 2009 DarwinI386TargetInfo(const std::string& triple) : 2010 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2011 LongDoubleWidth = 128; 2012 LongDoubleAlign = 128; 2013 SizeType = UnsignedLong; 2014 IntPtrType = SignedLong; 2015 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2016 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2017 "a0:0:64-f80:128:128-n8:16:32"; 2018 HasAlignMac68kSupport = true; 2019 } 2020 2021 }; 2022 } // end anonymous namespace 2023 2024 namespace { 2025 // x86-32 Windows target 2026 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2027 public: 2028 WindowsX86_32TargetInfo(const std::string& triple) 2029 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2030 TLSSupported = false; 2031 WCharType = UnsignedShort; 2032 DoubleAlign = LongLongAlign = 64; 2033 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2034 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2035 "v128:128:128-a0:0:64-f80:32:32-n8:16:32"; 2036 } 2037 virtual void getTargetDefines(const LangOptions &Opts, 2038 MacroBuilder &Builder) const { 2039 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2040 } 2041 }; 2042 } // end anonymous namespace 2043 2044 namespace { 2045 2046 // x86-32 Windows Visual Studio target 2047 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2048 public: 2049 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2050 : WindowsX86_32TargetInfo(triple) { 2051 LongDoubleWidth = LongDoubleAlign = 64; 2052 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2053 } 2054 virtual void getTargetDefines(const LangOptions &Opts, 2055 MacroBuilder &Builder) const { 2056 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2057 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2058 // The value of the following reflects processor type. 2059 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2060 // We lost the original triple, so we use the default. 2061 Builder.defineMacro("_M_IX86", "600"); 2062 } 2063 }; 2064 } // end anonymous namespace 2065 2066 namespace { 2067 // x86-32 MinGW target 2068 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2069 public: 2070 MinGWX86_32TargetInfo(const std::string& triple) 2071 : WindowsX86_32TargetInfo(triple) { 2072 } 2073 virtual void getTargetDefines(const LangOptions &Opts, 2074 MacroBuilder &Builder) const { 2075 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2076 DefineStd(Builder, "WIN32", Opts); 2077 DefineStd(Builder, "WINNT", Opts); 2078 Builder.defineMacro("_X86_"); 2079 Builder.defineMacro("__MSVCRT__"); 2080 Builder.defineMacro("__MINGW32__"); 2081 2082 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2083 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2084 if (Opts.MicrosoftExt) 2085 // Provide "as-is" __declspec. 2086 Builder.defineMacro("__declspec", "__declspec"); 2087 else 2088 // Provide alias of __attribute__ like mingw32-gcc. 2089 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2090 } 2091 }; 2092 } // end anonymous namespace 2093 2094 namespace { 2095 // x86-32 Cygwin target 2096 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2097 public: 2098 CygwinX86_32TargetInfo(const std::string& triple) 2099 : X86_32TargetInfo(triple) { 2100 TLSSupported = false; 2101 WCharType = UnsignedShort; 2102 DoubleAlign = LongLongAlign = 64; 2103 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2104 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2105 "a0:0:64-f80:32:32-n8:16:32"; 2106 } 2107 virtual void getTargetDefines(const LangOptions &Opts, 2108 MacroBuilder &Builder) const { 2109 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2110 Builder.defineMacro("__CYGWIN__"); 2111 Builder.defineMacro("__CYGWIN32__"); 2112 DefineStd(Builder, "unix", Opts); 2113 if (Opts.CPlusPlus) 2114 Builder.defineMacro("_GNU_SOURCE"); 2115 } 2116 }; 2117 } // end anonymous namespace 2118 2119 namespace { 2120 // x86-32 Haiku target 2121 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2122 public: 2123 HaikuX86_32TargetInfo(const std::string& triple) 2124 : X86_32TargetInfo(triple) { 2125 SizeType = UnsignedLong; 2126 IntPtrType = SignedLong; 2127 PtrDiffType = SignedLong; 2128 this->UserLabelPrefix = ""; 2129 } 2130 virtual void getTargetDefines(const LangOptions &Opts, 2131 MacroBuilder &Builder) const { 2132 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2133 Builder.defineMacro("__INTEL__"); 2134 Builder.defineMacro("__HAIKU__"); 2135 } 2136 }; 2137 } // end anonymous namespace 2138 2139 // RTEMS Target 2140 template<typename Target> 2141 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2142 protected: 2143 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2144 MacroBuilder &Builder) const { 2145 // RTEMS defines; list based off of gcc output 2146 2147 Builder.defineMacro("__rtems__"); 2148 Builder.defineMacro("__ELF__"); 2149 } 2150 public: 2151 RTEMSTargetInfo(const std::string &triple) 2152 : OSTargetInfo<Target>(triple) { 2153 this->UserLabelPrefix = ""; 2154 2155 llvm::Triple Triple(triple); 2156 switch (Triple.getArch()) { 2157 default: 2158 case llvm::Triple::x86: 2159 // this->MCountName = ".mcount"; 2160 break; 2161 case llvm::Triple::mips: 2162 case llvm::Triple::mipsel: 2163 case llvm::Triple::ppc: 2164 case llvm::Triple::ppc64: 2165 // this->MCountName = "_mcount"; 2166 break; 2167 case llvm::Triple::arm: 2168 // this->MCountName = "__mcount"; 2169 break; 2170 } 2171 2172 } 2173 }; 2174 2175 namespace { 2176 // x86-32 RTEMS target 2177 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2178 public: 2179 RTEMSX86_32TargetInfo(const std::string& triple) 2180 : X86_32TargetInfo(triple) { 2181 SizeType = UnsignedLong; 2182 IntPtrType = SignedLong; 2183 PtrDiffType = SignedLong; 2184 this->UserLabelPrefix = ""; 2185 } 2186 virtual void getTargetDefines(const LangOptions &Opts, 2187 MacroBuilder &Builder) const { 2188 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2189 Builder.defineMacro("__INTEL__"); 2190 Builder.defineMacro("__rtems__"); 2191 } 2192 }; 2193 } // end anonymous namespace 2194 2195 namespace { 2196 // x86-64 generic target 2197 class X86_64TargetInfo : public X86TargetInfo { 2198 public: 2199 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2200 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2201 LongDoubleWidth = 128; 2202 LongDoubleAlign = 128; 2203 LargeArrayMinWidth = 128; 2204 LargeArrayAlign = 128; 2205 IntMaxType = SignedLong; 2206 UIntMaxType = UnsignedLong; 2207 Int64Type = SignedLong; 2208 RegParmMax = 6; 2209 2210 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2211 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2212 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"; 2213 2214 // Use fpret only for long double. 2215 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2216 } 2217 virtual const char *getVAListDeclaration() const { 2218 return "typedef struct __va_list_tag {" 2219 " unsigned gp_offset;" 2220 " unsigned fp_offset;" 2221 " void* overflow_arg_area;" 2222 " void* reg_save_area;" 2223 "} __va_list_tag;" 2224 "typedef __va_list_tag __builtin_va_list[1];"; 2225 } 2226 2227 int getEHDataRegisterNumber(unsigned RegNo) const { 2228 if (RegNo == 0) return 0; 2229 if (RegNo == 1) return 1; 2230 return -1; 2231 } 2232 }; 2233 } // end anonymous namespace 2234 2235 namespace { 2236 // x86-64 Windows target 2237 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2238 public: 2239 WindowsX86_64TargetInfo(const std::string& triple) 2240 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2241 TLSSupported = false; 2242 WCharType = UnsignedShort; 2243 LongWidth = LongAlign = 32; 2244 DoubleAlign = LongLongAlign = 64; 2245 IntMaxType = SignedLongLong; 2246 UIntMaxType = UnsignedLongLong; 2247 Int64Type = SignedLongLong; 2248 SizeType = UnsignedLongLong; 2249 PtrDiffType = SignedLongLong; 2250 IntPtrType = SignedLongLong; 2251 this->UserLabelPrefix = ""; 2252 } 2253 virtual void getTargetDefines(const LangOptions &Opts, 2254 MacroBuilder &Builder) const { 2255 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2256 Builder.defineMacro("_WIN64"); 2257 } 2258 virtual const char *getVAListDeclaration() const { 2259 return "typedef char* __builtin_va_list;"; 2260 } 2261 }; 2262 } // end anonymous namespace 2263 2264 namespace { 2265 // x86-64 Windows Visual Studio target 2266 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2267 public: 2268 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2269 : WindowsX86_64TargetInfo(triple) { 2270 LongDoubleWidth = LongDoubleAlign = 64; 2271 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2272 } 2273 virtual void getTargetDefines(const LangOptions &Opts, 2274 MacroBuilder &Builder) const { 2275 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2276 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2277 Builder.defineMacro("_M_X64"); 2278 Builder.defineMacro("_M_AMD64"); 2279 } 2280 }; 2281 } // end anonymous namespace 2282 2283 namespace { 2284 // x86-64 MinGW target 2285 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2286 public: 2287 MinGWX86_64TargetInfo(const std::string& triple) 2288 : WindowsX86_64TargetInfo(triple) { 2289 } 2290 virtual void getTargetDefines(const LangOptions &Opts, 2291 MacroBuilder &Builder) const { 2292 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2293 DefineStd(Builder, "WIN64", Opts); 2294 Builder.defineMacro("__MSVCRT__"); 2295 Builder.defineMacro("__MINGW32__"); 2296 Builder.defineMacro("__MINGW64__"); 2297 2298 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2299 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2300 if (Opts.MicrosoftExt) 2301 // Provide "as-is" __declspec. 2302 Builder.defineMacro("__declspec", "__declspec"); 2303 else 2304 // Provide alias of __attribute__ like mingw32-gcc. 2305 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2306 } 2307 }; 2308 } // end anonymous namespace 2309 2310 namespace { 2311 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2312 public: 2313 DarwinX86_64TargetInfo(const std::string& triple) 2314 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2315 Int64Type = SignedLongLong; 2316 } 2317 }; 2318 } // end anonymous namespace 2319 2320 namespace { 2321 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2322 public: 2323 OpenBSDX86_64TargetInfo(const std::string& triple) 2324 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2325 IntMaxType = SignedLongLong; 2326 UIntMaxType = UnsignedLongLong; 2327 Int64Type = SignedLongLong; 2328 } 2329 }; 2330 } // end anonymous namespace 2331 2332 namespace { 2333 class ARMTargetInfo : public TargetInfo { 2334 // Possible FPU choices. 2335 enum FPUMode { 2336 NoFPU, 2337 VFP2FPU, 2338 VFP3FPU, 2339 NeonFPU 2340 }; 2341 2342 static bool FPUModeIsVFP(FPUMode Mode) { 2343 return Mode >= VFP2FPU && Mode <= NeonFPU; 2344 } 2345 2346 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2347 static const char * const GCCRegNames[]; 2348 2349 std::string ABI, CPU; 2350 2351 unsigned FPU : 3; 2352 2353 unsigned IsThumb : 1; 2354 2355 // Initialized via features. 2356 unsigned SoftFloat : 1; 2357 unsigned SoftFloatABI : 1; 2358 2359 static const Builtin::Info BuiltinInfo[]; 2360 2361 public: 2362 ARMTargetInfo(const std::string &TripleStr) 2363 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2364 { 2365 SizeType = UnsignedInt; 2366 PtrDiffType = SignedInt; 2367 2368 // {} in inline assembly are neon specifiers, not assembly variant 2369 // specifiers. 2370 NoAsmVariants = true; 2371 2372 // FIXME: Should we just treat this as a feature? 2373 IsThumb = getTriple().getArchName().startswith("thumb"); 2374 if (IsThumb) { 2375 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2376 // so set preferred for small types to 32. 2377 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2378 "i64:64:64-f32:32:32-f64:64:64-" 2379 "v64:64:64-v128:64:128-a0:0:32-n32"); 2380 } else { 2381 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2382 "i64:64:64-f32:32:32-f64:64:64-" 2383 "v64:64:64-v128:64:128-a0:0:64-n32"); 2384 } 2385 2386 // ARM targets default to using the ARM C++ ABI. 2387 CXXABI = CXXABI_ARM; 2388 } 2389 virtual const char *getABI() const { return ABI.c_str(); } 2390 virtual bool setABI(const std::string &Name) { 2391 ABI = Name; 2392 2393 // The defaults (above) are for AAPCS, check if we need to change them. 2394 // 2395 // FIXME: We need support for -meabi... we could just mangle it into the 2396 // name. 2397 if (Name == "apcs-gnu") { 2398 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2399 SizeType = UnsignedLong; 2400 2401 // Do not respect the alignment of bit-field types when laying out 2402 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2403 UseBitFieldTypeAlignment = false; 2404 2405 /// Do force alignment of members that follow zero length bitfields. If 2406 /// the alignment of the zero-length bitfield is greater than the member 2407 /// that follows it, `bar', `bar' will be aligned as the type of the 2408 /// zero length bitfield. 2409 UseZeroLengthBitfieldAlignment = true; 2410 2411 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2412 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2413 /// gcc. 2414 ZeroLengthBitfieldBoundary = 32; 2415 2416 if (IsThumb) { 2417 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2418 // so set preferred for small types to 32. 2419 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2420 "i64:32:64-f32:32:32-f64:32:64-" 2421 "v64:32:64-v128:32:128-a0:0:32-n32"); 2422 } else { 2423 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2424 "i64:32:64-f32:32:32-f64:32:64-" 2425 "v64:32:64-v128:32:128-a0:0:32-n32"); 2426 } 2427 2428 // FIXME: Override "preferred align" for double and long long. 2429 } else if (Name == "aapcs") { 2430 // FIXME: Enumerated types are variable width in straight AAPCS. 2431 } else if (Name == "aapcs-linux") { 2432 ; 2433 } else 2434 return false; 2435 2436 return true; 2437 } 2438 2439 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2440 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2441 Features["vfp2"] = true; 2442 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2443 Features["neon"] = true; 2444 } 2445 2446 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2447 const std::string &Name, 2448 bool Enabled) const { 2449 if (Name == "soft-float" || Name == "soft-float-abi" || 2450 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2451 Features[Name] = Enabled; 2452 } else 2453 return false; 2454 2455 return true; 2456 } 2457 2458 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2459 FPU = NoFPU; 2460 SoftFloat = SoftFloatABI = false; 2461 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2462 if (Features[i] == "+soft-float") 2463 SoftFloat = true; 2464 else if (Features[i] == "+soft-float-abi") 2465 SoftFloatABI = true; 2466 else if (Features[i] == "+vfp2") 2467 FPU = VFP2FPU; 2468 else if (Features[i] == "+vfp3") 2469 FPU = VFP3FPU; 2470 else if (Features[i] == "+neon") 2471 FPU = NeonFPU; 2472 } 2473 2474 // Remove front-end specific options which the backend handles differently. 2475 std::vector<std::string>::iterator it; 2476 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2477 if (it != Features.end()) 2478 Features.erase(it); 2479 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2480 if (it != Features.end()) 2481 Features.erase(it); 2482 } 2483 2484 static const char *getCPUDefineSuffix(StringRef Name) { 2485 return llvm::StringSwitch<const char*>(Name) 2486 .Cases("arm8", "arm810", "4") 2487 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2488 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2489 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2490 .Case("ep9312", "4T") 2491 .Cases("arm10tdmi", "arm1020t", "5T") 2492 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2493 .Case("arm926ej-s", "5TEJ") 2494 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2495 .Cases("xscale", "iwmmxt", "5TE") 2496 .Case("arm1136j-s", "6J") 2497 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2498 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2499 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2500 .Cases("cortex-a8", "cortex-a9", "7A") 2501 .Case("cortex-m3", "7M") 2502 .Case("cortex-m0", "6M") 2503 .Default(0); 2504 } 2505 virtual bool setCPU(const std::string &Name) { 2506 if (!getCPUDefineSuffix(Name)) 2507 return false; 2508 2509 CPU = Name; 2510 return true; 2511 } 2512 virtual void getTargetDefines(const LangOptions &Opts, 2513 MacroBuilder &Builder) const { 2514 // Target identification. 2515 Builder.defineMacro("__arm"); 2516 Builder.defineMacro("__arm__"); 2517 2518 // Target properties. 2519 Builder.defineMacro("__ARMEL__"); 2520 Builder.defineMacro("__LITTLE_ENDIAN__"); 2521 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2522 2523 StringRef CPUArch = getCPUDefineSuffix(CPU); 2524 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2525 2526 // Subtarget options. 2527 2528 // FIXME: It's more complicated than this and we don't really support 2529 // interworking. 2530 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2531 Builder.defineMacro("__THUMB_INTERWORK__"); 2532 2533 if (ABI == "aapcs" || ABI == "aapcs-linux") 2534 Builder.defineMacro("__ARM_EABI__"); 2535 2536 if (SoftFloat) 2537 Builder.defineMacro("__SOFTFP__"); 2538 2539 if (CPU == "xscale") 2540 Builder.defineMacro("__XSCALE__"); 2541 2542 bool IsARMv7 = CPUArch.startswith("7"); 2543 if (IsThumb) { 2544 Builder.defineMacro("__THUMBEL__"); 2545 Builder.defineMacro("__thumb__"); 2546 if (CPUArch == "6T2" || IsARMv7) 2547 Builder.defineMacro("__thumb2__"); 2548 } 2549 2550 // Note, this is always on in gcc, even though it doesn't make sense. 2551 Builder.defineMacro("__APCS_32__"); 2552 2553 if (FPUModeIsVFP((FPUMode) FPU)) 2554 Builder.defineMacro("__VFP_FP__"); 2555 2556 // This only gets set when Neon instructions are actually available, unlike 2557 // the VFP define, hence the soft float and arch check. This is subtly 2558 // different from gcc, we follow the intent which was that it should be set 2559 // when Neon instructions are actually available. 2560 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2561 Builder.defineMacro("__ARM_NEON__"); 2562 } 2563 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2564 unsigned &NumRecords) const { 2565 Records = BuiltinInfo; 2566 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2567 } 2568 virtual const char *getVAListDeclaration() const { 2569 return "typedef void* __builtin_va_list;"; 2570 } 2571 virtual void getGCCRegNames(const char * const *&Names, 2572 unsigned &NumNames) const; 2573 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2574 unsigned &NumAliases) const; 2575 virtual bool validateAsmConstraint(const char *&Name, 2576 TargetInfo::ConstraintInfo &Info) const { 2577 // FIXME: Check if this is complete 2578 switch (*Name) { 2579 default: 2580 case 'l': // r0-r7 2581 case 'h': // r8-r15 2582 case 'w': // VFP Floating point register single precision 2583 case 'P': // VFP Floating point register double precision 2584 Info.setAllowsRegister(); 2585 return true; 2586 case 'Q': // A memory address that is a single base register. 2587 Info.setAllowsMemory(); 2588 return true; 2589 case 'U': // a memory reference... 2590 switch (Name[1]) { 2591 case 'q': // ...ARMV4 ldrsb 2592 case 'v': // ...VFP load/store (reg+constant offset) 2593 case 'y': // ...iWMMXt load/store 2594 case 't': // address valid for load/store opaque types wider 2595 // than 128-bits 2596 case 'n': // valid address for Neon doubleword vector load/store 2597 case 'm': // valid address for Neon element and structure load/store 2598 case 's': // valid address for non-offset loads/stores of quad-word 2599 // values in four ARM registers 2600 Info.setAllowsMemory(); 2601 Name++; 2602 return true; 2603 } 2604 } 2605 return false; 2606 } 2607 virtual std::string convertConstraint(const char *&Constraint) const { 2608 std::string R; 2609 switch (*Constraint) { 2610 case 'U': // Two-character constraint; add "^" hint for later parsing. 2611 R = std::string("^") + std::string(Constraint, 2); 2612 Constraint++; 2613 break; 2614 case 'p': // 'p' should be translated to 'r' by default. 2615 R = std::string("r"); 2616 break; 2617 default: 2618 return std::string(1, *Constraint); 2619 } 2620 return R; 2621 } 2622 virtual const char *getClobbers() const { 2623 // FIXME: Is this really right? 2624 return ""; 2625 } 2626 }; 2627 2628 const char * const ARMTargetInfo::GCCRegNames[] = { 2629 // Integer registers 2630 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2631 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2632 2633 // Float registers 2634 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2635 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2636 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2637 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2638 2639 // Double registers 2640 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2641 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2642 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2643 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2644 2645 // Quad registers 2646 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2647 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2648 }; 2649 2650 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2651 unsigned &NumNames) const { 2652 Names = GCCRegNames; 2653 NumNames = llvm::array_lengthof(GCCRegNames); 2654 } 2655 2656 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2657 { { "a1" }, "r0" }, 2658 { { "a2" }, "r1" }, 2659 { { "a3" }, "r2" }, 2660 { { "a4" }, "r3" }, 2661 { { "v1" }, "r4" }, 2662 { { "v2" }, "r5" }, 2663 { { "v3" }, "r6" }, 2664 { { "v4" }, "r7" }, 2665 { { "v5" }, "r8" }, 2666 { { "v6", "rfp" }, "r9" }, 2667 { { "sl" }, "r10" }, 2668 { { "fp" }, "r11" }, 2669 { { "ip" }, "r12" }, 2670 { { "r13" }, "sp" }, 2671 { { "r14" }, "lr" }, 2672 { { "r15" }, "pc" }, 2673 // The S, D and Q registers overlap, but aren't really aliases; we 2674 // don't want to substitute one of these for a different-sized one. 2675 }; 2676 2677 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2678 unsigned &NumAliases) const { 2679 Aliases = GCCRegAliases; 2680 NumAliases = llvm::array_lengthof(GCCRegAliases); 2681 } 2682 2683 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2684 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2685 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2686 ALL_LANGUAGES }, 2687 #include "clang/Basic/BuiltinsARM.def" 2688 }; 2689 } // end anonymous namespace. 2690 2691 2692 namespace { 2693 class DarwinARMTargetInfo : 2694 public DarwinTargetInfo<ARMTargetInfo> { 2695 protected: 2696 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2697 MacroBuilder &Builder) const { 2698 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2699 } 2700 2701 public: 2702 DarwinARMTargetInfo(const std::string& triple) 2703 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2704 HasAlignMac68kSupport = true; 2705 } 2706 }; 2707 } // end anonymous namespace. 2708 2709 namespace { 2710 class SparcV8TargetInfo : public TargetInfo { 2711 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2712 static const char * const GCCRegNames[]; 2713 bool SoftFloat; 2714 public: 2715 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2716 // FIXME: Support Sparc quad-precision long double? 2717 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2718 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2719 } 2720 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2721 const std::string &Name, 2722 bool Enabled) const { 2723 if (Name == "soft-float") 2724 Features[Name] = Enabled; 2725 else 2726 return false; 2727 2728 return true; 2729 } 2730 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2731 SoftFloat = false; 2732 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2733 if (Features[i] == "+soft-float") 2734 SoftFloat = true; 2735 } 2736 virtual void getTargetDefines(const LangOptions &Opts, 2737 MacroBuilder &Builder) const { 2738 DefineStd(Builder, "sparc", Opts); 2739 Builder.defineMacro("__sparcv8"); 2740 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2741 2742 if (SoftFloat) 2743 Builder.defineMacro("SOFT_FLOAT", "1"); 2744 } 2745 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2746 unsigned &NumRecords) const { 2747 // FIXME: Implement! 2748 } 2749 virtual const char *getVAListDeclaration() const { 2750 return "typedef void* __builtin_va_list;"; 2751 } 2752 virtual void getGCCRegNames(const char * const *&Names, 2753 unsigned &NumNames) const; 2754 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2755 unsigned &NumAliases) const; 2756 virtual bool validateAsmConstraint(const char *&Name, 2757 TargetInfo::ConstraintInfo &info) const { 2758 // FIXME: Implement! 2759 return false; 2760 } 2761 virtual const char *getClobbers() const { 2762 // FIXME: Implement! 2763 return ""; 2764 } 2765 }; 2766 2767 const char * const SparcV8TargetInfo::GCCRegNames[] = { 2768 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2769 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2770 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2771 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2772 }; 2773 2774 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2775 unsigned &NumNames) const { 2776 Names = GCCRegNames; 2777 NumNames = llvm::array_lengthof(GCCRegNames); 2778 } 2779 2780 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2781 { { "g0" }, "r0" }, 2782 { { "g1" }, "r1" }, 2783 { { "g2" }, "r2" }, 2784 { { "g3" }, "r3" }, 2785 { { "g4" }, "r4" }, 2786 { { "g5" }, "r5" }, 2787 { { "g6" }, "r6" }, 2788 { { "g7" }, "r7" }, 2789 { { "o0" }, "r8" }, 2790 { { "o1" }, "r9" }, 2791 { { "o2" }, "r10" }, 2792 { { "o3" }, "r11" }, 2793 { { "o4" }, "r12" }, 2794 { { "o5" }, "r13" }, 2795 { { "o6", "sp" }, "r14" }, 2796 { { "o7" }, "r15" }, 2797 { { "l0" }, "r16" }, 2798 { { "l1" }, "r17" }, 2799 { { "l2" }, "r18" }, 2800 { { "l3" }, "r19" }, 2801 { { "l4" }, "r20" }, 2802 { { "l5" }, "r21" }, 2803 { { "l6" }, "r22" }, 2804 { { "l7" }, "r23" }, 2805 { { "i0" }, "r24" }, 2806 { { "i1" }, "r25" }, 2807 { { "i2" }, "r26" }, 2808 { { "i3" }, "r27" }, 2809 { { "i4" }, "r28" }, 2810 { { "i5" }, "r29" }, 2811 { { "i6", "fp" }, "r30" }, 2812 { { "i7" }, "r31" }, 2813 }; 2814 2815 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2816 unsigned &NumAliases) const { 2817 Aliases = GCCRegAliases; 2818 NumAliases = llvm::array_lengthof(GCCRegAliases); 2819 } 2820 } // end anonymous namespace. 2821 2822 namespace { 2823 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2824 public: 2825 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2826 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2827 SizeType = UnsignedInt; 2828 PtrDiffType = SignedInt; 2829 } 2830 }; 2831 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2832 public: 2833 SolarisSparcV8TargetInfo(const std::string& triple) : 2834 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2835 SizeType = UnsignedInt; 2836 PtrDiffType = SignedInt; 2837 } 2838 }; 2839 } // end anonymous namespace. 2840 2841 namespace { 2842 class MSP430TargetInfo : public TargetInfo { 2843 static const char * const GCCRegNames[]; 2844 public: 2845 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2846 TLSSupported = false; 2847 IntWidth = 16; IntAlign = 16; 2848 LongWidth = 32; LongLongWidth = 64; 2849 LongAlign = LongLongAlign = 16; 2850 PointerWidth = 16; PointerAlign = 16; 2851 SizeType = UnsignedInt; 2852 IntMaxType = SignedLong; 2853 UIntMaxType = UnsignedLong; 2854 IntPtrType = SignedShort; 2855 PtrDiffType = SignedInt; 2856 SigAtomicType = SignedLong; 2857 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2858 } 2859 virtual void getTargetDefines(const LangOptions &Opts, 2860 MacroBuilder &Builder) const { 2861 Builder.defineMacro("MSP430"); 2862 Builder.defineMacro("__MSP430__"); 2863 // FIXME: defines for different 'flavours' of MCU 2864 } 2865 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2866 unsigned &NumRecords) const { 2867 // FIXME: Implement. 2868 Records = 0; 2869 NumRecords = 0; 2870 } 2871 virtual void getGCCRegNames(const char * const *&Names, 2872 unsigned &NumNames) const; 2873 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2874 unsigned &NumAliases) const { 2875 // No aliases. 2876 Aliases = 0; 2877 NumAliases = 0; 2878 } 2879 virtual bool validateAsmConstraint(const char *&Name, 2880 TargetInfo::ConstraintInfo &info) const { 2881 // No target constraints for now. 2882 return false; 2883 } 2884 virtual const char *getClobbers() const { 2885 // FIXME: Is this really right? 2886 return ""; 2887 } 2888 virtual const char *getVAListDeclaration() const { 2889 // FIXME: implement 2890 return "typedef char* __builtin_va_list;"; 2891 } 2892 }; 2893 2894 const char * const MSP430TargetInfo::GCCRegNames[] = { 2895 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2896 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2897 }; 2898 2899 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2900 unsigned &NumNames) const { 2901 Names = GCCRegNames; 2902 NumNames = llvm::array_lengthof(GCCRegNames); 2903 } 2904 } 2905 2906 2907 namespace { 2908 class SystemZTargetInfo : public TargetInfo { 2909 static const char * const GCCRegNames[]; 2910 public: 2911 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2912 TLSSupported = false; 2913 IntWidth = IntAlign = 32; 2914 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2915 PointerWidth = PointerAlign = 64; 2916 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2917 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2918 } 2919 virtual void getTargetDefines(const LangOptions &Opts, 2920 MacroBuilder &Builder) const { 2921 Builder.defineMacro("__s390__"); 2922 Builder.defineMacro("__s390x__"); 2923 } 2924 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2925 unsigned &NumRecords) const { 2926 // FIXME: Implement. 2927 Records = 0; 2928 NumRecords = 0; 2929 } 2930 2931 virtual void getGCCRegNames(const char * const *&Names, 2932 unsigned &NumNames) const; 2933 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2934 unsigned &NumAliases) const { 2935 // No aliases. 2936 Aliases = 0; 2937 NumAliases = 0; 2938 } 2939 virtual bool validateAsmConstraint(const char *&Name, 2940 TargetInfo::ConstraintInfo &info) const { 2941 // FIXME: implement 2942 return true; 2943 } 2944 virtual const char *getClobbers() const { 2945 // FIXME: Is this really right? 2946 return ""; 2947 } 2948 virtual const char *getVAListDeclaration() const { 2949 // FIXME: implement 2950 return "typedef char* __builtin_va_list;"; 2951 } 2952 }; 2953 2954 const char * const SystemZTargetInfo::GCCRegNames[] = { 2955 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2956 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2957 }; 2958 2959 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2960 unsigned &NumNames) const { 2961 Names = GCCRegNames; 2962 NumNames = llvm::array_lengthof(GCCRegNames); 2963 } 2964 } 2965 2966 namespace { 2967 class BlackfinTargetInfo : public TargetInfo { 2968 static const char * const GCCRegNames[]; 2969 public: 2970 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 2971 TLSSupported = false; 2972 DoubleAlign = 32; 2973 LongLongAlign = 32; 2974 LongDoubleAlign = 32; 2975 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 2976 } 2977 2978 virtual void getTargetDefines(const LangOptions &Opts, 2979 MacroBuilder &Builder) const { 2980 DefineStd(Builder, "bfin", Opts); 2981 DefineStd(Builder, "BFIN", Opts); 2982 Builder.defineMacro("__ADSPBLACKFIN__"); 2983 // FIXME: This one is really dependent on -mcpu 2984 Builder.defineMacro("__ADSPLPBLACKFIN__"); 2985 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 2986 } 2987 2988 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2989 unsigned &NumRecords) const { 2990 // FIXME: Implement. 2991 Records = 0; 2992 NumRecords = 0; 2993 } 2994 2995 virtual void getGCCRegNames(const char * const *&Names, 2996 unsigned &NumNames) const; 2997 2998 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2999 unsigned &NumAliases) const { 3000 // No aliases. 3001 Aliases = 0; 3002 NumAliases = 0; 3003 } 3004 3005 virtual bool validateAsmConstraint(const char *&Name, 3006 TargetInfo::ConstraintInfo &Info) const { 3007 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 3008 Info.setAllowsRegister(); 3009 return true; 3010 } 3011 return false; 3012 } 3013 3014 virtual const char *getClobbers() const { 3015 return ""; 3016 } 3017 3018 virtual const char *getVAListDeclaration() const { 3019 return "typedef char* __builtin_va_list;"; 3020 } 3021 }; 3022 3023 const char * const BlackfinTargetInfo::GCCRegNames[] = { 3024 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3025 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 3026 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 3027 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 3028 "a0", "a1", "cc", 3029 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 3030 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 3031 }; 3032 3033 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 3034 unsigned &NumNames) const { 3035 Names = GCCRegNames; 3036 NumNames = llvm::array_lengthof(GCCRegNames); 3037 } 3038 } 3039 3040 namespace { 3041 3042 // LLVM and Clang cannot be used directly to output native binaries for 3043 // target, but is used to compile C code to llvm bitcode with correct 3044 // type and alignment information. 3045 // 3046 // TCE uses the llvm bitcode as input and uses it for generating customized 3047 // target processor and program binary. TCE co-design environment is 3048 // publicly available in http://tce.cs.tut.fi 3049 3050 class TCETargetInfo : public TargetInfo{ 3051 public: 3052 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3053 TLSSupported = false; 3054 IntWidth = 32; 3055 LongWidth = LongLongWidth = 32; 3056 PointerWidth = 32; 3057 IntAlign = 32; 3058 LongAlign = LongLongAlign = 32; 3059 PointerAlign = 32; 3060 SizeType = UnsignedInt; 3061 IntMaxType = SignedLong; 3062 UIntMaxType = UnsignedLong; 3063 IntPtrType = SignedInt; 3064 PtrDiffType = SignedInt; 3065 FloatWidth = 32; 3066 FloatAlign = 32; 3067 DoubleWidth = 32; 3068 DoubleAlign = 32; 3069 LongDoubleWidth = 32; 3070 LongDoubleAlign = 32; 3071 FloatFormat = &llvm::APFloat::IEEEsingle; 3072 DoubleFormat = &llvm::APFloat::IEEEsingle; 3073 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3074 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3075 "i16:16:32-i32:32:32-i64:32:32-" 3076 "f32:32:32-f64:32:32-v64:32:32-" 3077 "v128:32:32-a0:0:32-n32"; 3078 } 3079 3080 virtual void getTargetDefines(const LangOptions &Opts, 3081 MacroBuilder &Builder) const { 3082 DefineStd(Builder, "tce", Opts); 3083 Builder.defineMacro("__TCE__"); 3084 Builder.defineMacro("__TCE_V1__"); 3085 } 3086 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3087 unsigned &NumRecords) const {} 3088 virtual const char *getClobbers() const { 3089 return ""; 3090 } 3091 virtual const char *getVAListDeclaration() const { 3092 return "typedef void* __builtin_va_list;"; 3093 } 3094 virtual void getGCCRegNames(const char * const *&Names, 3095 unsigned &NumNames) const {} 3096 virtual bool validateAsmConstraint(const char *&Name, 3097 TargetInfo::ConstraintInfo &info) const { 3098 return true; 3099 } 3100 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3101 unsigned &NumAliases) const {} 3102 }; 3103 } 3104 3105 namespace { 3106 class MipsTargetInfoBase : public TargetInfo { 3107 std::string CPU; 3108 protected: 3109 std::string ABI; 3110 public: 3111 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3112 : TargetInfo(triple), ABI(ABIStr) { 3113 SizeType = UnsignedInt; 3114 PtrDiffType = SignedInt; 3115 } 3116 virtual const char *getABI() const { return ABI.c_str(); } 3117 virtual bool setABI(const std::string &Name) = 0; 3118 virtual bool setCPU(const std::string &Name) { 3119 CPU = Name; 3120 return true; 3121 } 3122 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3123 Features[ABI] = true; 3124 Features[CPU] = true; 3125 } 3126 virtual void getArchDefines(const LangOptions &Opts, 3127 MacroBuilder &Builder) const = 0; 3128 virtual void getTargetDefines(const LangOptions &Opts, 3129 MacroBuilder &Builder) const = 0; 3130 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3131 unsigned &NumRecords) const { 3132 // FIXME: Implement! 3133 } 3134 virtual const char *getVAListDeclaration() const { 3135 return "typedef void* __builtin_va_list;"; 3136 } 3137 virtual void getGCCRegNames(const char * const *&Names, 3138 unsigned &NumNames) const { 3139 static const char * const GCCRegNames[] = { 3140 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3141 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3142 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3143 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3144 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3145 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3146 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3147 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3148 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3149 "$fcc5","$fcc6","$fcc7" 3150 }; 3151 Names = GCCRegNames; 3152 NumNames = llvm::array_lengthof(GCCRegNames); 3153 } 3154 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3155 unsigned &NumAliases) const = 0; 3156 virtual bool validateAsmConstraint(const char *&Name, 3157 TargetInfo::ConstraintInfo &Info) const { 3158 switch (*Name) { 3159 default: 3160 case 'r': // CPU registers. 3161 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3162 case 'y': // Equivalent to "r", backwards compatibility only. 3163 case 'f': // floating-point registers. 3164 Info.setAllowsRegister(); 3165 return true; 3166 } 3167 return false; 3168 } 3169 3170 virtual const char *getClobbers() const { 3171 // FIXME: Implement! 3172 return ""; 3173 } 3174 }; 3175 3176 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3177 public: 3178 Mips32TargetInfoBase(const std::string& triple) : 3179 MipsTargetInfoBase(triple, "o32") {} 3180 virtual bool setABI(const std::string &Name) { 3181 if ((Name == "o32") || (Name == "eabi")) { 3182 ABI = Name; 3183 return true; 3184 } else 3185 return false; 3186 } 3187 virtual void getArchDefines(const LangOptions &Opts, 3188 MacroBuilder &Builder) const { 3189 if (ABI == "o32") { 3190 Builder.defineMacro("__mips_o32"); 3191 Builder.defineMacro("_ABIO32", "1"); 3192 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3193 } 3194 else if (ABI == "eabi") 3195 Builder.defineMacro("__mips_eabi"); 3196 else 3197 llvm_unreachable("Invalid ABI for Mips32."); 3198 } 3199 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3200 unsigned &NumAliases) const { 3201 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3202 { { "at" }, "$1" }, 3203 { { "v0" }, "$2" }, 3204 { { "v1" }, "$3" }, 3205 { { "a0" }, "$4" }, 3206 { { "a1" }, "$5" }, 3207 { { "a2" }, "$6" }, 3208 { { "a3" }, "$7" }, 3209 { { "t0" }, "$8" }, 3210 { { "t1" }, "$9" }, 3211 { { "t2" }, "$10" }, 3212 { { "t3" }, "$11" }, 3213 { { "t4" }, "$12" }, 3214 { { "t5" }, "$13" }, 3215 { { "t6" }, "$14" }, 3216 { { "t7" }, "$15" }, 3217 { { "s0" }, "$16" }, 3218 { { "s1" }, "$17" }, 3219 { { "s2" }, "$18" }, 3220 { { "s3" }, "$19" }, 3221 { { "s4" }, "$20" }, 3222 { { "s5" }, "$21" }, 3223 { { "s6" }, "$22" }, 3224 { { "s7" }, "$23" }, 3225 { { "t8" }, "$24" }, 3226 { { "t9" }, "$25" }, 3227 { { "k0" }, "$26" }, 3228 { { "k1" }, "$27" }, 3229 { { "gp" }, "$28" }, 3230 { { "sp" }, "$29" }, 3231 { { "fp" }, "$30" }, 3232 { { "ra" }, "$31" } 3233 }; 3234 Aliases = GCCRegAliases; 3235 NumAliases = llvm::array_lengthof(GCCRegAliases); 3236 } 3237 }; 3238 3239 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3240 public: 3241 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3242 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3243 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3244 } 3245 virtual void getTargetDefines(const LangOptions &Opts, 3246 MacroBuilder &Builder) const { 3247 DefineStd(Builder, "mips", Opts); 3248 Builder.defineMacro("_mips"); 3249 DefineStd(Builder, "MIPSEB", Opts); 3250 Builder.defineMacro("_MIPSEB"); 3251 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3252 getArchDefines(Opts, Builder); 3253 } 3254 }; 3255 3256 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3257 public: 3258 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3259 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3260 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3261 } 3262 virtual void getTargetDefines(const LangOptions &Opts, 3263 MacroBuilder &Builder) const { 3264 DefineStd(Builder, "mips", Opts); 3265 Builder.defineMacro("_mips"); 3266 DefineStd(Builder, "MIPSEL", Opts); 3267 Builder.defineMacro("_MIPSEL"); 3268 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3269 getArchDefines(Opts, Builder); 3270 } 3271 }; 3272 3273 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3274 virtual void SetDescriptionString(const std::string &Name) = 0; 3275 public: 3276 Mips64TargetInfoBase(const std::string& triple) : 3277 MipsTargetInfoBase(triple, "n64") {} 3278 virtual bool setABI(const std::string &Name) { 3279 SetDescriptionString(Name); 3280 if ((Name == "n32") || (Name == "n64")) { 3281 ABI = Name; 3282 return true; 3283 } else 3284 return false; 3285 } 3286 virtual void getArchDefines(const LangOptions &Opts, 3287 MacroBuilder &Builder) const { 3288 if (ABI == "n32") { 3289 Builder.defineMacro("__mips_n32"); 3290 Builder.defineMacro("_ABIN32", "2"); 3291 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3292 } 3293 else if (ABI == "n64") { 3294 Builder.defineMacro("__mips_n64"); 3295 Builder.defineMacro("_ABI64", "3"); 3296 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3297 } 3298 else 3299 llvm_unreachable("Invalid ABI for Mips64."); 3300 } 3301 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3302 unsigned &NumAliases) const { 3303 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3304 { { "at" }, "$1" }, 3305 { { "v0" }, "$2" }, 3306 { { "v1" }, "$3" }, 3307 { { "a0" }, "$4" }, 3308 { { "a1" }, "$5" }, 3309 { { "a2" }, "$6" }, 3310 { { "a3" }, "$7" }, 3311 { { "a4" }, "$8" }, 3312 { { "a5" }, "$9" }, 3313 { { "a6" }, "$10" }, 3314 { { "a7" }, "$11" }, 3315 { { "t0" }, "$12" }, 3316 { { "t1" }, "$13" }, 3317 { { "t2" }, "$14" }, 3318 { { "t3" }, "$15" }, 3319 { { "s0" }, "$16" }, 3320 { { "s1" }, "$17" }, 3321 { { "s2" }, "$18" }, 3322 { { "s3" }, "$19" }, 3323 { { "s4" }, "$20" }, 3324 { { "s5" }, "$21" }, 3325 { { "s6" }, "$22" }, 3326 { { "s7" }, "$23" }, 3327 { { "t8" }, "$24" }, 3328 { { "t9" }, "$25" }, 3329 { { "k0" }, "$26" }, 3330 { { "k1" }, "$27" }, 3331 { { "gp" }, "$28" }, 3332 { { "sp" }, "$29" }, 3333 { { "fp" }, "$30" }, 3334 { { "ra" }, "$31" } 3335 }; 3336 Aliases = GCCRegAliases; 3337 NumAliases = llvm::array_lengthof(GCCRegAliases); 3338 } 3339 }; 3340 3341 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3342 virtual void SetDescriptionString(const std::string &Name) { 3343 // Change DescriptionString only if ABI is n32. 3344 if (Name == "n32") 3345 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3346 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3347 } 3348 public: 3349 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3350 // Default ABI is n64. 3351 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3352 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3353 } 3354 virtual void getTargetDefines(const LangOptions &Opts, 3355 MacroBuilder &Builder) const { 3356 DefineStd(Builder, "mips", Opts); 3357 Builder.defineMacro("_mips"); 3358 DefineStd(Builder, "MIPSEB", Opts); 3359 Builder.defineMacro("_MIPSEB"); 3360 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3361 getArchDefines(Opts, Builder); 3362 } 3363 }; 3364 3365 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3366 virtual void SetDescriptionString(const std::string &Name) { 3367 // Change DescriptionString only if ABI is n32. 3368 if (Name == "n32") 3369 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3370 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3371 } 3372 public: 3373 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3374 // Default ABI is n64. 3375 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3376 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3377 } 3378 virtual void getTargetDefines(const LangOptions &Opts, 3379 MacroBuilder &Builder) const { 3380 DefineStd(Builder, "mips", Opts); 3381 Builder.defineMacro("_mips"); 3382 DefineStd(Builder, "MIPSEL", Opts); 3383 Builder.defineMacro("_MIPSEL"); 3384 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3385 getArchDefines(Opts, Builder); 3386 } 3387 }; 3388 } // end anonymous namespace. 3389 3390 namespace { 3391 class PNaClTargetInfo : public TargetInfo { 3392 public: 3393 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3394 this->UserLabelPrefix = ""; 3395 this->LongAlign = 32; 3396 this->LongWidth = 32; 3397 this->PointerAlign = 32; 3398 this->PointerWidth = 32; 3399 this->IntMaxType = TargetInfo::SignedLongLong; 3400 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3401 this->Int64Type = TargetInfo::SignedLongLong; 3402 this->DoubleAlign = 64; 3403 this->LongDoubleWidth = 64; 3404 this->LongDoubleAlign = 64; 3405 this->SizeType = TargetInfo::UnsignedInt; 3406 this->PtrDiffType = TargetInfo::SignedInt; 3407 this->IntPtrType = TargetInfo::SignedInt; 3408 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3409 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3410 } 3411 3412 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3413 } 3414 virtual void getArchDefines(const LangOptions &Opts, 3415 MacroBuilder &Builder) const { 3416 Builder.defineMacro("__le32__"); 3417 Builder.defineMacro("__pnacl__"); 3418 } 3419 virtual void getTargetDefines(const LangOptions &Opts, 3420 MacroBuilder &Builder) const { 3421 DefineStd(Builder, "unix", Opts); 3422 Builder.defineMacro("__ELF__"); 3423 if (Opts.POSIXThreads) 3424 Builder.defineMacro("_REENTRANT"); 3425 if (Opts.CPlusPlus) 3426 Builder.defineMacro("_GNU_SOURCE"); 3427 3428 Builder.defineMacro("__native_client__"); 3429 getArchDefines(Opts, Builder); 3430 } 3431 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3432 unsigned &NumRecords) const { 3433 } 3434 virtual const char *getVAListDeclaration() const { 3435 return "typedef int __builtin_va_list[4];"; 3436 } 3437 virtual void getGCCRegNames(const char * const *&Names, 3438 unsigned &NumNames) const; 3439 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3440 unsigned &NumAliases) const; 3441 virtual bool validateAsmConstraint(const char *&Name, 3442 TargetInfo::ConstraintInfo &Info) const { 3443 return false; 3444 } 3445 3446 virtual const char *getClobbers() const { 3447 return ""; 3448 } 3449 }; 3450 3451 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3452 unsigned &NumNames) const { 3453 Names = NULL; 3454 NumNames = 0; 3455 } 3456 3457 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3458 unsigned &NumAliases) const { 3459 Aliases = NULL; 3460 NumAliases = 0; 3461 } 3462 } // end anonymous namespace. 3463 3464 3465 //===----------------------------------------------------------------------===// 3466 // Driver code 3467 //===----------------------------------------------------------------------===// 3468 3469 static TargetInfo *AllocateTarget(const std::string &T) { 3470 llvm::Triple Triple(T); 3471 llvm::Triple::OSType os = Triple.getOS(); 3472 3473 switch (Triple.getArch()) { 3474 default: 3475 return NULL; 3476 3477 case llvm::Triple::arm: 3478 case llvm::Triple::thumb: 3479 if (Triple.isOSDarwin()) 3480 return new DarwinARMTargetInfo(T); 3481 3482 switch (os) { 3483 case llvm::Triple::Linux: 3484 return new LinuxTargetInfo<ARMTargetInfo>(T); 3485 case llvm::Triple::FreeBSD: 3486 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3487 case llvm::Triple::NetBSD: 3488 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3489 case llvm::Triple::RTEMS: 3490 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3491 default: 3492 return new ARMTargetInfo(T); 3493 } 3494 3495 case llvm::Triple::bfin: 3496 if ( os == llvm::Triple::RTEMS ) 3497 return new RTEMSTargetInfo<BlackfinTargetInfo>(T); 3498 return new BlackfinTargetInfo(T); 3499 3500 case llvm::Triple::msp430: 3501 return new MSP430TargetInfo(T); 3502 3503 case llvm::Triple::mips: 3504 switch (os) { 3505 case llvm::Triple::Linux: 3506 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3507 case llvm::Triple::RTEMS: 3508 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3509 case llvm::Triple::FreeBSD: 3510 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3511 case llvm::Triple::NetBSD: 3512 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3513 default: 3514 return new Mips32EBTargetInfo(T); 3515 } 3516 3517 case llvm::Triple::mipsel: 3518 switch (os) { 3519 case llvm::Triple::Linux: 3520 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3521 case llvm::Triple::RTEMS: 3522 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3523 case llvm::Triple::FreeBSD: 3524 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3525 case llvm::Triple::NetBSD: 3526 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3527 default: 3528 return new Mips32ELTargetInfo(T); 3529 } 3530 3531 case llvm::Triple::mips64: 3532 switch (os) { 3533 case llvm::Triple::Linux: 3534 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3535 case llvm::Triple::RTEMS: 3536 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3537 case llvm::Triple::FreeBSD: 3538 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3539 case llvm::Triple::NetBSD: 3540 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3541 default: 3542 return new Mips64EBTargetInfo(T); 3543 } 3544 3545 case llvm::Triple::mips64el: 3546 switch (os) { 3547 case llvm::Triple::Linux: 3548 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3549 case llvm::Triple::RTEMS: 3550 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3551 case llvm::Triple::FreeBSD: 3552 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3553 case llvm::Triple::NetBSD: 3554 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3555 default: 3556 return new Mips64ELTargetInfo(T); 3557 } 3558 3559 case llvm::Triple::le32: 3560 switch (os) { 3561 case llvm::Triple::NativeClient: 3562 return new PNaClTargetInfo(T); 3563 default: 3564 return NULL; 3565 } 3566 3567 case llvm::Triple::ppc: 3568 if (Triple.isOSDarwin()) 3569 return new DarwinPPC32TargetInfo(T); 3570 switch (os) { 3571 case llvm::Triple::FreeBSD: 3572 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3573 case llvm::Triple::NetBSD: 3574 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3575 case llvm::Triple::RTEMS: 3576 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3577 default: 3578 return new PPC32TargetInfo(T); 3579 } 3580 3581 case llvm::Triple::ppc64: 3582 if (Triple.isOSDarwin()) 3583 return new DarwinPPC64TargetInfo(T); 3584 switch (os) { 3585 case llvm::Triple::Lv2: 3586 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3587 case llvm::Triple::FreeBSD: 3588 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3589 case llvm::Triple::NetBSD: 3590 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3591 default: 3592 return new PPC64TargetInfo(T); 3593 } 3594 3595 case llvm::Triple::ptx32: 3596 return new PTX32TargetInfo(T); 3597 case llvm::Triple::ptx64: 3598 return new PTX64TargetInfo(T); 3599 3600 case llvm::Triple::mblaze: 3601 return new MBlazeTargetInfo(T); 3602 3603 case llvm::Triple::sparc: 3604 switch (os) { 3605 case llvm::Triple::AuroraUX: 3606 return new AuroraUXSparcV8TargetInfo(T); 3607 case llvm::Triple::Solaris: 3608 return new SolarisSparcV8TargetInfo(T); 3609 case llvm::Triple::NetBSD: 3610 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3611 case llvm::Triple::RTEMS: 3612 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3613 default: 3614 return new SparcV8TargetInfo(T); 3615 } 3616 3617 // FIXME: Need a real SPU target. 3618 case llvm::Triple::cellspu: 3619 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3620 3621 case llvm::Triple::systemz: 3622 return new SystemZTargetInfo(T); 3623 3624 case llvm::Triple::tce: 3625 return new TCETargetInfo(T); 3626 3627 case llvm::Triple::x86: 3628 if (Triple.isOSDarwin()) 3629 return new DarwinI386TargetInfo(T); 3630 3631 switch (os) { 3632 case llvm::Triple::AuroraUX: 3633 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3634 case llvm::Triple::Linux: 3635 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3636 case llvm::Triple::DragonFly: 3637 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3638 case llvm::Triple::NetBSD: 3639 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3640 case llvm::Triple::OpenBSD: 3641 return new OpenBSDI386TargetInfo(T); 3642 case llvm::Triple::FreeBSD: 3643 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3644 case llvm::Triple::Minix: 3645 return new MinixTargetInfo<X86_32TargetInfo>(T); 3646 case llvm::Triple::Solaris: 3647 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3648 case llvm::Triple::Cygwin: 3649 return new CygwinX86_32TargetInfo(T); 3650 case llvm::Triple::MinGW32: 3651 return new MinGWX86_32TargetInfo(T); 3652 case llvm::Triple::Win32: 3653 return new VisualStudioWindowsX86_32TargetInfo(T); 3654 case llvm::Triple::Haiku: 3655 return new HaikuX86_32TargetInfo(T); 3656 case llvm::Triple::RTEMS: 3657 return new RTEMSX86_32TargetInfo(T); 3658 default: 3659 return new X86_32TargetInfo(T); 3660 } 3661 3662 case llvm::Triple::x86_64: 3663 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3664 return new DarwinX86_64TargetInfo(T); 3665 3666 switch (os) { 3667 case llvm::Triple::AuroraUX: 3668 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3669 case llvm::Triple::Linux: 3670 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3671 case llvm::Triple::DragonFly: 3672 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3673 case llvm::Triple::NetBSD: 3674 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3675 case llvm::Triple::OpenBSD: 3676 return new OpenBSDX86_64TargetInfo(T); 3677 case llvm::Triple::FreeBSD: 3678 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3679 case llvm::Triple::Solaris: 3680 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3681 case llvm::Triple::MinGW32: 3682 return new MinGWX86_64TargetInfo(T); 3683 case llvm::Triple::Win32: // This is what Triple.h supports now. 3684 return new VisualStudioWindowsX86_64TargetInfo(T); 3685 default: 3686 return new X86_64TargetInfo(T); 3687 } 3688 } 3689 } 3690 3691 /// CreateTargetInfo - Return the target info object for the specified target 3692 /// triple. 3693 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3694 TargetOptions &Opts) { 3695 llvm::Triple Triple(Opts.Triple); 3696 3697 // Construct the target 3698 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3699 if (!Target) { 3700 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3701 return 0; 3702 } 3703 3704 // Set the target CPU if specified. 3705 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3706 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3707 return 0; 3708 } 3709 3710 // Set the target ABI if specified. 3711 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3712 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3713 return 0; 3714 } 3715 3716 // Set the target C++ ABI. 3717 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3718 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3719 return 0; 3720 } 3721 3722 // Compute the default target features, we need the target to handle this 3723 // because features may have dependencies on one another. 3724 llvm::StringMap<bool> Features; 3725 Target->getDefaultFeatures(Features); 3726 3727 // Apply the user specified deltas. 3728 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3729 ie = Opts.Features.end(); it != ie; ++it) { 3730 const char *Name = it->c_str(); 3731 3732 // Apply the feature via the target. 3733 if ((Name[0] != '-' && Name[0] != '+') || 3734 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 3735 Diags.Report(diag::err_target_invalid_feature) << Name; 3736 return 0; 3737 } 3738 } 3739 3740 // Add the features to the compile options. 3741 // 3742 // FIXME: If we are completely confident that we have the right set, we only 3743 // need to pass the minuses. 3744 Opts.Features.clear(); 3745 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3746 ie = Features.end(); it != ie; ++it) 3747 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3748 it->first().str()); 3749 Target->HandleTargetFeatures(Opts.Features); 3750 3751 return Target.take(); 3752 } 3753