1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements construction of a TargetInfo object from a
11 // target triple.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Type.h"
30 #include <algorithm>
31 using namespace clang;
32 
33 //===----------------------------------------------------------------------===//
34 //  Common code shared among targets.
35 //===----------------------------------------------------------------------===//
36 
37 /// DefineStd - Define a macro name and standard variants.  For example if
38 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
39 /// when in GNU mode.
40 static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName,
41                       const LangOptions &Opts) {
42   assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
43 
44   // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
45   // in the user's namespace.
46   if (Opts.GNUMode)
47     Builder.defineMacro(MacroName);
48 
49   // Define __unix.
50   Builder.defineMacro("__" + MacroName);
51 
52   // Define __unix__.
53   Builder.defineMacro("__" + MacroName + "__");
54 }
55 
56 //===----------------------------------------------------------------------===//
57 // Defines specific to certain operating systems.
58 //===----------------------------------------------------------------------===//
59 
60 namespace {
61 template<typename TgtInfo>
62 class OSTargetInfo : public TgtInfo {
63 protected:
64   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
65                             MacroBuilder &Builder) const=0;
66 public:
67   OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
68   virtual void getTargetDefines(const LangOptions &Opts,
69                                 MacroBuilder &Builder) const {
70     TgtInfo::getTargetDefines(Opts, Builder);
71     getOSDefines(Opts, TgtInfo::getTriple(), Builder);
72   }
73 
74 };
75 } // end anonymous namespace
76 
77 
78 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
79                              const llvm::Triple &Triple,
80                              llvm::StringRef &PlatformName,
81                              VersionTuple &PlatformMinVersion) {
82   Builder.defineMacro("__APPLE_CC__", "5621");
83   Builder.defineMacro("__APPLE__");
84   Builder.defineMacro("__MACH__");
85   Builder.defineMacro("OBJC_NEW_PROPERTIES");
86 
87   // __weak is always defined, for use in blocks and with objc pointers.
88   Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
89 
90   // Darwin defines __strong even in C mode (just to nothing).
91   if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC)
92     Builder.defineMacro("__strong", "");
93   else
94     Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
95 
96   if (Opts.Static)
97     Builder.defineMacro("__STATIC__");
98   else
99     Builder.defineMacro("__DYNAMIC__");
100 
101   if (Opts.POSIXThreads)
102     Builder.defineMacro("_REENTRANT");
103 
104   // Get the OS version number from the triple.
105   unsigned Maj, Min, Rev;
106 
107   // If no version was given, default to to 10.4.0, for simplifying tests.
108   if (Triple.getOSName() == "darwin") {
109     Min = Rev = 0;
110     Maj = 8;
111   } else
112     Triple.getDarwinNumber(Maj, Min, Rev);
113 
114   // Set the appropriate OS version define.
115   if (Triple.getEnvironmentName() == "iphoneos") {
116     assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!");
117     char Str[6];
118     Str[0] = '0' + Maj;
119     Str[1] = '0' + (Min / 10);
120     Str[2] = '0' + (Min % 10);
121     Str[3] = '0' + (Rev / 10);
122     Str[4] = '0' + (Rev % 10);
123     Str[5] = '\0';
124     Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
125 
126     PlatformName = "ios";
127     PlatformMinVersion = VersionTuple(Maj, Min, Rev);
128   } else {
129     // For historical reasons that make little sense, the version passed here is
130     // the "darwin" version, which drops the 10 and offsets by 4.
131     Rev = Min;
132     Min = Maj - 4;
133     Maj = 10;
134 
135     assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
136     assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!");
137     char Str[5];
138     Str[0] = '0' + (Maj / 10);
139     Str[1] = '0' + (Maj % 10);
140     Str[2] = '0' + Min;
141     Str[3] = '0' + Rev;
142     Str[4] = '\0';
143     Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
144 
145     PlatformName = "macosx";
146     PlatformMinVersion = VersionTuple(Maj, Min, Rev);
147   }
148 }
149 
150 namespace {
151 template<typename Target>
152 class DarwinTargetInfo : public OSTargetInfo<Target> {
153 protected:
154   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
155                             MacroBuilder &Builder) const {
156     getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
157                      this->PlatformMinVersion);
158   }
159 
160 public:
161   DarwinTargetInfo(const std::string& triple) :
162     OSTargetInfo<Target>(triple) {
163       this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10;
164       this->MCountName = "\01mcount";
165     }
166 
167   virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const {
168     // Let MCSectionMachO validate this.
169     llvm::StringRef Segment, Section;
170     unsigned TAA, StubSize;
171     bool HasTAA;
172     return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
173                                                        TAA, HasTAA, StubSize);
174   }
175 
176   virtual const char *getStaticInitSectionSpecifier() const {
177     // FIXME: We should return 0 when building kexts.
178     return "__TEXT,__StaticInit,regular,pure_instructions";
179   }
180 
181 };
182 
183 
184 // DragonFlyBSD Target
185 template<typename Target>
186 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
187 protected:
188   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
189                             MacroBuilder &Builder) const {
190     // DragonFly defines; list based off of gcc output
191     Builder.defineMacro("__DragonFly__");
192     Builder.defineMacro("__DragonFly_cc_version", "100001");
193     Builder.defineMacro("__ELF__");
194     Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
195     Builder.defineMacro("__tune_i386__");
196     DefineStd(Builder, "unix", Opts);
197   }
198 public:
199   DragonFlyBSDTargetInfo(const std::string &triple)
200     : OSTargetInfo<Target>(triple) {}
201 };
202 
203 // FreeBSD Target
204 template<typename Target>
205 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
206 protected:
207   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
208                             MacroBuilder &Builder) const {
209     // FreeBSD defines; list based off of gcc output
210 
211     // FIXME: Move version number handling to llvm::Triple.
212     llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1);
213 
214     Builder.defineMacro("__FreeBSD__", Release);
215     Builder.defineMacro("__FreeBSD_cc_version", Release + "00001");
216     Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
217     DefineStd(Builder, "unix", Opts);
218     Builder.defineMacro("__ELF__");
219   }
220 public:
221   FreeBSDTargetInfo(const std::string &triple)
222     : OSTargetInfo<Target>(triple) {
223       this->UserLabelPrefix = "";
224 
225       llvm::Triple Triple(triple);
226       switch (Triple.getArch()) {
227         default:
228         case llvm::Triple::x86:
229         case llvm::Triple::x86_64:
230           this->MCountName = ".mcount";
231           break;
232         case llvm::Triple::mips:
233         case llvm::Triple::mipsel:
234         case llvm::Triple::ppc:
235         case llvm::Triple::ppc64:
236           this->MCountName = "_mcount";
237           break;
238         case llvm::Triple::arm:
239           this->MCountName = "__mcount";
240           break;
241       }
242 
243     }
244 };
245 
246 // Minix Target
247 template<typename Target>
248 class MinixTargetInfo : public OSTargetInfo<Target> {
249 protected:
250   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
251                             MacroBuilder &Builder) const {
252     // Minix defines
253 
254     Builder.defineMacro("__minix", "3");
255     Builder.defineMacro("_EM_WSIZE", "4");
256     Builder.defineMacro("_EM_PSIZE", "4");
257     Builder.defineMacro("_EM_SSIZE", "2");
258     Builder.defineMacro("_EM_LSIZE", "4");
259     Builder.defineMacro("_EM_FSIZE", "4");
260     Builder.defineMacro("_EM_DSIZE", "8");
261     DefineStd(Builder, "unix", Opts);
262   }
263 public:
264   MinixTargetInfo(const std::string &triple)
265     : OSTargetInfo<Target>(triple) {
266       this->UserLabelPrefix = "";
267     }
268 };
269 
270 // Linux target
271 template<typename Target>
272 class LinuxTargetInfo : public OSTargetInfo<Target> {
273 protected:
274   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
275                             MacroBuilder &Builder) const {
276     // Linux defines; list based off of gcc output
277     DefineStd(Builder, "unix", Opts);
278     DefineStd(Builder, "linux", Opts);
279     Builder.defineMacro("__gnu_linux__");
280     Builder.defineMacro("__ELF__");
281     if (Opts.POSIXThreads)
282       Builder.defineMacro("_REENTRANT");
283     if (Opts.CPlusPlus)
284       Builder.defineMacro("_GNU_SOURCE");
285   }
286 public:
287   LinuxTargetInfo(const std::string& triple)
288     : OSTargetInfo<Target>(triple) {
289     this->UserLabelPrefix = "";
290     this->WIntType = TargetInfo::UnsignedInt;
291   }
292 };
293 
294 // NetBSD Target
295 template<typename Target>
296 class NetBSDTargetInfo : public OSTargetInfo<Target> {
297 protected:
298   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
299                             MacroBuilder &Builder) const {
300     // NetBSD defines; list based off of gcc output
301     Builder.defineMacro("__NetBSD__");
302     Builder.defineMacro("__unix__");
303     Builder.defineMacro("__ELF__");
304     if (Opts.POSIXThreads)
305       Builder.defineMacro("_POSIX_THREADS");
306   }
307 public:
308   NetBSDTargetInfo(const std::string &triple)
309     : OSTargetInfo<Target>(triple) {
310       this->UserLabelPrefix = "";
311     }
312 };
313 
314 // OpenBSD Target
315 template<typename Target>
316 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
317 protected:
318   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
319                             MacroBuilder &Builder) const {
320     // OpenBSD defines; list based off of gcc output
321 
322     Builder.defineMacro("__OpenBSD__");
323     DefineStd(Builder, "unix", Opts);
324     Builder.defineMacro("__ELF__");
325     if (Opts.POSIXThreads)
326       Builder.defineMacro("_POSIX_THREADS");
327   }
328 public:
329   OpenBSDTargetInfo(const std::string &triple)
330     : OSTargetInfo<Target>(triple) {}
331 };
332 
333 // PSP Target
334 template<typename Target>
335 class PSPTargetInfo : public OSTargetInfo<Target> {
336 protected:
337   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
338                             MacroBuilder &Builder) const {
339     // PSP defines; list based on the output of the pspdev gcc toolchain.
340     Builder.defineMacro("PSP");
341     Builder.defineMacro("_PSP");
342     Builder.defineMacro("__psp__");
343     Builder.defineMacro("__ELF__");
344   }
345 public:
346   PSPTargetInfo(const std::string& triple)
347     : OSTargetInfo<Target>(triple) {
348     this->UserLabelPrefix = "";
349   }
350 };
351 
352 // PS3 PPU Target
353 template<typename Target>
354 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
355 protected:
356   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
357                             MacroBuilder &Builder) const {
358     // PS3 PPU defines.
359     Builder.defineMacro("__PPC__");
360     Builder.defineMacro("__PPU__");
361     Builder.defineMacro("__CELLOS_LV2__");
362     Builder.defineMacro("__ELF__");
363     Builder.defineMacro("__LP32__");
364     Builder.defineMacro("_ARCH_PPC64");
365     Builder.defineMacro("__powerpc64__");
366   }
367 public:
368   PS3PPUTargetInfo(const std::string& triple)
369     : OSTargetInfo<Target>(triple) {
370     this->UserLabelPrefix = "";
371     this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
372     this->IntMaxType = TargetInfo::SignedLongLong;
373     this->UIntMaxType = TargetInfo::UnsignedLongLong;
374     this->Int64Type = TargetInfo::SignedLongLong;
375     this->SizeType = TargetInfo::UnsignedInt;
376     this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
377                         "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
378   }
379 };
380 
381 // FIXME: Need a real SPU target.
382 // PS3 SPU Target
383 template<typename Target>
384 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
385 protected:
386   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
387                             MacroBuilder &Builder) const {
388     // PS3 PPU defines.
389     Builder.defineMacro("__SPU__");
390     Builder.defineMacro("__ELF__");
391   }
392 public:
393   PS3SPUTargetInfo(const std::string& triple)
394     : OSTargetInfo<Target>(triple) {
395     this->UserLabelPrefix = "";
396   }
397 };
398 
399 // AuroraUX target
400 template<typename Target>
401 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
402 protected:
403   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
404                             MacroBuilder &Builder) const {
405     DefineStd(Builder, "sun", Opts);
406     DefineStd(Builder, "unix", Opts);
407     Builder.defineMacro("__ELF__");
408     Builder.defineMacro("__svr4__");
409     Builder.defineMacro("__SVR4");
410   }
411 public:
412   AuroraUXTargetInfo(const std::string& triple)
413     : OSTargetInfo<Target>(triple) {
414     this->UserLabelPrefix = "";
415     this->WCharType = this->SignedLong;
416     // FIXME: WIntType should be SignedLong
417   }
418 };
419 
420 // Solaris target
421 template<typename Target>
422 class SolarisTargetInfo : public OSTargetInfo<Target> {
423 protected:
424   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
425                             MacroBuilder &Builder) const {
426     DefineStd(Builder, "sun", Opts);
427     DefineStd(Builder, "unix", Opts);
428     Builder.defineMacro("__ELF__");
429     Builder.defineMacro("__svr4__");
430     Builder.defineMacro("__SVR4");
431   }
432 public:
433   SolarisTargetInfo(const std::string& triple)
434     : OSTargetInfo<Target>(triple) {
435     this->UserLabelPrefix = "";
436     this->WCharType = this->SignedLong;
437     // FIXME: WIntType should be SignedLong
438   }
439 };
440 
441 // Windows target
442 template<typename Target>
443 class WindowsTargetInfo : public OSTargetInfo<Target> {
444 protected:
445   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
446                             MacroBuilder &Builder) const {
447     Builder.defineMacro("_WIN32");
448   }
449   void getVisualStudioDefines(const LangOptions &Opts,
450                               MacroBuilder &Builder) const {
451     if (Opts.CPlusPlus) {
452       if (Opts.RTTI)
453         Builder.defineMacro("_CPPRTTI");
454 
455       if (Opts.Exceptions)
456         Builder.defineMacro("_CPPUNWIND");
457     }
458 
459     if (!Opts.CharIsSigned)
460       Builder.defineMacro("_CHAR_UNSIGNED");
461 
462     // FIXME: POSIXThreads isn't exactly the option this should be defined for,
463     //        but it works for now.
464     if (Opts.POSIXThreads)
465       Builder.defineMacro("_MT");
466 
467     if (Opts.MSCVersion != 0)
468       Builder.defineMacro("_MSC_VER", llvm::Twine(Opts.MSCVersion));
469 
470     if (Opts.Microsoft) {
471       Builder.defineMacro("_MSC_EXTENSIONS");
472 
473       if (Opts.CPlusPlus0x) {
474         Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
475         Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
476         Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
477       }
478     }
479 
480     Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
481   }
482 
483 public:
484   WindowsTargetInfo(const std::string &triple)
485     : OSTargetInfo<Target>(triple) {}
486 };
487 
488 } // end anonymous namespace.
489 
490 //===----------------------------------------------------------------------===//
491 // Specific target implementations.
492 //===----------------------------------------------------------------------===//
493 
494 namespace {
495 // PPC abstract base class
496 class PPCTargetInfo : public TargetInfo {
497   static const Builtin::Info BuiltinInfo[];
498   static const char * const GCCRegNames[];
499   static const TargetInfo::GCCRegAlias GCCRegAliases[];
500 
501 public:
502   PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
503 
504   virtual void getTargetBuiltins(const Builtin::Info *&Records,
505                                  unsigned &NumRecords) const {
506     Records = BuiltinInfo;
507     NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
508   }
509 
510   virtual void getTargetDefines(const LangOptions &Opts,
511                                 MacroBuilder &Builder) const;
512 
513   virtual void getGCCRegNames(const char * const *&Names,
514                               unsigned &NumNames) const;
515   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
516                                 unsigned &NumAliases) const;
517   virtual bool validateAsmConstraint(const char *&Name,
518                                      TargetInfo::ConstraintInfo &Info) const {
519     switch (*Name) {
520     default: return false;
521     case 'O': // Zero
522       break;
523     case 'b': // Base register
524     case 'f': // Floating point register
525       Info.setAllowsRegister();
526       break;
527     // FIXME: The following are added to allow parsing.
528     // I just took a guess at what the actions should be.
529     // Also, is more specific checking needed?  I.e. specific registers?
530     case 'd': // Floating point register (containing 64-bit value)
531     case 'v': // Altivec vector register
532       Info.setAllowsRegister();
533       break;
534     case 'w':
535       switch (Name[1]) {
536         case 'd':// VSX vector register to hold vector double data
537         case 'f':// VSX vector register to hold vector float data
538         case 's':// VSX vector register to hold scalar float data
539         case 'a':// Any VSX register
540           break;
541         default:
542           return false;
543       }
544       Info.setAllowsRegister();
545       Name++; // Skip over 'w'.
546       break;
547     case 'h': // `MQ', `CTR', or `LINK' register
548     case 'q': // `MQ' register
549     case 'c': // `CTR' register
550     case 'l': // `LINK' register
551     case 'x': // `CR' register (condition register) number 0
552     case 'y': // `CR' register (condition register)
553     case 'z': // `XER[CA]' carry bit (part of the XER register)
554       Info.setAllowsRegister();
555       break;
556     case 'I': // Signed 16-bit constant
557     case 'J': // Unsigned 16-bit constant shifted left 16 bits
558               //  (use `L' instead for SImode constants)
559     case 'K': // Unsigned 16-bit constant
560     case 'L': // Signed 16-bit constant shifted left 16 bits
561     case 'M': // Constant larger than 31
562     case 'N': // Exact power of 2
563     case 'P': // Constant whose negation is a signed 16-bit constant
564     case 'G': // Floating point constant that can be loaded into a
565               // register with one instruction per word
566     case 'H': // Integer/Floating point constant that can be loaded
567               // into a register using three instructions
568       break;
569     case 'm': // Memory operand. Note that on PowerPC targets, m can
570               // include addresses that update the base register. It
571               // is therefore only safe to use `m' in an asm statement
572               // if that asm statement accesses the operand exactly once.
573               // The asm statement must also use `%U<opno>' as a
574               // placeholder for the "update" flag in the corresponding
575               // load or store instruction. For example:
576               // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
577               // is correct but:
578               // asm ("st %1,%0" : "=m" (mem) : "r" (val));
579               // is not. Use es rather than m if you don't want the base
580               // register to be updated.
581     case 'e':
582       if (Name[1] != 's')
583           return false;
584               // es: A "stable" memory operand; that is, one which does not
585               // include any automodification of the base register. Unlike
586               // `m', this constraint can be used in asm statements that
587               // might access the operand several times, or that might not
588               // access it at all.
589       Info.setAllowsMemory();
590       Name++; // Skip over 'e'.
591       break;
592     case 'Q': // Memory operand that is an offset from a register (it is
593               // usually better to use `m' or `es' in asm statements)
594     case 'Z': // Memory operand that is an indexed or indirect from a
595               // register (it is usually better to use `m' or `es' in
596               // asm statements)
597       Info.setAllowsMemory();
598       Info.setAllowsRegister();
599       break;
600     case 'R': // AIX TOC entry
601     case 'a': // Address operand that is an indexed or indirect from a
602               // register (`p' is preferable for asm statements)
603     case 'S': // Constant suitable as a 64-bit mask operand
604     case 'T': // Constant suitable as a 32-bit mask operand
605     case 'U': // System V Release 4 small data area reference
606     case 't': // AND masks that can be performed by two rldic{l, r}
607               // instructions
608     case 'W': // Vector constant that does not require memory
609     case 'j': // Vector constant that is all zeros.
610       break;
611     // End FIXME.
612     }
613     return true;
614   }
615   virtual const char *getClobbers() const {
616     return "";
617   }
618 };
619 
620 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
621 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
622 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
623                                               ALL_LANGUAGES, false },
624 #include "clang/Basic/BuiltinsPPC.def"
625 };
626 
627 
628 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
629 /// #defines that are not tied to a specific subtarget.
630 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
631                                      MacroBuilder &Builder) const {
632   // Target identification.
633   Builder.defineMacro("__ppc__");
634   Builder.defineMacro("_ARCH_PPC");
635   Builder.defineMacro("__powerpc__");
636   Builder.defineMacro("__POWERPC__");
637   if (PointerWidth == 64) {
638     Builder.defineMacro("_ARCH_PPC64");
639     Builder.defineMacro("_LP64");
640     Builder.defineMacro("__LP64__");
641     Builder.defineMacro("__powerpc64__");
642     Builder.defineMacro("__ppc64__");
643   } else {
644     Builder.defineMacro("__ppc__");
645   }
646 
647   // Target properties.
648   Builder.defineMacro("_BIG_ENDIAN");
649   Builder.defineMacro("__BIG_ENDIAN__");
650 
651   // Subtarget options.
652   Builder.defineMacro("__NATURAL_ALIGNMENT__");
653   Builder.defineMacro("__REGISTER_PREFIX__", "");
654 
655   // FIXME: Should be controlled by command line option.
656   Builder.defineMacro("__LONG_DOUBLE_128__");
657 
658   if (Opts.AltiVec) {
659     Builder.defineMacro("__VEC__", "10206");
660     Builder.defineMacro("__ALTIVEC__");
661   }
662 }
663 
664 
665 const char * const PPCTargetInfo::GCCRegNames[] = {
666   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
667   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
668   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
669   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
670   "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
671   "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
672   "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
673   "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
674   "mq", "lr", "ctr", "ap",
675   "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
676   "xer",
677   "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
678   "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
679   "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
680   "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
681   "vrsave", "vscr",
682   "spe_acc", "spefscr",
683   "sfp"
684 };
685 
686 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
687                                    unsigned &NumNames) const {
688   Names = GCCRegNames;
689   NumNames = llvm::array_lengthof(GCCRegNames);
690 }
691 
692 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
693   // While some of these aliases do map to different registers
694   // they still share the same register name.
695   { { "0" }, "r0" },
696   { { "1"}, "r1" },
697   { { "2" }, "r2" },
698   { { "3" }, "r3" },
699   { { "4" }, "r4" },
700   { { "5" }, "r5" },
701   { { "6" }, "r6" },
702   { { "7" }, "r7" },
703   { { "8" }, "r8" },
704   { { "9" }, "r9" },
705   { { "10" }, "r10" },
706   { { "11" }, "r11" },
707   { { "12" }, "r12" },
708   { { "13" }, "r13" },
709   { { "14" }, "r14" },
710   { { "15" }, "r15" },
711   { { "16" }, "r16" },
712   { { "17" }, "r17" },
713   { { "18" }, "r18" },
714   { { "19" }, "r19" },
715   { { "20" }, "r20" },
716   { { "21" }, "r21" },
717   { { "22" }, "r22" },
718   { { "23" }, "r23" },
719   { { "24" }, "r24" },
720   { { "25" }, "r25" },
721   { { "26" }, "r26" },
722   { { "27" }, "r27" },
723   { { "28" }, "r28" },
724   { { "29" }, "r29" },
725   { { "30" }, "r30" },
726   { { "31" }, "r31" },
727   { { "fr0" }, "f0" },
728   { { "fr1" }, "f1" },
729   { { "fr2" }, "f2" },
730   { { "fr3" }, "f3" },
731   { { "fr4" }, "f4" },
732   { { "fr5" }, "f5" },
733   { { "fr6" }, "f6" },
734   { { "fr7" }, "f7" },
735   { { "fr8" }, "f8" },
736   { { "fr9" }, "f9" },
737   { { "fr10" }, "f10" },
738   { { "fr11" }, "f11" },
739   { { "fr12" }, "f12" },
740   { { "fr13" }, "f13" },
741   { { "fr14" }, "f14" },
742   { { "fr15" }, "f15" },
743   { { "fr16" }, "f16" },
744   { { "fr17" }, "f17" },
745   { { "fr18" }, "f18" },
746   { { "fr19" }, "f19" },
747   { { "fr20" }, "f20" },
748   { { "fr21" }, "f21" },
749   { { "fr22" }, "f22" },
750   { { "fr23" }, "f23" },
751   { { "fr24" }, "f24" },
752   { { "fr25" }, "f25" },
753   { { "fr26" }, "f26" },
754   { { "fr27" }, "f27" },
755   { { "fr28" }, "f28" },
756   { { "fr29" }, "f29" },
757   { { "fr30" }, "f30" },
758   { { "fr31" }, "f31" },
759   { { "cc" }, "cr0" },
760 };
761 
762 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
763                                      unsigned &NumAliases) const {
764   Aliases = GCCRegAliases;
765   NumAliases = llvm::array_lengthof(GCCRegAliases);
766 }
767 } // end anonymous namespace.
768 
769 namespace {
770 class PPC32TargetInfo : public PPCTargetInfo {
771 public:
772   PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
773     DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
774                         "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
775 
776     if (getTriple().getOS() == llvm::Triple::FreeBSD)
777         SizeType = UnsignedInt;
778   }
779 
780   virtual const char *getVAListDeclaration() const {
781     // This is the ELF definition, and is overridden by the Darwin sub-target
782     return "typedef struct __va_list_tag {"
783            "  unsigned char gpr;"
784            "  unsigned char fpr;"
785            "  unsigned short reserved;"
786            "  void* overflow_arg_area;"
787            "  void* reg_save_area;"
788            "} __builtin_va_list[1];";
789   }
790 };
791 } // end anonymous namespace.
792 
793 namespace {
794 class PPC64TargetInfo : public PPCTargetInfo {
795 public:
796   PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
797     LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
798     IntMaxType = SignedLong;
799     UIntMaxType = UnsignedLong;
800     Int64Type = SignedLong;
801     DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
802                         "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
803   }
804   virtual const char *getVAListDeclaration() const {
805     return "typedef char* __builtin_va_list;";
806   }
807 };
808 } // end anonymous namespace.
809 
810 
811 namespace {
812 class DarwinPPC32TargetInfo :
813   public DarwinTargetInfo<PPC32TargetInfo> {
814 public:
815   DarwinPPC32TargetInfo(const std::string& triple)
816     : DarwinTargetInfo<PPC32TargetInfo>(triple) {
817     HasAlignMac68kSupport = true;
818     BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
819   }
820   virtual const char *getVAListDeclaration() const {
821     return "typedef char* __builtin_va_list;";
822   }
823 };
824 
825 class DarwinPPC64TargetInfo :
826   public DarwinTargetInfo<PPC64TargetInfo> {
827 public:
828   DarwinPPC64TargetInfo(const std::string& triple)
829     : DarwinTargetInfo<PPC64TargetInfo>(triple) {
830     HasAlignMac68kSupport = true;
831   }
832 };
833 } // end anonymous namespace.
834 
835 namespace {
836 // MBlaze abstract base class
837 class MBlazeTargetInfo : public TargetInfo {
838   static const char * const GCCRegNames[];
839   static const TargetInfo::GCCRegAlias GCCRegAliases[];
840 
841 public:
842   MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
843     DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
844   }
845 
846   virtual void getTargetBuiltins(const Builtin::Info *&Records,
847                                  unsigned &NumRecords) const {
848     // FIXME: Implement.
849     Records = 0;
850     NumRecords = 0;
851   }
852 
853   virtual void getTargetDefines(const LangOptions &Opts,
854                                 MacroBuilder &Builder) const;
855 
856   virtual const char *getVAListDeclaration() const {
857     return "typedef char* __builtin_va_list;";
858   }
859   virtual const char *getTargetPrefix() const {
860     return "mblaze";
861   }
862   virtual void getGCCRegNames(const char * const *&Names,
863                               unsigned &NumNames) const;
864   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
865                                 unsigned &NumAliases) const;
866   virtual bool validateAsmConstraint(const char *&Name,
867                                      TargetInfo::ConstraintInfo &Info) const {
868     switch (*Name) {
869     default: return false;
870     case 'O': // Zero
871       return true;
872     case 'b': // Base register
873     case 'f': // Floating point register
874       Info.setAllowsRegister();
875       return true;
876     }
877   }
878   virtual const char *getClobbers() const {
879     return "";
880   }
881 };
882 
883 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
884 /// #defines that are not tied to a specific subtarget.
885 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
886                                      MacroBuilder &Builder) const {
887   // Target identification.
888   Builder.defineMacro("__microblaze__");
889   Builder.defineMacro("_ARCH_MICROBLAZE");
890   Builder.defineMacro("__MICROBLAZE__");
891 
892   // Target properties.
893   Builder.defineMacro("_BIG_ENDIAN");
894   Builder.defineMacro("__BIG_ENDIAN__");
895 
896   // Subtarget options.
897   Builder.defineMacro("__REGISTER_PREFIX__", "");
898 }
899 
900 
901 const char * const MBlazeTargetInfo::GCCRegNames[] = {
902   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
903   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
904   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
905   "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
906   "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
907   "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
908   "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
909   "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
910   "hi",   "lo",   "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
911   "$fcc5","$fcc6","$fcc7","$ap",  "$rap", "$frp"
912 };
913 
914 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
915                                    unsigned &NumNames) const {
916   Names = GCCRegNames;
917   NumNames = llvm::array_lengthof(GCCRegNames);
918 }
919 
920 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
921   { {"f0"},  "r0" },
922   { {"f1"},  "r1" },
923   { {"f2"},  "r2" },
924   { {"f3"},  "r3" },
925   { {"f4"},  "r4" },
926   { {"f5"},  "r5" },
927   { {"f6"},  "r6" },
928   { {"f7"},  "r7" },
929   { {"f8"},  "r8" },
930   { {"f9"},  "r9" },
931   { {"f10"}, "r10" },
932   { {"f11"}, "r11" },
933   { {"f12"}, "r12" },
934   { {"f13"}, "r13" },
935   { {"f14"}, "r14" },
936   { {"f15"}, "r15" },
937   { {"f16"}, "r16" },
938   { {"f17"}, "r17" },
939   { {"f18"}, "r18" },
940   { {"f19"}, "r19" },
941   { {"f20"}, "r20" },
942   { {"f21"}, "r21" },
943   { {"f22"}, "r22" },
944   { {"f23"}, "r23" },
945   { {"f24"}, "r24" },
946   { {"f25"}, "r25" },
947   { {"f26"}, "r26" },
948   { {"f27"}, "r27" },
949   { {"f28"}, "r28" },
950   { {"f29"}, "r29" },
951   { {"f30"}, "r30" },
952   { {"f31"}, "r31" },
953 };
954 
955 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
956                                      unsigned &NumAliases) const {
957   Aliases = GCCRegAliases;
958   NumAliases = llvm::array_lengthof(GCCRegAliases);
959 }
960 } // end anonymous namespace.
961 
962 namespace {
963 // Namespace for x86 abstract base class
964 const Builtin::Info BuiltinInfo[] = {
965 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
966 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
967                                               ALL_LANGUAGES, false },
968 #include "clang/Basic/BuiltinsX86.def"
969 };
970 
971 static const char* const GCCRegNames[] = {
972   "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
973   "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
974   "argp", "flags", "fspr", "dirflag", "frame",
975   "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
976   "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
977   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
978   "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
979 };
980 
981 const TargetInfo::GCCRegAlias GCCRegAliases[] = {
982   { { "al", "ah", "eax", "rax" }, "ax" },
983   { { "bl", "bh", "ebx", "rbx" }, "bx" },
984   { { "cl", "ch", "ecx", "rcx" }, "cx" },
985   { { "dl", "dh", "edx", "rdx" }, "dx" },
986   { { "esi", "rsi" }, "si" },
987   { { "edi", "rdi" }, "di" },
988   { { "esp", "rsp" }, "sp" },
989   { { "ebp", "rbp" }, "bp" },
990 };
991 
992 // X86 target abstract base class; x86-32 and x86-64 are very close, so
993 // most of the implementation can be shared.
994 class X86TargetInfo : public TargetInfo {
995   enum X86SSEEnum {
996     NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
997   } SSELevel;
998   enum AMD3DNowEnum {
999     NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
1000   } AMD3DNowLevel;
1001 
1002   bool HasAES;
1003   bool HasAVX;
1004 
1005 public:
1006   X86TargetInfo(const std::string& triple)
1007     : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
1008       HasAES(false), HasAVX(false) {
1009     LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1010   }
1011   virtual void getTargetBuiltins(const Builtin::Info *&Records,
1012                                  unsigned &NumRecords) const {
1013     Records = BuiltinInfo;
1014     NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1015   }
1016   virtual void getGCCRegNames(const char * const *&Names,
1017                               unsigned &NumNames) const {
1018     Names = GCCRegNames;
1019     NumNames = llvm::array_lengthof(GCCRegNames);
1020   }
1021   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1022                                 unsigned &NumAliases) const {
1023     Aliases = GCCRegAliases;
1024     NumAliases = llvm::array_lengthof(GCCRegAliases);
1025   }
1026   virtual bool validateAsmConstraint(const char *&Name,
1027                                      TargetInfo::ConstraintInfo &info) const;
1028   virtual std::string convertConstraint(const char Constraint) const;
1029   virtual const char *getClobbers() const {
1030     return "~{dirflag},~{fpsr},~{flags}";
1031   }
1032   virtual void getTargetDefines(const LangOptions &Opts,
1033                                 MacroBuilder &Builder) const;
1034   virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1035                                  const std::string &Name,
1036                                  bool Enabled) const;
1037   virtual void getDefaultFeatures(const std::string &CPU,
1038                                   llvm::StringMap<bool> &Features) const;
1039   virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1040 };
1041 
1042 void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
1043                                        llvm::StringMap<bool> &Features) const {
1044   // FIXME: This should not be here.
1045   Features["3dnow"] = false;
1046   Features["3dnowa"] = false;
1047   Features["mmx"] = false;
1048   Features["sse"] = false;
1049   Features["sse2"] = false;
1050   Features["sse3"] = false;
1051   Features["ssse3"] = false;
1052   Features["sse41"] = false;
1053   Features["sse42"] = false;
1054   Features["aes"] = false;
1055   Features["avx"] = false;
1056 
1057   // LLVM does not currently recognize this.
1058   // Features["sse4a"] = false;
1059 
1060   // FIXME: This *really* should not be here.
1061 
1062   // X86_64 always has SSE2.
1063   if (PointerWidth == 64)
1064     Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1065 
1066   if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
1067       CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro")
1068     ;
1069   else if (CPU == "pentium-mmx" || CPU == "pentium2")
1070     setFeatureEnabled(Features, "mmx", true);
1071   else if (CPU == "pentium3")
1072     setFeatureEnabled(Features, "sse", true);
1073   else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64")
1074     setFeatureEnabled(Features, "sse2", true);
1075   else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona")
1076     setFeatureEnabled(Features, "sse3", true);
1077   else if (CPU == "core2")
1078     setFeatureEnabled(Features, "ssse3", true);
1079   else if (CPU == "penryn") {
1080     setFeatureEnabled(Features, "sse4", true);
1081     Features["sse42"] = false;
1082   } else if (CPU == "atom")
1083     setFeatureEnabled(Features, "sse3", true);
1084   else if (CPU == "corei7") {
1085     setFeatureEnabled(Features, "sse4", true);
1086     setFeatureEnabled(Features, "aes", true);
1087   } else if (CPU == "sandybridge") {
1088     setFeatureEnabled(Features, "sse4", true);
1089     setFeatureEnabled(Features, "aes", true);
1090 //    setFeatureEnabled(Features, "avx", true);
1091   } else if (CPU == "k6" || CPU == "winchip-c6")
1092     setFeatureEnabled(Features, "mmx", true);
1093   else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
1094            CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
1095     setFeatureEnabled(Features, "mmx", true);
1096     setFeatureEnabled(Features, "3dnow", true);
1097   } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
1098     setFeatureEnabled(Features, "sse", true);
1099     setFeatureEnabled(Features, "3dnowa", true);
1100   } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" ||
1101            CPU == "athlon-fx") {
1102     setFeatureEnabled(Features, "sse2", true);
1103     setFeatureEnabled(Features, "3dnowa", true);
1104   } else if (CPU == "k8-sse3") {
1105     setFeatureEnabled(Features, "sse3", true);
1106     setFeatureEnabled(Features, "3dnowa", true);
1107   } else if (CPU == "c3-2")
1108     setFeatureEnabled(Features, "sse", true);
1109 }
1110 
1111 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1112                                       const std::string &Name,
1113                                       bool Enabled) const {
1114   // FIXME: This *really* should not be here.  We need some way of translating
1115   // options into llvm subtarget features.
1116   if (!Features.count(Name) &&
1117       (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1118     return false;
1119 
1120   if (Enabled) {
1121     if (Name == "mmx")
1122       Features["mmx"] = true;
1123     else if (Name == "sse")
1124       Features["mmx"] = Features["sse"] = true;
1125     else if (Name == "sse2")
1126       Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1127     else if (Name == "sse3")
1128       Features["mmx"] = Features["sse"] = Features["sse2"] =
1129         Features["sse3"] = true;
1130     else if (Name == "ssse3")
1131       Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1132         Features["ssse3"] = true;
1133     else if (Name == "sse4" || Name == "sse4.2")
1134       Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1135         Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1136     else if (Name == "sse4.1")
1137       Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1138         Features["ssse3"] = Features["sse41"] = true;
1139     else if (Name == "3dnow")
1140       Features["3dnowa"] = true;
1141     else if (Name == "3dnowa")
1142       Features["3dnow"] = Features["3dnowa"] = true;
1143     else if (Name == "aes")
1144       Features["aes"] = true;
1145     else if (Name == "avx")
1146       Features["avx"] = true;
1147   } else {
1148     if (Name == "mmx")
1149       Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1150         Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1151     else if (Name == "sse")
1152       Features["sse"] = Features["sse2"] = Features["sse3"] =
1153         Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1154     else if (Name == "sse2")
1155       Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1156         Features["sse41"] = Features["sse42"] = false;
1157     else if (Name == "sse3")
1158       Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1159         Features["sse42"] = false;
1160     else if (Name == "ssse3")
1161       Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1162     else if (Name == "sse4")
1163       Features["sse41"] = Features["sse42"] = false;
1164     else if (Name == "sse4.2")
1165       Features["sse42"] = false;
1166     else if (Name == "sse4.1")
1167       Features["sse41"] = Features["sse42"] = false;
1168     else if (Name == "3dnow")
1169       Features["3dnow"] = Features["3dnowa"] = false;
1170     else if (Name == "3dnowa")
1171       Features["3dnowa"] = false;
1172     else if (Name == "aes")
1173       Features["aes"] = false;
1174     else if (Name == "avx")
1175       Features["avx"] = false;
1176   }
1177 
1178   return true;
1179 }
1180 
1181 /// HandleTargetOptions - Perform initialization based on the user
1182 /// configured set of features.
1183 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1184   // Remember the maximum enabled sselevel.
1185   for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1186     // Ignore disabled features.
1187     if (Features[i][0] == '-')
1188       continue;
1189 
1190     if (Features[i].substr(1) == "aes") {
1191       HasAES = true;
1192       continue;
1193     }
1194 
1195     // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1196     // For now let it be enabled together with other SSE levels.
1197     if (Features[i].substr(1) == "avx") {
1198       HasAVX = true;
1199       continue;
1200     }
1201 
1202     assert(Features[i][0] == '+' && "Invalid target feature!");
1203     X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1204       .Case("sse42", SSE42)
1205       .Case("sse41", SSE41)
1206       .Case("ssse3", SSSE3)
1207       .Case("sse3", SSE3)
1208       .Case("sse2", SSE2)
1209       .Case("sse", SSE1)
1210       .Case("mmx", MMX)
1211       .Default(NoMMXSSE);
1212     SSELevel = std::max(SSELevel, Level);
1213 
1214     AMD3DNowEnum ThreeDNowLevel =
1215       llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1))
1216         .Case("3dnowa", AMD3DNowAthlon)
1217         .Case("3dnow", AMD3DNow)
1218         .Default(NoAMD3DNow);
1219 
1220     AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel);
1221   }
1222 }
1223 
1224 /// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
1225 /// that are not tied to a specific subtarget.
1226 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1227                                      MacroBuilder &Builder) const {
1228   // Target identification.
1229   if (PointerWidth == 64) {
1230     Builder.defineMacro("_LP64");
1231     Builder.defineMacro("__LP64__");
1232     Builder.defineMacro("__amd64__");
1233     Builder.defineMacro("__amd64");
1234     Builder.defineMacro("__x86_64");
1235     Builder.defineMacro("__x86_64__");
1236   } else {
1237     DefineStd(Builder, "i386", Opts);
1238   }
1239 
1240   if (HasAES)
1241     Builder.defineMacro("__AES__");
1242 
1243   if (HasAVX)
1244     Builder.defineMacro("__AVX__");
1245 
1246   // Target properties.
1247   Builder.defineMacro("__LITTLE_ENDIAN__");
1248 
1249   // Subtarget options.
1250   Builder.defineMacro("__nocona");
1251   Builder.defineMacro("__nocona__");
1252   Builder.defineMacro("__tune_nocona__");
1253   Builder.defineMacro("__REGISTER_PREFIX__", "");
1254 
1255   // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1256   // functions in glibc header files that use FP Stack inline asm which the
1257   // backend can't deal with (PR879).
1258   Builder.defineMacro("__NO_MATH_INLINES");
1259 
1260   // Each case falls through to the previous one here.
1261   switch (SSELevel) {
1262   case SSE42:
1263     Builder.defineMacro("__SSE4_2__");
1264   case SSE41:
1265     Builder.defineMacro("__SSE4_1__");
1266   case SSSE3:
1267     Builder.defineMacro("__SSSE3__");
1268   case SSE3:
1269     Builder.defineMacro("__SSE3__");
1270   case SSE2:
1271     Builder.defineMacro("__SSE2__");
1272     Builder.defineMacro("__SSE2_MATH__");  // -mfp-math=sse always implied.
1273   case SSE1:
1274     Builder.defineMacro("__SSE__");
1275     Builder.defineMacro("__SSE_MATH__");   // -mfp-math=sse always implied.
1276   case MMX:
1277     Builder.defineMacro("__MMX__");
1278   case NoMMXSSE:
1279     break;
1280   }
1281 
1282   if (Opts.Microsoft && PointerWidth == 32) {
1283     switch (SSELevel) {
1284     case SSE42:
1285     case SSE41:
1286     case SSSE3:
1287     case SSE3:
1288     case SSE2:
1289       Builder.defineMacro("_M_IX86_FP", llvm::Twine(2));
1290       break;
1291     case SSE1:
1292       Builder.defineMacro("_M_IX86_FP", llvm::Twine(1));
1293       break;
1294     default:
1295       Builder.defineMacro("_M_IX86_FP", llvm::Twine(0));
1296     }
1297   }
1298 
1299   // Each case falls through to the previous one here.
1300   switch (AMD3DNowLevel) {
1301   case AMD3DNowAthlon:
1302     Builder.defineMacro("__3dNOW_A__");
1303   case AMD3DNow:
1304     Builder.defineMacro("__3dNOW__");
1305   case NoAMD3DNow:
1306     break;
1307   }
1308 }
1309 
1310 
1311 bool
1312 X86TargetInfo::validateAsmConstraint(const char *&Name,
1313                                      TargetInfo::ConstraintInfo &Info) const {
1314   switch (*Name) {
1315   default: return false;
1316   case 'Y': // first letter of a pair:
1317     switch (*(Name+1)) {
1318     default: return false;
1319     case '0':  // First SSE register.
1320     case 't':  // Any SSE register, when SSE2 is enabled.
1321     case 'i':  // Any SSE register, when SSE2 and inter-unit moves enabled.
1322     case 'm':  // any MMX register, when inter-unit moves enabled.
1323       break;   // falls through to setAllowsRegister.
1324   }
1325   case 'a': // eax.
1326   case 'b': // ebx.
1327   case 'c': // ecx.
1328   case 'd': // edx.
1329   case 'S': // esi.
1330   case 'D': // edi.
1331   case 'A': // edx:eax.
1332   case 'f': // any x87 floating point stack register.
1333   case 't': // top of floating point stack.
1334   case 'u': // second from top of floating point stack.
1335   case 'q': // Any register accessible as [r]l: a, b, c, and d.
1336   case 'y': // Any MMX register.
1337   case 'x': // Any SSE register.
1338   case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1339   case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1340   case 'l': // "Index" registers: any general register that can be used as an
1341             // index in a base+index memory access.
1342     Info.setAllowsRegister();
1343     return true;
1344   case 'C': // SSE floating point constant.
1345   case 'G': // x87 floating point constant.
1346   case 'e': // 32-bit signed integer constant for use with zero-extending
1347             // x86_64 instructions.
1348   case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1349             // x86_64 instructions.
1350     return true;
1351   }
1352   return false;
1353 }
1354 
1355 
1356 std::string
1357 X86TargetInfo::convertConstraint(const char Constraint) const {
1358   switch (Constraint) {
1359   case 'a': return std::string("{ax}");
1360   case 'b': return std::string("{bx}");
1361   case 'c': return std::string("{cx}");
1362   case 'd': return std::string("{dx}");
1363   case 'S': return std::string("{si}");
1364   case 'D': return std::string("{di}");
1365   case 'p': // address
1366     return std::string("im");
1367   case 't': // top of floating point stack.
1368     return std::string("{st}");
1369   case 'u': // second from top of floating point stack.
1370     return std::string("{st(1)}"); // second from top of floating point stack.
1371   default:
1372     return std::string(1, Constraint);
1373   }
1374 }
1375 } // end anonymous namespace
1376 
1377 namespace {
1378 // X86-32 generic target
1379 class X86_32TargetInfo : public X86TargetInfo {
1380 public:
1381   X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1382     DoubleAlign = LongLongAlign = 32;
1383     LongDoubleWidth = 96;
1384     LongDoubleAlign = 32;
1385     DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1386                         "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1387                         "a0:0:64-f80:32:32-n8:16:32";
1388     SizeType = UnsignedInt;
1389     PtrDiffType = SignedInt;
1390     IntPtrType = SignedInt;
1391     RegParmMax = 3;
1392 
1393     // Use fpret for all types.
1394     RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
1395                              (1 << TargetInfo::Double) |
1396                              (1 << TargetInfo::LongDouble));
1397   }
1398   virtual const char *getVAListDeclaration() const {
1399     return "typedef char* __builtin_va_list;";
1400   }
1401 
1402   int getEHDataRegisterNumber(unsigned RegNo) const {
1403     if (RegNo == 0) return 0;
1404     if (RegNo == 1) return 2;
1405     return -1;
1406   }
1407 };
1408 } // end anonymous namespace
1409 
1410 namespace {
1411 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
1412 public:
1413   OpenBSDI386TargetInfo(const std::string& triple) :
1414     OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
1415     SizeType = UnsignedLong;
1416     IntPtrType = SignedLong;
1417     PtrDiffType = SignedLong;
1418   }
1419 };
1420 } // end anonymous namespace
1421 
1422 namespace {
1423 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
1424 public:
1425   DarwinI386TargetInfo(const std::string& triple) :
1426     DarwinTargetInfo<X86_32TargetInfo>(triple) {
1427     LongDoubleWidth = 128;
1428     LongDoubleAlign = 128;
1429     SizeType = UnsignedLong;
1430     IntPtrType = SignedLong;
1431     DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1432                         "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1433                         "a0:0:64-f80:128:128-n8:16:32";
1434     HasAlignMac68kSupport = true;
1435   }
1436 
1437 };
1438 } // end anonymous namespace
1439 
1440 namespace {
1441 // x86-32 Windows target
1442 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
1443 public:
1444   WindowsX86_32TargetInfo(const std::string& triple)
1445     : WindowsTargetInfo<X86_32TargetInfo>(triple) {
1446     TLSSupported = false;
1447     WCharType = UnsignedShort;
1448     DoubleAlign = LongLongAlign = 64;
1449     DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1450                         "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
1451                         "v128:128:128-a0:0:64-f80:32:32-n8:16:32";
1452   }
1453   virtual void getTargetDefines(const LangOptions &Opts,
1454                                 MacroBuilder &Builder) const {
1455     WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
1456   }
1457 };
1458 } // end anonymous namespace
1459 
1460 namespace {
1461 
1462 // x86-32 Windows Visual Studio target
1463 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
1464 public:
1465   VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
1466     : WindowsX86_32TargetInfo(triple) {
1467     LongDoubleWidth = LongDoubleAlign = 64;
1468     LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1469   }
1470   virtual void getTargetDefines(const LangOptions &Opts,
1471                                 MacroBuilder &Builder) const {
1472     WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1473     WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
1474     // The value of the following reflects processor type.
1475     // 300=386, 400=486, 500=Pentium, 600=Blend (default)
1476     // We lost the original triple, so we use the default.
1477     Builder.defineMacro("_M_IX86", "600");
1478   }
1479 };
1480 } // end anonymous namespace
1481 
1482 namespace {
1483 // x86-32 MinGW target
1484 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
1485 public:
1486   MinGWX86_32TargetInfo(const std::string& triple)
1487     : WindowsX86_32TargetInfo(triple) {
1488   }
1489   virtual void getTargetDefines(const LangOptions &Opts,
1490                                 MacroBuilder &Builder) const {
1491     WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1492     DefineStd(Builder, "WIN32", Opts);
1493     DefineStd(Builder, "WINNT", Opts);
1494     Builder.defineMacro("_X86_");
1495     Builder.defineMacro("__MSVCRT__");
1496     Builder.defineMacro("__MINGW32__");
1497 
1498     // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
1499     // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
1500     if (Opts.Microsoft)
1501       // Provide "as-is" __declspec.
1502       Builder.defineMacro("__declspec", "__declspec");
1503     else
1504       // Provide alias of __attribute__ like mingw32-gcc.
1505       Builder.defineMacro("__declspec(a)", "__attribute__((a))");
1506   }
1507 };
1508 } // end anonymous namespace
1509 
1510 namespace {
1511 // x86-32 Cygwin target
1512 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
1513 public:
1514   CygwinX86_32TargetInfo(const std::string& triple)
1515     : X86_32TargetInfo(triple) {
1516     TLSSupported = false;
1517     WCharType = UnsignedShort;
1518     DoubleAlign = LongLongAlign = 64;
1519     DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1520                         "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1521                         "a0:0:64-f80:32:32-n8:16:32";
1522   }
1523   virtual void getTargetDefines(const LangOptions &Opts,
1524                                 MacroBuilder &Builder) const {
1525     X86_32TargetInfo::getTargetDefines(Opts, Builder);
1526     Builder.defineMacro("__CYGWIN__");
1527     Builder.defineMacro("__CYGWIN32__");
1528     DefineStd(Builder, "unix", Opts);
1529     if (Opts.CPlusPlus)
1530       Builder.defineMacro("_GNU_SOURCE");
1531   }
1532 };
1533 } // end anonymous namespace
1534 
1535 namespace {
1536 // x86-32 Haiku target
1537 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
1538 public:
1539   HaikuX86_32TargetInfo(const std::string& triple)
1540     : X86_32TargetInfo(triple) {
1541     SizeType = UnsignedLong;
1542     IntPtrType = SignedLong;
1543     PtrDiffType = SignedLong;
1544     this->UserLabelPrefix = "";
1545   }
1546   virtual void getTargetDefines(const LangOptions &Opts,
1547                                 MacroBuilder &Builder) const {
1548     X86_32TargetInfo::getTargetDefines(Opts, Builder);
1549     Builder.defineMacro("__INTEL__");
1550     Builder.defineMacro("__HAIKU__");
1551   }
1552 };
1553 } // end anonymous namespace
1554 
1555 namespace {
1556 // x86-64 generic target
1557 class X86_64TargetInfo : public X86TargetInfo {
1558 public:
1559   X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
1560     LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1561     LongDoubleWidth = 128;
1562     LongDoubleAlign = 128;
1563     LargeArrayMinWidth = 128;
1564     LargeArrayAlign = 128;
1565     IntMaxType = SignedLong;
1566     UIntMaxType = UnsignedLong;
1567     Int64Type = SignedLong;
1568     RegParmMax = 6;
1569 
1570     DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1571                         "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1572                         "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64";
1573 
1574     // Use fpret only for long double.
1575     RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
1576   }
1577   virtual const char *getVAListDeclaration() const {
1578     return "typedef struct __va_list_tag {"
1579            "  unsigned gp_offset;"
1580            "  unsigned fp_offset;"
1581            "  void* overflow_arg_area;"
1582            "  void* reg_save_area;"
1583            "} __va_list_tag;"
1584            "typedef __va_list_tag __builtin_va_list[1];";
1585   }
1586 
1587   int getEHDataRegisterNumber(unsigned RegNo) const {
1588     if (RegNo == 0) return 0;
1589     if (RegNo == 1) return 1;
1590     return -1;
1591   }
1592 };
1593 } // end anonymous namespace
1594 
1595 namespace {
1596 // x86-64 Windows target
1597 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
1598 public:
1599   WindowsX86_64TargetInfo(const std::string& triple)
1600     : WindowsTargetInfo<X86_64TargetInfo>(triple) {
1601     TLSSupported = false;
1602     WCharType = UnsignedShort;
1603     LongWidth = LongAlign = 32;
1604     DoubleAlign = LongLongAlign = 64;
1605     IntMaxType = SignedLongLong;
1606     UIntMaxType = UnsignedLongLong;
1607     Int64Type = SignedLongLong;
1608     SizeType = UnsignedLongLong;
1609     PtrDiffType = SignedLongLong;
1610     IntPtrType = SignedLongLong;
1611     this->UserLabelPrefix = "";
1612   }
1613   virtual void getTargetDefines(const LangOptions &Opts,
1614                                 MacroBuilder &Builder) const {
1615     WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
1616     Builder.defineMacro("_WIN64");
1617   }
1618   virtual const char *getVAListDeclaration() const {
1619     return "typedef char* __builtin_va_list;";
1620   }
1621 };
1622 } // end anonymous namespace
1623 
1624 namespace {
1625 // x86-64 Windows Visual Studio target
1626 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
1627 public:
1628   VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
1629     : WindowsX86_64TargetInfo(triple) {
1630     LongDoubleWidth = LongDoubleAlign = 64;
1631     LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1632   }
1633   virtual void getTargetDefines(const LangOptions &Opts,
1634                                 MacroBuilder &Builder) const {
1635     WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1636     WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
1637     Builder.defineMacro("_M_X64");
1638     Builder.defineMacro("_M_AMD64");
1639   }
1640 };
1641 } // end anonymous namespace
1642 
1643 namespace {
1644 // x86-64 MinGW target
1645 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
1646 public:
1647   MinGWX86_64TargetInfo(const std::string& triple)
1648     : WindowsX86_64TargetInfo(triple) {
1649   }
1650   virtual void getTargetDefines(const LangOptions &Opts,
1651                                 MacroBuilder &Builder) const {
1652     WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1653     DefineStd(Builder, "WIN64", Opts);
1654     Builder.defineMacro("__MSVCRT__");
1655     Builder.defineMacro("__MINGW32__");
1656     Builder.defineMacro("__MINGW64__");
1657 
1658     // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
1659     // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
1660     if (Opts.Microsoft)
1661       // Provide "as-is" __declspec.
1662       Builder.defineMacro("__declspec", "__declspec");
1663     else
1664       // Provide alias of __attribute__ like mingw32-gcc.
1665       Builder.defineMacro("__declspec(a)", "__attribute__((a))");
1666   }
1667 };
1668 } // end anonymous namespace
1669 
1670 namespace {
1671 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
1672 public:
1673   DarwinX86_64TargetInfo(const std::string& triple)
1674       : DarwinTargetInfo<X86_64TargetInfo>(triple) {
1675     Int64Type = SignedLongLong;
1676   }
1677 };
1678 } // end anonymous namespace
1679 
1680 namespace {
1681 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
1682 public:
1683   OpenBSDX86_64TargetInfo(const std::string& triple)
1684       : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
1685     IntMaxType = SignedLongLong;
1686     UIntMaxType = UnsignedLongLong;
1687     Int64Type = SignedLongLong;
1688   }
1689 };
1690 } // end anonymous namespace
1691 
1692 namespace {
1693 class ARMTargetInfo : public TargetInfo {
1694   // Possible FPU choices.
1695   enum FPUMode {
1696     NoFPU,
1697     VFP2FPU,
1698     VFP3FPU,
1699     NeonFPU
1700   };
1701 
1702   static bool FPUModeIsVFP(FPUMode Mode) {
1703     return Mode >= VFP2FPU && Mode <= NeonFPU;
1704   }
1705 
1706   static const TargetInfo::GCCRegAlias GCCRegAliases[];
1707   static const char * const GCCRegNames[];
1708 
1709   std::string ABI, CPU;
1710 
1711   unsigned FPU : 3;
1712 
1713   unsigned IsThumb : 1;
1714 
1715   // Initialized via features.
1716   unsigned SoftFloat : 1;
1717   unsigned SoftFloatABI : 1;
1718 
1719   static const Builtin::Info BuiltinInfo[];
1720 
1721 public:
1722   ARMTargetInfo(const std::string &TripleStr)
1723     : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
1724   {
1725     SizeType = UnsignedInt;
1726     PtrDiffType = SignedInt;
1727 
1728     // {} in inline assembly are neon specifiers, not assembly variant
1729     // specifiers.
1730     NoAsmVariants = true;
1731 
1732     // FIXME: Should we just treat this as a feature?
1733     IsThumb = getTriple().getArchName().startswith("thumb");
1734     if (IsThumb) {
1735       // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
1736       // so set preferred for small types to 32.
1737       DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1738                            "i64:64:64-f32:32:32-f64:64:64-"
1739                            "v64:64:64-v128:64:128-a0:0:32-n32");
1740     } else {
1741       DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1742                            "i64:64:64-f32:32:32-f64:64:64-"
1743                            "v64:64:64-v128:64:128-a0:0:64-n32");
1744     }
1745 
1746     // ARM targets default to using the ARM C++ ABI.
1747     CXXABI = CXXABI_ARM;
1748   }
1749   virtual const char *getABI() const { return ABI.c_str(); }
1750   virtual bool setABI(const std::string &Name) {
1751     ABI = Name;
1752 
1753     // The defaults (above) are for AAPCS, check if we need to change them.
1754     //
1755     // FIXME: We need support for -meabi... we could just mangle it into the
1756     // name.
1757     if (Name == "apcs-gnu") {
1758       DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
1759       SizeType = UnsignedLong;
1760 
1761       // Do not respect the alignment of bit-field types when laying out
1762       // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
1763       UseBitFieldTypeAlignment = false;
1764 
1765       if (IsThumb) {
1766         // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
1767         // so set preferred for small types to 32.
1768         DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1769                              "i64:32:32-f32:32:32-f64:32:32-"
1770                              "v64:32:64-v128:32:128-a0:0:32-n32");
1771       } else {
1772         DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1773                              "i64:32:64-f32:32:32-f64:32:64-"
1774                              "v64:32:64-v128:32:128-a0:0:32-n32");
1775       }
1776 
1777       // FIXME: Override "preferred align" for double and long long.
1778     } else if (Name == "aapcs") {
1779       // FIXME: Enumerated types are variable width in straight AAPCS.
1780     } else if (Name == "aapcs-linux") {
1781       ;
1782     } else
1783       return false;
1784 
1785     return true;
1786   }
1787 
1788   void getDefaultFeatures(const std::string &CPU,
1789                           llvm::StringMap<bool> &Features) const {
1790     // FIXME: This should not be here.
1791     Features["vfp2"] = false;
1792     Features["vfp3"] = false;
1793     Features["neon"] = false;
1794 
1795     if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
1796       Features["vfp2"] = true;
1797     else if (CPU == "cortex-a8" || CPU == "cortex-a9")
1798       Features["neon"] = true;
1799   }
1800 
1801   virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1802                                  const std::string &Name,
1803                                  bool Enabled) const {
1804     if (Name == "soft-float" || Name == "soft-float-abi") {
1805       Features[Name] = Enabled;
1806     } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") {
1807       // These effectively are a single option, reset them when any is enabled.
1808       if (Enabled)
1809         Features["vfp2"] = Features["vfp3"] = Features["neon"] = false;
1810       Features[Name] = Enabled;
1811     } else
1812       return false;
1813 
1814     return true;
1815   }
1816 
1817   virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
1818     FPU = NoFPU;
1819     SoftFloat = SoftFloatABI = false;
1820     for (unsigned i = 0, e = Features.size(); i != e; ++i) {
1821       if (Features[i] == "+soft-float")
1822         SoftFloat = true;
1823       else if (Features[i] == "+soft-float-abi")
1824         SoftFloatABI = true;
1825       else if (Features[i] == "+vfp2")
1826         FPU = VFP2FPU;
1827       else if (Features[i] == "+vfp3")
1828         FPU = VFP3FPU;
1829       else if (Features[i] == "+neon")
1830         FPU = NeonFPU;
1831     }
1832 
1833     // Remove front-end specific options which the backend handles differently.
1834     std::vector<std::string>::iterator it;
1835     it = std::find(Features.begin(), Features.end(), "+soft-float");
1836     if (it != Features.end())
1837       Features.erase(it);
1838     it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
1839     if (it != Features.end())
1840       Features.erase(it);
1841   }
1842 
1843   static const char *getCPUDefineSuffix(llvm::StringRef Name) {
1844     return llvm::StringSwitch<const char*>(Name)
1845       .Cases("arm8", "arm810", "4")
1846       .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
1847       .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
1848       .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
1849       .Case("ep9312", "4T")
1850       .Cases("arm10tdmi", "arm1020t", "5T")
1851       .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
1852       .Case("arm926ej-s", "5TEJ")
1853       .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
1854       .Cases("xscale", "iwmmxt", "5TE")
1855       .Case("arm1136j-s", "6J")
1856       .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
1857       .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
1858       .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
1859       .Cases("cortex-a8", "cortex-a9", "7A")
1860       .Case("cortex-m3", "7M")
1861       .Case("cortex-m0", "6M")
1862       .Default(0);
1863   }
1864   virtual bool setCPU(const std::string &Name) {
1865     if (!getCPUDefineSuffix(Name))
1866       return false;
1867 
1868     CPU = Name;
1869     return true;
1870   }
1871   virtual void getTargetDefines(const LangOptions &Opts,
1872                                 MacroBuilder &Builder) const {
1873     // Target identification.
1874     Builder.defineMacro("__arm");
1875     Builder.defineMacro("__arm__");
1876 
1877     // Target properties.
1878     Builder.defineMacro("__ARMEL__");
1879     Builder.defineMacro("__LITTLE_ENDIAN__");
1880     Builder.defineMacro("__REGISTER_PREFIX__", "");
1881 
1882     llvm::StringRef CPUArch = getCPUDefineSuffix(CPU);
1883     Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
1884 
1885     // Subtarget options.
1886 
1887     // FIXME: It's more complicated than this and we don't really support
1888     // interworking.
1889     if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
1890       Builder.defineMacro("__THUMB_INTERWORK__");
1891 
1892     if (ABI == "aapcs" || ABI == "aapcs-linux")
1893       Builder.defineMacro("__ARM_EABI__");
1894 
1895     if (SoftFloat)
1896       Builder.defineMacro("__SOFTFP__");
1897 
1898     if (CPU == "xscale")
1899       Builder.defineMacro("__XSCALE__");
1900 
1901     bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7"));
1902     if (IsThumb) {
1903       Builder.defineMacro("__THUMBEL__");
1904       Builder.defineMacro("__thumb__");
1905       if (IsThumb2)
1906         Builder.defineMacro("__thumb2__");
1907     }
1908 
1909     // Note, this is always on in gcc, even though it doesn't make sense.
1910     Builder.defineMacro("__APCS_32__");
1911 
1912     if (FPUModeIsVFP((FPUMode) FPU))
1913       Builder.defineMacro("__VFP_FP__");
1914 
1915     // This only gets set when Neon instructions are actually available, unlike
1916     // the VFP define, hence the soft float and arch check. This is subtly
1917     // different from gcc, we follow the intent which was that it should be set
1918     // when Neon instructions are actually available.
1919     if (FPU == NeonFPU && !SoftFloat && IsThumb2)
1920       Builder.defineMacro("__ARM_NEON__");
1921   }
1922   virtual void getTargetBuiltins(const Builtin::Info *&Records,
1923                                  unsigned &NumRecords) const {
1924     Records = BuiltinInfo;
1925     NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
1926   }
1927   virtual const char *getVAListDeclaration() const {
1928     return "typedef char* __builtin_va_list;";
1929   }
1930   virtual void getGCCRegNames(const char * const *&Names,
1931                               unsigned &NumNames) const;
1932   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1933                                 unsigned &NumAliases) const;
1934   virtual bool validateAsmConstraint(const char *&Name,
1935                                      TargetInfo::ConstraintInfo &Info) const {
1936     // FIXME: Check if this is complete
1937     switch (*Name) {
1938     default:
1939     case 'l': // r0-r7
1940     case 'h': // r8-r15
1941     case 'w': // VFP Floating point register single precision
1942     case 'P': // VFP Floating point register double precision
1943       Info.setAllowsRegister();
1944       return true;
1945     }
1946     return false;
1947   }
1948   virtual const char *getClobbers() const {
1949     // FIXME: Is this really right?
1950     return "";
1951   }
1952 };
1953 
1954 const char * const ARMTargetInfo::GCCRegNames[] = {
1955   // Integer registers
1956   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1957   "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
1958 
1959   // Float registers
1960   "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
1961   "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
1962   "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
1963   "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
1964 
1965   // Double registers
1966   "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
1967   "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
1968   "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
1969   "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
1970 
1971   // Quad registers
1972   "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
1973   "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
1974 };
1975 
1976 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
1977                                    unsigned &NumNames) const {
1978   Names = GCCRegNames;
1979   NumNames = llvm::array_lengthof(GCCRegNames);
1980 }
1981 
1982 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
1983   { { "a1" }, "r0" },
1984   { { "a2" }, "r1" },
1985   { { "a3" }, "r2" },
1986   { { "a4" }, "r3" },
1987   { { "v1" }, "r4" },
1988   { { "v2" }, "r5" },
1989   { { "v3" }, "r6" },
1990   { { "v4" }, "r7" },
1991   { { "v5" }, "r8" },
1992   { { "v6", "rfp" }, "r9" },
1993   { { "sl" }, "r10" },
1994   { { "fp" }, "r11" },
1995   { { "ip" }, "r12" },
1996   { { "r13" }, "sp" },
1997   { { "r14" }, "lr" },
1998   { { "r15" }, "pc" },
1999   // The S, D and Q registers overlap, but aren't really aliases; we
2000   // don't want to substitute one of these for a different-sized one.
2001 };
2002 
2003 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2004                                        unsigned &NumAliases) const {
2005   Aliases = GCCRegAliases;
2006   NumAliases = llvm::array_lengthof(GCCRegAliases);
2007 }
2008 
2009 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2010 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
2011 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2012                                               ALL_LANGUAGES, false },
2013 #include "clang/Basic/BuiltinsARM.def"
2014 };
2015 } // end anonymous namespace.
2016 
2017 
2018 namespace {
2019 class DarwinARMTargetInfo :
2020   public DarwinTargetInfo<ARMTargetInfo> {
2021 protected:
2022   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2023                             MacroBuilder &Builder) const {
2024     getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2025   }
2026 
2027 public:
2028   DarwinARMTargetInfo(const std::string& triple)
2029     : DarwinTargetInfo<ARMTargetInfo>(triple) {
2030     HasAlignMac68kSupport = true;
2031   }
2032 };
2033 } // end anonymous namespace.
2034 
2035 namespace {
2036 class SparcV8TargetInfo : public TargetInfo {
2037   static const TargetInfo::GCCRegAlias GCCRegAliases[];
2038   static const char * const GCCRegNames[];
2039   bool SoftFloat;
2040 public:
2041   SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
2042     // FIXME: Support Sparc quad-precision long double?
2043     DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2044                         "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2045   }
2046   virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2047                                  const std::string &Name,
2048                                  bool Enabled) const {
2049     if (Name == "soft-float")
2050       Features[Name] = Enabled;
2051     else
2052       return false;
2053 
2054     return true;
2055   }
2056   virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2057     SoftFloat = false;
2058     for (unsigned i = 0, e = Features.size(); i != e; ++i)
2059       if (Features[i] == "+soft-float")
2060         SoftFloat = true;
2061   }
2062   virtual void getTargetDefines(const LangOptions &Opts,
2063                                 MacroBuilder &Builder) const {
2064     DefineStd(Builder, "sparc", Opts);
2065     Builder.defineMacro("__sparcv8");
2066     Builder.defineMacro("__REGISTER_PREFIX__", "");
2067 
2068     if (SoftFloat)
2069       Builder.defineMacro("SOFT_FLOAT", "1");
2070   }
2071   virtual void getTargetBuiltins(const Builtin::Info *&Records,
2072                                  unsigned &NumRecords) const {
2073     // FIXME: Implement!
2074   }
2075   virtual const char *getVAListDeclaration() const {
2076     return "typedef void* __builtin_va_list;";
2077   }
2078   virtual void getGCCRegNames(const char * const *&Names,
2079                               unsigned &NumNames) const;
2080   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2081                                 unsigned &NumAliases) const;
2082   virtual bool validateAsmConstraint(const char *&Name,
2083                                      TargetInfo::ConstraintInfo &info) const {
2084     // FIXME: Implement!
2085     return false;
2086   }
2087   virtual const char *getClobbers() const {
2088     // FIXME: Implement!
2089     return "";
2090   }
2091 };
2092 
2093 const char * const SparcV8TargetInfo::GCCRegNames[] = {
2094   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2095   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
2096   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
2097   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
2098 };
2099 
2100 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
2101                                        unsigned &NumNames) const {
2102   Names = GCCRegNames;
2103   NumNames = llvm::array_lengthof(GCCRegNames);
2104 }
2105 
2106 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
2107   { { "g0" }, "r0" },
2108   { { "g1" }, "r1" },
2109   { { "g2" }, "r2" },
2110   { { "g3" }, "r3" },
2111   { { "g4" }, "r4" },
2112   { { "g5" }, "r5" },
2113   { { "g6" }, "r6" },
2114   { { "g7" }, "r7" },
2115   { { "o0" }, "r8" },
2116   { { "o1" }, "r9" },
2117   { { "o2" }, "r10" },
2118   { { "o3" }, "r11" },
2119   { { "o4" }, "r12" },
2120   { { "o5" }, "r13" },
2121   { { "o6", "sp" }, "r14" },
2122   { { "o7" }, "r15" },
2123   { { "l0" }, "r16" },
2124   { { "l1" }, "r17" },
2125   { { "l2" }, "r18" },
2126   { { "l3" }, "r19" },
2127   { { "l4" }, "r20" },
2128   { { "l5" }, "r21" },
2129   { { "l6" }, "r22" },
2130   { { "l7" }, "r23" },
2131   { { "i0" }, "r24" },
2132   { { "i1" }, "r25" },
2133   { { "i2" }, "r26" },
2134   { { "i3" }, "r27" },
2135   { { "i4" }, "r28" },
2136   { { "i5" }, "r29" },
2137   { { "i6", "fp" }, "r30" },
2138   { { "i7" }, "r31" },
2139 };
2140 
2141 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2142                                          unsigned &NumAliases) const {
2143   Aliases = GCCRegAliases;
2144   NumAliases = llvm::array_lengthof(GCCRegAliases);
2145 }
2146 } // end anonymous namespace.
2147 
2148 namespace {
2149 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
2150 public:
2151   AuroraUXSparcV8TargetInfo(const std::string& triple) :
2152       AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
2153     SizeType = UnsignedInt;
2154     PtrDiffType = SignedInt;
2155   }
2156 };
2157 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
2158 public:
2159   SolarisSparcV8TargetInfo(const std::string& triple) :
2160       SolarisTargetInfo<SparcV8TargetInfo>(triple) {
2161     SizeType = UnsignedInt;
2162     PtrDiffType = SignedInt;
2163   }
2164 };
2165 } // end anonymous namespace.
2166 
2167 namespace {
2168   class MSP430TargetInfo : public TargetInfo {
2169     static const char * const GCCRegNames[];
2170   public:
2171     MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2172       TLSSupported = false;
2173       IntWidth = 16; IntAlign = 16;
2174       LongWidth = 32; LongLongWidth = 64;
2175       LongAlign = LongLongAlign = 16;
2176       PointerWidth = 16; PointerAlign = 16;
2177       SizeType = UnsignedInt;
2178       IntMaxType = SignedLong;
2179       UIntMaxType = UnsignedLong;
2180       IntPtrType = SignedShort;
2181       PtrDiffType = SignedInt;
2182       SigAtomicType = SignedLong;
2183       DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2184    }
2185     virtual void getTargetDefines(const LangOptions &Opts,
2186                                   MacroBuilder &Builder) const {
2187       Builder.defineMacro("MSP430");
2188       Builder.defineMacro("__MSP430__");
2189       // FIXME: defines for different 'flavours' of MCU
2190     }
2191     virtual void getTargetBuiltins(const Builtin::Info *&Records,
2192                                    unsigned &NumRecords) const {
2193      // FIXME: Implement.
2194       Records = 0;
2195       NumRecords = 0;
2196     }
2197     virtual void getGCCRegNames(const char * const *&Names,
2198                                 unsigned &NumNames) const;
2199     virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2200                                   unsigned &NumAliases) const {
2201       // No aliases.
2202       Aliases = 0;
2203       NumAliases = 0;
2204     }
2205     virtual bool validateAsmConstraint(const char *&Name,
2206                                        TargetInfo::ConstraintInfo &info) const {
2207       // No target constraints for now.
2208       return false;
2209     }
2210     virtual const char *getClobbers() const {
2211       // FIXME: Is this really right?
2212       return "";
2213     }
2214     virtual const char *getVAListDeclaration() const {
2215       // FIXME: implement
2216       return "typedef char* __builtin_va_list;";
2217    }
2218   };
2219 
2220   const char * const MSP430TargetInfo::GCCRegNames[] = {
2221     "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2222     "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2223   };
2224 
2225   void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2226                                         unsigned &NumNames) const {
2227     Names = GCCRegNames;
2228     NumNames = llvm::array_lengthof(GCCRegNames);
2229   }
2230 }
2231 
2232 
2233 namespace {
2234   class SystemZTargetInfo : public TargetInfo {
2235     static const char * const GCCRegNames[];
2236   public:
2237     SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2238       TLSSupported = false;
2239       IntWidth = IntAlign = 32;
2240       LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2241       PointerWidth = PointerAlign = 64;
2242       DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2243       "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2244    }
2245     virtual void getTargetDefines(const LangOptions &Opts,
2246                                   MacroBuilder &Builder) const {
2247       Builder.defineMacro("__s390__");
2248       Builder.defineMacro("__s390x__");
2249     }
2250     virtual void getTargetBuiltins(const Builtin::Info *&Records,
2251                                    unsigned &NumRecords) const {
2252       // FIXME: Implement.
2253       Records = 0;
2254       NumRecords = 0;
2255     }
2256 
2257     virtual void getGCCRegNames(const char * const *&Names,
2258                                 unsigned &NumNames) const;
2259     virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2260                                   unsigned &NumAliases) const {
2261       // No aliases.
2262       Aliases = 0;
2263       NumAliases = 0;
2264     }
2265     virtual bool validateAsmConstraint(const char *&Name,
2266                                        TargetInfo::ConstraintInfo &info) const {
2267       // FIXME: implement
2268       return true;
2269     }
2270     virtual const char *getClobbers() const {
2271       // FIXME: Is this really right?
2272       return "";
2273     }
2274     virtual const char *getVAListDeclaration() const {
2275       // FIXME: implement
2276       return "typedef char* __builtin_va_list;";
2277    }
2278   };
2279 
2280   const char * const SystemZTargetInfo::GCCRegNames[] = {
2281     "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2282     "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2283   };
2284 
2285   void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
2286                                          unsigned &NumNames) const {
2287     Names = GCCRegNames;
2288     NumNames = llvm::array_lengthof(GCCRegNames);
2289   }
2290 }
2291 
2292 namespace {
2293   class BlackfinTargetInfo : public TargetInfo {
2294     static const char * const GCCRegNames[];
2295   public:
2296     BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
2297       TLSSupported = false;
2298       DoubleAlign = 32;
2299       LongLongAlign = 32;
2300       LongDoubleAlign = 32;
2301       DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
2302     }
2303 
2304     virtual void getTargetDefines(const LangOptions &Opts,
2305                                   MacroBuilder &Builder) const {
2306       DefineStd(Builder, "bfin", Opts);
2307       DefineStd(Builder, "BFIN", Opts);
2308       Builder.defineMacro("__ADSPBLACKFIN__");
2309       // FIXME: This one is really dependent on -mcpu
2310       Builder.defineMacro("__ADSPLPBLACKFIN__");
2311       // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
2312     }
2313 
2314     virtual void getTargetBuiltins(const Builtin::Info *&Records,
2315                                    unsigned &NumRecords) const {
2316       // FIXME: Implement.
2317       Records = 0;
2318       NumRecords = 0;
2319     }
2320 
2321     virtual void getGCCRegNames(const char * const *&Names,
2322                                 unsigned &NumNames) const;
2323 
2324     virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2325                                   unsigned &NumAliases) const {
2326       // No aliases.
2327       Aliases = 0;
2328       NumAliases = 0;
2329     }
2330 
2331     virtual bool validateAsmConstraint(const char *&Name,
2332                                        TargetInfo::ConstraintInfo &Info) const {
2333       if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
2334         Info.setAllowsRegister();
2335         return true;
2336       }
2337       return false;
2338     }
2339 
2340     virtual const char *getClobbers() const {
2341       return "";
2342     }
2343 
2344     virtual const char *getVAListDeclaration() const {
2345       return "typedef char* __builtin_va_list;";
2346     }
2347   };
2348 
2349   const char * const BlackfinTargetInfo::GCCRegNames[] = {
2350     "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2351     "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
2352     "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
2353     "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
2354     "a0", "a1", "cc",
2355     "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
2356     "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
2357   };
2358 
2359   void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
2360                                           unsigned &NumNames) const {
2361     Names = GCCRegNames;
2362     NumNames = llvm::array_lengthof(GCCRegNames);
2363   }
2364 }
2365 
2366 namespace {
2367 
2368   // LLVM and Clang cannot be used directly to output native binaries for
2369   // target, but is used to compile C code to llvm bitcode with correct
2370   // type and alignment information.
2371   //
2372   // TCE uses the llvm bitcode as input and uses it for generating customized
2373   // target processor and program binary. TCE co-design environment is
2374   // publicly available in http://tce.cs.tut.fi
2375 
2376   class TCETargetInfo : public TargetInfo{
2377   public:
2378     TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
2379       TLSSupported = false;
2380       IntWidth = 32;
2381       LongWidth = LongLongWidth = 32;
2382       PointerWidth = 32;
2383       IntAlign = 32;
2384       LongAlign = LongLongAlign = 32;
2385       PointerAlign = 32;
2386       SizeType = UnsignedInt;
2387       IntMaxType = SignedLong;
2388       UIntMaxType = UnsignedLong;
2389       IntPtrType = SignedInt;
2390       PtrDiffType = SignedInt;
2391       FloatWidth = 32;
2392       FloatAlign = 32;
2393       DoubleWidth = 32;
2394       DoubleAlign = 32;
2395       LongDoubleWidth = 32;
2396       LongDoubleAlign = 32;
2397       FloatFormat = &llvm::APFloat::IEEEsingle;
2398       DoubleFormat = &llvm::APFloat::IEEEsingle;
2399       LongDoubleFormat = &llvm::APFloat::IEEEsingle;
2400       DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
2401                           "i16:16:32-i32:32:32-i64:32:32-"
2402                           "f32:32:32-f64:32:32-v64:32:32-"
2403                           "v128:32:32-a0:0:32-n32";
2404     }
2405 
2406     virtual void getTargetDefines(const LangOptions &Opts,
2407                                   MacroBuilder &Builder) const {
2408       DefineStd(Builder, "tce", Opts);
2409       Builder.defineMacro("__TCE__");
2410       Builder.defineMacro("__TCE_V1__");
2411     }
2412     virtual void getTargetBuiltins(const Builtin::Info *&Records,
2413                                    unsigned &NumRecords) const {}
2414     virtual const char *getClobbers() const {
2415       return "";
2416     }
2417     virtual const char *getVAListDeclaration() const {
2418       return "typedef void* __builtin_va_list;";
2419     }
2420     virtual void getGCCRegNames(const char * const *&Names,
2421                                 unsigned &NumNames) const {}
2422     virtual bool validateAsmConstraint(const char *&Name,
2423                                        TargetInfo::ConstraintInfo &info) const {
2424       return true;
2425     }
2426     virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2427                                   unsigned &NumAliases) const {}
2428   };
2429 }
2430 
2431 namespace {
2432 class MipsTargetInfo : public TargetInfo {
2433   std::string ABI, CPU;
2434   static const TargetInfo::GCCRegAlias GCCRegAliases[];
2435   static const char * const GCCRegNames[];
2436 public:
2437   MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
2438     DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2439                         "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2440   }
2441   virtual const char *getABI() const { return ABI.c_str(); }
2442   virtual bool setABI(const std::string &Name) {
2443 
2444     if ((Name == "o32") || (Name == "eabi")) {
2445       ABI = Name;
2446       return true;
2447     } else
2448       return false;
2449   }
2450   virtual bool setCPU(const std::string &Name) {
2451     CPU = Name;
2452     return true;
2453   }
2454   void getDefaultFeatures(const std::string &CPU,
2455                           llvm::StringMap<bool> &Features) const {
2456     Features[ABI] = true;
2457     Features[CPU] = true;
2458   }
2459   virtual void getArchDefines(const LangOptions &Opts,
2460                                 MacroBuilder &Builder) const {
2461     if (ABI == "o32")
2462       Builder.defineMacro("__mips_o32");
2463     else if (ABI == "eabi")
2464       Builder.defineMacro("__mips_eabi");
2465   }
2466   virtual void getTargetDefines(const LangOptions &Opts,
2467                                 MacroBuilder &Builder) const {
2468     DefineStd(Builder, "mips", Opts);
2469     Builder.defineMacro("_mips");
2470     DefineStd(Builder, "MIPSEB", Opts);
2471     Builder.defineMacro("_MIPSEB");
2472     Builder.defineMacro("__REGISTER_PREFIX__", "");
2473     getArchDefines(Opts, Builder);
2474   }
2475   virtual void getTargetBuiltins(const Builtin::Info *&Records,
2476                                  unsigned &NumRecords) const {
2477     // FIXME: Implement!
2478   }
2479   virtual const char *getVAListDeclaration() const {
2480     return "typedef void* __builtin_va_list;";
2481   }
2482   virtual void getGCCRegNames(const char * const *&Names,
2483                               unsigned &NumNames) const;
2484   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2485                                 unsigned &NumAliases) const;
2486   virtual bool validateAsmConstraint(const char *&Name,
2487                                      TargetInfo::ConstraintInfo &Info) const {
2488     switch (*Name) {
2489     default:
2490     case 'r': // CPU registers.
2491     case 'd': // Equivalent to "r" unless generating MIPS16 code.
2492     case 'y': // Equivalent to "r", backwards compatibility only.
2493     case 'f': // floating-point registers.
2494       Info.setAllowsRegister();
2495       return true;
2496     }
2497     return false;
2498   }
2499 
2500   virtual const char *getClobbers() const {
2501     // FIXME: Implement!
2502     return "";
2503   }
2504 };
2505 
2506 const char * const MipsTargetInfo::GCCRegNames[] = {
2507   "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
2508   "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
2509   "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
2510   "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
2511   "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
2512   "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
2513   "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
2514   "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
2515   "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
2516   "$fcc5","$fcc6","$fcc7"
2517 };
2518 
2519 void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
2520                                        unsigned &NumNames) const {
2521   Names = GCCRegNames;
2522   NumNames = llvm::array_lengthof(GCCRegNames);
2523 }
2524 
2525 const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
2526   { { "at" },  "$1" },
2527   { { "v0" },  "$2" },
2528   { { "v1" },  "$3" },
2529   { { "a0" },  "$4" },
2530   { { "a1" },  "$5" },
2531   { { "a2" },  "$6" },
2532   { { "a3" },  "$7" },
2533   { { "t0" },  "$8" },
2534   { { "t1" },  "$9" },
2535   { { "t2" }, "$10" },
2536   { { "t3" }, "$11" },
2537   { { "t4" }, "$12" },
2538   { { "t5" }, "$13" },
2539   { { "t6" }, "$14" },
2540   { { "t7" }, "$15" },
2541   { { "s0" }, "$16" },
2542   { { "s1" }, "$17" },
2543   { { "s2" }, "$18" },
2544   { { "s3" }, "$19" },
2545   { { "s4" }, "$20" },
2546   { { "s5" }, "$21" },
2547   { { "s6" }, "$22" },
2548   { { "s7" }, "$23" },
2549   { { "t8" }, "$24" },
2550   { { "t9" }, "$25" },
2551   { { "k0" }, "$26" },
2552   { { "k1" }, "$27" },
2553   { { "gp" }, "$28" },
2554   { { "sp" }, "$29" },
2555   { { "fp" }, "$30" },
2556   { { "ra" }, "$31" }
2557 };
2558 
2559 void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2560                                          unsigned &NumAliases) const {
2561   Aliases = GCCRegAliases;
2562   NumAliases = llvm::array_lengthof(GCCRegAliases);
2563 }
2564 } // end anonymous namespace.
2565 
2566 namespace {
2567 class MipselTargetInfo : public MipsTargetInfo {
2568 public:
2569   MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
2570     DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2571                         "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2572   }
2573 
2574   virtual void getTargetDefines(const LangOptions &Opts,
2575                                 MacroBuilder &Builder) const;
2576 };
2577 
2578 void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
2579                                         MacroBuilder &Builder) const {
2580   DefineStd(Builder, "mips", Opts);
2581   Builder.defineMacro("_mips");
2582   DefineStd(Builder, "MIPSEL", Opts);
2583   Builder.defineMacro("_MIPSEL");
2584   Builder.defineMacro("__REGISTER_PREFIX__", "");
2585   getArchDefines(Opts, Builder);
2586 }
2587 } // end anonymous namespace.
2588 
2589 //===----------------------------------------------------------------------===//
2590 // Driver code
2591 //===----------------------------------------------------------------------===//
2592 
2593 static TargetInfo *AllocateTarget(const std::string &T) {
2594   llvm::Triple Triple(T);
2595   llvm::Triple::OSType os = Triple.getOS();
2596 
2597   switch (Triple.getArch()) {
2598   default:
2599     return NULL;
2600 
2601   case llvm::Triple::arm:
2602   case llvm::Triple::thumb:
2603     switch (os) {
2604     case llvm::Triple::Linux:
2605       return new LinuxTargetInfo<ARMTargetInfo>(T);
2606     case llvm::Triple::Darwin:
2607       return new DarwinARMTargetInfo(T);
2608     case llvm::Triple::FreeBSD:
2609       return new FreeBSDTargetInfo<ARMTargetInfo>(T);
2610     default:
2611       return new ARMTargetInfo(T);
2612     }
2613 
2614   case llvm::Triple::bfin:
2615     return new BlackfinTargetInfo(T);
2616 
2617   case llvm::Triple::msp430:
2618     return new MSP430TargetInfo(T);
2619 
2620   case llvm::Triple::mips:
2621     if (os == llvm::Triple::Psp)
2622       return new PSPTargetInfo<MipsTargetInfo>(T);
2623     if (os == llvm::Triple::Linux)
2624       return new LinuxTargetInfo<MipsTargetInfo>(T);
2625     return new MipsTargetInfo(T);
2626 
2627   case llvm::Triple::mipsel:
2628     if (os == llvm::Triple::Psp)
2629       return new PSPTargetInfo<MipselTargetInfo>(T);
2630     if (os == llvm::Triple::Linux)
2631       return new LinuxTargetInfo<MipselTargetInfo>(T);
2632     return new MipselTargetInfo(T);
2633 
2634   case llvm::Triple::ppc:
2635     if (os == llvm::Triple::Darwin)
2636       return new DarwinPPC32TargetInfo(T);
2637     else if (os == llvm::Triple::FreeBSD)
2638       return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
2639     return new PPC32TargetInfo(T);
2640 
2641   case llvm::Triple::ppc64:
2642     if (os == llvm::Triple::Darwin)
2643       return new DarwinPPC64TargetInfo(T);
2644     else if (os == llvm::Triple::Lv2)
2645       return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
2646     else if (os == llvm::Triple::FreeBSD)
2647       return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
2648     return new PPC64TargetInfo(T);
2649 
2650   case llvm::Triple::mblaze:
2651     return new MBlazeTargetInfo(T);
2652 
2653   case llvm::Triple::sparc:
2654     if (os == llvm::Triple::AuroraUX)
2655       return new AuroraUXSparcV8TargetInfo(T);
2656     if (os == llvm::Triple::Solaris)
2657       return new SolarisSparcV8TargetInfo(T);
2658     return new SparcV8TargetInfo(T);
2659 
2660   // FIXME: Need a real SPU target.
2661   case llvm::Triple::cellspu:
2662     return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
2663 
2664   case llvm::Triple::systemz:
2665     return new SystemZTargetInfo(T);
2666 
2667   case llvm::Triple::tce:
2668     return new TCETargetInfo(T);
2669 
2670   case llvm::Triple::x86:
2671     switch (os) {
2672     case llvm::Triple::AuroraUX:
2673       return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
2674     case llvm::Triple::Darwin:
2675       return new DarwinI386TargetInfo(T);
2676     case llvm::Triple::Linux:
2677       return new LinuxTargetInfo<X86_32TargetInfo>(T);
2678     case llvm::Triple::DragonFly:
2679       return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
2680     case llvm::Triple::NetBSD:
2681       return new NetBSDTargetInfo<X86_32TargetInfo>(T);
2682     case llvm::Triple::OpenBSD:
2683       return new OpenBSDI386TargetInfo(T);
2684     case llvm::Triple::FreeBSD:
2685       return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
2686     case llvm::Triple::Minix:
2687       return new MinixTargetInfo<X86_32TargetInfo>(T);
2688     case llvm::Triple::Solaris:
2689       return new SolarisTargetInfo<X86_32TargetInfo>(T);
2690     case llvm::Triple::Cygwin:
2691       return new CygwinX86_32TargetInfo(T);
2692     case llvm::Triple::MinGW32:
2693       return new MinGWX86_32TargetInfo(T);
2694     case llvm::Triple::Win32:
2695       return new VisualStudioWindowsX86_32TargetInfo(T);
2696     case llvm::Triple::Haiku:
2697       return new HaikuX86_32TargetInfo(T);
2698     default:
2699       return new X86_32TargetInfo(T);
2700     }
2701 
2702   case llvm::Triple::x86_64:
2703     switch (os) {
2704     case llvm::Triple::AuroraUX:
2705       return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
2706     case llvm::Triple::Darwin:
2707       return new DarwinX86_64TargetInfo(T);
2708     case llvm::Triple::Linux:
2709       return new LinuxTargetInfo<X86_64TargetInfo>(T);
2710     case llvm::Triple::DragonFly:
2711       return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
2712     case llvm::Triple::NetBSD:
2713       return new NetBSDTargetInfo<X86_64TargetInfo>(T);
2714     case llvm::Triple::OpenBSD:
2715       return new OpenBSDX86_64TargetInfo(T);
2716     case llvm::Triple::FreeBSD:
2717       return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
2718     case llvm::Triple::Solaris:
2719       return new SolarisTargetInfo<X86_64TargetInfo>(T);
2720     case llvm::Triple::MinGW32:
2721       return new MinGWX86_64TargetInfo(T);
2722     case llvm::Triple::Win32:   // This is what Triple.h supports now.
2723       if (Triple.getEnvironment() == llvm::Triple::MachO)
2724         return new DarwinX86_64TargetInfo(T);
2725       else
2726         return new VisualStudioWindowsX86_64TargetInfo(T);
2727     default:
2728       return new X86_64TargetInfo(T);
2729     }
2730   }
2731 }
2732 
2733 /// CreateTargetInfo - Return the target info object for the specified target
2734 /// triple.
2735 TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags,
2736                                          TargetOptions &Opts) {
2737   llvm::Triple Triple(Opts.Triple);
2738 
2739   // Construct the target
2740   llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
2741   if (!Target) {
2742     Diags.Report(diag::err_target_unknown_triple) << Triple.str();
2743     return 0;
2744   }
2745 
2746   // Set the target CPU if specified.
2747   if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
2748     Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
2749     return 0;
2750   }
2751 
2752   // Set the target ABI if specified.
2753   if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
2754     Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
2755     return 0;
2756   }
2757 
2758   // Set the target C++ ABI.
2759   if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
2760     Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
2761     return 0;
2762   }
2763 
2764   // Compute the default target features, we need the target to handle this
2765   // because features may have dependencies on one another.
2766   llvm::StringMap<bool> Features;
2767   Target->getDefaultFeatures(Opts.CPU, Features);
2768 
2769   // Apply the user specified deltas.
2770   for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
2771          ie = Opts.Features.end(); it != ie; ++it) {
2772     const char *Name = it->c_str();
2773 
2774     // Apply the feature via the target.
2775     if ((Name[0] != '-' && Name[0] != '+') ||
2776         !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
2777       Diags.Report(diag::err_target_invalid_feature) << Name;
2778       return 0;
2779     }
2780   }
2781 
2782   // Add the features to the compile options.
2783   //
2784   // FIXME: If we are completely confident that we have the right set, we only
2785   // need to pass the minuses.
2786   Opts.Features.clear();
2787   for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
2788          ie = Features.end(); it != ie; ++it)
2789     Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first());
2790   Target->HandleTargetFeatures(Opts.Features);
2791 
2792   return Target.take();
2793 }
2794