1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, 58 bool Tuning = true) { 59 Builder.defineMacro("__" + CPUName); 60 Builder.defineMacro("__" + CPUName + "__"); 61 if (Tuning) 62 Builder.defineMacro("__tune_" + CPUName + "__"); 63 } 64 65 //===----------------------------------------------------------------------===// 66 // Defines specific to certain operating systems. 67 //===----------------------------------------------------------------------===// 68 69 namespace { 70 template<typename TgtInfo> 71 class OSTargetInfo : public TgtInfo { 72 protected: 73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 74 MacroBuilder &Builder) const=0; 75 public: 76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 77 virtual void getTargetDefines(const LangOptions &Opts, 78 MacroBuilder &Builder) const { 79 TgtInfo::getTargetDefines(Opts, Builder); 80 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 81 } 82 83 }; 84 } // end anonymous namespace 85 86 87 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 88 const llvm::Triple &Triple, 89 StringRef &PlatformName, 90 VersionTuple &PlatformMinVersion) { 91 Builder.defineMacro("__APPLE_CC__", "5621"); 92 Builder.defineMacro("__APPLE__"); 93 Builder.defineMacro("__MACH__"); 94 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 95 96 if (!Opts.ObjCAutoRefCount) { 97 // __weak is always defined, for use in blocks and with objc pointers. 98 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 99 100 // Darwin defines __strong even in C mode (just to nothing). 101 if (Opts.getGC() != LangOptions::NonGC) 102 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 103 else 104 Builder.defineMacro("__strong", ""); 105 106 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 107 // allow this in C, since one might have block pointers in structs that 108 // are used in pure C code and in Objective-C ARC. 109 Builder.defineMacro("__unsafe_unretained", ""); 110 } 111 112 if (Opts.Static) 113 Builder.defineMacro("__STATIC__"); 114 else 115 Builder.defineMacro("__DYNAMIC__"); 116 117 if (Opts.POSIXThreads) 118 Builder.defineMacro("_REENTRANT"); 119 120 // Get the platform type and version number from the triple. 121 unsigned Maj, Min, Rev; 122 123 // If no version was given, default to to 10.4.0, for simplifying tests. 124 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 125 PlatformName = "macosx"; 126 Min = Rev = 0; 127 Maj = 8; 128 } else { 129 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 130 // "-osxNNN", and "-iosNNN"). 131 132 if (Triple.getOS() == llvm::Triple::Darwin) { 133 // For historical reasons that make little sense, the version passed here 134 // is the "darwin" version, which drops the 10 and offsets by 4. 135 Triple.getOSVersion(Maj, Min, Rev); 136 137 if (Triple.getEnvironmentName() == "iphoneos") { 138 PlatformName = "ios"; 139 } else { 140 PlatformName = "macosx"; 141 Rev = Min; 142 Min = Maj - 4; 143 Maj = 10; 144 } 145 } else { 146 Triple.getOSVersion(Maj, Min, Rev); 147 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 148 } 149 } 150 151 // If -target arch-pc-win32-macho option specified, we're 152 // generating code for Win32 ABI. No need to emit 153 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 154 if (PlatformName == "win32") { 155 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 156 return; 157 } 158 159 // Set the appropriate OS version define. 160 if (PlatformName == "ios") { 161 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 162 char Str[6]; 163 Str[0] = '0' + Maj; 164 Str[1] = '0' + (Min / 10); 165 Str[2] = '0' + (Min % 10); 166 Str[3] = '0' + (Rev / 10); 167 Str[4] = '0' + (Rev % 10); 168 Str[5] = '\0'; 169 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 170 } else { 171 // Note that the Driver allows versions which aren't representable in the 172 // define (because we only get a single digit for the minor and micro 173 // revision numbers). So, we limit them to the maximum representable 174 // version. 175 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 176 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 177 char Str[5]; 178 Str[0] = '0' + (Maj / 10); 179 Str[1] = '0' + (Maj % 10); 180 Str[2] = '0' + std::min(Min, 9U); 181 Str[3] = '0' + std::min(Rev, 9U); 182 Str[4] = '\0'; 183 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 184 } 185 186 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 187 } 188 189 namespace { 190 template<typename Target> 191 class DarwinTargetInfo : public OSTargetInfo<Target> { 192 protected: 193 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 194 MacroBuilder &Builder) const { 195 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 196 this->PlatformMinVersion); 197 } 198 199 public: 200 DarwinTargetInfo(const std::string& triple) : 201 OSTargetInfo<Target>(triple) { 202 llvm::Triple T = llvm::Triple(triple); 203 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 204 this->MCountName = "\01mcount"; 205 } 206 207 virtual std::string isValidSectionSpecifier(StringRef SR) const { 208 // Let MCSectionMachO validate this. 209 StringRef Segment, Section; 210 unsigned TAA, StubSize; 211 bool HasTAA; 212 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 213 TAA, HasTAA, StubSize); 214 } 215 216 virtual const char *getStaticInitSectionSpecifier() const { 217 // FIXME: We should return 0 when building kexts. 218 return "__TEXT,__StaticInit,regular,pure_instructions"; 219 } 220 221 /// Darwin does not support protected visibility. Darwin's "default" 222 /// is very similar to ELF's "protected"; Darwin requires a "weak" 223 /// attribute on declarations that can be dynamically replaced. 224 virtual bool hasProtectedVisibility() const { 225 return false; 226 } 227 }; 228 229 230 // DragonFlyBSD Target 231 template<typename Target> 232 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 233 protected: 234 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 235 MacroBuilder &Builder) const { 236 // DragonFly defines; list based off of gcc output 237 Builder.defineMacro("__DragonFly__"); 238 Builder.defineMacro("__DragonFly_cc_version", "100001"); 239 Builder.defineMacro("__ELF__"); 240 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 241 Builder.defineMacro("__tune_i386__"); 242 DefineStd(Builder, "unix", Opts); 243 } 244 public: 245 DragonFlyBSDTargetInfo(const std::string &triple) 246 : OSTargetInfo<Target>(triple) {} 247 }; 248 249 // FreeBSD Target 250 template<typename Target> 251 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 252 protected: 253 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 254 MacroBuilder &Builder) const { 255 // FreeBSD defines; list based off of gcc output 256 257 unsigned Release = Triple.getOSMajorVersion(); 258 if (Release == 0U) 259 Release = 8; 260 261 Builder.defineMacro("__FreeBSD__", Twine(Release)); 262 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 263 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 264 DefineStd(Builder, "unix", Opts); 265 Builder.defineMacro("__ELF__"); 266 } 267 public: 268 FreeBSDTargetInfo(const std::string &triple) 269 : OSTargetInfo<Target>(triple) { 270 this->UserLabelPrefix = ""; 271 272 llvm::Triple Triple(triple); 273 switch (Triple.getArch()) { 274 default: 275 case llvm::Triple::x86: 276 case llvm::Triple::x86_64: 277 this->MCountName = ".mcount"; 278 break; 279 case llvm::Triple::mips: 280 case llvm::Triple::mipsel: 281 case llvm::Triple::ppc: 282 case llvm::Triple::ppc64: 283 this->MCountName = "_mcount"; 284 break; 285 case llvm::Triple::arm: 286 this->MCountName = "__mcount"; 287 break; 288 } 289 290 } 291 }; 292 293 // Minix Target 294 template<typename Target> 295 class MinixTargetInfo : public OSTargetInfo<Target> { 296 protected: 297 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 298 MacroBuilder &Builder) const { 299 // Minix defines 300 301 Builder.defineMacro("__minix", "3"); 302 Builder.defineMacro("_EM_WSIZE", "4"); 303 Builder.defineMacro("_EM_PSIZE", "4"); 304 Builder.defineMacro("_EM_SSIZE", "2"); 305 Builder.defineMacro("_EM_LSIZE", "4"); 306 Builder.defineMacro("_EM_FSIZE", "4"); 307 Builder.defineMacro("_EM_DSIZE", "8"); 308 Builder.defineMacro("__ELF__"); 309 DefineStd(Builder, "unix", Opts); 310 } 311 public: 312 MinixTargetInfo(const std::string &triple) 313 : OSTargetInfo<Target>(triple) { 314 this->UserLabelPrefix = ""; 315 } 316 }; 317 318 // Linux target 319 template<typename Target> 320 class LinuxTargetInfo : public OSTargetInfo<Target> { 321 protected: 322 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 323 MacroBuilder &Builder) const { 324 // Linux defines; list based off of gcc output 325 DefineStd(Builder, "unix", Opts); 326 DefineStd(Builder, "linux", Opts); 327 Builder.defineMacro("__gnu_linux__"); 328 Builder.defineMacro("__ELF__"); 329 if (Opts.POSIXThreads) 330 Builder.defineMacro("_REENTRANT"); 331 if (Opts.CPlusPlus) 332 Builder.defineMacro("_GNU_SOURCE"); 333 } 334 public: 335 LinuxTargetInfo(const std::string& triple) 336 : OSTargetInfo<Target>(triple) { 337 this->UserLabelPrefix = ""; 338 this->WIntType = TargetInfo::UnsignedInt; 339 } 340 341 virtual const char *getStaticInitSectionSpecifier() const { 342 return ".text.startup"; 343 } 344 }; 345 346 // NetBSD Target 347 template<typename Target> 348 class NetBSDTargetInfo : public OSTargetInfo<Target> { 349 protected: 350 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 351 MacroBuilder &Builder) const { 352 // NetBSD defines; list based off of gcc output 353 Builder.defineMacro("__NetBSD__"); 354 Builder.defineMacro("__unix__"); 355 Builder.defineMacro("__ELF__"); 356 if (Opts.POSIXThreads) 357 Builder.defineMacro("_POSIX_THREADS"); 358 } 359 public: 360 NetBSDTargetInfo(const std::string &triple) 361 : OSTargetInfo<Target>(triple) { 362 this->UserLabelPrefix = ""; 363 } 364 }; 365 366 // OpenBSD Target 367 template<typename Target> 368 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 369 protected: 370 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 371 MacroBuilder &Builder) const { 372 // OpenBSD defines; list based off of gcc output 373 374 Builder.defineMacro("__OpenBSD__"); 375 DefineStd(Builder, "unix", Opts); 376 Builder.defineMacro("__ELF__"); 377 if (Opts.POSIXThreads) 378 Builder.defineMacro("_POSIX_THREADS"); 379 } 380 public: 381 OpenBSDTargetInfo(const std::string &triple) 382 : OSTargetInfo<Target>(triple) { 383 this->UserLabelPrefix = ""; 384 385 llvm::Triple Triple(triple); 386 switch (Triple.getArch()) { 387 default: 388 case llvm::Triple::x86: 389 case llvm::Triple::x86_64: 390 case llvm::Triple::arm: 391 case llvm::Triple::sparc: 392 this->MCountName = "__mcount"; 393 break; 394 case llvm::Triple::mips64: 395 case llvm::Triple::mips64el: 396 case llvm::Triple::ppc: 397 case llvm::Triple::sparcv9: 398 this->MCountName = "_mcount"; 399 break; 400 } 401 } 402 }; 403 404 // PSP Target 405 template<typename Target> 406 class PSPTargetInfo : public OSTargetInfo<Target> { 407 protected: 408 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 409 MacroBuilder &Builder) const { 410 // PSP defines; list based on the output of the pspdev gcc toolchain. 411 Builder.defineMacro("PSP"); 412 Builder.defineMacro("_PSP"); 413 Builder.defineMacro("__psp__"); 414 Builder.defineMacro("__ELF__"); 415 } 416 public: 417 PSPTargetInfo(const std::string& triple) 418 : OSTargetInfo<Target>(triple) { 419 this->UserLabelPrefix = ""; 420 } 421 }; 422 423 // PS3 PPU Target 424 template<typename Target> 425 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 426 protected: 427 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 428 MacroBuilder &Builder) const { 429 // PS3 PPU defines. 430 Builder.defineMacro("__PPC__"); 431 Builder.defineMacro("__PPU__"); 432 Builder.defineMacro("__CELLOS_LV2__"); 433 Builder.defineMacro("__ELF__"); 434 Builder.defineMacro("__LP32__"); 435 Builder.defineMacro("_ARCH_PPC64"); 436 Builder.defineMacro("__powerpc64__"); 437 } 438 public: 439 PS3PPUTargetInfo(const std::string& triple) 440 : OSTargetInfo<Target>(triple) { 441 this->UserLabelPrefix = ""; 442 this->LongWidth = this->LongAlign = 32; 443 this->PointerWidth = this->PointerAlign = 32; 444 this->IntMaxType = TargetInfo::SignedLongLong; 445 this->UIntMaxType = TargetInfo::UnsignedLongLong; 446 this->Int64Type = TargetInfo::SignedLongLong; 447 this->SizeType = TargetInfo::UnsignedInt; 448 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 449 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 450 } 451 }; 452 453 // FIXME: Need a real SPU target. 454 // PS3 SPU Target 455 template<typename Target> 456 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 457 protected: 458 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 459 MacroBuilder &Builder) const { 460 // PS3 PPU defines. 461 Builder.defineMacro("__SPU__"); 462 Builder.defineMacro("__ELF__"); 463 } 464 public: 465 PS3SPUTargetInfo(const std::string& triple) 466 : OSTargetInfo<Target>(triple) { 467 this->UserLabelPrefix = ""; 468 } 469 }; 470 471 // AuroraUX target 472 template<typename Target> 473 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 474 protected: 475 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 476 MacroBuilder &Builder) const { 477 DefineStd(Builder, "sun", Opts); 478 DefineStd(Builder, "unix", Opts); 479 Builder.defineMacro("__ELF__"); 480 Builder.defineMacro("__svr4__"); 481 Builder.defineMacro("__SVR4"); 482 } 483 public: 484 AuroraUXTargetInfo(const std::string& triple) 485 : OSTargetInfo<Target>(triple) { 486 this->UserLabelPrefix = ""; 487 this->WCharType = this->SignedLong; 488 // FIXME: WIntType should be SignedLong 489 } 490 }; 491 492 // Solaris target 493 template<typename Target> 494 class SolarisTargetInfo : public OSTargetInfo<Target> { 495 protected: 496 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 497 MacroBuilder &Builder) const { 498 DefineStd(Builder, "sun", Opts); 499 DefineStd(Builder, "unix", Opts); 500 Builder.defineMacro("__ELF__"); 501 Builder.defineMacro("__svr4__"); 502 Builder.defineMacro("__SVR4"); 503 } 504 public: 505 SolarisTargetInfo(const std::string& triple) 506 : OSTargetInfo<Target>(triple) { 507 this->UserLabelPrefix = ""; 508 this->WCharType = this->SignedLong; 509 // FIXME: WIntType should be SignedLong 510 } 511 }; 512 513 // Windows target 514 template<typename Target> 515 class WindowsTargetInfo : public OSTargetInfo<Target> { 516 protected: 517 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 518 MacroBuilder &Builder) const { 519 Builder.defineMacro("_WIN32"); 520 } 521 void getVisualStudioDefines(const LangOptions &Opts, 522 MacroBuilder &Builder) const { 523 if (Opts.CPlusPlus) { 524 if (Opts.RTTI) 525 Builder.defineMacro("_CPPRTTI"); 526 527 if (Opts.Exceptions) 528 Builder.defineMacro("_CPPUNWIND"); 529 } 530 531 if (!Opts.CharIsSigned) 532 Builder.defineMacro("_CHAR_UNSIGNED"); 533 534 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 535 // but it works for now. 536 if (Opts.POSIXThreads) 537 Builder.defineMacro("_MT"); 538 539 if (Opts.MSCVersion != 0) 540 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 541 542 if (Opts.MicrosoftExt) { 543 Builder.defineMacro("_MSC_EXTENSIONS"); 544 545 if (Opts.CPlusPlus0x) { 546 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 547 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 548 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 549 } 550 } 551 552 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 553 } 554 555 public: 556 WindowsTargetInfo(const std::string &triple) 557 : OSTargetInfo<Target>(triple) {} 558 }; 559 560 } // end anonymous namespace. 561 562 //===----------------------------------------------------------------------===// 563 // Specific target implementations. 564 //===----------------------------------------------------------------------===// 565 566 namespace { 567 // PPC abstract base class 568 class PPCTargetInfo : public TargetInfo { 569 static const Builtin::Info BuiltinInfo[]; 570 static const char * const GCCRegNames[]; 571 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 572 public: 573 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 574 575 virtual void getTargetBuiltins(const Builtin::Info *&Records, 576 unsigned &NumRecords) const { 577 Records = BuiltinInfo; 578 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 579 } 580 581 virtual bool isCLZForZeroUndef() const { return false; } 582 583 virtual void getTargetDefines(const LangOptions &Opts, 584 MacroBuilder &Builder) const; 585 586 virtual void getGCCRegNames(const char * const *&Names, 587 unsigned &NumNames) const; 588 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 589 unsigned &NumAliases) const; 590 virtual bool validateAsmConstraint(const char *&Name, 591 TargetInfo::ConstraintInfo &Info) const { 592 switch (*Name) { 593 default: return false; 594 case 'O': // Zero 595 break; 596 case 'b': // Base register 597 case 'f': // Floating point register 598 Info.setAllowsRegister(); 599 break; 600 // FIXME: The following are added to allow parsing. 601 // I just took a guess at what the actions should be. 602 // Also, is more specific checking needed? I.e. specific registers? 603 case 'd': // Floating point register (containing 64-bit value) 604 case 'v': // Altivec vector register 605 Info.setAllowsRegister(); 606 break; 607 case 'w': 608 switch (Name[1]) { 609 case 'd':// VSX vector register to hold vector double data 610 case 'f':// VSX vector register to hold vector float data 611 case 's':// VSX vector register to hold scalar float data 612 case 'a':// Any VSX register 613 break; 614 default: 615 return false; 616 } 617 Info.setAllowsRegister(); 618 Name++; // Skip over 'w'. 619 break; 620 case 'h': // `MQ', `CTR', or `LINK' register 621 case 'q': // `MQ' register 622 case 'c': // `CTR' register 623 case 'l': // `LINK' register 624 case 'x': // `CR' register (condition register) number 0 625 case 'y': // `CR' register (condition register) 626 case 'z': // `XER[CA]' carry bit (part of the XER register) 627 Info.setAllowsRegister(); 628 break; 629 case 'I': // Signed 16-bit constant 630 case 'J': // Unsigned 16-bit constant shifted left 16 bits 631 // (use `L' instead for SImode constants) 632 case 'K': // Unsigned 16-bit constant 633 case 'L': // Signed 16-bit constant shifted left 16 bits 634 case 'M': // Constant larger than 31 635 case 'N': // Exact power of 2 636 case 'P': // Constant whose negation is a signed 16-bit constant 637 case 'G': // Floating point constant that can be loaded into a 638 // register with one instruction per word 639 case 'H': // Integer/Floating point constant that can be loaded 640 // into a register using three instructions 641 break; 642 case 'm': // Memory operand. Note that on PowerPC targets, m can 643 // include addresses that update the base register. It 644 // is therefore only safe to use `m' in an asm statement 645 // if that asm statement accesses the operand exactly once. 646 // The asm statement must also use `%U<opno>' as a 647 // placeholder for the "update" flag in the corresponding 648 // load or store instruction. For example: 649 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 650 // is correct but: 651 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 652 // is not. Use es rather than m if you don't want the base 653 // register to be updated. 654 case 'e': 655 if (Name[1] != 's') 656 return false; 657 // es: A "stable" memory operand; that is, one which does not 658 // include any automodification of the base register. Unlike 659 // `m', this constraint can be used in asm statements that 660 // might access the operand several times, or that might not 661 // access it at all. 662 Info.setAllowsMemory(); 663 Name++; // Skip over 'e'. 664 break; 665 case 'Q': // Memory operand that is an offset from a register (it is 666 // usually better to use `m' or `es' in asm statements) 667 case 'Z': // Memory operand that is an indexed or indirect from a 668 // register (it is usually better to use `m' or `es' in 669 // asm statements) 670 Info.setAllowsMemory(); 671 Info.setAllowsRegister(); 672 break; 673 case 'R': // AIX TOC entry 674 case 'a': // Address operand that is an indexed or indirect from a 675 // register (`p' is preferable for asm statements) 676 case 'S': // Constant suitable as a 64-bit mask operand 677 case 'T': // Constant suitable as a 32-bit mask operand 678 case 'U': // System V Release 4 small data area reference 679 case 't': // AND masks that can be performed by two rldic{l, r} 680 // instructions 681 case 'W': // Vector constant that does not require memory 682 case 'j': // Vector constant that is all zeros. 683 break; 684 // End FIXME. 685 } 686 return true; 687 } 688 virtual const char *getClobbers() const { 689 return ""; 690 } 691 }; 692 693 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 694 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 695 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 696 ALL_LANGUAGES }, 697 #include "clang/Basic/BuiltinsPPC.def" 698 }; 699 700 701 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 702 /// #defines that are not tied to a specific subtarget. 703 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 704 MacroBuilder &Builder) const { 705 // Target identification. 706 Builder.defineMacro("__ppc__"); 707 Builder.defineMacro("_ARCH_PPC"); 708 Builder.defineMacro("__powerpc__"); 709 Builder.defineMacro("__POWERPC__"); 710 if (PointerWidth == 64) { 711 Builder.defineMacro("_ARCH_PPC64"); 712 Builder.defineMacro("_LP64"); 713 Builder.defineMacro("__LP64__"); 714 Builder.defineMacro("__powerpc64__"); 715 Builder.defineMacro("__ppc64__"); 716 } else { 717 Builder.defineMacro("__ppc__"); 718 } 719 720 // Target properties. 721 if (getTriple().getOS() != llvm::Triple::NetBSD) 722 Builder.defineMacro("_BIG_ENDIAN"); 723 Builder.defineMacro("__BIG_ENDIAN__"); 724 725 // Subtarget options. 726 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 727 Builder.defineMacro("__REGISTER_PREFIX__", ""); 728 729 // FIXME: Should be controlled by command line option. 730 Builder.defineMacro("__LONG_DOUBLE_128__"); 731 732 if (Opts.AltiVec) { 733 Builder.defineMacro("__VEC__", "10206"); 734 Builder.defineMacro("__ALTIVEC__"); 735 } 736 } 737 738 739 const char * const PPCTargetInfo::GCCRegNames[] = { 740 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 741 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 742 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 743 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 744 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 745 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 746 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 747 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 748 "mq", "lr", "ctr", "ap", 749 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 750 "xer", 751 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 752 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 753 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 754 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 755 "vrsave", "vscr", 756 "spe_acc", "spefscr", 757 "sfp" 758 }; 759 760 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 761 unsigned &NumNames) const { 762 Names = GCCRegNames; 763 NumNames = llvm::array_lengthof(GCCRegNames); 764 } 765 766 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 767 // While some of these aliases do map to different registers 768 // they still share the same register name. 769 { { "0" }, "r0" }, 770 { { "1"}, "r1" }, 771 { { "2" }, "r2" }, 772 { { "3" }, "r3" }, 773 { { "4" }, "r4" }, 774 { { "5" }, "r5" }, 775 { { "6" }, "r6" }, 776 { { "7" }, "r7" }, 777 { { "8" }, "r8" }, 778 { { "9" }, "r9" }, 779 { { "10" }, "r10" }, 780 { { "11" }, "r11" }, 781 { { "12" }, "r12" }, 782 { { "13" }, "r13" }, 783 { { "14" }, "r14" }, 784 { { "15" }, "r15" }, 785 { { "16" }, "r16" }, 786 { { "17" }, "r17" }, 787 { { "18" }, "r18" }, 788 { { "19" }, "r19" }, 789 { { "20" }, "r20" }, 790 { { "21" }, "r21" }, 791 { { "22" }, "r22" }, 792 { { "23" }, "r23" }, 793 { { "24" }, "r24" }, 794 { { "25" }, "r25" }, 795 { { "26" }, "r26" }, 796 { { "27" }, "r27" }, 797 { { "28" }, "r28" }, 798 { { "29" }, "r29" }, 799 { { "30" }, "r30" }, 800 { { "31" }, "r31" }, 801 { { "fr0" }, "f0" }, 802 { { "fr1" }, "f1" }, 803 { { "fr2" }, "f2" }, 804 { { "fr3" }, "f3" }, 805 { { "fr4" }, "f4" }, 806 { { "fr5" }, "f5" }, 807 { { "fr6" }, "f6" }, 808 { { "fr7" }, "f7" }, 809 { { "fr8" }, "f8" }, 810 { { "fr9" }, "f9" }, 811 { { "fr10" }, "f10" }, 812 { { "fr11" }, "f11" }, 813 { { "fr12" }, "f12" }, 814 { { "fr13" }, "f13" }, 815 { { "fr14" }, "f14" }, 816 { { "fr15" }, "f15" }, 817 { { "fr16" }, "f16" }, 818 { { "fr17" }, "f17" }, 819 { { "fr18" }, "f18" }, 820 { { "fr19" }, "f19" }, 821 { { "fr20" }, "f20" }, 822 { { "fr21" }, "f21" }, 823 { { "fr22" }, "f22" }, 824 { { "fr23" }, "f23" }, 825 { { "fr24" }, "f24" }, 826 { { "fr25" }, "f25" }, 827 { { "fr26" }, "f26" }, 828 { { "fr27" }, "f27" }, 829 { { "fr28" }, "f28" }, 830 { { "fr29" }, "f29" }, 831 { { "fr30" }, "f30" }, 832 { { "fr31" }, "f31" }, 833 { { "cc" }, "cr0" }, 834 }; 835 836 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 837 unsigned &NumAliases) const { 838 Aliases = GCCRegAliases; 839 NumAliases = llvm::array_lengthof(GCCRegAliases); 840 } 841 } // end anonymous namespace. 842 843 namespace { 844 class PPC32TargetInfo : public PPCTargetInfo { 845 public: 846 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 847 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 848 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 849 850 switch (getTriple().getOS()) { 851 case llvm::Triple::FreeBSD: 852 case llvm::Triple::NetBSD: 853 SizeType = UnsignedInt; 854 break; 855 default: 856 break; 857 } 858 } 859 860 virtual const char *getVAListDeclaration() const { 861 // This is the ELF definition, and is overridden by the Darwin sub-target 862 return "typedef struct __va_list_tag {" 863 " unsigned char gpr;" 864 " unsigned char fpr;" 865 " unsigned short reserved;" 866 " void* overflow_arg_area;" 867 " void* reg_save_area;" 868 "} __builtin_va_list[1];"; 869 } 870 }; 871 } // end anonymous namespace. 872 873 namespace { 874 class PPC64TargetInfo : public PPCTargetInfo { 875 public: 876 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 877 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 878 IntMaxType = SignedLong; 879 UIntMaxType = UnsignedLong; 880 Int64Type = SignedLong; 881 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 882 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 883 } 884 virtual const char *getVAListDeclaration() const { 885 return "typedef char* __builtin_va_list;"; 886 } 887 }; 888 } // end anonymous namespace. 889 890 891 namespace { 892 class DarwinPPC32TargetInfo : 893 public DarwinTargetInfo<PPC32TargetInfo> { 894 public: 895 DarwinPPC32TargetInfo(const std::string& triple) 896 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 897 HasAlignMac68kSupport = true; 898 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 899 LongLongAlign = 32; 900 SuitableAlign = 128; 901 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 902 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32"; 903 } 904 virtual const char *getVAListDeclaration() const { 905 return "typedef char* __builtin_va_list;"; 906 } 907 }; 908 909 class DarwinPPC64TargetInfo : 910 public DarwinTargetInfo<PPC64TargetInfo> { 911 public: 912 DarwinPPC64TargetInfo(const std::string& triple) 913 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 914 HasAlignMac68kSupport = true; 915 SuitableAlign = 128; 916 } 917 }; 918 } // end anonymous namespace. 919 920 namespace { 921 static const unsigned PTXAddrSpaceMap[] = { 922 0, // opencl_global 923 4, // opencl_local 924 1 // opencl_constant 925 }; 926 class PTXTargetInfo : public TargetInfo { 927 static const char * const GCCRegNames[]; 928 static const Builtin::Info BuiltinInfo[]; 929 std::vector<llvm::StringRef> AvailableFeatures; 930 public: 931 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 932 BigEndian = false; 933 TLSSupported = false; 934 LongWidth = LongAlign = 64; 935 AddrSpaceMap = &PTXAddrSpaceMap; 936 // Define available target features 937 // These must be defined in sorted order! 938 AvailableFeatures.push_back("compute10"); 939 AvailableFeatures.push_back("compute11"); 940 AvailableFeatures.push_back("compute12"); 941 AvailableFeatures.push_back("compute13"); 942 AvailableFeatures.push_back("compute20"); 943 AvailableFeatures.push_back("double"); 944 AvailableFeatures.push_back("no-fma"); 945 AvailableFeatures.push_back("ptx20"); 946 AvailableFeatures.push_back("ptx21"); 947 AvailableFeatures.push_back("ptx22"); 948 AvailableFeatures.push_back("ptx23"); 949 AvailableFeatures.push_back("sm10"); 950 AvailableFeatures.push_back("sm11"); 951 AvailableFeatures.push_back("sm12"); 952 AvailableFeatures.push_back("sm13"); 953 AvailableFeatures.push_back("sm20"); 954 AvailableFeatures.push_back("sm21"); 955 AvailableFeatures.push_back("sm22"); 956 AvailableFeatures.push_back("sm23"); 957 } 958 virtual void getTargetDefines(const LangOptions &Opts, 959 MacroBuilder &Builder) const { 960 Builder.defineMacro("__PTX__"); 961 } 962 virtual void getTargetBuiltins(const Builtin::Info *&Records, 963 unsigned &NumRecords) const { 964 Records = BuiltinInfo; 965 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 966 } 967 968 virtual void getGCCRegNames(const char * const *&Names, 969 unsigned &NumNames) const; 970 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 971 unsigned &NumAliases) const { 972 // No aliases. 973 Aliases = 0; 974 NumAliases = 0; 975 } 976 virtual bool validateAsmConstraint(const char *&Name, 977 TargetInfo::ConstraintInfo &info) const { 978 // FIXME: implement 979 return true; 980 } 981 virtual const char *getClobbers() const { 982 // FIXME: Is this really right? 983 return ""; 984 } 985 virtual const char *getVAListDeclaration() const { 986 // FIXME: implement 987 return "typedef char* __builtin_va_list;"; 988 } 989 990 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 991 const std::string &Name, 992 bool Enabled) const; 993 }; 994 995 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 996 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 997 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 998 ALL_LANGUAGES }, 999 #include "clang/Basic/BuiltinsPTX.def" 1000 }; 1001 1002 const char * const PTXTargetInfo::GCCRegNames[] = { 1003 "r0" 1004 }; 1005 1006 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 1007 unsigned &NumNames) const { 1008 Names = GCCRegNames; 1009 NumNames = llvm::array_lengthof(GCCRegNames); 1010 } 1011 1012 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1013 const std::string &Name, 1014 bool Enabled) const { 1015 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 1016 Name)) { 1017 Features[Name] = Enabled; 1018 return true; 1019 } else { 1020 return false; 1021 } 1022 } 1023 1024 class PTX32TargetInfo : public PTXTargetInfo { 1025 public: 1026 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1027 PointerWidth = PointerAlign = 32; 1028 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1029 DescriptionString 1030 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 1031 } 1032 }; 1033 1034 class PTX64TargetInfo : public PTXTargetInfo { 1035 public: 1036 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1037 PointerWidth = PointerAlign = 64; 1038 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1039 DescriptionString 1040 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1041 } 1042 }; 1043 } 1044 1045 namespace { 1046 // MBlaze abstract base class 1047 class MBlazeTargetInfo : public TargetInfo { 1048 static const char * const GCCRegNames[]; 1049 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1050 1051 public: 1052 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1053 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1054 } 1055 1056 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1057 unsigned &NumRecords) const { 1058 // FIXME: Implement. 1059 Records = 0; 1060 NumRecords = 0; 1061 } 1062 1063 virtual void getTargetDefines(const LangOptions &Opts, 1064 MacroBuilder &Builder) const; 1065 1066 virtual const char *getVAListDeclaration() const { 1067 return "typedef char* __builtin_va_list;"; 1068 } 1069 virtual const char *getTargetPrefix() const { 1070 return "mblaze"; 1071 } 1072 virtual void getGCCRegNames(const char * const *&Names, 1073 unsigned &NumNames) const; 1074 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1075 unsigned &NumAliases) const; 1076 virtual bool validateAsmConstraint(const char *&Name, 1077 TargetInfo::ConstraintInfo &Info) const { 1078 switch (*Name) { 1079 default: return false; 1080 case 'O': // Zero 1081 return true; 1082 case 'b': // Base register 1083 case 'f': // Floating point register 1084 Info.setAllowsRegister(); 1085 return true; 1086 } 1087 } 1088 virtual const char *getClobbers() const { 1089 return ""; 1090 } 1091 }; 1092 1093 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1094 /// #defines that are not tied to a specific subtarget. 1095 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1096 MacroBuilder &Builder) const { 1097 // Target identification. 1098 Builder.defineMacro("__microblaze__"); 1099 Builder.defineMacro("_ARCH_MICROBLAZE"); 1100 Builder.defineMacro("__MICROBLAZE__"); 1101 1102 // Target properties. 1103 Builder.defineMacro("_BIG_ENDIAN"); 1104 Builder.defineMacro("__BIG_ENDIAN__"); 1105 1106 // Subtarget options. 1107 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1108 } 1109 1110 1111 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1112 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1113 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1114 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1115 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1116 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1117 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1118 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1119 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1120 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1121 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1122 }; 1123 1124 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1125 unsigned &NumNames) const { 1126 Names = GCCRegNames; 1127 NumNames = llvm::array_lengthof(GCCRegNames); 1128 } 1129 1130 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1131 { {"f0"}, "r0" }, 1132 { {"f1"}, "r1" }, 1133 { {"f2"}, "r2" }, 1134 { {"f3"}, "r3" }, 1135 { {"f4"}, "r4" }, 1136 { {"f5"}, "r5" }, 1137 { {"f6"}, "r6" }, 1138 { {"f7"}, "r7" }, 1139 { {"f8"}, "r8" }, 1140 { {"f9"}, "r9" }, 1141 { {"f10"}, "r10" }, 1142 { {"f11"}, "r11" }, 1143 { {"f12"}, "r12" }, 1144 { {"f13"}, "r13" }, 1145 { {"f14"}, "r14" }, 1146 { {"f15"}, "r15" }, 1147 { {"f16"}, "r16" }, 1148 { {"f17"}, "r17" }, 1149 { {"f18"}, "r18" }, 1150 { {"f19"}, "r19" }, 1151 { {"f20"}, "r20" }, 1152 { {"f21"}, "r21" }, 1153 { {"f22"}, "r22" }, 1154 { {"f23"}, "r23" }, 1155 { {"f24"}, "r24" }, 1156 { {"f25"}, "r25" }, 1157 { {"f26"}, "r26" }, 1158 { {"f27"}, "r27" }, 1159 { {"f28"}, "r28" }, 1160 { {"f29"}, "r29" }, 1161 { {"f30"}, "r30" }, 1162 { {"f31"}, "r31" }, 1163 }; 1164 1165 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1166 unsigned &NumAliases) const { 1167 Aliases = GCCRegAliases; 1168 NumAliases = llvm::array_lengthof(GCCRegAliases); 1169 } 1170 } // end anonymous namespace. 1171 1172 namespace { 1173 // Namespace for x86 abstract base class 1174 const Builtin::Info BuiltinInfo[] = { 1175 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1176 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1177 ALL_LANGUAGES }, 1178 #include "clang/Basic/BuiltinsX86.def" 1179 }; 1180 1181 static const char* const GCCRegNames[] = { 1182 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1183 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1184 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1185 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1186 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1187 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1188 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1189 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1190 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1191 }; 1192 1193 const TargetInfo::AddlRegName AddlRegNames[] = { 1194 { { "al", "ah", "eax", "rax" }, 0 }, 1195 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1196 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1197 { { "dl", "dh", "edx", "rdx" }, 1 }, 1198 { { "esi", "rsi" }, 4 }, 1199 { { "edi", "rdi" }, 5 }, 1200 { { "esp", "rsp" }, 7 }, 1201 { { "ebp", "rbp" }, 6 }, 1202 }; 1203 1204 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1205 // most of the implementation can be shared. 1206 class X86TargetInfo : public TargetInfo { 1207 enum X86SSEEnum { 1208 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 1209 } SSELevel; 1210 enum MMX3DNowEnum { 1211 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1212 } MMX3DNowLevel; 1213 1214 bool HasAES; 1215 bool HasLZCNT; 1216 bool HasBMI; 1217 bool HasBMI2; 1218 bool HasPOPCNT; 1219 bool HasFMA4; 1220 1221 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1222 /// 1223 /// Each enumeration represents a particular CPU supported by Clang. These 1224 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1225 enum CPUKind { 1226 CK_Generic, 1227 1228 /// \name i386 1229 /// i386-generation processors. 1230 //@{ 1231 CK_i386, 1232 //@} 1233 1234 /// \name i486 1235 /// i486-generation processors. 1236 //@{ 1237 CK_i486, 1238 CK_WinChipC6, 1239 CK_WinChip2, 1240 CK_C3, 1241 //@} 1242 1243 /// \name i586 1244 /// i586-generation processors, P5 microarchitecture based. 1245 //@{ 1246 CK_i586, 1247 CK_Pentium, 1248 CK_PentiumMMX, 1249 //@} 1250 1251 /// \name i686 1252 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1253 //@{ 1254 CK_i686, 1255 CK_PentiumPro, 1256 CK_Pentium2, 1257 CK_Pentium3, 1258 CK_Pentium3M, 1259 CK_PentiumM, 1260 CK_C3_2, 1261 1262 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1263 /// Clang however has some logic to suport this. 1264 // FIXME: Warn, deprecate, and potentially remove this. 1265 CK_Yonah, 1266 //@} 1267 1268 /// \name Netburst 1269 /// Netburst microarchitecture based processors. 1270 //@{ 1271 CK_Pentium4, 1272 CK_Pentium4M, 1273 CK_Prescott, 1274 CK_Nocona, 1275 //@} 1276 1277 /// \name Core 1278 /// Core microarchitecture based processors. 1279 //@{ 1280 CK_Core2, 1281 1282 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1283 /// codename which GCC no longer accepts as an option to -march, but Clang 1284 /// has some logic for recognizing it. 1285 // FIXME: Warn, deprecate, and potentially remove this. 1286 CK_Penryn, 1287 //@} 1288 1289 /// \name Atom 1290 /// Atom processors 1291 //@{ 1292 CK_Atom, 1293 //@} 1294 1295 /// \name Nehalem 1296 /// Nehalem microarchitecture based processors. 1297 //@{ 1298 CK_Corei7, 1299 CK_Corei7AVX, 1300 CK_CoreAVXi, 1301 CK_CoreAVX2, 1302 //@} 1303 1304 /// \name K6 1305 /// K6 architecture processors. 1306 //@{ 1307 CK_K6, 1308 CK_K6_2, 1309 CK_K6_3, 1310 //@} 1311 1312 /// \name K7 1313 /// K7 architecture processors. 1314 //@{ 1315 CK_Athlon, 1316 CK_AthlonThunderbird, 1317 CK_Athlon4, 1318 CK_AthlonXP, 1319 CK_AthlonMP, 1320 //@} 1321 1322 /// \name K8 1323 /// K8 architecture processors. 1324 //@{ 1325 CK_Athlon64, 1326 CK_Athlon64SSE3, 1327 CK_AthlonFX, 1328 CK_K8, 1329 CK_K8SSE3, 1330 CK_Opteron, 1331 CK_OpteronSSE3, 1332 CK_AMDFAM10, 1333 //@} 1334 1335 /// \name Bobcat 1336 /// Bobcat architecture processors. 1337 //@{ 1338 CK_BTVER1, 1339 //@} 1340 1341 /// \name Bulldozer 1342 /// Bulldozer architecture processors. 1343 //@{ 1344 CK_BDVER1, 1345 CK_BDVER2, 1346 //@} 1347 1348 /// This specification is deprecated and will be removed in the future. 1349 /// Users should prefer \see CK_K8. 1350 // FIXME: Warn on this when the CPU is set to it. 1351 CK_x86_64, 1352 //@} 1353 1354 /// \name Geode 1355 /// Geode processors. 1356 //@{ 1357 CK_Geode 1358 //@} 1359 } CPU; 1360 1361 public: 1362 X86TargetInfo(const std::string& triple) 1363 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1364 HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false), 1365 HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) { 1366 BigEndian = false; 1367 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1368 } 1369 virtual unsigned getFloatEvalMethod() const { 1370 // X87 evaluates with 80 bits "long double" precision. 1371 return SSELevel == NoSSE ? 2 : 0; 1372 } 1373 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1374 unsigned &NumRecords) const { 1375 Records = BuiltinInfo; 1376 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1377 } 1378 virtual void getGCCRegNames(const char * const *&Names, 1379 unsigned &NumNames) const { 1380 Names = GCCRegNames; 1381 NumNames = llvm::array_lengthof(GCCRegNames); 1382 } 1383 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1384 unsigned &NumAliases) const { 1385 Aliases = 0; 1386 NumAliases = 0; 1387 } 1388 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1389 unsigned &NumNames) const { 1390 Names = AddlRegNames; 1391 NumNames = llvm::array_lengthof(AddlRegNames); 1392 } 1393 virtual bool validateAsmConstraint(const char *&Name, 1394 TargetInfo::ConstraintInfo &info) const; 1395 virtual std::string convertConstraint(const char *&Constraint) const; 1396 virtual const char *getClobbers() const { 1397 return "~{dirflag},~{fpsr},~{flags}"; 1398 } 1399 virtual void getTargetDefines(const LangOptions &Opts, 1400 MacroBuilder &Builder) const; 1401 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1402 const std::string &Name, 1403 bool Enabled) const; 1404 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1405 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1406 virtual const char* getABI() const { 1407 if (PointerWidth == 64 && SSELevel >= AVX) 1408 return "avx"; 1409 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1410 return "no-mmx"; 1411 return ""; 1412 } 1413 virtual bool setCPU(const std::string &Name) { 1414 CPU = llvm::StringSwitch<CPUKind>(Name) 1415 .Case("i386", CK_i386) 1416 .Case("i486", CK_i486) 1417 .Case("winchip-c6", CK_WinChipC6) 1418 .Case("winchip2", CK_WinChip2) 1419 .Case("c3", CK_C3) 1420 .Case("i586", CK_i586) 1421 .Case("pentium", CK_Pentium) 1422 .Case("pentium-mmx", CK_PentiumMMX) 1423 .Case("i686", CK_i686) 1424 .Case("pentiumpro", CK_PentiumPro) 1425 .Case("pentium2", CK_Pentium2) 1426 .Case("pentium3", CK_Pentium3) 1427 .Case("pentium3m", CK_Pentium3M) 1428 .Case("pentium-m", CK_PentiumM) 1429 .Case("c3-2", CK_C3_2) 1430 .Case("yonah", CK_Yonah) 1431 .Case("pentium4", CK_Pentium4) 1432 .Case("pentium4m", CK_Pentium4M) 1433 .Case("prescott", CK_Prescott) 1434 .Case("nocona", CK_Nocona) 1435 .Case("core2", CK_Core2) 1436 .Case("penryn", CK_Penryn) 1437 .Case("atom", CK_Atom) 1438 .Case("corei7", CK_Corei7) 1439 .Case("corei7-avx", CK_Corei7AVX) 1440 .Case("core-avx-i", CK_CoreAVXi) 1441 .Case("core-avx2", CK_CoreAVX2) 1442 .Case("k6", CK_K6) 1443 .Case("k6-2", CK_K6_2) 1444 .Case("k6-3", CK_K6_3) 1445 .Case("athlon", CK_Athlon) 1446 .Case("athlon-tbird", CK_AthlonThunderbird) 1447 .Case("athlon-4", CK_Athlon4) 1448 .Case("athlon-xp", CK_AthlonXP) 1449 .Case("athlon-mp", CK_AthlonMP) 1450 .Case("athlon64", CK_Athlon64) 1451 .Case("athlon64-sse3", CK_Athlon64SSE3) 1452 .Case("athlon-fx", CK_AthlonFX) 1453 .Case("k8", CK_K8) 1454 .Case("k8-sse3", CK_K8SSE3) 1455 .Case("opteron", CK_Opteron) 1456 .Case("opteron-sse3", CK_OpteronSSE3) 1457 .Case("amdfam10", CK_AMDFAM10) 1458 .Case("btver1", CK_BTVER1) 1459 .Case("bdver1", CK_BDVER1) 1460 .Case("bdver2", CK_BDVER2) 1461 .Case("x86-64", CK_x86_64) 1462 .Case("geode", CK_Geode) 1463 .Default(CK_Generic); 1464 1465 // Perform any per-CPU checks necessary to determine if this CPU is 1466 // acceptable. 1467 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1468 // invalid without explaining *why*. 1469 switch (CPU) { 1470 case CK_Generic: 1471 // No processor selected! 1472 return false; 1473 1474 case CK_i386: 1475 case CK_i486: 1476 case CK_WinChipC6: 1477 case CK_WinChip2: 1478 case CK_C3: 1479 case CK_i586: 1480 case CK_Pentium: 1481 case CK_PentiumMMX: 1482 case CK_i686: 1483 case CK_PentiumPro: 1484 case CK_Pentium2: 1485 case CK_Pentium3: 1486 case CK_Pentium3M: 1487 case CK_PentiumM: 1488 case CK_Yonah: 1489 case CK_C3_2: 1490 case CK_Pentium4: 1491 case CK_Pentium4M: 1492 case CK_Prescott: 1493 case CK_K6: 1494 case CK_K6_2: 1495 case CK_K6_3: 1496 case CK_Athlon: 1497 case CK_AthlonThunderbird: 1498 case CK_Athlon4: 1499 case CK_AthlonXP: 1500 case CK_AthlonMP: 1501 case CK_Geode: 1502 // Only accept certain architectures when compiling in 32-bit mode. 1503 if (PointerWidth != 32) 1504 return false; 1505 1506 // Fallthrough 1507 case CK_Nocona: 1508 case CK_Core2: 1509 case CK_Penryn: 1510 case CK_Atom: 1511 case CK_Corei7: 1512 case CK_Corei7AVX: 1513 case CK_CoreAVXi: 1514 case CK_CoreAVX2: 1515 case CK_Athlon64: 1516 case CK_Athlon64SSE3: 1517 case CK_AthlonFX: 1518 case CK_K8: 1519 case CK_K8SSE3: 1520 case CK_Opteron: 1521 case CK_OpteronSSE3: 1522 case CK_AMDFAM10: 1523 case CK_BTVER1: 1524 case CK_BDVER1: 1525 case CK_BDVER2: 1526 case CK_x86_64: 1527 return true; 1528 } 1529 llvm_unreachable("Unhandled CPU kind"); 1530 } 1531 }; 1532 1533 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1534 // FIXME: This should not be here. 1535 Features["3dnow"] = false; 1536 Features["3dnowa"] = false; 1537 Features["mmx"] = false; 1538 Features["sse"] = false; 1539 Features["sse2"] = false; 1540 Features["sse3"] = false; 1541 Features["ssse3"] = false; 1542 Features["sse41"] = false; 1543 Features["sse42"] = false; 1544 Features["sse4a"] = false; 1545 Features["aes"] = false; 1546 Features["avx"] = false; 1547 Features["avx2"] = false; 1548 Features["lzcnt"] = false; 1549 Features["bmi"] = false; 1550 Features["bmi2"] = false; 1551 Features["popcnt"] = false; 1552 Features["fma4"] = false; 1553 1554 // FIXME: This *really* should not be here. 1555 1556 // X86_64 always has SSE2. 1557 if (PointerWidth == 64) 1558 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1559 1560 switch (CPU) { 1561 case CK_Generic: 1562 case CK_i386: 1563 case CK_i486: 1564 case CK_i586: 1565 case CK_Pentium: 1566 case CK_i686: 1567 case CK_PentiumPro: 1568 break; 1569 case CK_PentiumMMX: 1570 case CK_Pentium2: 1571 setFeatureEnabled(Features, "mmx", true); 1572 break; 1573 case CK_Pentium3: 1574 case CK_Pentium3M: 1575 setFeatureEnabled(Features, "mmx", true); 1576 setFeatureEnabled(Features, "sse", true); 1577 break; 1578 case CK_PentiumM: 1579 case CK_Pentium4: 1580 case CK_Pentium4M: 1581 case CK_x86_64: 1582 setFeatureEnabled(Features, "mmx", true); 1583 setFeatureEnabled(Features, "sse2", true); 1584 break; 1585 case CK_Yonah: 1586 case CK_Prescott: 1587 case CK_Nocona: 1588 setFeatureEnabled(Features, "mmx", true); 1589 setFeatureEnabled(Features, "sse3", true); 1590 break; 1591 case CK_Core2: 1592 setFeatureEnabled(Features, "mmx", true); 1593 setFeatureEnabled(Features, "ssse3", true); 1594 break; 1595 case CK_Penryn: 1596 setFeatureEnabled(Features, "mmx", true); 1597 setFeatureEnabled(Features, "sse4.1", true); 1598 break; 1599 case CK_Atom: 1600 setFeatureEnabled(Features, "mmx", true); 1601 setFeatureEnabled(Features, "ssse3", true); 1602 break; 1603 case CK_Corei7: 1604 setFeatureEnabled(Features, "mmx", true); 1605 setFeatureEnabled(Features, "sse4", true); 1606 setFeatureEnabled(Features, "aes", true); 1607 break; 1608 case CK_Corei7AVX: 1609 case CK_CoreAVXi: 1610 setFeatureEnabled(Features, "mmx", true); 1611 setFeatureEnabled(Features, "sse4", true); 1612 setFeatureEnabled(Features, "aes", true); 1613 //setFeatureEnabled(Features, "avx", true); 1614 break; 1615 case CK_CoreAVX2: 1616 setFeatureEnabled(Features, "mmx", true); 1617 setFeatureEnabled(Features, "sse4", true); 1618 setFeatureEnabled(Features, "aes", true); 1619 setFeatureEnabled(Features, "lzcnt", true); 1620 setFeatureEnabled(Features, "bmi", true); 1621 setFeatureEnabled(Features, "bmi2", true); 1622 //setFeatureEnabled(Features, "avx2", true); 1623 break; 1624 case CK_K6: 1625 case CK_WinChipC6: 1626 setFeatureEnabled(Features, "mmx", true); 1627 break; 1628 case CK_K6_2: 1629 case CK_K6_3: 1630 case CK_WinChip2: 1631 case CK_C3: 1632 setFeatureEnabled(Features, "3dnow", true); 1633 break; 1634 case CK_Athlon: 1635 case CK_AthlonThunderbird: 1636 case CK_Geode: 1637 setFeatureEnabled(Features, "3dnowa", true); 1638 break; 1639 case CK_Athlon4: 1640 case CK_AthlonXP: 1641 case CK_AthlonMP: 1642 setFeatureEnabled(Features, "sse", true); 1643 setFeatureEnabled(Features, "3dnowa", true); 1644 break; 1645 case CK_K8: 1646 case CK_Opteron: 1647 case CK_Athlon64: 1648 case CK_AthlonFX: 1649 setFeatureEnabled(Features, "sse2", true); 1650 setFeatureEnabled(Features, "3dnowa", true); 1651 break; 1652 case CK_K8SSE3: 1653 case CK_OpteronSSE3: 1654 case CK_Athlon64SSE3: 1655 setFeatureEnabled(Features, "sse3", true); 1656 setFeatureEnabled(Features, "3dnowa", true); 1657 break; 1658 case CK_AMDFAM10: 1659 setFeatureEnabled(Features, "sse3", true); 1660 setFeatureEnabled(Features, "sse4a", true); 1661 setFeatureEnabled(Features, "3dnowa", true); 1662 break; 1663 case CK_BTVER1: 1664 setFeatureEnabled(Features, "ssse3", true); 1665 setFeatureEnabled(Features, "sse4a", true); 1666 case CK_BDVER1: 1667 case CK_BDVER2: 1668 setFeatureEnabled(Features, "sse4", true); 1669 setFeatureEnabled(Features, "sse4a", true); 1670 setFeatureEnabled(Features, "aes", true); 1671 break; 1672 case CK_C3_2: 1673 setFeatureEnabled(Features, "mmx", true); 1674 setFeatureEnabled(Features, "sse", true); 1675 break; 1676 } 1677 } 1678 1679 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1680 const std::string &Name, 1681 bool Enabled) const { 1682 // FIXME: This *really* should not be here. We need some way of translating 1683 // options into llvm subtarget features. 1684 if (!Features.count(Name) && 1685 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1686 return false; 1687 1688 // FIXME: this should probably use a switch with fall through. 1689 1690 if (Enabled) { 1691 if (Name == "mmx") 1692 Features["mmx"] = true; 1693 else if (Name == "sse") 1694 Features["mmx"] = Features["sse"] = true; 1695 else if (Name == "sse2") 1696 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1697 else if (Name == "sse3") 1698 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1699 true; 1700 else if (Name == "ssse3") 1701 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1702 Features["ssse3"] = true; 1703 else if (Name == "sse4" || Name == "sse4.2") 1704 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1705 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1706 Features["popcnt"] = true; 1707 else if (Name == "sse4.1") 1708 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1709 Features["ssse3"] = Features["sse41"] = true; 1710 else if (Name == "3dnow") 1711 Features["mmx"] = Features["3dnow"] = true; 1712 else if (Name == "3dnowa") 1713 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1714 else if (Name == "aes") 1715 Features["aes"] = true; 1716 else if (Name == "avx") 1717 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1718 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1719 Features["popcnt"] = Features["avx"] = true; 1720 else if (Name == "avx2") 1721 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1722 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1723 Features["popcnt"] = Features["avx"] = Features["avx2"] = true; 1724 else if (Name == "fma4") 1725 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1726 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1727 Features["popcnt"] = Features["avx"] = Features["fma4"] = true; 1728 else if (Name == "sse4a") 1729 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1730 Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true; 1731 else if (Name == "lzcnt") 1732 Features["lzcnt"] = true; 1733 else if (Name == "bmi") 1734 Features["bmi"] = true; 1735 else if (Name == "bmi2") 1736 Features["bmi2"] = true; 1737 else if (Name == "popcnt") 1738 Features["popcnt"] = true; 1739 } else { 1740 if (Name == "mmx") 1741 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1742 else if (Name == "sse") 1743 Features["sse"] = Features["sse2"] = Features["sse3"] = 1744 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1745 Features["sse4a"] = false; 1746 else if (Name == "sse2") 1747 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1748 Features["sse41"] = Features["sse42"] = Features["sse4a"] = false; 1749 else if (Name == "sse3") 1750 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1751 Features["sse42"] = Features["sse4a"] = false; 1752 else if (Name == "ssse3") 1753 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1754 else if (Name == "sse4" || Name == "sse4.1") 1755 Features["sse41"] = Features["sse42"] = false; 1756 else if (Name == "sse4.2") 1757 Features["sse42"] = false; 1758 else if (Name == "3dnow") 1759 Features["3dnow"] = Features["3dnowa"] = false; 1760 else if (Name == "3dnowa") 1761 Features["3dnowa"] = false; 1762 else if (Name == "aes") 1763 Features["aes"] = false; 1764 else if (Name == "avx") 1765 Features["avx"] = Features["avx2"] = Features["fma4"] = false; 1766 else if (Name == "avx2") 1767 Features["avx2"] = false; 1768 else if (Name == "sse4a") 1769 Features["sse4a"] = false; 1770 else if (Name == "lzcnt") 1771 Features["lzcnt"] = false; 1772 else if (Name == "bmi") 1773 Features["bmi"] = false; 1774 else if (Name == "bmi2") 1775 Features["bmi2"] = false; 1776 else if (Name == "popcnt") 1777 Features["popcnt"] = false; 1778 else if (Name == "fma4") 1779 Features["fma4"] = false; 1780 } 1781 1782 return true; 1783 } 1784 1785 /// HandleTargetOptions - Perform initialization based on the user 1786 /// configured set of features. 1787 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1788 // Remember the maximum enabled sselevel. 1789 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1790 // Ignore disabled features. 1791 if (Features[i][0] == '-') 1792 continue; 1793 1794 if (Features[i].substr(1) == "aes") { 1795 HasAES = true; 1796 continue; 1797 } 1798 1799 if (Features[i].substr(1) == "lzcnt") { 1800 HasLZCNT = true; 1801 continue; 1802 } 1803 1804 if (Features[i].substr(1) == "bmi") { 1805 HasBMI = true; 1806 continue; 1807 } 1808 1809 if (Features[i].substr(1) == "bmi2") { 1810 HasBMI2 = true; 1811 continue; 1812 } 1813 1814 if (Features[i].substr(1) == "popcnt") { 1815 HasPOPCNT = true; 1816 continue; 1817 } 1818 1819 if (Features[i].substr(1) == "fma4") { 1820 HasFMA4 = true; 1821 continue; 1822 } 1823 1824 assert(Features[i][0] == '+' && "Invalid target feature!"); 1825 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1826 .Case("avx2", AVX2) 1827 .Case("avx", AVX) 1828 .Case("sse42", SSE42) 1829 .Case("sse41", SSE41) 1830 .Case("ssse3", SSSE3) 1831 .Case("sse3", SSE3) 1832 .Case("sse2", SSE2) 1833 .Case("sse", SSE1) 1834 .Default(NoSSE); 1835 SSELevel = std::max(SSELevel, Level); 1836 1837 MMX3DNowEnum ThreeDNowLevel = 1838 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1839 .Case("3dnowa", AMD3DNowAthlon) 1840 .Case("3dnow", AMD3DNow) 1841 .Case("mmx", MMX) 1842 .Default(NoMMX3DNow); 1843 1844 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1845 } 1846 1847 // Don't tell the backend if we're turning off mmx; it will end up disabling 1848 // SSE, which we don't want. 1849 std::vector<std::string>::iterator it; 1850 it = std::find(Features.begin(), Features.end(), "-mmx"); 1851 if (it != Features.end()) 1852 Features.erase(it); 1853 } 1854 1855 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1856 /// definitions for this particular subtarget. 1857 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1858 MacroBuilder &Builder) const { 1859 // Target identification. 1860 if (PointerWidth == 64) { 1861 Builder.defineMacro("_LP64"); 1862 Builder.defineMacro("__LP64__"); 1863 Builder.defineMacro("__amd64__"); 1864 Builder.defineMacro("__amd64"); 1865 Builder.defineMacro("__x86_64"); 1866 Builder.defineMacro("__x86_64__"); 1867 } else { 1868 DefineStd(Builder, "i386", Opts); 1869 } 1870 1871 // Subtarget options. 1872 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1873 // truly should be based on -mtune options. 1874 switch (CPU) { 1875 case CK_Generic: 1876 break; 1877 case CK_i386: 1878 // The rest are coming from the i386 define above. 1879 Builder.defineMacro("__tune_i386__"); 1880 break; 1881 case CK_i486: 1882 case CK_WinChipC6: 1883 case CK_WinChip2: 1884 case CK_C3: 1885 defineCPUMacros(Builder, "i486"); 1886 break; 1887 case CK_PentiumMMX: 1888 Builder.defineMacro("__pentium_mmx__"); 1889 Builder.defineMacro("__tune_pentium_mmx__"); 1890 // Fallthrough 1891 case CK_i586: 1892 case CK_Pentium: 1893 defineCPUMacros(Builder, "i586"); 1894 defineCPUMacros(Builder, "pentium"); 1895 break; 1896 case CK_Pentium3: 1897 case CK_Pentium3M: 1898 case CK_PentiumM: 1899 Builder.defineMacro("__tune_pentium3__"); 1900 // Fallthrough 1901 case CK_Pentium2: 1902 case CK_C3_2: 1903 Builder.defineMacro("__tune_pentium2__"); 1904 // Fallthrough 1905 case CK_PentiumPro: 1906 Builder.defineMacro("__tune_i686__"); 1907 Builder.defineMacro("__tune_pentiumpro__"); 1908 // Fallthrough 1909 case CK_i686: 1910 Builder.defineMacro("__i686"); 1911 Builder.defineMacro("__i686__"); 1912 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1913 Builder.defineMacro("__pentiumpro"); 1914 Builder.defineMacro("__pentiumpro__"); 1915 break; 1916 case CK_Pentium4: 1917 case CK_Pentium4M: 1918 defineCPUMacros(Builder, "pentium4"); 1919 break; 1920 case CK_Yonah: 1921 case CK_Prescott: 1922 case CK_Nocona: 1923 defineCPUMacros(Builder, "nocona"); 1924 break; 1925 case CK_Core2: 1926 case CK_Penryn: 1927 defineCPUMacros(Builder, "core2"); 1928 break; 1929 case CK_Atom: 1930 defineCPUMacros(Builder, "atom"); 1931 break; 1932 case CK_Corei7: 1933 case CK_Corei7AVX: 1934 case CK_CoreAVXi: 1935 case CK_CoreAVX2: 1936 defineCPUMacros(Builder, "corei7"); 1937 break; 1938 case CK_K6_2: 1939 Builder.defineMacro("__k6_2__"); 1940 Builder.defineMacro("__tune_k6_2__"); 1941 // Fallthrough 1942 case CK_K6_3: 1943 if (CPU != CK_K6_2) { // In case of fallthrough 1944 // FIXME: GCC may be enabling these in cases where some other k6 1945 // architecture is specified but -m3dnow is explicitly provided. The 1946 // exact semantics need to be determined and emulated here. 1947 Builder.defineMacro("__k6_3__"); 1948 Builder.defineMacro("__tune_k6_3__"); 1949 } 1950 // Fallthrough 1951 case CK_K6: 1952 defineCPUMacros(Builder, "k6"); 1953 break; 1954 case CK_Athlon: 1955 case CK_AthlonThunderbird: 1956 case CK_Athlon4: 1957 case CK_AthlonXP: 1958 case CK_AthlonMP: 1959 defineCPUMacros(Builder, "athlon"); 1960 if (SSELevel != NoSSE) { 1961 Builder.defineMacro("__athlon_sse__"); 1962 Builder.defineMacro("__tune_athlon_sse__"); 1963 } 1964 break; 1965 case CK_K8: 1966 case CK_K8SSE3: 1967 case CK_x86_64: 1968 case CK_Opteron: 1969 case CK_OpteronSSE3: 1970 case CK_Athlon64: 1971 case CK_Athlon64SSE3: 1972 case CK_AthlonFX: 1973 defineCPUMacros(Builder, "k8"); 1974 break; 1975 case CK_AMDFAM10: 1976 defineCPUMacros(Builder, "amdfam10"); 1977 break; 1978 case CK_BTVER1: 1979 defineCPUMacros(Builder, "btver1"); 1980 break; 1981 case CK_BDVER1: 1982 defineCPUMacros(Builder, "bdver1"); 1983 break; 1984 case CK_BDVER2: 1985 defineCPUMacros(Builder, "bdver2"); 1986 break; 1987 case CK_Geode: 1988 defineCPUMacros(Builder, "geode"); 1989 break; 1990 } 1991 1992 // Target properties. 1993 Builder.defineMacro("__LITTLE_ENDIAN__"); 1994 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1995 1996 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1997 // functions in glibc header files that use FP Stack inline asm which the 1998 // backend can't deal with (PR879). 1999 Builder.defineMacro("__NO_MATH_INLINES"); 2000 2001 if (HasAES) 2002 Builder.defineMacro("__AES__"); 2003 2004 if (HasLZCNT) 2005 Builder.defineMacro("__LZCNT__"); 2006 2007 if (HasBMI) 2008 Builder.defineMacro("__BMI__"); 2009 2010 if (HasBMI2) 2011 Builder.defineMacro("__BMI2__"); 2012 2013 if (HasPOPCNT) 2014 Builder.defineMacro("__POPCNT__"); 2015 2016 if (HasFMA4) 2017 Builder.defineMacro("__FMA4__"); 2018 2019 // Each case falls through to the previous one here. 2020 switch (SSELevel) { 2021 case AVX2: 2022 Builder.defineMacro("__AVX2__"); 2023 case AVX: 2024 Builder.defineMacro("__AVX__"); 2025 case SSE42: 2026 Builder.defineMacro("__SSE4_2__"); 2027 case SSE41: 2028 Builder.defineMacro("__SSE4_1__"); 2029 case SSSE3: 2030 Builder.defineMacro("__SSSE3__"); 2031 case SSE3: 2032 Builder.defineMacro("__SSE3__"); 2033 case SSE2: 2034 Builder.defineMacro("__SSE2__"); 2035 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 2036 case SSE1: 2037 Builder.defineMacro("__SSE__"); 2038 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 2039 case NoSSE: 2040 break; 2041 } 2042 2043 if (Opts.MicrosoftExt && PointerWidth == 32) { 2044 switch (SSELevel) { 2045 case AVX2: 2046 case AVX: 2047 case SSE42: 2048 case SSE41: 2049 case SSSE3: 2050 case SSE3: 2051 case SSE2: 2052 Builder.defineMacro("_M_IX86_FP", Twine(2)); 2053 break; 2054 case SSE1: 2055 Builder.defineMacro("_M_IX86_FP", Twine(1)); 2056 break; 2057 default: 2058 Builder.defineMacro("_M_IX86_FP", Twine(0)); 2059 } 2060 } 2061 2062 // Each case falls through to the previous one here. 2063 switch (MMX3DNowLevel) { 2064 case AMD3DNowAthlon: 2065 Builder.defineMacro("__3dNOW_A__"); 2066 case AMD3DNow: 2067 Builder.defineMacro("__3dNOW__"); 2068 case MMX: 2069 Builder.defineMacro("__MMX__"); 2070 case NoMMX3DNow: 2071 break; 2072 } 2073 } 2074 2075 2076 bool 2077 X86TargetInfo::validateAsmConstraint(const char *&Name, 2078 TargetInfo::ConstraintInfo &Info) const { 2079 switch (*Name) { 2080 default: return false; 2081 case 'Y': // first letter of a pair: 2082 switch (*(Name+1)) { 2083 default: return false; 2084 case '0': // First SSE register. 2085 case 't': // Any SSE register, when SSE2 is enabled. 2086 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2087 case 'm': // any MMX register, when inter-unit moves enabled. 2088 break; // falls through to setAllowsRegister. 2089 } 2090 case 'a': // eax. 2091 case 'b': // ebx. 2092 case 'c': // ecx. 2093 case 'd': // edx. 2094 case 'S': // esi. 2095 case 'D': // edi. 2096 case 'A': // edx:eax. 2097 case 'f': // any x87 floating point stack register. 2098 case 't': // top of floating point stack. 2099 case 'u': // second from top of floating point stack. 2100 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2101 case 'y': // Any MMX register. 2102 case 'x': // Any SSE register. 2103 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2104 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2105 case 'l': // "Index" registers: any general register that can be used as an 2106 // index in a base+index memory access. 2107 Info.setAllowsRegister(); 2108 return true; 2109 case 'C': // SSE floating point constant. 2110 case 'G': // x87 floating point constant. 2111 case 'e': // 32-bit signed integer constant for use with zero-extending 2112 // x86_64 instructions. 2113 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2114 // x86_64 instructions. 2115 return true; 2116 } 2117 } 2118 2119 2120 std::string 2121 X86TargetInfo::convertConstraint(const char *&Constraint) const { 2122 switch (*Constraint) { 2123 case 'a': return std::string("{ax}"); 2124 case 'b': return std::string("{bx}"); 2125 case 'c': return std::string("{cx}"); 2126 case 'd': return std::string("{dx}"); 2127 case 'S': return std::string("{si}"); 2128 case 'D': return std::string("{di}"); 2129 case 'p': // address 2130 return std::string("im"); 2131 case 't': // top of floating point stack. 2132 return std::string("{st}"); 2133 case 'u': // second from top of floating point stack. 2134 return std::string("{st(1)}"); // second from top of floating point stack. 2135 default: 2136 return std::string(1, *Constraint); 2137 } 2138 } 2139 } // end anonymous namespace 2140 2141 namespace { 2142 // X86-32 generic target 2143 class X86_32TargetInfo : public X86TargetInfo { 2144 public: 2145 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2146 DoubleAlign = LongLongAlign = 32; 2147 LongDoubleWidth = 96; 2148 LongDoubleAlign = 32; 2149 SuitableAlign = 128; 2150 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2151 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2152 "a0:0:64-f80:32:32-n8:16:32-S128"; 2153 SizeType = UnsignedInt; 2154 PtrDiffType = SignedInt; 2155 IntPtrType = SignedInt; 2156 RegParmMax = 3; 2157 2158 // Use fpret for all types. 2159 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2160 (1 << TargetInfo::Double) | 2161 (1 << TargetInfo::LongDouble)); 2162 2163 // x86-32 has atomics up to 8 bytes 2164 // FIXME: Check that we actually have cmpxchg8b before setting 2165 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2166 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2167 } 2168 virtual const char *getVAListDeclaration() const { 2169 return "typedef char* __builtin_va_list;"; 2170 } 2171 2172 int getEHDataRegisterNumber(unsigned RegNo) const { 2173 if (RegNo == 0) return 0; 2174 if (RegNo == 1) return 2; 2175 return -1; 2176 } 2177 }; 2178 } // end anonymous namespace 2179 2180 namespace { 2181 class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> { 2182 public: 2183 NetBSDI386TargetInfo(const std::string &triple) : 2184 NetBSDTargetInfo<X86_32TargetInfo>(triple) { 2185 } 2186 2187 virtual unsigned getFloatEvalMethod() const { 2188 // NetBSD defaults to "double" rounding 2189 return 1; 2190 } 2191 }; 2192 } // end anonymous namespace 2193 2194 namespace { 2195 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2196 public: 2197 OpenBSDI386TargetInfo(const std::string& triple) : 2198 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2199 SizeType = UnsignedLong; 2200 IntPtrType = SignedLong; 2201 PtrDiffType = SignedLong; 2202 } 2203 }; 2204 } // end anonymous namespace 2205 2206 namespace { 2207 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2208 public: 2209 DarwinI386TargetInfo(const std::string& triple) : 2210 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2211 LongDoubleWidth = 128; 2212 LongDoubleAlign = 128; 2213 SuitableAlign = 128; 2214 SizeType = UnsignedLong; 2215 IntPtrType = SignedLong; 2216 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2217 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2218 "a0:0:64-f80:128:128-n8:16:32-S128"; 2219 HasAlignMac68kSupport = true; 2220 } 2221 2222 }; 2223 } // end anonymous namespace 2224 2225 namespace { 2226 // x86-32 Windows target 2227 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2228 public: 2229 WindowsX86_32TargetInfo(const std::string& triple) 2230 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2231 TLSSupported = false; 2232 WCharType = UnsignedShort; 2233 DoubleAlign = LongLongAlign = 64; 2234 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2235 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2236 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2237 } 2238 virtual void getTargetDefines(const LangOptions &Opts, 2239 MacroBuilder &Builder) const { 2240 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2241 } 2242 }; 2243 } // end anonymous namespace 2244 2245 namespace { 2246 2247 // x86-32 Windows Visual Studio target 2248 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2249 public: 2250 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2251 : WindowsX86_32TargetInfo(triple) { 2252 LongDoubleWidth = LongDoubleAlign = 64; 2253 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2254 } 2255 virtual void getTargetDefines(const LangOptions &Opts, 2256 MacroBuilder &Builder) const { 2257 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2258 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2259 // The value of the following reflects processor type. 2260 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2261 // We lost the original triple, so we use the default. 2262 Builder.defineMacro("_M_IX86", "600"); 2263 } 2264 }; 2265 } // end anonymous namespace 2266 2267 namespace { 2268 // x86-32 MinGW target 2269 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2270 public: 2271 MinGWX86_32TargetInfo(const std::string& triple) 2272 : WindowsX86_32TargetInfo(triple) { 2273 } 2274 virtual void getTargetDefines(const LangOptions &Opts, 2275 MacroBuilder &Builder) const { 2276 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2277 DefineStd(Builder, "WIN32", Opts); 2278 DefineStd(Builder, "WINNT", Opts); 2279 Builder.defineMacro("_X86_"); 2280 Builder.defineMacro("__MSVCRT__"); 2281 Builder.defineMacro("__MINGW32__"); 2282 2283 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2284 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2285 if (Opts.MicrosoftExt) 2286 // Provide "as-is" __declspec. 2287 Builder.defineMacro("__declspec", "__declspec"); 2288 else 2289 // Provide alias of __attribute__ like mingw32-gcc. 2290 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2291 } 2292 }; 2293 } // end anonymous namespace 2294 2295 namespace { 2296 // x86-32 Cygwin target 2297 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2298 public: 2299 CygwinX86_32TargetInfo(const std::string& triple) 2300 : X86_32TargetInfo(triple) { 2301 TLSSupported = false; 2302 WCharType = UnsignedShort; 2303 DoubleAlign = LongLongAlign = 64; 2304 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2305 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2306 "a0:0:64-f80:32:32-n8:16:32-S32"; 2307 } 2308 virtual void getTargetDefines(const LangOptions &Opts, 2309 MacroBuilder &Builder) const { 2310 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2311 Builder.defineMacro("__CYGWIN__"); 2312 Builder.defineMacro("__CYGWIN32__"); 2313 DefineStd(Builder, "unix", Opts); 2314 if (Opts.CPlusPlus) 2315 Builder.defineMacro("_GNU_SOURCE"); 2316 } 2317 }; 2318 } // end anonymous namespace 2319 2320 namespace { 2321 // x86-32 Haiku target 2322 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2323 public: 2324 HaikuX86_32TargetInfo(const std::string& triple) 2325 : X86_32TargetInfo(triple) { 2326 SizeType = UnsignedLong; 2327 IntPtrType = SignedLong; 2328 PtrDiffType = SignedLong; 2329 this->UserLabelPrefix = ""; 2330 } 2331 virtual void getTargetDefines(const LangOptions &Opts, 2332 MacroBuilder &Builder) const { 2333 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2334 Builder.defineMacro("__INTEL__"); 2335 Builder.defineMacro("__HAIKU__"); 2336 } 2337 }; 2338 } // end anonymous namespace 2339 2340 // RTEMS Target 2341 template<typename Target> 2342 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2343 protected: 2344 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2345 MacroBuilder &Builder) const { 2346 // RTEMS defines; list based off of gcc output 2347 2348 Builder.defineMacro("__rtems__"); 2349 Builder.defineMacro("__ELF__"); 2350 } 2351 public: 2352 RTEMSTargetInfo(const std::string &triple) 2353 : OSTargetInfo<Target>(triple) { 2354 this->UserLabelPrefix = ""; 2355 2356 llvm::Triple Triple(triple); 2357 switch (Triple.getArch()) { 2358 default: 2359 case llvm::Triple::x86: 2360 // this->MCountName = ".mcount"; 2361 break; 2362 case llvm::Triple::mips: 2363 case llvm::Triple::mipsel: 2364 case llvm::Triple::ppc: 2365 case llvm::Triple::ppc64: 2366 // this->MCountName = "_mcount"; 2367 break; 2368 case llvm::Triple::arm: 2369 // this->MCountName = "__mcount"; 2370 break; 2371 } 2372 2373 } 2374 }; 2375 2376 namespace { 2377 // x86-32 RTEMS target 2378 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2379 public: 2380 RTEMSX86_32TargetInfo(const std::string& triple) 2381 : X86_32TargetInfo(triple) { 2382 SizeType = UnsignedLong; 2383 IntPtrType = SignedLong; 2384 PtrDiffType = SignedLong; 2385 this->UserLabelPrefix = ""; 2386 } 2387 virtual void getTargetDefines(const LangOptions &Opts, 2388 MacroBuilder &Builder) const { 2389 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2390 Builder.defineMacro("__INTEL__"); 2391 Builder.defineMacro("__rtems__"); 2392 } 2393 }; 2394 } // end anonymous namespace 2395 2396 namespace { 2397 // x86-64 generic target 2398 class X86_64TargetInfo : public X86TargetInfo { 2399 public: 2400 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2401 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2402 LongDoubleWidth = 128; 2403 LongDoubleAlign = 128; 2404 LargeArrayMinWidth = 128; 2405 LargeArrayAlign = 128; 2406 SuitableAlign = 128; 2407 IntMaxType = SignedLong; 2408 UIntMaxType = UnsignedLong; 2409 Int64Type = SignedLong; 2410 RegParmMax = 6; 2411 2412 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2413 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2414 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2415 2416 // Use fpret only for long double. 2417 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2418 2419 // Use fp2ret for _Complex long double. 2420 ComplexLongDoubleUsesFP2Ret = true; 2421 2422 // x86-64 has atomics up to 16 bytes. 2423 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2424 // on CPUs with cmpxchg16b 2425 MaxAtomicPromoteWidth = 128; 2426 MaxAtomicInlineWidth = 64; 2427 } 2428 virtual const char *getVAListDeclaration() const { 2429 return "typedef struct __va_list_tag {" 2430 " unsigned gp_offset;" 2431 " unsigned fp_offset;" 2432 " void* overflow_arg_area;" 2433 " void* reg_save_area;" 2434 "} __va_list_tag;" 2435 "typedef __va_list_tag __builtin_va_list[1];"; 2436 } 2437 2438 int getEHDataRegisterNumber(unsigned RegNo) const { 2439 if (RegNo == 0) return 0; 2440 if (RegNo == 1) return 1; 2441 return -1; 2442 } 2443 }; 2444 } // end anonymous namespace 2445 2446 namespace { 2447 // x86-64 Windows target 2448 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2449 public: 2450 WindowsX86_64TargetInfo(const std::string& triple) 2451 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2452 TLSSupported = false; 2453 WCharType = UnsignedShort; 2454 LongWidth = LongAlign = 32; 2455 DoubleAlign = LongLongAlign = 64; 2456 IntMaxType = SignedLongLong; 2457 UIntMaxType = UnsignedLongLong; 2458 Int64Type = SignedLongLong; 2459 SizeType = UnsignedLongLong; 2460 PtrDiffType = SignedLongLong; 2461 IntPtrType = SignedLongLong; 2462 this->UserLabelPrefix = ""; 2463 } 2464 virtual void getTargetDefines(const LangOptions &Opts, 2465 MacroBuilder &Builder) const { 2466 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2467 Builder.defineMacro("_WIN64"); 2468 } 2469 virtual const char *getVAListDeclaration() const { 2470 return "typedef char* __builtin_va_list;"; 2471 } 2472 }; 2473 } // end anonymous namespace 2474 2475 namespace { 2476 // x86-64 Windows Visual Studio target 2477 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2478 public: 2479 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2480 : WindowsX86_64TargetInfo(triple) { 2481 LongDoubleWidth = LongDoubleAlign = 64; 2482 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2483 } 2484 virtual void getTargetDefines(const LangOptions &Opts, 2485 MacroBuilder &Builder) const { 2486 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2487 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2488 Builder.defineMacro("_M_X64"); 2489 Builder.defineMacro("_M_AMD64"); 2490 } 2491 }; 2492 } // end anonymous namespace 2493 2494 namespace { 2495 // x86-64 MinGW target 2496 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2497 public: 2498 MinGWX86_64TargetInfo(const std::string& triple) 2499 : WindowsX86_64TargetInfo(triple) { 2500 } 2501 virtual void getTargetDefines(const LangOptions &Opts, 2502 MacroBuilder &Builder) const { 2503 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2504 DefineStd(Builder, "WIN64", Opts); 2505 Builder.defineMacro("__MSVCRT__"); 2506 Builder.defineMacro("__MINGW32__"); 2507 Builder.defineMacro("__MINGW64__"); 2508 2509 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2510 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2511 if (Opts.MicrosoftExt) 2512 // Provide "as-is" __declspec. 2513 Builder.defineMacro("__declspec", "__declspec"); 2514 else 2515 // Provide alias of __attribute__ like mingw32-gcc. 2516 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2517 } 2518 }; 2519 } // end anonymous namespace 2520 2521 namespace { 2522 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2523 public: 2524 DarwinX86_64TargetInfo(const std::string& triple) 2525 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2526 Int64Type = SignedLongLong; 2527 } 2528 }; 2529 } // end anonymous namespace 2530 2531 namespace { 2532 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2533 public: 2534 OpenBSDX86_64TargetInfo(const std::string& triple) 2535 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2536 IntMaxType = SignedLongLong; 2537 UIntMaxType = UnsignedLongLong; 2538 Int64Type = SignedLongLong; 2539 } 2540 }; 2541 } // end anonymous namespace 2542 2543 namespace { 2544 class ARMTargetInfo : public TargetInfo { 2545 // Possible FPU choices. 2546 enum FPUMode { 2547 NoFPU, 2548 VFP2FPU, 2549 VFP3FPU, 2550 NeonFPU 2551 }; 2552 2553 static bool FPUModeIsVFP(FPUMode Mode) { 2554 return Mode >= VFP2FPU && Mode <= NeonFPU; 2555 } 2556 2557 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2558 static const char * const GCCRegNames[]; 2559 2560 std::string ABI, CPU; 2561 2562 unsigned FPU : 3; 2563 2564 unsigned IsThumb : 1; 2565 2566 // Initialized via features. 2567 unsigned SoftFloat : 1; 2568 unsigned SoftFloatABI : 1; 2569 2570 static const Builtin::Info BuiltinInfo[]; 2571 2572 public: 2573 ARMTargetInfo(const std::string &TripleStr) 2574 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2575 { 2576 BigEndian = false; 2577 SizeType = UnsignedInt; 2578 PtrDiffType = SignedInt; 2579 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2580 WCharType = UnsignedInt; 2581 2582 // {} in inline assembly are neon specifiers, not assembly variant 2583 // specifiers. 2584 NoAsmVariants = true; 2585 2586 // FIXME: Should we just treat this as a feature? 2587 IsThumb = getTriple().getArchName().startswith("thumb"); 2588 if (IsThumb) { 2589 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2590 // so set preferred for small types to 32. 2591 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2592 "i64:64:64-f32:32:32-f64:64:64-" 2593 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2594 } else { 2595 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2596 "i64:64:64-f32:32:32-f64:64:64-" 2597 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2598 } 2599 2600 // ARM targets default to using the ARM C++ ABI. 2601 CXXABI = CXXABI_ARM; 2602 2603 // ARM has atomics up to 8 bytes 2604 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2605 MaxAtomicPromoteWidth = 64; 2606 } 2607 virtual const char *getABI() const { return ABI.c_str(); } 2608 virtual bool setABI(const std::string &Name) { 2609 ABI = Name; 2610 2611 // The defaults (above) are for AAPCS, check if we need to change them. 2612 // 2613 // FIXME: We need support for -meabi... we could just mangle it into the 2614 // name. 2615 if (Name == "apcs-gnu") { 2616 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2617 SizeType = UnsignedLong; 2618 2619 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2620 WCharType = SignedInt; 2621 2622 // Do not respect the alignment of bit-field types when laying out 2623 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2624 UseBitFieldTypeAlignment = false; 2625 2626 /// Do force alignment of members that follow zero length bitfields. If 2627 /// the alignment of the zero-length bitfield is greater than the member 2628 /// that follows it, `bar', `bar' will be aligned as the type of the 2629 /// zero length bitfield. 2630 UseZeroLengthBitfieldAlignment = true; 2631 2632 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2633 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2634 /// gcc. 2635 ZeroLengthBitfieldBoundary = 32; 2636 2637 if (IsThumb) { 2638 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2639 // so set preferred for small types to 32. 2640 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2641 "i64:32:64-f32:32:32-f64:32:64-" 2642 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2643 } else { 2644 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2645 "i64:32:64-f32:32:32-f64:32:64-" 2646 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2647 } 2648 2649 // FIXME: Override "preferred align" for double and long long. 2650 } else if (Name == "aapcs") { 2651 // FIXME: Enumerated types are variable width in straight AAPCS. 2652 } else if (Name == "aapcs-linux") { 2653 ; 2654 } else 2655 return false; 2656 2657 return true; 2658 } 2659 2660 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2661 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2662 Features["vfp2"] = true; 2663 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2664 Features["neon"] = true; 2665 } 2666 2667 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2668 const std::string &Name, 2669 bool Enabled) const { 2670 if (Name == "soft-float" || Name == "soft-float-abi" || 2671 Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16") { 2672 Features[Name] = Enabled; 2673 } else 2674 return false; 2675 2676 return true; 2677 } 2678 2679 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2680 FPU = NoFPU; 2681 SoftFloat = SoftFloatABI = false; 2682 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2683 if (Features[i] == "+soft-float") 2684 SoftFloat = true; 2685 else if (Features[i] == "+soft-float-abi") 2686 SoftFloatABI = true; 2687 else if (Features[i] == "+vfp2") 2688 FPU = VFP2FPU; 2689 else if (Features[i] == "+vfp3") 2690 FPU = VFP3FPU; 2691 else if (Features[i] == "+neon") 2692 FPU = NeonFPU; 2693 } 2694 2695 // Remove front-end specific options which the backend handles differently. 2696 std::vector<std::string>::iterator it; 2697 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2698 if (it != Features.end()) 2699 Features.erase(it); 2700 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2701 if (it != Features.end()) 2702 Features.erase(it); 2703 } 2704 2705 static const char *getCPUDefineSuffix(StringRef Name) { 2706 return llvm::StringSwitch<const char*>(Name) 2707 .Cases("arm8", "arm810", "4") 2708 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2709 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2710 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2711 .Case("ep9312", "4T") 2712 .Cases("arm10tdmi", "arm1020t", "5T") 2713 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2714 .Case("arm926ej-s", "5TEJ") 2715 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2716 .Cases("xscale", "iwmmxt", "5TE") 2717 .Case("arm1136j-s", "6J") 2718 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2719 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2720 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2721 .Cases("cortex-a8", "cortex-a9", "7A") 2722 .Case("cortex-m3", "7M") 2723 .Case("cortex-m0", "6M") 2724 .Default(0); 2725 } 2726 virtual bool setCPU(const std::string &Name) { 2727 if (!getCPUDefineSuffix(Name)) 2728 return false; 2729 2730 CPU = Name; 2731 return true; 2732 } 2733 virtual void getTargetDefines(const LangOptions &Opts, 2734 MacroBuilder &Builder) const { 2735 // Target identification. 2736 Builder.defineMacro("__arm"); 2737 Builder.defineMacro("__arm__"); 2738 2739 // Target properties. 2740 Builder.defineMacro("__ARMEL__"); 2741 Builder.defineMacro("__LITTLE_ENDIAN__"); 2742 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2743 2744 StringRef CPUArch = getCPUDefineSuffix(CPU); 2745 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2746 2747 // Subtarget options. 2748 2749 // FIXME: It's more complicated than this and we don't really support 2750 // interworking. 2751 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2752 Builder.defineMacro("__THUMB_INTERWORK__"); 2753 2754 if (ABI == "aapcs" || ABI == "aapcs-linux") 2755 Builder.defineMacro("__ARM_EABI__"); 2756 2757 if (SoftFloat) 2758 Builder.defineMacro("__SOFTFP__"); 2759 2760 if (CPU == "xscale") 2761 Builder.defineMacro("__XSCALE__"); 2762 2763 bool IsARMv7 = CPUArch.startswith("7"); 2764 if (IsThumb) { 2765 Builder.defineMacro("__THUMBEL__"); 2766 Builder.defineMacro("__thumb__"); 2767 if (CPUArch == "6T2" || IsARMv7) 2768 Builder.defineMacro("__thumb2__"); 2769 } 2770 2771 // Note, this is always on in gcc, even though it doesn't make sense. 2772 Builder.defineMacro("__APCS_32__"); 2773 2774 if (FPUModeIsVFP((FPUMode) FPU)) 2775 Builder.defineMacro("__VFP_FP__"); 2776 2777 // This only gets set when Neon instructions are actually available, unlike 2778 // the VFP define, hence the soft float and arch check. This is subtly 2779 // different from gcc, we follow the intent which was that it should be set 2780 // when Neon instructions are actually available. 2781 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2782 Builder.defineMacro("__ARM_NEON__"); 2783 } 2784 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2785 unsigned &NumRecords) const { 2786 Records = BuiltinInfo; 2787 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2788 } 2789 virtual bool isCLZForZeroUndef() const { return false; } 2790 virtual const char *getVAListDeclaration() const { 2791 return "typedef void* __builtin_va_list;"; 2792 } 2793 virtual void getGCCRegNames(const char * const *&Names, 2794 unsigned &NumNames) const; 2795 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2796 unsigned &NumAliases) const; 2797 virtual bool validateAsmConstraint(const char *&Name, 2798 TargetInfo::ConstraintInfo &Info) const { 2799 // FIXME: Check if this is complete 2800 switch (*Name) { 2801 default: 2802 case 'l': // r0-r7 2803 case 'h': // r8-r15 2804 case 'w': // VFP Floating point register single precision 2805 case 'P': // VFP Floating point register double precision 2806 Info.setAllowsRegister(); 2807 return true; 2808 case 'Q': // A memory address that is a single base register. 2809 Info.setAllowsMemory(); 2810 return true; 2811 case 'U': // a memory reference... 2812 switch (Name[1]) { 2813 case 'q': // ...ARMV4 ldrsb 2814 case 'v': // ...VFP load/store (reg+constant offset) 2815 case 'y': // ...iWMMXt load/store 2816 case 't': // address valid for load/store opaque types wider 2817 // than 128-bits 2818 case 'n': // valid address for Neon doubleword vector load/store 2819 case 'm': // valid address for Neon element and structure load/store 2820 case 's': // valid address for non-offset loads/stores of quad-word 2821 // values in four ARM registers 2822 Info.setAllowsMemory(); 2823 Name++; 2824 return true; 2825 } 2826 } 2827 return false; 2828 } 2829 virtual std::string convertConstraint(const char *&Constraint) const { 2830 std::string R; 2831 switch (*Constraint) { 2832 case 'U': // Two-character constraint; add "^" hint for later parsing. 2833 R = std::string("^") + std::string(Constraint, 2); 2834 Constraint++; 2835 break; 2836 case 'p': // 'p' should be translated to 'r' by default. 2837 R = std::string("r"); 2838 break; 2839 default: 2840 return std::string(1, *Constraint); 2841 } 2842 return R; 2843 } 2844 virtual const char *getClobbers() const { 2845 // FIXME: Is this really right? 2846 return ""; 2847 } 2848 }; 2849 2850 const char * const ARMTargetInfo::GCCRegNames[] = { 2851 // Integer registers 2852 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2853 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2854 2855 // Float registers 2856 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2857 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2858 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2859 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2860 2861 // Double registers 2862 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2863 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2864 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2865 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2866 2867 // Quad registers 2868 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2869 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2870 }; 2871 2872 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2873 unsigned &NumNames) const { 2874 Names = GCCRegNames; 2875 NumNames = llvm::array_lengthof(GCCRegNames); 2876 } 2877 2878 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2879 { { "a1" }, "r0" }, 2880 { { "a2" }, "r1" }, 2881 { { "a3" }, "r2" }, 2882 { { "a4" }, "r3" }, 2883 { { "v1" }, "r4" }, 2884 { { "v2" }, "r5" }, 2885 { { "v3" }, "r6" }, 2886 { { "v4" }, "r7" }, 2887 { { "v5" }, "r8" }, 2888 { { "v6", "rfp" }, "r9" }, 2889 { { "sl" }, "r10" }, 2890 { { "fp" }, "r11" }, 2891 { { "ip" }, "r12" }, 2892 { { "r13" }, "sp" }, 2893 { { "r14" }, "lr" }, 2894 { { "r15" }, "pc" }, 2895 // The S, D and Q registers overlap, but aren't really aliases; we 2896 // don't want to substitute one of these for a different-sized one. 2897 }; 2898 2899 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2900 unsigned &NumAliases) const { 2901 Aliases = GCCRegAliases; 2902 NumAliases = llvm::array_lengthof(GCCRegAliases); 2903 } 2904 2905 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2906 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2907 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2908 ALL_LANGUAGES }, 2909 #include "clang/Basic/BuiltinsARM.def" 2910 }; 2911 } // end anonymous namespace. 2912 2913 namespace { 2914 class DarwinARMTargetInfo : 2915 public DarwinTargetInfo<ARMTargetInfo> { 2916 protected: 2917 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2918 MacroBuilder &Builder) const { 2919 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2920 } 2921 2922 public: 2923 DarwinARMTargetInfo(const std::string& triple) 2924 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2925 HasAlignMac68kSupport = true; 2926 // iOS always has 64-bit atomic instructions. 2927 // FIXME: This should be based off of the target features in ARMTargetInfo. 2928 MaxAtomicInlineWidth = 64; 2929 } 2930 }; 2931 } // end anonymous namespace. 2932 2933 2934 namespace { 2935 // Hexagon abstract base class 2936 class HexagonTargetInfo : public TargetInfo { 2937 static const Builtin::Info BuiltinInfo[]; 2938 static const char * const GCCRegNames[]; 2939 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2940 std::string CPU; 2941 public: 2942 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 2943 BigEndian = false; 2944 DescriptionString = ("e-p:32:32:32-" 2945 "i64:64:64-i32:32:32-" 2946 "i16:16:16-i1:32:32-a:0:0"); 2947 2948 // {} in inline assembly are packet specifiers, not assembly variant 2949 // specifiers. 2950 NoAsmVariants = true; 2951 } 2952 2953 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2954 unsigned &NumRecords) const { 2955 Records = BuiltinInfo; 2956 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 2957 } 2958 2959 virtual bool validateAsmConstraint(const char *&Name, 2960 TargetInfo::ConstraintInfo &Info) const { 2961 return true; 2962 } 2963 2964 virtual void getTargetDefines(const LangOptions &Opts, 2965 MacroBuilder &Builder) const; 2966 2967 virtual const char *getVAListDeclaration() const { 2968 return "typedef char* __builtin_va_list;"; 2969 } 2970 virtual void getGCCRegNames(const char * const *&Names, 2971 unsigned &NumNames) const; 2972 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2973 unsigned &NumAliases) const; 2974 virtual const char *getClobbers() const { 2975 return ""; 2976 } 2977 2978 static const char *getHexagonCPUSuffix(StringRef Name) { 2979 return llvm::StringSwitch<const char*>(Name) 2980 .Case("hexagonv2", "2") 2981 .Case("hexagonv3", "3") 2982 .Case("hexagonv4", "4") 2983 .Default(0); 2984 } 2985 2986 virtual bool setCPU(const std::string &Name) { 2987 if (!getHexagonCPUSuffix(Name)) 2988 return false; 2989 2990 CPU = Name; 2991 return true; 2992 } 2993 }; 2994 2995 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 2996 MacroBuilder &Builder) const { 2997 Builder.defineMacro("qdsp6"); 2998 Builder.defineMacro("__qdsp6", "1"); 2999 Builder.defineMacro("__qdsp6__", "1"); 3000 3001 Builder.defineMacro("hexagon"); 3002 Builder.defineMacro("__hexagon", "1"); 3003 Builder.defineMacro("__hexagon__", "1"); 3004 3005 if(CPU == "hexagonv1") { 3006 Builder.defineMacro("__HEXAGON_V1__"); 3007 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 3008 if(Opts.HexagonQdsp6Compat) { 3009 Builder.defineMacro("__QDSP6_V1__"); 3010 Builder.defineMacro("__QDSP6_ARCH__", "1"); 3011 } 3012 } 3013 else if(CPU == "hexagonv2") { 3014 Builder.defineMacro("__HEXAGON_V2__"); 3015 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 3016 if(Opts.HexagonQdsp6Compat) { 3017 Builder.defineMacro("__QDSP6_V2__"); 3018 Builder.defineMacro("__QDSP6_ARCH__", "2"); 3019 } 3020 } 3021 else if(CPU == "hexagonv3") { 3022 Builder.defineMacro("__HEXAGON_V3__"); 3023 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 3024 if(Opts.HexagonQdsp6Compat) { 3025 Builder.defineMacro("__QDSP6_V3__"); 3026 Builder.defineMacro("__QDSP6_ARCH__", "3"); 3027 } 3028 } 3029 else if(CPU == "hexagonv4") { 3030 Builder.defineMacro("__HEXAGON_V4__"); 3031 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 3032 if(Opts.HexagonQdsp6Compat) { 3033 Builder.defineMacro("__QDSP6_V4__"); 3034 Builder.defineMacro("__QDSP6_ARCH__", "4"); 3035 } 3036 } 3037 } 3038 3039 const char * const HexagonTargetInfo::GCCRegNames[] = { 3040 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3041 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3042 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3043 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3044 "p0", "p1", "p2", "p3", 3045 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 3046 }; 3047 3048 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 3049 unsigned &NumNames) const { 3050 Names = GCCRegNames; 3051 NumNames = llvm::array_lengthof(GCCRegNames); 3052 } 3053 3054 3055 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 3056 { { "sp" }, "r29" }, 3057 { { "fp" }, "r30" }, 3058 { { "lr" }, "r31" }, 3059 }; 3060 3061 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3062 unsigned &NumAliases) const { 3063 Aliases = GCCRegAliases; 3064 NumAliases = llvm::array_lengthof(GCCRegAliases); 3065 } 3066 3067 3068 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 3069 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3070 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3071 ALL_LANGUAGES }, 3072 #include "clang/Basic/BuiltinsHexagon.def" 3073 }; 3074 } 3075 3076 3077 namespace { 3078 class SparcV8TargetInfo : public TargetInfo { 3079 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3080 static const char * const GCCRegNames[]; 3081 bool SoftFloat; 3082 public: 3083 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 3084 // FIXME: Support Sparc quad-precision long double? 3085 BigEndian = false; 3086 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 3087 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3088 } 3089 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3090 const std::string &Name, 3091 bool Enabled) const { 3092 if (Name == "soft-float") 3093 Features[Name] = Enabled; 3094 else 3095 return false; 3096 3097 return true; 3098 } 3099 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3100 SoftFloat = false; 3101 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3102 if (Features[i] == "+soft-float") 3103 SoftFloat = true; 3104 } 3105 virtual void getTargetDefines(const LangOptions &Opts, 3106 MacroBuilder &Builder) const { 3107 DefineStd(Builder, "sparc", Opts); 3108 Builder.defineMacro("__sparcv8"); 3109 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3110 3111 if (SoftFloat) 3112 Builder.defineMacro("SOFT_FLOAT", "1"); 3113 } 3114 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3115 unsigned &NumRecords) const { 3116 // FIXME: Implement! 3117 } 3118 virtual const char *getVAListDeclaration() const { 3119 return "typedef void* __builtin_va_list;"; 3120 } 3121 virtual void getGCCRegNames(const char * const *&Names, 3122 unsigned &NumNames) const; 3123 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3124 unsigned &NumAliases) const; 3125 virtual bool validateAsmConstraint(const char *&Name, 3126 TargetInfo::ConstraintInfo &info) const { 3127 // FIXME: Implement! 3128 return false; 3129 } 3130 virtual const char *getClobbers() const { 3131 // FIXME: Implement! 3132 return ""; 3133 } 3134 }; 3135 3136 const char * const SparcV8TargetInfo::GCCRegNames[] = { 3137 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3138 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3139 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3140 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3141 }; 3142 3143 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3144 unsigned &NumNames) const { 3145 Names = GCCRegNames; 3146 NumNames = llvm::array_lengthof(GCCRegNames); 3147 } 3148 3149 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3150 { { "g0" }, "r0" }, 3151 { { "g1" }, "r1" }, 3152 { { "g2" }, "r2" }, 3153 { { "g3" }, "r3" }, 3154 { { "g4" }, "r4" }, 3155 { { "g5" }, "r5" }, 3156 { { "g6" }, "r6" }, 3157 { { "g7" }, "r7" }, 3158 { { "o0" }, "r8" }, 3159 { { "o1" }, "r9" }, 3160 { { "o2" }, "r10" }, 3161 { { "o3" }, "r11" }, 3162 { { "o4" }, "r12" }, 3163 { { "o5" }, "r13" }, 3164 { { "o6", "sp" }, "r14" }, 3165 { { "o7" }, "r15" }, 3166 { { "l0" }, "r16" }, 3167 { { "l1" }, "r17" }, 3168 { { "l2" }, "r18" }, 3169 { { "l3" }, "r19" }, 3170 { { "l4" }, "r20" }, 3171 { { "l5" }, "r21" }, 3172 { { "l6" }, "r22" }, 3173 { { "l7" }, "r23" }, 3174 { { "i0" }, "r24" }, 3175 { { "i1" }, "r25" }, 3176 { { "i2" }, "r26" }, 3177 { { "i3" }, "r27" }, 3178 { { "i4" }, "r28" }, 3179 { { "i5" }, "r29" }, 3180 { { "i6", "fp" }, "r30" }, 3181 { { "i7" }, "r31" }, 3182 }; 3183 3184 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3185 unsigned &NumAliases) const { 3186 Aliases = GCCRegAliases; 3187 NumAliases = llvm::array_lengthof(GCCRegAliases); 3188 } 3189 } // end anonymous namespace. 3190 3191 namespace { 3192 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3193 public: 3194 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3195 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3196 SizeType = UnsignedInt; 3197 PtrDiffType = SignedInt; 3198 } 3199 }; 3200 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3201 public: 3202 SolarisSparcV8TargetInfo(const std::string& triple) : 3203 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3204 SizeType = UnsignedInt; 3205 PtrDiffType = SignedInt; 3206 } 3207 }; 3208 } // end anonymous namespace. 3209 3210 namespace { 3211 class MSP430TargetInfo : public TargetInfo { 3212 static const char * const GCCRegNames[]; 3213 public: 3214 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3215 BigEndian = false; 3216 TLSSupported = false; 3217 IntWidth = 16; IntAlign = 16; 3218 LongWidth = 32; LongLongWidth = 64; 3219 LongAlign = LongLongAlign = 16; 3220 PointerWidth = 16; PointerAlign = 16; 3221 SuitableAlign = 16; 3222 SizeType = UnsignedInt; 3223 IntMaxType = SignedLong; 3224 UIntMaxType = UnsignedLong; 3225 IntPtrType = SignedShort; 3226 PtrDiffType = SignedInt; 3227 SigAtomicType = SignedLong; 3228 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3229 } 3230 virtual void getTargetDefines(const LangOptions &Opts, 3231 MacroBuilder &Builder) const { 3232 Builder.defineMacro("MSP430"); 3233 Builder.defineMacro("__MSP430__"); 3234 // FIXME: defines for different 'flavours' of MCU 3235 } 3236 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3237 unsigned &NumRecords) const { 3238 // FIXME: Implement. 3239 Records = 0; 3240 NumRecords = 0; 3241 } 3242 virtual void getGCCRegNames(const char * const *&Names, 3243 unsigned &NumNames) const; 3244 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3245 unsigned &NumAliases) const { 3246 // No aliases. 3247 Aliases = 0; 3248 NumAliases = 0; 3249 } 3250 virtual bool validateAsmConstraint(const char *&Name, 3251 TargetInfo::ConstraintInfo &info) const { 3252 // No target constraints for now. 3253 return false; 3254 } 3255 virtual const char *getClobbers() const { 3256 // FIXME: Is this really right? 3257 return ""; 3258 } 3259 virtual const char *getVAListDeclaration() const { 3260 // FIXME: implement 3261 return "typedef char* __builtin_va_list;"; 3262 } 3263 }; 3264 3265 const char * const MSP430TargetInfo::GCCRegNames[] = { 3266 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3267 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3268 }; 3269 3270 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3271 unsigned &NumNames) const { 3272 Names = GCCRegNames; 3273 NumNames = llvm::array_lengthof(GCCRegNames); 3274 } 3275 } 3276 3277 namespace { 3278 3279 // LLVM and Clang cannot be used directly to output native binaries for 3280 // target, but is used to compile C code to llvm bitcode with correct 3281 // type and alignment information. 3282 // 3283 // TCE uses the llvm bitcode as input and uses it for generating customized 3284 // target processor and program binary. TCE co-design environment is 3285 // publicly available in http://tce.cs.tut.fi 3286 3287 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3288 3, // opencl_global 3289 4, // opencl_local 3290 5 // opencl_constant 3291 }; 3292 3293 class TCETargetInfo : public TargetInfo{ 3294 public: 3295 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3296 TLSSupported = false; 3297 IntWidth = 32; 3298 LongWidth = LongLongWidth = 32; 3299 PointerWidth = 32; 3300 IntAlign = 32; 3301 LongAlign = LongLongAlign = 32; 3302 PointerAlign = 32; 3303 SuitableAlign = 32; 3304 SizeType = UnsignedInt; 3305 IntMaxType = SignedLong; 3306 UIntMaxType = UnsignedLong; 3307 IntPtrType = SignedInt; 3308 PtrDiffType = SignedInt; 3309 FloatWidth = 32; 3310 FloatAlign = 32; 3311 DoubleWidth = 32; 3312 DoubleAlign = 32; 3313 LongDoubleWidth = 32; 3314 LongDoubleAlign = 32; 3315 FloatFormat = &llvm::APFloat::IEEEsingle; 3316 DoubleFormat = &llvm::APFloat::IEEEsingle; 3317 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3318 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3319 "i16:16:32-i32:32:32-i64:32:32-" 3320 "f32:32:32-f64:32:32-v64:32:32-" 3321 "v128:32:32-a0:0:32-n32"; 3322 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3323 } 3324 3325 virtual void getTargetDefines(const LangOptions &Opts, 3326 MacroBuilder &Builder) const { 3327 DefineStd(Builder, "tce", Opts); 3328 Builder.defineMacro("__TCE__"); 3329 Builder.defineMacro("__TCE_V1__"); 3330 } 3331 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3332 unsigned &NumRecords) const {} 3333 virtual const char *getClobbers() const { 3334 return ""; 3335 } 3336 virtual const char *getVAListDeclaration() const { 3337 return "typedef void* __builtin_va_list;"; 3338 } 3339 virtual void getGCCRegNames(const char * const *&Names, 3340 unsigned &NumNames) const {} 3341 virtual bool validateAsmConstraint(const char *&Name, 3342 TargetInfo::ConstraintInfo &info) const { 3343 return true; 3344 } 3345 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3346 unsigned &NumAliases) const {} 3347 }; 3348 } 3349 3350 namespace { 3351 class MipsTargetInfoBase : public TargetInfo { 3352 std::string CPU; 3353 protected: 3354 std::string ABI; 3355 public: 3356 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3357 : TargetInfo(triple), ABI(ABIStr) {} 3358 virtual const char *getABI() const { return ABI.c_str(); } 3359 virtual bool setABI(const std::string &Name) = 0; 3360 virtual bool setCPU(const std::string &Name) { 3361 CPU = Name; 3362 return true; 3363 } 3364 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3365 Features[ABI] = true; 3366 Features[CPU] = true; 3367 } 3368 virtual void getArchDefines(const LangOptions &Opts, 3369 MacroBuilder &Builder) const = 0; 3370 virtual void getTargetDefines(const LangOptions &Opts, 3371 MacroBuilder &Builder) const = 0; 3372 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3373 unsigned &NumRecords) const { 3374 // FIXME: Implement! 3375 } 3376 virtual const char *getVAListDeclaration() const { 3377 return "typedef void* __builtin_va_list;"; 3378 } 3379 virtual void getGCCRegNames(const char * const *&Names, 3380 unsigned &NumNames) const { 3381 static const char * const GCCRegNames[] = { 3382 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3383 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3384 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3385 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3386 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3387 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3388 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3389 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3390 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3391 "$fcc5","$fcc6","$fcc7" 3392 }; 3393 Names = GCCRegNames; 3394 NumNames = llvm::array_lengthof(GCCRegNames); 3395 } 3396 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3397 unsigned &NumAliases) const = 0; 3398 virtual bool validateAsmConstraint(const char *&Name, 3399 TargetInfo::ConstraintInfo &Info) const { 3400 switch (*Name) { 3401 default: 3402 return false; 3403 3404 case 'r': // CPU registers. 3405 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3406 case 'y': // Equivalent to "r", backwards compatibility only. 3407 case 'f': // floating-point registers. 3408 Info.setAllowsRegister(); 3409 return true; 3410 } 3411 } 3412 3413 virtual const char *getClobbers() const { 3414 // FIXME: Implement! 3415 return ""; 3416 } 3417 }; 3418 3419 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3420 public: 3421 Mips32TargetInfoBase(const std::string& triple) : 3422 MipsTargetInfoBase(triple, "o32") { 3423 SizeType = UnsignedInt; 3424 PtrDiffType = SignedInt; 3425 } 3426 virtual bool setABI(const std::string &Name) { 3427 if ((Name == "o32") || (Name == "eabi")) { 3428 ABI = Name; 3429 return true; 3430 } else 3431 return false; 3432 } 3433 virtual void getArchDefines(const LangOptions &Opts, 3434 MacroBuilder &Builder) const { 3435 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3436 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3437 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3438 3439 if (ABI == "o32") { 3440 Builder.defineMacro("__mips_o32"); 3441 Builder.defineMacro("_ABIO32", "1"); 3442 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3443 } 3444 else if (ABI == "eabi") 3445 Builder.defineMacro("__mips_eabi"); 3446 else 3447 llvm_unreachable("Invalid ABI for Mips32."); 3448 } 3449 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3450 unsigned &NumAliases) const { 3451 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3452 { { "at" }, "$1" }, 3453 { { "v0" }, "$2" }, 3454 { { "v1" }, "$3" }, 3455 { { "a0" }, "$4" }, 3456 { { "a1" }, "$5" }, 3457 { { "a2" }, "$6" }, 3458 { { "a3" }, "$7" }, 3459 { { "t0" }, "$8" }, 3460 { { "t1" }, "$9" }, 3461 { { "t2" }, "$10" }, 3462 { { "t3" }, "$11" }, 3463 { { "t4" }, "$12" }, 3464 { { "t5" }, "$13" }, 3465 { { "t6" }, "$14" }, 3466 { { "t7" }, "$15" }, 3467 { { "s0" }, "$16" }, 3468 { { "s1" }, "$17" }, 3469 { { "s2" }, "$18" }, 3470 { { "s3" }, "$19" }, 3471 { { "s4" }, "$20" }, 3472 { { "s5" }, "$21" }, 3473 { { "s6" }, "$22" }, 3474 { { "s7" }, "$23" }, 3475 { { "t8" }, "$24" }, 3476 { { "t9" }, "$25" }, 3477 { { "k0" }, "$26" }, 3478 { { "k1" }, "$27" }, 3479 { { "gp" }, "$28" }, 3480 { { "sp" }, "$29" }, 3481 { { "fp" }, "$30" }, 3482 { { "ra" }, "$31" } 3483 }; 3484 Aliases = GCCRegAliases; 3485 NumAliases = llvm::array_lengthof(GCCRegAliases); 3486 } 3487 }; 3488 3489 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3490 public: 3491 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3492 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3493 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3494 } 3495 virtual void getTargetDefines(const LangOptions &Opts, 3496 MacroBuilder &Builder) const { 3497 DefineStd(Builder, "mips", Opts); 3498 Builder.defineMacro("_mips"); 3499 DefineStd(Builder, "MIPSEB", Opts); 3500 Builder.defineMacro("_MIPSEB"); 3501 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3502 getArchDefines(Opts, Builder); 3503 } 3504 }; 3505 3506 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3507 public: 3508 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3509 BigEndian = false; 3510 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3511 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3512 } 3513 virtual void getTargetDefines(const LangOptions &Opts, 3514 MacroBuilder &Builder) const { 3515 DefineStd(Builder, "mips", Opts); 3516 Builder.defineMacro("_mips"); 3517 DefineStd(Builder, "MIPSEL", Opts); 3518 Builder.defineMacro("_MIPSEL"); 3519 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3520 getArchDefines(Opts, Builder); 3521 } 3522 }; 3523 3524 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3525 virtual void SetDescriptionString(const std::string &Name) = 0; 3526 public: 3527 Mips64TargetInfoBase(const std::string& triple) : 3528 MipsTargetInfoBase(triple, "n64") { 3529 LongWidth = LongAlign = 64; 3530 PointerWidth = PointerAlign = 64; 3531 LongDoubleWidth = LongDoubleAlign = 128; 3532 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3533 SuitableAlign = 128; 3534 } 3535 virtual bool setABI(const std::string &Name) { 3536 SetDescriptionString(Name); 3537 3538 if (Name != "n32" && Name != "n64") 3539 return false; 3540 3541 ABI = Name; 3542 3543 if (Name == "n32") { 3544 LongWidth = LongAlign = 32; 3545 PointerWidth = PointerAlign = 32; 3546 } 3547 3548 return true; 3549 } 3550 virtual void getArchDefines(const LangOptions &Opts, 3551 MacroBuilder &Builder) const { 3552 if (ABI == "n32") { 3553 Builder.defineMacro("__mips_n32"); 3554 Builder.defineMacro("_ABIN32", "2"); 3555 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3556 } 3557 else if (ABI == "n64") { 3558 Builder.defineMacro("__mips_n64"); 3559 Builder.defineMacro("_ABI64", "3"); 3560 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3561 } 3562 else 3563 llvm_unreachable("Invalid ABI for Mips64."); 3564 } 3565 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3566 unsigned &NumAliases) const { 3567 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3568 { { "at" }, "$1" }, 3569 { { "v0" }, "$2" }, 3570 { { "v1" }, "$3" }, 3571 { { "a0" }, "$4" }, 3572 { { "a1" }, "$5" }, 3573 { { "a2" }, "$6" }, 3574 { { "a3" }, "$7" }, 3575 { { "a4" }, "$8" }, 3576 { { "a5" }, "$9" }, 3577 { { "a6" }, "$10" }, 3578 { { "a7" }, "$11" }, 3579 { { "t0" }, "$12" }, 3580 { { "t1" }, "$13" }, 3581 { { "t2" }, "$14" }, 3582 { { "t3" }, "$15" }, 3583 { { "s0" }, "$16" }, 3584 { { "s1" }, "$17" }, 3585 { { "s2" }, "$18" }, 3586 { { "s3" }, "$19" }, 3587 { { "s4" }, "$20" }, 3588 { { "s5" }, "$21" }, 3589 { { "s6" }, "$22" }, 3590 { { "s7" }, "$23" }, 3591 { { "t8" }, "$24" }, 3592 { { "t9" }, "$25" }, 3593 { { "k0" }, "$26" }, 3594 { { "k1" }, "$27" }, 3595 { { "gp" }, "$28" }, 3596 { { "sp" }, "$29" }, 3597 { { "fp" }, "$30" }, 3598 { { "ra" }, "$31" } 3599 }; 3600 Aliases = GCCRegAliases; 3601 NumAliases = llvm::array_lengthof(GCCRegAliases); 3602 } 3603 }; 3604 3605 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3606 virtual void SetDescriptionString(const std::string &Name) { 3607 // Change DescriptionString only if ABI is n32. 3608 if (Name == "n32") 3609 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3610 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3611 "v64:64:64-n32"; 3612 } 3613 public: 3614 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3615 // Default ABI is n64. 3616 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3617 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3618 "v64:64:64-n32"; 3619 } 3620 virtual void getTargetDefines(const LangOptions &Opts, 3621 MacroBuilder &Builder) const { 3622 DefineStd(Builder, "mips", Opts); 3623 Builder.defineMacro("_mips"); 3624 DefineStd(Builder, "MIPSEB", Opts); 3625 Builder.defineMacro("_MIPSEB"); 3626 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3627 getArchDefines(Opts, Builder); 3628 } 3629 }; 3630 3631 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3632 virtual void SetDescriptionString(const std::string &Name) { 3633 // Change DescriptionString only if ABI is n32. 3634 if (Name == "n32") 3635 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3636 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3637 "-v64:64:64-n32"; 3638 } 3639 public: 3640 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3641 // Default ABI is n64. 3642 BigEndian = false; 3643 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3644 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3645 "v64:64:64-n32"; 3646 } 3647 virtual void getTargetDefines(const LangOptions &Opts, 3648 MacroBuilder &Builder) const { 3649 DefineStd(Builder, "mips", Opts); 3650 Builder.defineMacro("_mips"); 3651 DefineStd(Builder, "MIPSEL", Opts); 3652 Builder.defineMacro("_MIPSEL"); 3653 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3654 getArchDefines(Opts, Builder); 3655 } 3656 }; 3657 } // end anonymous namespace. 3658 3659 namespace { 3660 class PNaClTargetInfo : public TargetInfo { 3661 public: 3662 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3663 BigEndian = false; 3664 this->UserLabelPrefix = ""; 3665 this->LongAlign = 32; 3666 this->LongWidth = 32; 3667 this->PointerAlign = 32; 3668 this->PointerWidth = 32; 3669 this->IntMaxType = TargetInfo::SignedLongLong; 3670 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3671 this->Int64Type = TargetInfo::SignedLongLong; 3672 this->DoubleAlign = 64; 3673 this->LongDoubleWidth = 64; 3674 this->LongDoubleAlign = 64; 3675 this->SizeType = TargetInfo::UnsignedInt; 3676 this->PtrDiffType = TargetInfo::SignedInt; 3677 this->IntPtrType = TargetInfo::SignedInt; 3678 this->RegParmMax = 2; 3679 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3680 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3681 } 3682 3683 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3684 } 3685 virtual void getArchDefines(const LangOptions &Opts, 3686 MacroBuilder &Builder) const { 3687 Builder.defineMacro("__le32__"); 3688 Builder.defineMacro("__pnacl__"); 3689 } 3690 virtual void getTargetDefines(const LangOptions &Opts, 3691 MacroBuilder &Builder) const { 3692 DefineStd(Builder, "unix", Opts); 3693 Builder.defineMacro("__ELF__"); 3694 if (Opts.POSIXThreads) 3695 Builder.defineMacro("_REENTRANT"); 3696 if (Opts.CPlusPlus) 3697 Builder.defineMacro("_GNU_SOURCE"); 3698 3699 Builder.defineMacro("__native_client__"); 3700 getArchDefines(Opts, Builder); 3701 } 3702 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3703 unsigned &NumRecords) const { 3704 } 3705 virtual const char *getVAListDeclaration() const { 3706 return "typedef int __builtin_va_list[4];"; 3707 } 3708 virtual void getGCCRegNames(const char * const *&Names, 3709 unsigned &NumNames) const; 3710 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3711 unsigned &NumAliases) const; 3712 virtual bool validateAsmConstraint(const char *&Name, 3713 TargetInfo::ConstraintInfo &Info) const { 3714 return false; 3715 } 3716 3717 virtual const char *getClobbers() const { 3718 return ""; 3719 } 3720 }; 3721 3722 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3723 unsigned &NumNames) const { 3724 Names = NULL; 3725 NumNames = 0; 3726 } 3727 3728 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3729 unsigned &NumAliases) const { 3730 Aliases = NULL; 3731 NumAliases = 0; 3732 } 3733 } // end anonymous namespace. 3734 3735 3736 //===----------------------------------------------------------------------===// 3737 // Driver code 3738 //===----------------------------------------------------------------------===// 3739 3740 static TargetInfo *AllocateTarget(const std::string &T) { 3741 llvm::Triple Triple(T); 3742 llvm::Triple::OSType os = Triple.getOS(); 3743 3744 switch (Triple.getArch()) { 3745 default: 3746 return NULL; 3747 3748 case llvm::Triple::hexagon: 3749 return new HexagonTargetInfo(T); 3750 3751 case llvm::Triple::arm: 3752 case llvm::Triple::thumb: 3753 if (Triple.isOSDarwin()) 3754 return new DarwinARMTargetInfo(T); 3755 3756 switch (os) { 3757 case llvm::Triple::Linux: 3758 return new LinuxTargetInfo<ARMTargetInfo>(T); 3759 case llvm::Triple::FreeBSD: 3760 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3761 case llvm::Triple::NetBSD: 3762 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3763 case llvm::Triple::RTEMS: 3764 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3765 default: 3766 return new ARMTargetInfo(T); 3767 } 3768 3769 case llvm::Triple::msp430: 3770 return new MSP430TargetInfo(T); 3771 3772 case llvm::Triple::mips: 3773 switch (os) { 3774 case llvm::Triple::Linux: 3775 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3776 case llvm::Triple::RTEMS: 3777 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3778 case llvm::Triple::FreeBSD: 3779 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3780 case llvm::Triple::NetBSD: 3781 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3782 default: 3783 return new Mips32EBTargetInfo(T); 3784 } 3785 3786 case llvm::Triple::mipsel: 3787 switch (os) { 3788 case llvm::Triple::Linux: 3789 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3790 case llvm::Triple::RTEMS: 3791 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3792 case llvm::Triple::FreeBSD: 3793 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3794 case llvm::Triple::NetBSD: 3795 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3796 default: 3797 return new Mips32ELTargetInfo(T); 3798 } 3799 3800 case llvm::Triple::mips64: 3801 switch (os) { 3802 case llvm::Triple::Linux: 3803 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3804 case llvm::Triple::RTEMS: 3805 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3806 case llvm::Triple::FreeBSD: 3807 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3808 case llvm::Triple::NetBSD: 3809 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3810 default: 3811 return new Mips64EBTargetInfo(T); 3812 } 3813 3814 case llvm::Triple::mips64el: 3815 switch (os) { 3816 case llvm::Triple::Linux: 3817 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3818 case llvm::Triple::RTEMS: 3819 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3820 case llvm::Triple::FreeBSD: 3821 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3822 case llvm::Triple::NetBSD: 3823 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3824 default: 3825 return new Mips64ELTargetInfo(T); 3826 } 3827 3828 case llvm::Triple::le32: 3829 switch (os) { 3830 case llvm::Triple::NativeClient: 3831 return new PNaClTargetInfo(T); 3832 default: 3833 return NULL; 3834 } 3835 3836 case llvm::Triple::ppc: 3837 if (Triple.isOSDarwin()) 3838 return new DarwinPPC32TargetInfo(T); 3839 switch (os) { 3840 case llvm::Triple::Linux: 3841 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3842 case llvm::Triple::FreeBSD: 3843 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3844 case llvm::Triple::NetBSD: 3845 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3846 case llvm::Triple::RTEMS: 3847 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3848 default: 3849 return new PPC32TargetInfo(T); 3850 } 3851 3852 case llvm::Triple::ppc64: 3853 if (Triple.isOSDarwin()) 3854 return new DarwinPPC64TargetInfo(T); 3855 switch (os) { 3856 case llvm::Triple::Linux: 3857 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3858 case llvm::Triple::Lv2: 3859 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3860 case llvm::Triple::FreeBSD: 3861 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3862 case llvm::Triple::NetBSD: 3863 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3864 default: 3865 return new PPC64TargetInfo(T); 3866 } 3867 3868 case llvm::Triple::ptx32: 3869 return new PTX32TargetInfo(T); 3870 case llvm::Triple::ptx64: 3871 return new PTX64TargetInfo(T); 3872 3873 case llvm::Triple::mblaze: 3874 return new MBlazeTargetInfo(T); 3875 3876 case llvm::Triple::sparc: 3877 switch (os) { 3878 case llvm::Triple::Linux: 3879 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3880 case llvm::Triple::AuroraUX: 3881 return new AuroraUXSparcV8TargetInfo(T); 3882 case llvm::Triple::Solaris: 3883 return new SolarisSparcV8TargetInfo(T); 3884 case llvm::Triple::NetBSD: 3885 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3886 case llvm::Triple::RTEMS: 3887 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3888 default: 3889 return new SparcV8TargetInfo(T); 3890 } 3891 3892 // FIXME: Need a real SPU target. 3893 case llvm::Triple::cellspu: 3894 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3895 3896 case llvm::Triple::tce: 3897 return new TCETargetInfo(T); 3898 3899 case llvm::Triple::x86: 3900 if (Triple.isOSDarwin()) 3901 return new DarwinI386TargetInfo(T); 3902 3903 switch (os) { 3904 case llvm::Triple::AuroraUX: 3905 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3906 case llvm::Triple::Linux: 3907 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3908 case llvm::Triple::DragonFly: 3909 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3910 case llvm::Triple::NetBSD: 3911 return new NetBSDI386TargetInfo(T); 3912 case llvm::Triple::OpenBSD: 3913 return new OpenBSDI386TargetInfo(T); 3914 case llvm::Triple::FreeBSD: 3915 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3916 case llvm::Triple::Minix: 3917 return new MinixTargetInfo<X86_32TargetInfo>(T); 3918 case llvm::Triple::Solaris: 3919 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3920 case llvm::Triple::Cygwin: 3921 return new CygwinX86_32TargetInfo(T); 3922 case llvm::Triple::MinGW32: 3923 return new MinGWX86_32TargetInfo(T); 3924 case llvm::Triple::Win32: 3925 return new VisualStudioWindowsX86_32TargetInfo(T); 3926 case llvm::Triple::Haiku: 3927 return new HaikuX86_32TargetInfo(T); 3928 case llvm::Triple::RTEMS: 3929 return new RTEMSX86_32TargetInfo(T); 3930 default: 3931 return new X86_32TargetInfo(T); 3932 } 3933 3934 case llvm::Triple::x86_64: 3935 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3936 return new DarwinX86_64TargetInfo(T); 3937 3938 switch (os) { 3939 case llvm::Triple::AuroraUX: 3940 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3941 case llvm::Triple::Linux: 3942 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3943 case llvm::Triple::DragonFly: 3944 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3945 case llvm::Triple::NetBSD: 3946 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3947 case llvm::Triple::OpenBSD: 3948 return new OpenBSDX86_64TargetInfo(T); 3949 case llvm::Triple::FreeBSD: 3950 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3951 case llvm::Triple::Solaris: 3952 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3953 case llvm::Triple::MinGW32: 3954 return new MinGWX86_64TargetInfo(T); 3955 case llvm::Triple::Win32: // This is what Triple.h supports now. 3956 return new VisualStudioWindowsX86_64TargetInfo(T); 3957 default: 3958 return new X86_64TargetInfo(T); 3959 } 3960 } 3961 } 3962 3963 /// CreateTargetInfo - Return the target info object for the specified target 3964 /// triple. 3965 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3966 TargetOptions &Opts) { 3967 llvm::Triple Triple(Opts.Triple); 3968 3969 // Construct the target 3970 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3971 if (!Target) { 3972 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3973 return 0; 3974 } 3975 3976 // Set the target CPU if specified. 3977 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3978 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3979 return 0; 3980 } 3981 3982 // Set the target ABI if specified. 3983 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3984 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3985 return 0; 3986 } 3987 3988 // Set the target C++ ABI. 3989 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3990 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3991 return 0; 3992 } 3993 3994 // Compute the default target features, we need the target to handle this 3995 // because features may have dependencies on one another. 3996 llvm::StringMap<bool> Features; 3997 Target->getDefaultFeatures(Features); 3998 3999 // Apply the user specified deltas. 4000 // First the enables. 4001 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4002 ie = Opts.Features.end(); it != ie; ++it) { 4003 const char *Name = it->c_str(); 4004 4005 if (Name[0] != '+') 4006 continue; 4007 4008 // Apply the feature via the target. 4009 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 4010 Diags.Report(diag::err_target_invalid_feature) << Name; 4011 return 0; 4012 } 4013 } 4014 4015 // Then the disables. 4016 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4017 ie = Opts.Features.end(); it != ie; ++it) { 4018 const char *Name = it->c_str(); 4019 4020 if (Name[0] == '+') 4021 continue; 4022 4023 // Apply the feature via the target. 4024 if (Name[0] != '-' || 4025 !Target->setFeatureEnabled(Features, Name + 1, false)) { 4026 Diags.Report(diag::err_target_invalid_feature) << Name; 4027 return 0; 4028 } 4029 } 4030 4031 // Add the features to the compile options. 4032 // 4033 // FIXME: If we are completely confident that we have the right set, we only 4034 // need to pass the minuses. 4035 Opts.Features.clear(); 4036 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 4037 ie = Features.end(); it != ie; ++it) 4038 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 4039 it->first().str()); 4040 Target->HandleTargetFeatures(Opts.Features); 4041 4042 return Target.take(); 4043 } 4044