1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, 58 bool Tuning = true) { 59 Builder.defineMacro("__" + CPUName); 60 Builder.defineMacro("__" + CPUName + "__"); 61 if (Tuning) 62 Builder.defineMacro("__tune_" + CPUName + "__"); 63 } 64 65 //===----------------------------------------------------------------------===// 66 // Defines specific to certain operating systems. 67 //===----------------------------------------------------------------------===// 68 69 namespace { 70 template<typename TgtInfo> 71 class OSTargetInfo : public TgtInfo { 72 protected: 73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 74 MacroBuilder &Builder) const=0; 75 public: 76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 77 virtual void getTargetDefines(const LangOptions &Opts, 78 MacroBuilder &Builder) const { 79 TgtInfo::getTargetDefines(Opts, Builder); 80 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 81 } 82 83 }; 84 } // end anonymous namespace 85 86 87 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 88 const llvm::Triple &Triple, 89 StringRef &PlatformName, 90 VersionTuple &PlatformMinVersion) { 91 Builder.defineMacro("__APPLE_CC__", "5621"); 92 Builder.defineMacro("__APPLE__"); 93 Builder.defineMacro("__MACH__"); 94 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 95 96 if (!Opts.ObjCAutoRefCount) { 97 // __weak is always defined, for use in blocks and with objc pointers. 98 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 99 100 // Darwin defines __strong even in C mode (just to nothing). 101 if (Opts.getGC() != LangOptions::NonGC) 102 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 103 else 104 Builder.defineMacro("__strong", ""); 105 106 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 107 // allow this in C, since one might have block pointers in structs that 108 // are used in pure C code and in Objective-C ARC. 109 Builder.defineMacro("__unsafe_unretained", ""); 110 } 111 112 if (Opts.Static) 113 Builder.defineMacro("__STATIC__"); 114 else 115 Builder.defineMacro("__DYNAMIC__"); 116 117 if (Opts.POSIXThreads) 118 Builder.defineMacro("_REENTRANT"); 119 120 // Get the platform type and version number from the triple. 121 unsigned Maj, Min, Rev; 122 123 // If no version was given, default to to 10.4.0, for simplifying tests. 124 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 125 PlatformName = "macosx"; 126 Min = Rev = 0; 127 Maj = 8; 128 } else { 129 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 130 // "-osxNNN", and "-iosNNN"). 131 132 if (Triple.getOS() == llvm::Triple::Darwin) { 133 // For historical reasons that make little sense, the version passed here 134 // is the "darwin" version, which drops the 10 and offsets by 4. 135 Triple.getOSVersion(Maj, Min, Rev); 136 137 if (Triple.getEnvironmentName() == "iphoneos") { 138 PlatformName = "ios"; 139 } else { 140 PlatformName = "macosx"; 141 Rev = Min; 142 Min = Maj - 4; 143 Maj = 10; 144 } 145 } else { 146 Triple.getOSVersion(Maj, Min, Rev); 147 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 148 } 149 } 150 151 // If -target arch-pc-win32-macho option specified, we're 152 // generating code for Win32 ABI. No need to emit 153 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 154 if (PlatformName == "win32") { 155 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 156 return; 157 } 158 159 // Set the appropriate OS version define. 160 if (PlatformName == "ios") { 161 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 162 char Str[6]; 163 Str[0] = '0' + Maj; 164 Str[1] = '0' + (Min / 10); 165 Str[2] = '0' + (Min % 10); 166 Str[3] = '0' + (Rev / 10); 167 Str[4] = '0' + (Rev % 10); 168 Str[5] = '\0'; 169 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 170 } else { 171 // Note that the Driver allows versions which aren't representable in the 172 // define (because we only get a single digit for the minor and micro 173 // revision numbers). So, we limit them to the maximum representable 174 // version. 175 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 176 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 177 char Str[5]; 178 Str[0] = '0' + (Maj / 10); 179 Str[1] = '0' + (Maj % 10); 180 Str[2] = '0' + std::min(Min, 9U); 181 Str[3] = '0' + std::min(Rev, 9U); 182 Str[4] = '\0'; 183 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 184 } 185 186 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 187 } 188 189 namespace { 190 template<typename Target> 191 class DarwinTargetInfo : public OSTargetInfo<Target> { 192 protected: 193 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 194 MacroBuilder &Builder) const { 195 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 196 this->PlatformMinVersion); 197 } 198 199 public: 200 DarwinTargetInfo(const std::string& triple) : 201 OSTargetInfo<Target>(triple) { 202 llvm::Triple T = llvm::Triple(triple); 203 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 204 this->MCountName = "\01mcount"; 205 } 206 207 virtual std::string isValidSectionSpecifier(StringRef SR) const { 208 // Let MCSectionMachO validate this. 209 StringRef Segment, Section; 210 unsigned TAA, StubSize; 211 bool HasTAA; 212 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 213 TAA, HasTAA, StubSize); 214 } 215 216 virtual const char *getStaticInitSectionSpecifier() const { 217 // FIXME: We should return 0 when building kexts. 218 return "__TEXT,__StaticInit,regular,pure_instructions"; 219 } 220 221 }; 222 223 224 // DragonFlyBSD Target 225 template<typename Target> 226 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 227 protected: 228 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 229 MacroBuilder &Builder) const { 230 // DragonFly defines; list based off of gcc output 231 Builder.defineMacro("__DragonFly__"); 232 Builder.defineMacro("__DragonFly_cc_version", "100001"); 233 Builder.defineMacro("__ELF__"); 234 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 235 Builder.defineMacro("__tune_i386__"); 236 DefineStd(Builder, "unix", Opts); 237 } 238 public: 239 DragonFlyBSDTargetInfo(const std::string &triple) 240 : OSTargetInfo<Target>(triple) {} 241 }; 242 243 // FreeBSD Target 244 template<typename Target> 245 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 246 protected: 247 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 248 MacroBuilder &Builder) const { 249 // FreeBSD defines; list based off of gcc output 250 251 unsigned Release = Triple.getOSMajorVersion(); 252 if (Release == 0U) 253 Release = 8; 254 255 Builder.defineMacro("__FreeBSD__", Twine(Release)); 256 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 257 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 258 DefineStd(Builder, "unix", Opts); 259 Builder.defineMacro("__ELF__"); 260 } 261 public: 262 FreeBSDTargetInfo(const std::string &triple) 263 : OSTargetInfo<Target>(triple) { 264 this->UserLabelPrefix = ""; 265 266 llvm::Triple Triple(triple); 267 switch (Triple.getArch()) { 268 default: 269 case llvm::Triple::x86: 270 case llvm::Triple::x86_64: 271 this->MCountName = ".mcount"; 272 break; 273 case llvm::Triple::mips: 274 case llvm::Triple::mipsel: 275 case llvm::Triple::ppc: 276 case llvm::Triple::ppc64: 277 this->MCountName = "_mcount"; 278 break; 279 case llvm::Triple::arm: 280 this->MCountName = "__mcount"; 281 break; 282 } 283 284 } 285 }; 286 287 // Minix Target 288 template<typename Target> 289 class MinixTargetInfo : public OSTargetInfo<Target> { 290 protected: 291 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 292 MacroBuilder &Builder) const { 293 // Minix defines 294 295 Builder.defineMacro("__minix", "3"); 296 Builder.defineMacro("_EM_WSIZE", "4"); 297 Builder.defineMacro("_EM_PSIZE", "4"); 298 Builder.defineMacro("_EM_SSIZE", "2"); 299 Builder.defineMacro("_EM_LSIZE", "4"); 300 Builder.defineMacro("_EM_FSIZE", "4"); 301 Builder.defineMacro("_EM_DSIZE", "8"); 302 Builder.defineMacro("__ELF__"); 303 DefineStd(Builder, "unix", Opts); 304 } 305 public: 306 MinixTargetInfo(const std::string &triple) 307 : OSTargetInfo<Target>(triple) { 308 this->UserLabelPrefix = ""; 309 } 310 }; 311 312 // Linux target 313 template<typename Target> 314 class LinuxTargetInfo : public OSTargetInfo<Target> { 315 protected: 316 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 317 MacroBuilder &Builder) const { 318 // Linux defines; list based off of gcc output 319 DefineStd(Builder, "unix", Opts); 320 DefineStd(Builder, "linux", Opts); 321 Builder.defineMacro("__gnu_linux__"); 322 Builder.defineMacro("__ELF__"); 323 if (Opts.POSIXThreads) 324 Builder.defineMacro("_REENTRANT"); 325 if (Opts.CPlusPlus) 326 Builder.defineMacro("_GNU_SOURCE"); 327 } 328 public: 329 LinuxTargetInfo(const std::string& triple) 330 : OSTargetInfo<Target>(triple) { 331 this->UserLabelPrefix = ""; 332 this->WIntType = TargetInfo::UnsignedInt; 333 } 334 335 virtual const char *getStaticInitSectionSpecifier() const { 336 return ".text.startup"; 337 } 338 }; 339 340 // NetBSD Target 341 template<typename Target> 342 class NetBSDTargetInfo : public OSTargetInfo<Target> { 343 protected: 344 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 345 MacroBuilder &Builder) const { 346 // NetBSD defines; list based off of gcc output 347 Builder.defineMacro("__NetBSD__"); 348 Builder.defineMacro("__unix__"); 349 Builder.defineMacro("__ELF__"); 350 if (Opts.POSIXThreads) 351 Builder.defineMacro("_POSIX_THREADS"); 352 } 353 public: 354 NetBSDTargetInfo(const std::string &triple) 355 : OSTargetInfo<Target>(triple) { 356 this->UserLabelPrefix = ""; 357 } 358 }; 359 360 // OpenBSD Target 361 template<typename Target> 362 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 363 protected: 364 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 365 MacroBuilder &Builder) const { 366 // OpenBSD defines; list based off of gcc output 367 368 Builder.defineMacro("__OpenBSD__"); 369 DefineStd(Builder, "unix", Opts); 370 Builder.defineMacro("__ELF__"); 371 if (Opts.POSIXThreads) 372 Builder.defineMacro("_POSIX_THREADS"); 373 } 374 public: 375 OpenBSDTargetInfo(const std::string &triple) 376 : OSTargetInfo<Target>(triple) { 377 this->UserLabelPrefix = ""; 378 379 llvm::Triple Triple(triple); 380 switch (Triple.getArch()) { 381 default: 382 case llvm::Triple::x86: 383 case llvm::Triple::x86_64: 384 case llvm::Triple::arm: 385 case llvm::Triple::sparc: 386 this->MCountName = "__mcount"; 387 break; 388 case llvm::Triple::mips64: 389 case llvm::Triple::mips64el: 390 case llvm::Triple::ppc: 391 case llvm::Triple::sparcv9: 392 this->MCountName = "_mcount"; 393 break; 394 } 395 } 396 }; 397 398 // PSP Target 399 template<typename Target> 400 class PSPTargetInfo : public OSTargetInfo<Target> { 401 protected: 402 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 403 MacroBuilder &Builder) const { 404 // PSP defines; list based on the output of the pspdev gcc toolchain. 405 Builder.defineMacro("PSP"); 406 Builder.defineMacro("_PSP"); 407 Builder.defineMacro("__psp__"); 408 Builder.defineMacro("__ELF__"); 409 } 410 public: 411 PSPTargetInfo(const std::string& triple) 412 : OSTargetInfo<Target>(triple) { 413 this->UserLabelPrefix = ""; 414 } 415 }; 416 417 // PS3 PPU Target 418 template<typename Target> 419 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 420 protected: 421 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 422 MacroBuilder &Builder) const { 423 // PS3 PPU defines. 424 Builder.defineMacro("__PPC__"); 425 Builder.defineMacro("__PPU__"); 426 Builder.defineMacro("__CELLOS_LV2__"); 427 Builder.defineMacro("__ELF__"); 428 Builder.defineMacro("__LP32__"); 429 Builder.defineMacro("_ARCH_PPC64"); 430 Builder.defineMacro("__powerpc64__"); 431 } 432 public: 433 PS3PPUTargetInfo(const std::string& triple) 434 : OSTargetInfo<Target>(triple) { 435 this->UserLabelPrefix = ""; 436 this->LongWidth = this->LongAlign = 32; 437 this->PointerWidth = this->PointerAlign = 32; 438 this->IntMaxType = TargetInfo::SignedLongLong; 439 this->UIntMaxType = TargetInfo::UnsignedLongLong; 440 this->Int64Type = TargetInfo::SignedLongLong; 441 this->SizeType = TargetInfo::UnsignedInt; 442 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 443 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 444 } 445 }; 446 447 // FIXME: Need a real SPU target. 448 // PS3 SPU Target 449 template<typename Target> 450 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 451 protected: 452 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 453 MacroBuilder &Builder) const { 454 // PS3 PPU defines. 455 Builder.defineMacro("__SPU__"); 456 Builder.defineMacro("__ELF__"); 457 } 458 public: 459 PS3SPUTargetInfo(const std::string& triple) 460 : OSTargetInfo<Target>(triple) { 461 this->UserLabelPrefix = ""; 462 } 463 }; 464 465 // AuroraUX target 466 template<typename Target> 467 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 468 protected: 469 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 470 MacroBuilder &Builder) const { 471 DefineStd(Builder, "sun", Opts); 472 DefineStd(Builder, "unix", Opts); 473 Builder.defineMacro("__ELF__"); 474 Builder.defineMacro("__svr4__"); 475 Builder.defineMacro("__SVR4"); 476 } 477 public: 478 AuroraUXTargetInfo(const std::string& triple) 479 : OSTargetInfo<Target>(triple) { 480 this->UserLabelPrefix = ""; 481 this->WCharType = this->SignedLong; 482 // FIXME: WIntType should be SignedLong 483 } 484 }; 485 486 // Solaris target 487 template<typename Target> 488 class SolarisTargetInfo : public OSTargetInfo<Target> { 489 protected: 490 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 491 MacroBuilder &Builder) const { 492 DefineStd(Builder, "sun", Opts); 493 DefineStd(Builder, "unix", Opts); 494 Builder.defineMacro("__ELF__"); 495 Builder.defineMacro("__svr4__"); 496 Builder.defineMacro("__SVR4"); 497 } 498 public: 499 SolarisTargetInfo(const std::string& triple) 500 : OSTargetInfo<Target>(triple) { 501 this->UserLabelPrefix = ""; 502 this->WCharType = this->SignedLong; 503 // FIXME: WIntType should be SignedLong 504 } 505 }; 506 507 // Windows target 508 template<typename Target> 509 class WindowsTargetInfo : public OSTargetInfo<Target> { 510 protected: 511 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 512 MacroBuilder &Builder) const { 513 Builder.defineMacro("_WIN32"); 514 } 515 void getVisualStudioDefines(const LangOptions &Opts, 516 MacroBuilder &Builder) const { 517 if (Opts.CPlusPlus) { 518 if (Opts.RTTI) 519 Builder.defineMacro("_CPPRTTI"); 520 521 if (Opts.Exceptions) 522 Builder.defineMacro("_CPPUNWIND"); 523 } 524 525 if (!Opts.CharIsSigned) 526 Builder.defineMacro("_CHAR_UNSIGNED"); 527 528 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 529 // but it works for now. 530 if (Opts.POSIXThreads) 531 Builder.defineMacro("_MT"); 532 533 if (Opts.MSCVersion != 0) 534 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 535 536 if (Opts.MicrosoftExt) { 537 Builder.defineMacro("_MSC_EXTENSIONS"); 538 539 if (Opts.CPlusPlus0x) { 540 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 541 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 542 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 543 } 544 } 545 546 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 547 } 548 549 public: 550 WindowsTargetInfo(const std::string &triple) 551 : OSTargetInfo<Target>(triple) {} 552 }; 553 554 } // end anonymous namespace. 555 556 //===----------------------------------------------------------------------===// 557 // Specific target implementations. 558 //===----------------------------------------------------------------------===// 559 560 namespace { 561 // PPC abstract base class 562 class PPCTargetInfo : public TargetInfo { 563 static const Builtin::Info BuiltinInfo[]; 564 static const char * const GCCRegNames[]; 565 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 566 public: 567 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 568 569 virtual void getTargetBuiltins(const Builtin::Info *&Records, 570 unsigned &NumRecords) const { 571 Records = BuiltinInfo; 572 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 573 } 574 575 virtual void getTargetDefines(const LangOptions &Opts, 576 MacroBuilder &Builder) const; 577 578 virtual void getGCCRegNames(const char * const *&Names, 579 unsigned &NumNames) const; 580 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 581 unsigned &NumAliases) const; 582 virtual bool validateAsmConstraint(const char *&Name, 583 TargetInfo::ConstraintInfo &Info) const { 584 switch (*Name) { 585 default: return false; 586 case 'O': // Zero 587 break; 588 case 'b': // Base register 589 case 'f': // Floating point register 590 Info.setAllowsRegister(); 591 break; 592 // FIXME: The following are added to allow parsing. 593 // I just took a guess at what the actions should be. 594 // Also, is more specific checking needed? I.e. specific registers? 595 case 'd': // Floating point register (containing 64-bit value) 596 case 'v': // Altivec vector register 597 Info.setAllowsRegister(); 598 break; 599 case 'w': 600 switch (Name[1]) { 601 case 'd':// VSX vector register to hold vector double data 602 case 'f':// VSX vector register to hold vector float data 603 case 's':// VSX vector register to hold scalar float data 604 case 'a':// Any VSX register 605 break; 606 default: 607 return false; 608 } 609 Info.setAllowsRegister(); 610 Name++; // Skip over 'w'. 611 break; 612 case 'h': // `MQ', `CTR', or `LINK' register 613 case 'q': // `MQ' register 614 case 'c': // `CTR' register 615 case 'l': // `LINK' register 616 case 'x': // `CR' register (condition register) number 0 617 case 'y': // `CR' register (condition register) 618 case 'z': // `XER[CA]' carry bit (part of the XER register) 619 Info.setAllowsRegister(); 620 break; 621 case 'I': // Signed 16-bit constant 622 case 'J': // Unsigned 16-bit constant shifted left 16 bits 623 // (use `L' instead for SImode constants) 624 case 'K': // Unsigned 16-bit constant 625 case 'L': // Signed 16-bit constant shifted left 16 bits 626 case 'M': // Constant larger than 31 627 case 'N': // Exact power of 2 628 case 'P': // Constant whose negation is a signed 16-bit constant 629 case 'G': // Floating point constant that can be loaded into a 630 // register with one instruction per word 631 case 'H': // Integer/Floating point constant that can be loaded 632 // into a register using three instructions 633 break; 634 case 'm': // Memory operand. Note that on PowerPC targets, m can 635 // include addresses that update the base register. It 636 // is therefore only safe to use `m' in an asm statement 637 // if that asm statement accesses the operand exactly once. 638 // The asm statement must also use `%U<opno>' as a 639 // placeholder for the "update" flag in the corresponding 640 // load or store instruction. For example: 641 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 642 // is correct but: 643 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 644 // is not. Use es rather than m if you don't want the base 645 // register to be updated. 646 case 'e': 647 if (Name[1] != 's') 648 return false; 649 // es: A "stable" memory operand; that is, one which does not 650 // include any automodification of the base register. Unlike 651 // `m', this constraint can be used in asm statements that 652 // might access the operand several times, or that might not 653 // access it at all. 654 Info.setAllowsMemory(); 655 Name++; // Skip over 'e'. 656 break; 657 case 'Q': // Memory operand that is an offset from a register (it is 658 // usually better to use `m' or `es' in asm statements) 659 case 'Z': // Memory operand that is an indexed or indirect from a 660 // register (it is usually better to use `m' or `es' in 661 // asm statements) 662 Info.setAllowsMemory(); 663 Info.setAllowsRegister(); 664 break; 665 case 'R': // AIX TOC entry 666 case 'a': // Address operand that is an indexed or indirect from a 667 // register (`p' is preferable for asm statements) 668 case 'S': // Constant suitable as a 64-bit mask operand 669 case 'T': // Constant suitable as a 32-bit mask operand 670 case 'U': // System V Release 4 small data area reference 671 case 't': // AND masks that can be performed by two rldic{l, r} 672 // instructions 673 case 'W': // Vector constant that does not require memory 674 case 'j': // Vector constant that is all zeros. 675 break; 676 // End FIXME. 677 } 678 return true; 679 } 680 virtual const char *getClobbers() const { 681 return ""; 682 } 683 }; 684 685 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 686 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 687 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 688 ALL_LANGUAGES }, 689 #include "clang/Basic/BuiltinsPPC.def" 690 }; 691 692 693 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 694 /// #defines that are not tied to a specific subtarget. 695 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 696 MacroBuilder &Builder) const { 697 // Target identification. 698 Builder.defineMacro("__ppc__"); 699 Builder.defineMacro("_ARCH_PPC"); 700 Builder.defineMacro("__powerpc__"); 701 Builder.defineMacro("__POWERPC__"); 702 if (PointerWidth == 64) { 703 Builder.defineMacro("_ARCH_PPC64"); 704 Builder.defineMacro("_LP64"); 705 Builder.defineMacro("__LP64__"); 706 Builder.defineMacro("__powerpc64__"); 707 Builder.defineMacro("__ppc64__"); 708 } else { 709 Builder.defineMacro("__ppc__"); 710 } 711 712 // Target properties. 713 if (getTriple().getOS() != llvm::Triple::NetBSD) 714 Builder.defineMacro("_BIG_ENDIAN"); 715 Builder.defineMacro("__BIG_ENDIAN__"); 716 717 // Subtarget options. 718 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 719 Builder.defineMacro("__REGISTER_PREFIX__", ""); 720 721 // FIXME: Should be controlled by command line option. 722 Builder.defineMacro("__LONG_DOUBLE_128__"); 723 724 if (Opts.AltiVec) { 725 Builder.defineMacro("__VEC__", "10206"); 726 Builder.defineMacro("__ALTIVEC__"); 727 } 728 } 729 730 731 const char * const PPCTargetInfo::GCCRegNames[] = { 732 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 733 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 734 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 735 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 736 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 737 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 738 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 739 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 740 "mq", "lr", "ctr", "ap", 741 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 742 "xer", 743 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 744 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 745 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 746 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 747 "vrsave", "vscr", 748 "spe_acc", "spefscr", 749 "sfp" 750 }; 751 752 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 753 unsigned &NumNames) const { 754 Names = GCCRegNames; 755 NumNames = llvm::array_lengthof(GCCRegNames); 756 } 757 758 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 759 // While some of these aliases do map to different registers 760 // they still share the same register name. 761 { { "0" }, "r0" }, 762 { { "1"}, "r1" }, 763 { { "2" }, "r2" }, 764 { { "3" }, "r3" }, 765 { { "4" }, "r4" }, 766 { { "5" }, "r5" }, 767 { { "6" }, "r6" }, 768 { { "7" }, "r7" }, 769 { { "8" }, "r8" }, 770 { { "9" }, "r9" }, 771 { { "10" }, "r10" }, 772 { { "11" }, "r11" }, 773 { { "12" }, "r12" }, 774 { { "13" }, "r13" }, 775 { { "14" }, "r14" }, 776 { { "15" }, "r15" }, 777 { { "16" }, "r16" }, 778 { { "17" }, "r17" }, 779 { { "18" }, "r18" }, 780 { { "19" }, "r19" }, 781 { { "20" }, "r20" }, 782 { { "21" }, "r21" }, 783 { { "22" }, "r22" }, 784 { { "23" }, "r23" }, 785 { { "24" }, "r24" }, 786 { { "25" }, "r25" }, 787 { { "26" }, "r26" }, 788 { { "27" }, "r27" }, 789 { { "28" }, "r28" }, 790 { { "29" }, "r29" }, 791 { { "30" }, "r30" }, 792 { { "31" }, "r31" }, 793 { { "fr0" }, "f0" }, 794 { { "fr1" }, "f1" }, 795 { { "fr2" }, "f2" }, 796 { { "fr3" }, "f3" }, 797 { { "fr4" }, "f4" }, 798 { { "fr5" }, "f5" }, 799 { { "fr6" }, "f6" }, 800 { { "fr7" }, "f7" }, 801 { { "fr8" }, "f8" }, 802 { { "fr9" }, "f9" }, 803 { { "fr10" }, "f10" }, 804 { { "fr11" }, "f11" }, 805 { { "fr12" }, "f12" }, 806 { { "fr13" }, "f13" }, 807 { { "fr14" }, "f14" }, 808 { { "fr15" }, "f15" }, 809 { { "fr16" }, "f16" }, 810 { { "fr17" }, "f17" }, 811 { { "fr18" }, "f18" }, 812 { { "fr19" }, "f19" }, 813 { { "fr20" }, "f20" }, 814 { { "fr21" }, "f21" }, 815 { { "fr22" }, "f22" }, 816 { { "fr23" }, "f23" }, 817 { { "fr24" }, "f24" }, 818 { { "fr25" }, "f25" }, 819 { { "fr26" }, "f26" }, 820 { { "fr27" }, "f27" }, 821 { { "fr28" }, "f28" }, 822 { { "fr29" }, "f29" }, 823 { { "fr30" }, "f30" }, 824 { { "fr31" }, "f31" }, 825 { { "cc" }, "cr0" }, 826 }; 827 828 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 829 unsigned &NumAliases) const { 830 Aliases = GCCRegAliases; 831 NumAliases = llvm::array_lengthof(GCCRegAliases); 832 } 833 } // end anonymous namespace. 834 835 namespace { 836 class PPC32TargetInfo : public PPCTargetInfo { 837 public: 838 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 839 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 840 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 841 842 switch (getTriple().getOS()) { 843 case llvm::Triple::FreeBSD: 844 case llvm::Triple::NetBSD: 845 SizeType = UnsignedInt; 846 break; 847 default: 848 break; 849 } 850 } 851 852 virtual const char *getVAListDeclaration() const { 853 // This is the ELF definition, and is overridden by the Darwin sub-target 854 return "typedef struct __va_list_tag {" 855 " unsigned char gpr;" 856 " unsigned char fpr;" 857 " unsigned short reserved;" 858 " void* overflow_arg_area;" 859 " void* reg_save_area;" 860 "} __builtin_va_list[1];"; 861 } 862 }; 863 } // end anonymous namespace. 864 865 namespace { 866 class PPC64TargetInfo : public PPCTargetInfo { 867 public: 868 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 869 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 870 IntMaxType = SignedLong; 871 UIntMaxType = UnsignedLong; 872 Int64Type = SignedLong; 873 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 874 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 875 } 876 virtual const char *getVAListDeclaration() const { 877 return "typedef char* __builtin_va_list;"; 878 } 879 }; 880 } // end anonymous namespace. 881 882 883 namespace { 884 class DarwinPPC32TargetInfo : 885 public DarwinTargetInfo<PPC32TargetInfo> { 886 public: 887 DarwinPPC32TargetInfo(const std::string& triple) 888 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 889 HasAlignMac68kSupport = true; 890 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 891 LongLongAlign = 32; 892 SuitableAlign = 128; 893 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 894 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32"; 895 } 896 virtual const char *getVAListDeclaration() const { 897 return "typedef char* __builtin_va_list;"; 898 } 899 }; 900 901 class DarwinPPC64TargetInfo : 902 public DarwinTargetInfo<PPC64TargetInfo> { 903 public: 904 DarwinPPC64TargetInfo(const std::string& triple) 905 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 906 HasAlignMac68kSupport = true; 907 SuitableAlign = 128; 908 } 909 }; 910 } // end anonymous namespace. 911 912 namespace { 913 static const unsigned PTXAddrSpaceMap[] = { 914 0, // opencl_global 915 4, // opencl_local 916 1 // opencl_constant 917 }; 918 class PTXTargetInfo : public TargetInfo { 919 static const char * const GCCRegNames[]; 920 static const Builtin::Info BuiltinInfo[]; 921 std::vector<llvm::StringRef> AvailableFeatures; 922 public: 923 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 924 BigEndian = false; 925 TLSSupported = false; 926 LongWidth = LongAlign = 64; 927 AddrSpaceMap = &PTXAddrSpaceMap; 928 // Define available target features 929 // These must be defined in sorted order! 930 AvailableFeatures.push_back("compute10"); 931 AvailableFeatures.push_back("compute11"); 932 AvailableFeatures.push_back("compute12"); 933 AvailableFeatures.push_back("compute13"); 934 AvailableFeatures.push_back("compute20"); 935 AvailableFeatures.push_back("double"); 936 AvailableFeatures.push_back("no-fma"); 937 AvailableFeatures.push_back("ptx20"); 938 AvailableFeatures.push_back("ptx21"); 939 AvailableFeatures.push_back("ptx22"); 940 AvailableFeatures.push_back("ptx23"); 941 AvailableFeatures.push_back("sm10"); 942 AvailableFeatures.push_back("sm11"); 943 AvailableFeatures.push_back("sm12"); 944 AvailableFeatures.push_back("sm13"); 945 AvailableFeatures.push_back("sm20"); 946 AvailableFeatures.push_back("sm21"); 947 AvailableFeatures.push_back("sm22"); 948 AvailableFeatures.push_back("sm23"); 949 } 950 virtual void getTargetDefines(const LangOptions &Opts, 951 MacroBuilder &Builder) const { 952 Builder.defineMacro("__PTX__"); 953 } 954 virtual void getTargetBuiltins(const Builtin::Info *&Records, 955 unsigned &NumRecords) const { 956 Records = BuiltinInfo; 957 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 958 } 959 960 virtual void getGCCRegNames(const char * const *&Names, 961 unsigned &NumNames) const; 962 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 963 unsigned &NumAliases) const { 964 // No aliases. 965 Aliases = 0; 966 NumAliases = 0; 967 } 968 virtual bool validateAsmConstraint(const char *&Name, 969 TargetInfo::ConstraintInfo &info) const { 970 // FIXME: implement 971 return true; 972 } 973 virtual const char *getClobbers() const { 974 // FIXME: Is this really right? 975 return ""; 976 } 977 virtual const char *getVAListDeclaration() const { 978 // FIXME: implement 979 return "typedef char* __builtin_va_list;"; 980 } 981 982 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 983 const std::string &Name, 984 bool Enabled) const; 985 }; 986 987 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 988 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 989 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 990 ALL_LANGUAGES }, 991 #include "clang/Basic/BuiltinsPTX.def" 992 }; 993 994 const char * const PTXTargetInfo::GCCRegNames[] = { 995 "r0" 996 }; 997 998 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 999 unsigned &NumNames) const { 1000 Names = GCCRegNames; 1001 NumNames = llvm::array_lengthof(GCCRegNames); 1002 } 1003 1004 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1005 const std::string &Name, 1006 bool Enabled) const { 1007 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 1008 Name)) { 1009 Features[Name] = Enabled; 1010 return true; 1011 } else { 1012 return false; 1013 } 1014 } 1015 1016 class PTX32TargetInfo : public PTXTargetInfo { 1017 public: 1018 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1019 PointerWidth = PointerAlign = 32; 1020 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1021 DescriptionString 1022 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 1023 } 1024 }; 1025 1026 class PTX64TargetInfo : public PTXTargetInfo { 1027 public: 1028 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1029 PointerWidth = PointerAlign = 64; 1030 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1031 DescriptionString 1032 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1033 } 1034 }; 1035 } 1036 1037 namespace { 1038 // MBlaze abstract base class 1039 class MBlazeTargetInfo : public TargetInfo { 1040 static const char * const GCCRegNames[]; 1041 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1042 1043 public: 1044 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1045 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1046 } 1047 1048 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1049 unsigned &NumRecords) const { 1050 // FIXME: Implement. 1051 Records = 0; 1052 NumRecords = 0; 1053 } 1054 1055 virtual void getTargetDefines(const LangOptions &Opts, 1056 MacroBuilder &Builder) const; 1057 1058 virtual const char *getVAListDeclaration() const { 1059 return "typedef char* __builtin_va_list;"; 1060 } 1061 virtual const char *getTargetPrefix() const { 1062 return "mblaze"; 1063 } 1064 virtual void getGCCRegNames(const char * const *&Names, 1065 unsigned &NumNames) const; 1066 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1067 unsigned &NumAliases) const; 1068 virtual bool validateAsmConstraint(const char *&Name, 1069 TargetInfo::ConstraintInfo &Info) const { 1070 switch (*Name) { 1071 default: return false; 1072 case 'O': // Zero 1073 return true; 1074 case 'b': // Base register 1075 case 'f': // Floating point register 1076 Info.setAllowsRegister(); 1077 return true; 1078 } 1079 } 1080 virtual const char *getClobbers() const { 1081 return ""; 1082 } 1083 }; 1084 1085 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1086 /// #defines that are not tied to a specific subtarget. 1087 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1088 MacroBuilder &Builder) const { 1089 // Target identification. 1090 Builder.defineMacro("__microblaze__"); 1091 Builder.defineMacro("_ARCH_MICROBLAZE"); 1092 Builder.defineMacro("__MICROBLAZE__"); 1093 1094 // Target properties. 1095 Builder.defineMacro("_BIG_ENDIAN"); 1096 Builder.defineMacro("__BIG_ENDIAN__"); 1097 1098 // Subtarget options. 1099 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1100 } 1101 1102 1103 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1104 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1105 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1106 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1107 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1108 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1109 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1110 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1111 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1112 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1113 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1114 }; 1115 1116 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1117 unsigned &NumNames) const { 1118 Names = GCCRegNames; 1119 NumNames = llvm::array_lengthof(GCCRegNames); 1120 } 1121 1122 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1123 { {"f0"}, "r0" }, 1124 { {"f1"}, "r1" }, 1125 { {"f2"}, "r2" }, 1126 { {"f3"}, "r3" }, 1127 { {"f4"}, "r4" }, 1128 { {"f5"}, "r5" }, 1129 { {"f6"}, "r6" }, 1130 { {"f7"}, "r7" }, 1131 { {"f8"}, "r8" }, 1132 { {"f9"}, "r9" }, 1133 { {"f10"}, "r10" }, 1134 { {"f11"}, "r11" }, 1135 { {"f12"}, "r12" }, 1136 { {"f13"}, "r13" }, 1137 { {"f14"}, "r14" }, 1138 { {"f15"}, "r15" }, 1139 { {"f16"}, "r16" }, 1140 { {"f17"}, "r17" }, 1141 { {"f18"}, "r18" }, 1142 { {"f19"}, "r19" }, 1143 { {"f20"}, "r20" }, 1144 { {"f21"}, "r21" }, 1145 { {"f22"}, "r22" }, 1146 { {"f23"}, "r23" }, 1147 { {"f24"}, "r24" }, 1148 { {"f25"}, "r25" }, 1149 { {"f26"}, "r26" }, 1150 { {"f27"}, "r27" }, 1151 { {"f28"}, "r28" }, 1152 { {"f29"}, "r29" }, 1153 { {"f30"}, "r30" }, 1154 { {"f31"}, "r31" }, 1155 }; 1156 1157 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1158 unsigned &NumAliases) const { 1159 Aliases = GCCRegAliases; 1160 NumAliases = llvm::array_lengthof(GCCRegAliases); 1161 } 1162 } // end anonymous namespace. 1163 1164 namespace { 1165 // Namespace for x86 abstract base class 1166 const Builtin::Info BuiltinInfo[] = { 1167 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1168 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1169 ALL_LANGUAGES }, 1170 #include "clang/Basic/BuiltinsX86.def" 1171 }; 1172 1173 static const char* const GCCRegNames[] = { 1174 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1175 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1176 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1177 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1178 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1179 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1180 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1181 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1182 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1183 }; 1184 1185 const TargetInfo::AddlRegName AddlRegNames[] = { 1186 { { "al", "ah", "eax", "rax" }, 0 }, 1187 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1188 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1189 { { "dl", "dh", "edx", "rdx" }, 1 }, 1190 { { "esi", "rsi" }, 4 }, 1191 { { "edi", "rdi" }, 5 }, 1192 { { "esp", "rsp" }, 7 }, 1193 { { "ebp", "rbp" }, 6 }, 1194 }; 1195 1196 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1197 // most of the implementation can be shared. 1198 class X86TargetInfo : public TargetInfo { 1199 enum X86SSEEnum { 1200 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 1201 } SSELevel; 1202 enum MMX3DNowEnum { 1203 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1204 } MMX3DNowLevel; 1205 1206 bool HasAES; 1207 bool HasLZCNT; 1208 bool HasBMI; 1209 bool HasBMI2; 1210 bool HasPOPCNT; 1211 bool HasFMA4; 1212 1213 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1214 /// 1215 /// Each enumeration represents a particular CPU supported by Clang. These 1216 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1217 enum CPUKind { 1218 CK_Generic, 1219 1220 /// \name i386 1221 /// i386-generation processors. 1222 //@{ 1223 CK_i386, 1224 //@} 1225 1226 /// \name i486 1227 /// i486-generation processors. 1228 //@{ 1229 CK_i486, 1230 CK_WinChipC6, 1231 CK_WinChip2, 1232 CK_C3, 1233 //@} 1234 1235 /// \name i586 1236 /// i586-generation processors, P5 microarchitecture based. 1237 //@{ 1238 CK_i586, 1239 CK_Pentium, 1240 CK_PentiumMMX, 1241 //@} 1242 1243 /// \name i686 1244 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1245 //@{ 1246 CK_i686, 1247 CK_PentiumPro, 1248 CK_Pentium2, 1249 CK_Pentium3, 1250 CK_Pentium3M, 1251 CK_PentiumM, 1252 CK_C3_2, 1253 1254 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1255 /// Clang however has some logic to suport this. 1256 // FIXME: Warn, deprecate, and potentially remove this. 1257 CK_Yonah, 1258 //@} 1259 1260 /// \name Netburst 1261 /// Netburst microarchitecture based processors. 1262 //@{ 1263 CK_Pentium4, 1264 CK_Pentium4M, 1265 CK_Prescott, 1266 CK_Nocona, 1267 //@} 1268 1269 /// \name Core 1270 /// Core microarchitecture based processors. 1271 //@{ 1272 CK_Core2, 1273 1274 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1275 /// codename which GCC no longer accepts as an option to -march, but Clang 1276 /// has some logic for recognizing it. 1277 // FIXME: Warn, deprecate, and potentially remove this. 1278 CK_Penryn, 1279 //@} 1280 1281 /// \name Atom 1282 /// Atom processors 1283 //@{ 1284 CK_Atom, 1285 //@} 1286 1287 /// \name Nehalem 1288 /// Nehalem microarchitecture based processors. 1289 //@{ 1290 CK_Corei7, 1291 CK_Corei7AVX, 1292 CK_CoreAVXi, 1293 CK_CoreAVX2, 1294 //@} 1295 1296 /// \name K6 1297 /// K6 architecture processors. 1298 //@{ 1299 CK_K6, 1300 CK_K6_2, 1301 CK_K6_3, 1302 //@} 1303 1304 /// \name K7 1305 /// K7 architecture processors. 1306 //@{ 1307 CK_Athlon, 1308 CK_AthlonThunderbird, 1309 CK_Athlon4, 1310 CK_AthlonXP, 1311 CK_AthlonMP, 1312 //@} 1313 1314 /// \name K8 1315 /// K8 architecture processors. 1316 //@{ 1317 CK_Athlon64, 1318 CK_Athlon64SSE3, 1319 CK_AthlonFX, 1320 CK_K8, 1321 CK_K8SSE3, 1322 CK_Opteron, 1323 CK_OpteronSSE3, 1324 CK_AMDFAM10, 1325 //@} 1326 1327 /// \name Bobcat 1328 /// Bobcat architecture processors. 1329 //@{ 1330 CK_BTVER1, 1331 //@} 1332 1333 /// \name Bulldozer 1334 /// Bulldozer architecture processors. 1335 //@{ 1336 CK_BDVER1, 1337 CK_BDVER2, 1338 //@} 1339 1340 /// This specification is deprecated and will be removed in the future. 1341 /// Users should prefer \see CK_K8. 1342 // FIXME: Warn on this when the CPU is set to it. 1343 CK_x86_64, 1344 //@} 1345 1346 /// \name Geode 1347 /// Geode processors. 1348 //@{ 1349 CK_Geode 1350 //@} 1351 } CPU; 1352 1353 public: 1354 X86TargetInfo(const std::string& triple) 1355 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1356 HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false), 1357 HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) { 1358 BigEndian = false; 1359 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1360 } 1361 virtual unsigned getFloatEvalMethod() const { 1362 // X87 evaluates with 80 bits "long double" precision. 1363 return SSELevel == NoSSE ? 2 : 0; 1364 } 1365 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1366 unsigned &NumRecords) const { 1367 Records = BuiltinInfo; 1368 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1369 } 1370 virtual void getGCCRegNames(const char * const *&Names, 1371 unsigned &NumNames) const { 1372 Names = GCCRegNames; 1373 NumNames = llvm::array_lengthof(GCCRegNames); 1374 } 1375 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1376 unsigned &NumAliases) const { 1377 Aliases = 0; 1378 NumAliases = 0; 1379 } 1380 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1381 unsigned &NumNames) const { 1382 Names = AddlRegNames; 1383 NumNames = llvm::array_lengthof(AddlRegNames); 1384 } 1385 virtual bool validateAsmConstraint(const char *&Name, 1386 TargetInfo::ConstraintInfo &info) const; 1387 virtual std::string convertConstraint(const char *&Constraint) const; 1388 virtual const char *getClobbers() const { 1389 return "~{dirflag},~{fpsr},~{flags}"; 1390 } 1391 virtual void getTargetDefines(const LangOptions &Opts, 1392 MacroBuilder &Builder) const; 1393 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1394 const std::string &Name, 1395 bool Enabled) const; 1396 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1397 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1398 virtual const char* getABI() const { 1399 if (PointerWidth == 64 && SSELevel >= AVX) 1400 return "avx"; 1401 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1402 return "no-mmx"; 1403 return ""; 1404 } 1405 virtual bool setCPU(const std::string &Name) { 1406 CPU = llvm::StringSwitch<CPUKind>(Name) 1407 .Case("i386", CK_i386) 1408 .Case("i486", CK_i486) 1409 .Case("winchip-c6", CK_WinChipC6) 1410 .Case("winchip2", CK_WinChip2) 1411 .Case("c3", CK_C3) 1412 .Case("i586", CK_i586) 1413 .Case("pentium", CK_Pentium) 1414 .Case("pentium-mmx", CK_PentiumMMX) 1415 .Case("i686", CK_i686) 1416 .Case("pentiumpro", CK_PentiumPro) 1417 .Case("pentium2", CK_Pentium2) 1418 .Case("pentium3", CK_Pentium3) 1419 .Case("pentium3m", CK_Pentium3M) 1420 .Case("pentium-m", CK_PentiumM) 1421 .Case("c3-2", CK_C3_2) 1422 .Case("yonah", CK_Yonah) 1423 .Case("pentium4", CK_Pentium4) 1424 .Case("pentium4m", CK_Pentium4M) 1425 .Case("prescott", CK_Prescott) 1426 .Case("nocona", CK_Nocona) 1427 .Case("core2", CK_Core2) 1428 .Case("penryn", CK_Penryn) 1429 .Case("atom", CK_Atom) 1430 .Case("corei7", CK_Corei7) 1431 .Case("corei7-avx", CK_Corei7AVX) 1432 .Case("core-avx-i", CK_CoreAVXi) 1433 .Case("core-avx2", CK_CoreAVX2) 1434 .Case("k6", CK_K6) 1435 .Case("k6-2", CK_K6_2) 1436 .Case("k6-3", CK_K6_3) 1437 .Case("athlon", CK_Athlon) 1438 .Case("athlon-tbird", CK_AthlonThunderbird) 1439 .Case("athlon-4", CK_Athlon4) 1440 .Case("athlon-xp", CK_AthlonXP) 1441 .Case("athlon-mp", CK_AthlonMP) 1442 .Case("athlon64", CK_Athlon64) 1443 .Case("athlon64-sse3", CK_Athlon64SSE3) 1444 .Case("athlon-fx", CK_AthlonFX) 1445 .Case("k8", CK_K8) 1446 .Case("k8-sse3", CK_K8SSE3) 1447 .Case("opteron", CK_Opteron) 1448 .Case("opteron-sse3", CK_OpteronSSE3) 1449 .Case("amdfam10", CK_AMDFAM10) 1450 .Case("btver1", CK_BTVER1) 1451 .Case("bdver1", CK_BDVER1) 1452 .Case("bdver2", CK_BDVER2) 1453 .Case("x86-64", CK_x86_64) 1454 .Case("geode", CK_Geode) 1455 .Default(CK_Generic); 1456 1457 // Perform any per-CPU checks necessary to determine if this CPU is 1458 // acceptable. 1459 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1460 // invalid without explaining *why*. 1461 switch (CPU) { 1462 case CK_Generic: 1463 // No processor selected! 1464 return false; 1465 1466 case CK_i386: 1467 case CK_i486: 1468 case CK_WinChipC6: 1469 case CK_WinChip2: 1470 case CK_C3: 1471 case CK_i586: 1472 case CK_Pentium: 1473 case CK_PentiumMMX: 1474 case CK_i686: 1475 case CK_PentiumPro: 1476 case CK_Pentium2: 1477 case CK_Pentium3: 1478 case CK_Pentium3M: 1479 case CK_PentiumM: 1480 case CK_Yonah: 1481 case CK_C3_2: 1482 case CK_Pentium4: 1483 case CK_Pentium4M: 1484 case CK_Prescott: 1485 case CK_K6: 1486 case CK_K6_2: 1487 case CK_K6_3: 1488 case CK_Athlon: 1489 case CK_AthlonThunderbird: 1490 case CK_Athlon4: 1491 case CK_AthlonXP: 1492 case CK_AthlonMP: 1493 case CK_Geode: 1494 // Only accept certain architectures when compiling in 32-bit mode. 1495 if (PointerWidth != 32) 1496 return false; 1497 1498 // Fallthrough 1499 case CK_Nocona: 1500 case CK_Core2: 1501 case CK_Penryn: 1502 case CK_Atom: 1503 case CK_Corei7: 1504 case CK_Corei7AVX: 1505 case CK_CoreAVXi: 1506 case CK_CoreAVX2: 1507 case CK_Athlon64: 1508 case CK_Athlon64SSE3: 1509 case CK_AthlonFX: 1510 case CK_K8: 1511 case CK_K8SSE3: 1512 case CK_Opteron: 1513 case CK_OpteronSSE3: 1514 case CK_AMDFAM10: 1515 case CK_BTVER1: 1516 case CK_BDVER1: 1517 case CK_BDVER2: 1518 case CK_x86_64: 1519 return true; 1520 } 1521 llvm_unreachable("Unhandled CPU kind"); 1522 } 1523 }; 1524 1525 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1526 // FIXME: This should not be here. 1527 Features["3dnow"] = false; 1528 Features["3dnowa"] = false; 1529 Features["mmx"] = false; 1530 Features["sse"] = false; 1531 Features["sse2"] = false; 1532 Features["sse3"] = false; 1533 Features["ssse3"] = false; 1534 Features["sse41"] = false; 1535 Features["sse42"] = false; 1536 Features["sse4a"] = false; 1537 Features["aes"] = false; 1538 Features["avx"] = false; 1539 Features["avx2"] = false; 1540 Features["lzcnt"] = false; 1541 Features["bmi"] = false; 1542 Features["bmi2"] = false; 1543 Features["popcnt"] = false; 1544 Features["fma4"] = false; 1545 1546 // FIXME: This *really* should not be here. 1547 1548 // X86_64 always has SSE2. 1549 if (PointerWidth == 64) 1550 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1551 1552 switch (CPU) { 1553 case CK_Generic: 1554 case CK_i386: 1555 case CK_i486: 1556 case CK_i586: 1557 case CK_Pentium: 1558 case CK_i686: 1559 case CK_PentiumPro: 1560 break; 1561 case CK_PentiumMMX: 1562 case CK_Pentium2: 1563 setFeatureEnabled(Features, "mmx", true); 1564 break; 1565 case CK_Pentium3: 1566 case CK_Pentium3M: 1567 setFeatureEnabled(Features, "mmx", true); 1568 setFeatureEnabled(Features, "sse", true); 1569 break; 1570 case CK_PentiumM: 1571 case CK_Pentium4: 1572 case CK_Pentium4M: 1573 case CK_x86_64: 1574 setFeatureEnabled(Features, "mmx", true); 1575 setFeatureEnabled(Features, "sse2", true); 1576 break; 1577 case CK_Yonah: 1578 case CK_Prescott: 1579 case CK_Nocona: 1580 setFeatureEnabled(Features, "mmx", true); 1581 setFeatureEnabled(Features, "sse3", true); 1582 break; 1583 case CK_Core2: 1584 setFeatureEnabled(Features, "mmx", true); 1585 setFeatureEnabled(Features, "ssse3", true); 1586 break; 1587 case CK_Penryn: 1588 setFeatureEnabled(Features, "mmx", true); 1589 setFeatureEnabled(Features, "sse4.1", true); 1590 break; 1591 case CK_Atom: 1592 setFeatureEnabled(Features, "mmx", true); 1593 setFeatureEnabled(Features, "ssse3", true); 1594 break; 1595 case CK_Corei7: 1596 setFeatureEnabled(Features, "mmx", true); 1597 setFeatureEnabled(Features, "sse4", true); 1598 setFeatureEnabled(Features, "aes", true); 1599 break; 1600 case CK_Corei7AVX: 1601 case CK_CoreAVXi: 1602 setFeatureEnabled(Features, "mmx", true); 1603 setFeatureEnabled(Features, "sse4", true); 1604 setFeatureEnabled(Features, "aes", true); 1605 //setFeatureEnabled(Features, "avx", true); 1606 break; 1607 case CK_CoreAVX2: 1608 setFeatureEnabled(Features, "mmx", true); 1609 setFeatureEnabled(Features, "sse4", true); 1610 setFeatureEnabled(Features, "aes", true); 1611 setFeatureEnabled(Features, "lzcnt", true); 1612 setFeatureEnabled(Features, "bmi", true); 1613 setFeatureEnabled(Features, "bmi2", true); 1614 //setFeatureEnabled(Features, "avx2", true); 1615 break; 1616 case CK_K6: 1617 case CK_WinChipC6: 1618 setFeatureEnabled(Features, "mmx", true); 1619 break; 1620 case CK_K6_2: 1621 case CK_K6_3: 1622 case CK_WinChip2: 1623 case CK_C3: 1624 setFeatureEnabled(Features, "3dnow", true); 1625 break; 1626 case CK_Athlon: 1627 case CK_AthlonThunderbird: 1628 case CK_Geode: 1629 setFeatureEnabled(Features, "3dnowa", true); 1630 break; 1631 case CK_Athlon4: 1632 case CK_AthlonXP: 1633 case CK_AthlonMP: 1634 setFeatureEnabled(Features, "sse", true); 1635 setFeatureEnabled(Features, "3dnowa", true); 1636 break; 1637 case CK_K8: 1638 case CK_Opteron: 1639 case CK_Athlon64: 1640 case CK_AthlonFX: 1641 setFeatureEnabled(Features, "sse2", true); 1642 setFeatureEnabled(Features, "3dnowa", true); 1643 break; 1644 case CK_K8SSE3: 1645 case CK_OpteronSSE3: 1646 case CK_Athlon64SSE3: 1647 setFeatureEnabled(Features, "sse3", true); 1648 setFeatureEnabled(Features, "3dnowa", true); 1649 break; 1650 case CK_AMDFAM10: 1651 setFeatureEnabled(Features, "sse3", true); 1652 setFeatureEnabled(Features, "sse4a", true); 1653 setFeatureEnabled(Features, "3dnowa", true); 1654 break; 1655 case CK_BTVER1: 1656 setFeatureEnabled(Features, "ssse3", true); 1657 setFeatureEnabled(Features, "sse4a", true); 1658 case CK_BDVER1: 1659 case CK_BDVER2: 1660 setFeatureEnabled(Features, "sse4", true); 1661 setFeatureEnabled(Features, "sse4a", true); 1662 setFeatureEnabled(Features, "aes", true); 1663 break; 1664 case CK_C3_2: 1665 setFeatureEnabled(Features, "mmx", true); 1666 setFeatureEnabled(Features, "sse", true); 1667 break; 1668 } 1669 } 1670 1671 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1672 const std::string &Name, 1673 bool Enabled) const { 1674 // FIXME: This *really* should not be here. We need some way of translating 1675 // options into llvm subtarget features. 1676 if (!Features.count(Name) && 1677 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1678 return false; 1679 1680 // FIXME: this should probably use a switch with fall through. 1681 1682 if (Enabled) { 1683 if (Name == "mmx") 1684 Features["mmx"] = true; 1685 else if (Name == "sse") 1686 Features["mmx"] = Features["sse"] = true; 1687 else if (Name == "sse2") 1688 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1689 else if (Name == "sse3") 1690 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1691 true; 1692 else if (Name == "ssse3") 1693 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1694 Features["ssse3"] = true; 1695 else if (Name == "sse4" || Name == "sse4.2") 1696 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1697 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1698 Features["popcnt"] = true; 1699 else if (Name == "sse4.1") 1700 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1701 Features["ssse3"] = Features["sse41"] = true; 1702 else if (Name == "3dnow") 1703 Features["mmx"] = Features["3dnow"] = true; 1704 else if (Name == "3dnowa") 1705 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1706 else if (Name == "aes") 1707 Features["aes"] = true; 1708 else if (Name == "avx") 1709 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1710 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1711 Features["popcnt"] = Features["avx"] = true; 1712 else if (Name == "avx2") 1713 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1714 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1715 Features["popcnt"] = Features["avx"] = Features["avx2"] = true; 1716 else if (Name == "fma4") 1717 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1718 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1719 Features["popcnt"] = Features["avx"] = Features["fma4"] = true; 1720 else if (Name == "sse4a") 1721 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1722 Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true; 1723 else if (Name == "lzcnt") 1724 Features["lzcnt"] = true; 1725 else if (Name == "bmi") 1726 Features["bmi"] = true; 1727 else if (Name == "bmi2") 1728 Features["bmi2"] = true; 1729 else if (Name == "popcnt") 1730 Features["popcnt"] = true; 1731 } else { 1732 if (Name == "mmx") 1733 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1734 else if (Name == "sse") 1735 Features["sse"] = Features["sse2"] = Features["sse3"] = 1736 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1737 Features["sse4a"] = false; 1738 else if (Name == "sse2") 1739 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1740 Features["sse41"] = Features["sse42"] = Features["sse4a"] = false; 1741 else if (Name == "sse3") 1742 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1743 Features["sse42"] = Features["sse4a"] = false; 1744 else if (Name == "ssse3") 1745 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1746 else if (Name == "sse4" || Name == "sse4.1") 1747 Features["sse41"] = Features["sse42"] = false; 1748 else if (Name == "sse4.2") 1749 Features["sse42"] = false; 1750 else if (Name == "3dnow") 1751 Features["3dnow"] = Features["3dnowa"] = false; 1752 else if (Name == "3dnowa") 1753 Features["3dnowa"] = false; 1754 else if (Name == "aes") 1755 Features["aes"] = false; 1756 else if (Name == "avx") 1757 Features["avx"] = Features["avx2"] = Features["fma4"] = false; 1758 else if (Name == "avx2") 1759 Features["avx2"] = false; 1760 else if (Name == "sse4a") 1761 Features["sse4a"] = false; 1762 else if (Name == "lzcnt") 1763 Features["lzcnt"] = false; 1764 else if (Name == "bmi") 1765 Features["bmi"] = false; 1766 else if (Name == "bmi2") 1767 Features["bmi2"] = false; 1768 else if (Name == "popcnt") 1769 Features["popcnt"] = false; 1770 else if (Name == "fma4") 1771 Features["fma4"] = false; 1772 } 1773 1774 return true; 1775 } 1776 1777 /// HandleTargetOptions - Perform initialization based on the user 1778 /// configured set of features. 1779 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1780 // Remember the maximum enabled sselevel. 1781 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1782 // Ignore disabled features. 1783 if (Features[i][0] == '-') 1784 continue; 1785 1786 if (Features[i].substr(1) == "aes") { 1787 HasAES = true; 1788 continue; 1789 } 1790 1791 if (Features[i].substr(1) == "lzcnt") { 1792 HasLZCNT = true; 1793 continue; 1794 } 1795 1796 if (Features[i].substr(1) == "bmi") { 1797 HasBMI = true; 1798 continue; 1799 } 1800 1801 if (Features[i].substr(1) == "bmi2") { 1802 HasBMI2 = true; 1803 continue; 1804 } 1805 1806 if (Features[i].substr(1) == "popcnt") { 1807 HasPOPCNT = true; 1808 continue; 1809 } 1810 1811 if (Features[i].substr(1) == "fma4") { 1812 HasFMA4 = true; 1813 continue; 1814 } 1815 1816 assert(Features[i][0] == '+' && "Invalid target feature!"); 1817 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1818 .Case("avx2", AVX2) 1819 .Case("avx", AVX) 1820 .Case("sse42", SSE42) 1821 .Case("sse41", SSE41) 1822 .Case("ssse3", SSSE3) 1823 .Case("sse3", SSE3) 1824 .Case("sse2", SSE2) 1825 .Case("sse", SSE1) 1826 .Default(NoSSE); 1827 SSELevel = std::max(SSELevel, Level); 1828 1829 MMX3DNowEnum ThreeDNowLevel = 1830 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1831 .Case("3dnowa", AMD3DNowAthlon) 1832 .Case("3dnow", AMD3DNow) 1833 .Case("mmx", MMX) 1834 .Default(NoMMX3DNow); 1835 1836 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1837 } 1838 1839 // Don't tell the backend if we're turning off mmx; it will end up disabling 1840 // SSE, which we don't want. 1841 std::vector<std::string>::iterator it; 1842 it = std::find(Features.begin(), Features.end(), "-mmx"); 1843 if (it != Features.end()) 1844 Features.erase(it); 1845 } 1846 1847 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1848 /// definitions for this particular subtarget. 1849 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1850 MacroBuilder &Builder) const { 1851 // Target identification. 1852 if (PointerWidth == 64) { 1853 Builder.defineMacro("_LP64"); 1854 Builder.defineMacro("__LP64__"); 1855 Builder.defineMacro("__amd64__"); 1856 Builder.defineMacro("__amd64"); 1857 Builder.defineMacro("__x86_64"); 1858 Builder.defineMacro("__x86_64__"); 1859 } else { 1860 DefineStd(Builder, "i386", Opts); 1861 } 1862 1863 // Subtarget options. 1864 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1865 // truly should be based on -mtune options. 1866 switch (CPU) { 1867 case CK_Generic: 1868 break; 1869 case CK_i386: 1870 // The rest are coming from the i386 define above. 1871 Builder.defineMacro("__tune_i386__"); 1872 break; 1873 case CK_i486: 1874 case CK_WinChipC6: 1875 case CK_WinChip2: 1876 case CK_C3: 1877 defineCPUMacros(Builder, "i486"); 1878 break; 1879 case CK_PentiumMMX: 1880 Builder.defineMacro("__pentium_mmx__"); 1881 Builder.defineMacro("__tune_pentium_mmx__"); 1882 // Fallthrough 1883 case CK_i586: 1884 case CK_Pentium: 1885 defineCPUMacros(Builder, "i586"); 1886 defineCPUMacros(Builder, "pentium"); 1887 break; 1888 case CK_Pentium3: 1889 case CK_Pentium3M: 1890 case CK_PentiumM: 1891 Builder.defineMacro("__tune_pentium3__"); 1892 // Fallthrough 1893 case CK_Pentium2: 1894 case CK_C3_2: 1895 Builder.defineMacro("__tune_pentium2__"); 1896 // Fallthrough 1897 case CK_PentiumPro: 1898 Builder.defineMacro("__tune_i686__"); 1899 Builder.defineMacro("__tune_pentiumpro__"); 1900 // Fallthrough 1901 case CK_i686: 1902 Builder.defineMacro("__i686"); 1903 Builder.defineMacro("__i686__"); 1904 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1905 Builder.defineMacro("__pentiumpro"); 1906 Builder.defineMacro("__pentiumpro__"); 1907 break; 1908 case CK_Pentium4: 1909 case CK_Pentium4M: 1910 defineCPUMacros(Builder, "pentium4"); 1911 break; 1912 case CK_Yonah: 1913 case CK_Prescott: 1914 case CK_Nocona: 1915 defineCPUMacros(Builder, "nocona"); 1916 break; 1917 case CK_Core2: 1918 case CK_Penryn: 1919 defineCPUMacros(Builder, "core2"); 1920 break; 1921 case CK_Atom: 1922 defineCPUMacros(Builder, "atom"); 1923 break; 1924 case CK_Corei7: 1925 case CK_Corei7AVX: 1926 case CK_CoreAVXi: 1927 case CK_CoreAVX2: 1928 defineCPUMacros(Builder, "corei7"); 1929 break; 1930 case CK_K6_2: 1931 Builder.defineMacro("__k6_2__"); 1932 Builder.defineMacro("__tune_k6_2__"); 1933 // Fallthrough 1934 case CK_K6_3: 1935 if (CPU != CK_K6_2) { // In case of fallthrough 1936 // FIXME: GCC may be enabling these in cases where some other k6 1937 // architecture is specified but -m3dnow is explicitly provided. The 1938 // exact semantics need to be determined and emulated here. 1939 Builder.defineMacro("__k6_3__"); 1940 Builder.defineMacro("__tune_k6_3__"); 1941 } 1942 // Fallthrough 1943 case CK_K6: 1944 defineCPUMacros(Builder, "k6"); 1945 break; 1946 case CK_Athlon: 1947 case CK_AthlonThunderbird: 1948 case CK_Athlon4: 1949 case CK_AthlonXP: 1950 case CK_AthlonMP: 1951 defineCPUMacros(Builder, "athlon"); 1952 if (SSELevel != NoSSE) { 1953 Builder.defineMacro("__athlon_sse__"); 1954 Builder.defineMacro("__tune_athlon_sse__"); 1955 } 1956 break; 1957 case CK_K8: 1958 case CK_K8SSE3: 1959 case CK_x86_64: 1960 case CK_Opteron: 1961 case CK_OpteronSSE3: 1962 case CK_Athlon64: 1963 case CK_Athlon64SSE3: 1964 case CK_AthlonFX: 1965 defineCPUMacros(Builder, "k8"); 1966 break; 1967 case CK_AMDFAM10: 1968 defineCPUMacros(Builder, "amdfam10"); 1969 break; 1970 case CK_BTVER1: 1971 defineCPUMacros(Builder, "btver1"); 1972 break; 1973 case CK_BDVER1: 1974 defineCPUMacros(Builder, "bdver1"); 1975 break; 1976 case CK_BDVER2: 1977 defineCPUMacros(Builder, "bdver2"); 1978 break; 1979 case CK_Geode: 1980 defineCPUMacros(Builder, "geode"); 1981 break; 1982 } 1983 1984 // Target properties. 1985 Builder.defineMacro("__LITTLE_ENDIAN__"); 1986 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1987 1988 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1989 // functions in glibc header files that use FP Stack inline asm which the 1990 // backend can't deal with (PR879). 1991 Builder.defineMacro("__NO_MATH_INLINES"); 1992 1993 if (HasAES) 1994 Builder.defineMacro("__AES__"); 1995 1996 if (HasLZCNT) 1997 Builder.defineMacro("__LZCNT__"); 1998 1999 if (HasBMI) 2000 Builder.defineMacro("__BMI__"); 2001 2002 if (HasBMI2) 2003 Builder.defineMacro("__BMI2__"); 2004 2005 if (HasPOPCNT) 2006 Builder.defineMacro("__POPCNT__"); 2007 2008 if (HasFMA4) 2009 Builder.defineMacro("__FMA4__"); 2010 2011 // Each case falls through to the previous one here. 2012 switch (SSELevel) { 2013 case AVX2: 2014 Builder.defineMacro("__AVX2__"); 2015 case AVX: 2016 Builder.defineMacro("__AVX__"); 2017 case SSE42: 2018 Builder.defineMacro("__SSE4_2__"); 2019 case SSE41: 2020 Builder.defineMacro("__SSE4_1__"); 2021 case SSSE3: 2022 Builder.defineMacro("__SSSE3__"); 2023 case SSE3: 2024 Builder.defineMacro("__SSE3__"); 2025 case SSE2: 2026 Builder.defineMacro("__SSE2__"); 2027 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 2028 case SSE1: 2029 Builder.defineMacro("__SSE__"); 2030 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 2031 case NoSSE: 2032 break; 2033 } 2034 2035 if (Opts.MicrosoftExt && PointerWidth == 32) { 2036 switch (SSELevel) { 2037 case AVX2: 2038 case AVX: 2039 case SSE42: 2040 case SSE41: 2041 case SSSE3: 2042 case SSE3: 2043 case SSE2: 2044 Builder.defineMacro("_M_IX86_FP", Twine(2)); 2045 break; 2046 case SSE1: 2047 Builder.defineMacro("_M_IX86_FP", Twine(1)); 2048 break; 2049 default: 2050 Builder.defineMacro("_M_IX86_FP", Twine(0)); 2051 } 2052 } 2053 2054 // Each case falls through to the previous one here. 2055 switch (MMX3DNowLevel) { 2056 case AMD3DNowAthlon: 2057 Builder.defineMacro("__3dNOW_A__"); 2058 case AMD3DNow: 2059 Builder.defineMacro("__3dNOW__"); 2060 case MMX: 2061 Builder.defineMacro("__MMX__"); 2062 case NoMMX3DNow: 2063 break; 2064 } 2065 } 2066 2067 2068 bool 2069 X86TargetInfo::validateAsmConstraint(const char *&Name, 2070 TargetInfo::ConstraintInfo &Info) const { 2071 switch (*Name) { 2072 default: return false; 2073 case 'Y': // first letter of a pair: 2074 switch (*(Name+1)) { 2075 default: return false; 2076 case '0': // First SSE register. 2077 case 't': // Any SSE register, when SSE2 is enabled. 2078 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2079 case 'm': // any MMX register, when inter-unit moves enabled. 2080 break; // falls through to setAllowsRegister. 2081 } 2082 case 'a': // eax. 2083 case 'b': // ebx. 2084 case 'c': // ecx. 2085 case 'd': // edx. 2086 case 'S': // esi. 2087 case 'D': // edi. 2088 case 'A': // edx:eax. 2089 case 'f': // any x87 floating point stack register. 2090 case 't': // top of floating point stack. 2091 case 'u': // second from top of floating point stack. 2092 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2093 case 'y': // Any MMX register. 2094 case 'x': // Any SSE register. 2095 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2096 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2097 case 'l': // "Index" registers: any general register that can be used as an 2098 // index in a base+index memory access. 2099 Info.setAllowsRegister(); 2100 return true; 2101 case 'C': // SSE floating point constant. 2102 case 'G': // x87 floating point constant. 2103 case 'e': // 32-bit signed integer constant for use with zero-extending 2104 // x86_64 instructions. 2105 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2106 // x86_64 instructions. 2107 return true; 2108 } 2109 } 2110 2111 2112 std::string 2113 X86TargetInfo::convertConstraint(const char *&Constraint) const { 2114 switch (*Constraint) { 2115 case 'a': return std::string("{ax}"); 2116 case 'b': return std::string("{bx}"); 2117 case 'c': return std::string("{cx}"); 2118 case 'd': return std::string("{dx}"); 2119 case 'S': return std::string("{si}"); 2120 case 'D': return std::string("{di}"); 2121 case 'p': // address 2122 return std::string("im"); 2123 case 't': // top of floating point stack. 2124 return std::string("{st}"); 2125 case 'u': // second from top of floating point stack. 2126 return std::string("{st(1)}"); // second from top of floating point stack. 2127 default: 2128 return std::string(1, *Constraint); 2129 } 2130 } 2131 } // end anonymous namespace 2132 2133 namespace { 2134 // X86-32 generic target 2135 class X86_32TargetInfo : public X86TargetInfo { 2136 public: 2137 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2138 DoubleAlign = LongLongAlign = 32; 2139 LongDoubleWidth = 96; 2140 LongDoubleAlign = 32; 2141 SuitableAlign = 128; 2142 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2143 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2144 "a0:0:64-f80:32:32-n8:16:32-S128"; 2145 SizeType = UnsignedInt; 2146 PtrDiffType = SignedInt; 2147 IntPtrType = SignedInt; 2148 RegParmMax = 3; 2149 2150 // Use fpret for all types. 2151 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2152 (1 << TargetInfo::Double) | 2153 (1 << TargetInfo::LongDouble)); 2154 2155 // x86-32 has atomics up to 8 bytes 2156 // FIXME: Check that we actually have cmpxchg8b before setting 2157 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2158 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2159 } 2160 virtual const char *getVAListDeclaration() const { 2161 return "typedef char* __builtin_va_list;"; 2162 } 2163 2164 int getEHDataRegisterNumber(unsigned RegNo) const { 2165 if (RegNo == 0) return 0; 2166 if (RegNo == 1) return 2; 2167 return -1; 2168 } 2169 }; 2170 } // end anonymous namespace 2171 2172 namespace { 2173 class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> { 2174 public: 2175 NetBSDI386TargetInfo(const std::string &triple) : 2176 NetBSDTargetInfo<X86_32TargetInfo>(triple) { 2177 } 2178 2179 virtual unsigned getFloatEvalMethod() const { 2180 // NetBSD defaults to "double" rounding 2181 return 1; 2182 } 2183 }; 2184 } // end anonymous namespace 2185 2186 namespace { 2187 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2188 public: 2189 OpenBSDI386TargetInfo(const std::string& triple) : 2190 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2191 SizeType = UnsignedLong; 2192 IntPtrType = SignedLong; 2193 PtrDiffType = SignedLong; 2194 } 2195 }; 2196 } // end anonymous namespace 2197 2198 namespace { 2199 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2200 public: 2201 DarwinI386TargetInfo(const std::string& triple) : 2202 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2203 LongDoubleWidth = 128; 2204 LongDoubleAlign = 128; 2205 SuitableAlign = 128; 2206 SizeType = UnsignedLong; 2207 IntPtrType = SignedLong; 2208 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2209 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2210 "a0:0:64-f80:128:128-n8:16:32-S128"; 2211 HasAlignMac68kSupport = true; 2212 } 2213 2214 }; 2215 } // end anonymous namespace 2216 2217 namespace { 2218 // x86-32 Windows target 2219 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2220 public: 2221 WindowsX86_32TargetInfo(const std::string& triple) 2222 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2223 TLSSupported = false; 2224 WCharType = UnsignedShort; 2225 DoubleAlign = LongLongAlign = 64; 2226 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2227 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2228 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2229 } 2230 virtual void getTargetDefines(const LangOptions &Opts, 2231 MacroBuilder &Builder) const { 2232 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2233 } 2234 }; 2235 } // end anonymous namespace 2236 2237 namespace { 2238 2239 // x86-32 Windows Visual Studio target 2240 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2241 public: 2242 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2243 : WindowsX86_32TargetInfo(triple) { 2244 LongDoubleWidth = LongDoubleAlign = 64; 2245 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2246 } 2247 virtual void getTargetDefines(const LangOptions &Opts, 2248 MacroBuilder &Builder) const { 2249 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2250 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2251 // The value of the following reflects processor type. 2252 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2253 // We lost the original triple, so we use the default. 2254 Builder.defineMacro("_M_IX86", "600"); 2255 } 2256 }; 2257 } // end anonymous namespace 2258 2259 namespace { 2260 // x86-32 MinGW target 2261 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2262 public: 2263 MinGWX86_32TargetInfo(const std::string& triple) 2264 : WindowsX86_32TargetInfo(triple) { 2265 } 2266 virtual void getTargetDefines(const LangOptions &Opts, 2267 MacroBuilder &Builder) const { 2268 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2269 DefineStd(Builder, "WIN32", Opts); 2270 DefineStd(Builder, "WINNT", Opts); 2271 Builder.defineMacro("_X86_"); 2272 Builder.defineMacro("__MSVCRT__"); 2273 Builder.defineMacro("__MINGW32__"); 2274 2275 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2276 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2277 if (Opts.MicrosoftExt) 2278 // Provide "as-is" __declspec. 2279 Builder.defineMacro("__declspec", "__declspec"); 2280 else 2281 // Provide alias of __attribute__ like mingw32-gcc. 2282 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2283 } 2284 }; 2285 } // end anonymous namespace 2286 2287 namespace { 2288 // x86-32 Cygwin target 2289 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2290 public: 2291 CygwinX86_32TargetInfo(const std::string& triple) 2292 : X86_32TargetInfo(triple) { 2293 TLSSupported = false; 2294 WCharType = UnsignedShort; 2295 DoubleAlign = LongLongAlign = 64; 2296 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2297 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2298 "a0:0:64-f80:32:32-n8:16:32-S32"; 2299 } 2300 virtual void getTargetDefines(const LangOptions &Opts, 2301 MacroBuilder &Builder) const { 2302 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2303 Builder.defineMacro("__CYGWIN__"); 2304 Builder.defineMacro("__CYGWIN32__"); 2305 DefineStd(Builder, "unix", Opts); 2306 if (Opts.CPlusPlus) 2307 Builder.defineMacro("_GNU_SOURCE"); 2308 } 2309 }; 2310 } // end anonymous namespace 2311 2312 namespace { 2313 // x86-32 Haiku target 2314 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2315 public: 2316 HaikuX86_32TargetInfo(const std::string& triple) 2317 : X86_32TargetInfo(triple) { 2318 SizeType = UnsignedLong; 2319 IntPtrType = SignedLong; 2320 PtrDiffType = SignedLong; 2321 this->UserLabelPrefix = ""; 2322 } 2323 virtual void getTargetDefines(const LangOptions &Opts, 2324 MacroBuilder &Builder) const { 2325 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2326 Builder.defineMacro("__INTEL__"); 2327 Builder.defineMacro("__HAIKU__"); 2328 } 2329 }; 2330 } // end anonymous namespace 2331 2332 // RTEMS Target 2333 template<typename Target> 2334 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2335 protected: 2336 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2337 MacroBuilder &Builder) const { 2338 // RTEMS defines; list based off of gcc output 2339 2340 Builder.defineMacro("__rtems__"); 2341 Builder.defineMacro("__ELF__"); 2342 } 2343 public: 2344 RTEMSTargetInfo(const std::string &triple) 2345 : OSTargetInfo<Target>(triple) { 2346 this->UserLabelPrefix = ""; 2347 2348 llvm::Triple Triple(triple); 2349 switch (Triple.getArch()) { 2350 default: 2351 case llvm::Triple::x86: 2352 // this->MCountName = ".mcount"; 2353 break; 2354 case llvm::Triple::mips: 2355 case llvm::Triple::mipsel: 2356 case llvm::Triple::ppc: 2357 case llvm::Triple::ppc64: 2358 // this->MCountName = "_mcount"; 2359 break; 2360 case llvm::Triple::arm: 2361 // this->MCountName = "__mcount"; 2362 break; 2363 } 2364 2365 } 2366 }; 2367 2368 namespace { 2369 // x86-32 RTEMS target 2370 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2371 public: 2372 RTEMSX86_32TargetInfo(const std::string& triple) 2373 : X86_32TargetInfo(triple) { 2374 SizeType = UnsignedLong; 2375 IntPtrType = SignedLong; 2376 PtrDiffType = SignedLong; 2377 this->UserLabelPrefix = ""; 2378 } 2379 virtual void getTargetDefines(const LangOptions &Opts, 2380 MacroBuilder &Builder) const { 2381 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2382 Builder.defineMacro("__INTEL__"); 2383 Builder.defineMacro("__rtems__"); 2384 } 2385 }; 2386 } // end anonymous namespace 2387 2388 namespace { 2389 // x86-64 generic target 2390 class X86_64TargetInfo : public X86TargetInfo { 2391 public: 2392 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2393 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2394 LongDoubleWidth = 128; 2395 LongDoubleAlign = 128; 2396 LargeArrayMinWidth = 128; 2397 LargeArrayAlign = 128; 2398 SuitableAlign = 128; 2399 IntMaxType = SignedLong; 2400 UIntMaxType = UnsignedLong; 2401 Int64Type = SignedLong; 2402 RegParmMax = 6; 2403 2404 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2405 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2406 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2407 2408 // Use fpret only for long double. 2409 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2410 2411 // Use fp2ret for _Complex long double. 2412 ComplexLongDoubleUsesFP2Ret = true; 2413 2414 // x86-64 has atomics up to 16 bytes. 2415 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2416 // on CPUs with cmpxchg16b 2417 MaxAtomicPromoteWidth = 128; 2418 MaxAtomicInlineWidth = 64; 2419 } 2420 virtual const char *getVAListDeclaration() const { 2421 return "typedef struct __va_list_tag {" 2422 " unsigned gp_offset;" 2423 " unsigned fp_offset;" 2424 " void* overflow_arg_area;" 2425 " void* reg_save_area;" 2426 "} __va_list_tag;" 2427 "typedef __va_list_tag __builtin_va_list[1];"; 2428 } 2429 2430 int getEHDataRegisterNumber(unsigned RegNo) const { 2431 if (RegNo == 0) return 0; 2432 if (RegNo == 1) return 1; 2433 return -1; 2434 } 2435 }; 2436 } // end anonymous namespace 2437 2438 namespace { 2439 // x86-64 Windows target 2440 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2441 public: 2442 WindowsX86_64TargetInfo(const std::string& triple) 2443 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2444 TLSSupported = false; 2445 WCharType = UnsignedShort; 2446 LongWidth = LongAlign = 32; 2447 DoubleAlign = LongLongAlign = 64; 2448 IntMaxType = SignedLongLong; 2449 UIntMaxType = UnsignedLongLong; 2450 Int64Type = SignedLongLong; 2451 SizeType = UnsignedLongLong; 2452 PtrDiffType = SignedLongLong; 2453 IntPtrType = SignedLongLong; 2454 this->UserLabelPrefix = ""; 2455 } 2456 virtual void getTargetDefines(const LangOptions &Opts, 2457 MacroBuilder &Builder) const { 2458 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2459 Builder.defineMacro("_WIN64"); 2460 } 2461 virtual const char *getVAListDeclaration() const { 2462 return "typedef char* __builtin_va_list;"; 2463 } 2464 }; 2465 } // end anonymous namespace 2466 2467 namespace { 2468 // x86-64 Windows Visual Studio target 2469 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2470 public: 2471 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2472 : WindowsX86_64TargetInfo(triple) { 2473 LongDoubleWidth = LongDoubleAlign = 64; 2474 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2475 } 2476 virtual void getTargetDefines(const LangOptions &Opts, 2477 MacroBuilder &Builder) const { 2478 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2479 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2480 Builder.defineMacro("_M_X64"); 2481 Builder.defineMacro("_M_AMD64"); 2482 } 2483 }; 2484 } // end anonymous namespace 2485 2486 namespace { 2487 // x86-64 MinGW target 2488 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2489 public: 2490 MinGWX86_64TargetInfo(const std::string& triple) 2491 : WindowsX86_64TargetInfo(triple) { 2492 } 2493 virtual void getTargetDefines(const LangOptions &Opts, 2494 MacroBuilder &Builder) const { 2495 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2496 DefineStd(Builder, "WIN64", Opts); 2497 Builder.defineMacro("__MSVCRT__"); 2498 Builder.defineMacro("__MINGW32__"); 2499 Builder.defineMacro("__MINGW64__"); 2500 2501 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2502 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2503 if (Opts.MicrosoftExt) 2504 // Provide "as-is" __declspec. 2505 Builder.defineMacro("__declspec", "__declspec"); 2506 else 2507 // Provide alias of __attribute__ like mingw32-gcc. 2508 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2509 } 2510 }; 2511 } // end anonymous namespace 2512 2513 namespace { 2514 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2515 public: 2516 DarwinX86_64TargetInfo(const std::string& triple) 2517 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2518 Int64Type = SignedLongLong; 2519 } 2520 }; 2521 } // end anonymous namespace 2522 2523 namespace { 2524 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2525 public: 2526 OpenBSDX86_64TargetInfo(const std::string& triple) 2527 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2528 IntMaxType = SignedLongLong; 2529 UIntMaxType = UnsignedLongLong; 2530 Int64Type = SignedLongLong; 2531 } 2532 }; 2533 } // end anonymous namespace 2534 2535 namespace { 2536 class ARMTargetInfo : public TargetInfo { 2537 // Possible FPU choices. 2538 enum FPUMode { 2539 NoFPU, 2540 VFP2FPU, 2541 VFP3FPU, 2542 NeonFPU 2543 }; 2544 2545 static bool FPUModeIsVFP(FPUMode Mode) { 2546 return Mode >= VFP2FPU && Mode <= NeonFPU; 2547 } 2548 2549 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2550 static const char * const GCCRegNames[]; 2551 2552 std::string ABI, CPU; 2553 2554 unsigned FPU : 3; 2555 2556 unsigned IsThumb : 1; 2557 2558 // Initialized via features. 2559 unsigned SoftFloat : 1; 2560 unsigned SoftFloatABI : 1; 2561 2562 static const Builtin::Info BuiltinInfo[]; 2563 2564 public: 2565 ARMTargetInfo(const std::string &TripleStr) 2566 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2567 { 2568 BigEndian = false; 2569 SizeType = UnsignedInt; 2570 PtrDiffType = SignedInt; 2571 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2572 WCharType = UnsignedInt; 2573 2574 // {} in inline assembly are neon specifiers, not assembly variant 2575 // specifiers. 2576 NoAsmVariants = true; 2577 2578 // FIXME: Should we just treat this as a feature? 2579 IsThumb = getTriple().getArchName().startswith("thumb"); 2580 if (IsThumb) { 2581 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2582 // so set preferred for small types to 32. 2583 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2584 "i64:64:64-f32:32:32-f64:64:64-" 2585 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2586 } else { 2587 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2588 "i64:64:64-f32:32:32-f64:64:64-" 2589 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2590 } 2591 2592 // ARM targets default to using the ARM C++ ABI. 2593 CXXABI = CXXABI_ARM; 2594 2595 // ARM has atomics up to 8 bytes 2596 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2597 MaxAtomicPromoteWidth = 64; 2598 } 2599 virtual const char *getABI() const { return ABI.c_str(); } 2600 virtual bool setABI(const std::string &Name) { 2601 ABI = Name; 2602 2603 // The defaults (above) are for AAPCS, check if we need to change them. 2604 // 2605 // FIXME: We need support for -meabi... we could just mangle it into the 2606 // name. 2607 if (Name == "apcs-gnu") { 2608 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2609 SizeType = UnsignedLong; 2610 2611 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2612 WCharType = SignedInt; 2613 2614 // Do not respect the alignment of bit-field types when laying out 2615 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2616 UseBitFieldTypeAlignment = false; 2617 2618 /// Do force alignment of members that follow zero length bitfields. If 2619 /// the alignment of the zero-length bitfield is greater than the member 2620 /// that follows it, `bar', `bar' will be aligned as the type of the 2621 /// zero length bitfield. 2622 UseZeroLengthBitfieldAlignment = true; 2623 2624 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2625 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2626 /// gcc. 2627 ZeroLengthBitfieldBoundary = 32; 2628 2629 if (IsThumb) { 2630 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2631 // so set preferred for small types to 32. 2632 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2633 "i64:32:64-f32:32:32-f64:32:64-" 2634 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2635 } else { 2636 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2637 "i64:32:64-f32:32:32-f64:32:64-" 2638 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2639 } 2640 2641 // FIXME: Override "preferred align" for double and long long. 2642 } else if (Name == "aapcs") { 2643 // FIXME: Enumerated types are variable width in straight AAPCS. 2644 } else if (Name == "aapcs-linux") { 2645 ; 2646 } else 2647 return false; 2648 2649 return true; 2650 } 2651 2652 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2653 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2654 Features["vfp2"] = true; 2655 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2656 Features["neon"] = true; 2657 } 2658 2659 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2660 const std::string &Name, 2661 bool Enabled) const { 2662 if (Name == "soft-float" || Name == "soft-float-abi" || 2663 Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16") { 2664 Features[Name] = Enabled; 2665 } else 2666 return false; 2667 2668 return true; 2669 } 2670 2671 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2672 FPU = NoFPU; 2673 SoftFloat = SoftFloatABI = false; 2674 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2675 if (Features[i] == "+soft-float") 2676 SoftFloat = true; 2677 else if (Features[i] == "+soft-float-abi") 2678 SoftFloatABI = true; 2679 else if (Features[i] == "+vfp2") 2680 FPU = VFP2FPU; 2681 else if (Features[i] == "+vfp3") 2682 FPU = VFP3FPU; 2683 else if (Features[i] == "+neon") 2684 FPU = NeonFPU; 2685 } 2686 2687 // Remove front-end specific options which the backend handles differently. 2688 std::vector<std::string>::iterator it; 2689 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2690 if (it != Features.end()) 2691 Features.erase(it); 2692 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2693 if (it != Features.end()) 2694 Features.erase(it); 2695 } 2696 2697 static const char *getCPUDefineSuffix(StringRef Name) { 2698 return llvm::StringSwitch<const char*>(Name) 2699 .Cases("arm8", "arm810", "4") 2700 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2701 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2702 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2703 .Case("ep9312", "4T") 2704 .Cases("arm10tdmi", "arm1020t", "5T") 2705 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2706 .Case("arm926ej-s", "5TEJ") 2707 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2708 .Cases("xscale", "iwmmxt", "5TE") 2709 .Case("arm1136j-s", "6J") 2710 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2711 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2712 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2713 .Cases("cortex-a8", "cortex-a9", "7A") 2714 .Case("cortex-m3", "7M") 2715 .Case("cortex-m0", "6M") 2716 .Default(0); 2717 } 2718 virtual bool setCPU(const std::string &Name) { 2719 if (!getCPUDefineSuffix(Name)) 2720 return false; 2721 2722 CPU = Name; 2723 return true; 2724 } 2725 virtual void getTargetDefines(const LangOptions &Opts, 2726 MacroBuilder &Builder) const { 2727 // Target identification. 2728 Builder.defineMacro("__arm"); 2729 Builder.defineMacro("__arm__"); 2730 2731 // Target properties. 2732 Builder.defineMacro("__ARMEL__"); 2733 Builder.defineMacro("__LITTLE_ENDIAN__"); 2734 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2735 2736 StringRef CPUArch = getCPUDefineSuffix(CPU); 2737 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2738 2739 // Subtarget options. 2740 2741 // FIXME: It's more complicated than this and we don't really support 2742 // interworking. 2743 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2744 Builder.defineMacro("__THUMB_INTERWORK__"); 2745 2746 if (ABI == "aapcs" || ABI == "aapcs-linux") 2747 Builder.defineMacro("__ARM_EABI__"); 2748 2749 if (SoftFloat) 2750 Builder.defineMacro("__SOFTFP__"); 2751 2752 if (CPU == "xscale") 2753 Builder.defineMacro("__XSCALE__"); 2754 2755 bool IsARMv7 = CPUArch.startswith("7"); 2756 if (IsThumb) { 2757 Builder.defineMacro("__THUMBEL__"); 2758 Builder.defineMacro("__thumb__"); 2759 if (CPUArch == "6T2" || IsARMv7) 2760 Builder.defineMacro("__thumb2__"); 2761 } 2762 2763 // Note, this is always on in gcc, even though it doesn't make sense. 2764 Builder.defineMacro("__APCS_32__"); 2765 2766 if (FPUModeIsVFP((FPUMode) FPU)) 2767 Builder.defineMacro("__VFP_FP__"); 2768 2769 // This only gets set when Neon instructions are actually available, unlike 2770 // the VFP define, hence the soft float and arch check. This is subtly 2771 // different from gcc, we follow the intent which was that it should be set 2772 // when Neon instructions are actually available. 2773 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2774 Builder.defineMacro("__ARM_NEON__"); 2775 } 2776 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2777 unsigned &NumRecords) const { 2778 Records = BuiltinInfo; 2779 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2780 } 2781 virtual const char *getVAListDeclaration() const { 2782 return "typedef void* __builtin_va_list;"; 2783 } 2784 virtual void getGCCRegNames(const char * const *&Names, 2785 unsigned &NumNames) const; 2786 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2787 unsigned &NumAliases) const; 2788 virtual bool validateAsmConstraint(const char *&Name, 2789 TargetInfo::ConstraintInfo &Info) const { 2790 // FIXME: Check if this is complete 2791 switch (*Name) { 2792 default: 2793 case 'l': // r0-r7 2794 case 'h': // r8-r15 2795 case 'w': // VFP Floating point register single precision 2796 case 'P': // VFP Floating point register double precision 2797 Info.setAllowsRegister(); 2798 return true; 2799 case 'Q': // A memory address that is a single base register. 2800 Info.setAllowsMemory(); 2801 return true; 2802 case 'U': // a memory reference... 2803 switch (Name[1]) { 2804 case 'q': // ...ARMV4 ldrsb 2805 case 'v': // ...VFP load/store (reg+constant offset) 2806 case 'y': // ...iWMMXt load/store 2807 case 't': // address valid for load/store opaque types wider 2808 // than 128-bits 2809 case 'n': // valid address for Neon doubleword vector load/store 2810 case 'm': // valid address for Neon element and structure load/store 2811 case 's': // valid address for non-offset loads/stores of quad-word 2812 // values in four ARM registers 2813 Info.setAllowsMemory(); 2814 Name++; 2815 return true; 2816 } 2817 } 2818 return false; 2819 } 2820 virtual std::string convertConstraint(const char *&Constraint) const { 2821 std::string R; 2822 switch (*Constraint) { 2823 case 'U': // Two-character constraint; add "^" hint for later parsing. 2824 R = std::string("^") + std::string(Constraint, 2); 2825 Constraint++; 2826 break; 2827 case 'p': // 'p' should be translated to 'r' by default. 2828 R = std::string("r"); 2829 break; 2830 default: 2831 return std::string(1, *Constraint); 2832 } 2833 return R; 2834 } 2835 virtual const char *getClobbers() const { 2836 // FIXME: Is this really right? 2837 return ""; 2838 } 2839 }; 2840 2841 const char * const ARMTargetInfo::GCCRegNames[] = { 2842 // Integer registers 2843 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2844 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2845 2846 // Float registers 2847 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2848 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2849 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2850 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2851 2852 // Double registers 2853 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2854 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2855 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2856 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2857 2858 // Quad registers 2859 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2860 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2861 }; 2862 2863 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2864 unsigned &NumNames) const { 2865 Names = GCCRegNames; 2866 NumNames = llvm::array_lengthof(GCCRegNames); 2867 } 2868 2869 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2870 { { "a1" }, "r0" }, 2871 { { "a2" }, "r1" }, 2872 { { "a3" }, "r2" }, 2873 { { "a4" }, "r3" }, 2874 { { "v1" }, "r4" }, 2875 { { "v2" }, "r5" }, 2876 { { "v3" }, "r6" }, 2877 { { "v4" }, "r7" }, 2878 { { "v5" }, "r8" }, 2879 { { "v6", "rfp" }, "r9" }, 2880 { { "sl" }, "r10" }, 2881 { { "fp" }, "r11" }, 2882 { { "ip" }, "r12" }, 2883 { { "r13" }, "sp" }, 2884 { { "r14" }, "lr" }, 2885 { { "r15" }, "pc" }, 2886 // The S, D and Q registers overlap, but aren't really aliases; we 2887 // don't want to substitute one of these for a different-sized one. 2888 }; 2889 2890 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2891 unsigned &NumAliases) const { 2892 Aliases = GCCRegAliases; 2893 NumAliases = llvm::array_lengthof(GCCRegAliases); 2894 } 2895 2896 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2897 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2898 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2899 ALL_LANGUAGES }, 2900 #include "clang/Basic/BuiltinsARM.def" 2901 }; 2902 } // end anonymous namespace. 2903 2904 namespace { 2905 class DarwinARMTargetInfo : 2906 public DarwinTargetInfo<ARMTargetInfo> { 2907 protected: 2908 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2909 MacroBuilder &Builder) const { 2910 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2911 } 2912 2913 public: 2914 DarwinARMTargetInfo(const std::string& triple) 2915 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2916 HasAlignMac68kSupport = true; 2917 // iOS always has 64-bit atomic instructions. 2918 // FIXME: This should be based off of the target features in ARMTargetInfo. 2919 MaxAtomicInlineWidth = 64; 2920 } 2921 }; 2922 } // end anonymous namespace. 2923 2924 2925 namespace { 2926 // Hexagon abstract base class 2927 class HexagonTargetInfo : public TargetInfo { 2928 static const Builtin::Info BuiltinInfo[]; 2929 static const char * const GCCRegNames[]; 2930 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2931 std::string CPU; 2932 public: 2933 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 2934 BigEndian = false; 2935 DescriptionString = ("e-p:32:32:32-" 2936 "i64:64:64-i32:32:32-" 2937 "i16:16:16-i1:32:32-a:0:0"); 2938 2939 // {} in inline assembly are packet specifiers, not assembly variant 2940 // specifiers. 2941 NoAsmVariants = true; 2942 } 2943 2944 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2945 unsigned &NumRecords) const { 2946 Records = BuiltinInfo; 2947 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 2948 } 2949 2950 virtual bool validateAsmConstraint(const char *&Name, 2951 TargetInfo::ConstraintInfo &Info) const { 2952 return true; 2953 } 2954 2955 virtual void getTargetDefines(const LangOptions &Opts, 2956 MacroBuilder &Builder) const; 2957 2958 virtual const char *getVAListDeclaration() const { 2959 return "typedef char* __builtin_va_list;"; 2960 } 2961 virtual void getGCCRegNames(const char * const *&Names, 2962 unsigned &NumNames) const; 2963 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2964 unsigned &NumAliases) const; 2965 virtual const char *getClobbers() const { 2966 return ""; 2967 } 2968 2969 static const char *getHexagonCPUSuffix(StringRef Name) { 2970 return llvm::StringSwitch<const char*>(Name) 2971 .Case("hexagonv2", "2") 2972 .Case("hexagonv3", "3") 2973 .Case("hexagonv4", "4") 2974 .Default(0); 2975 } 2976 2977 virtual bool setCPU(const std::string &Name) { 2978 if (!getHexagonCPUSuffix(Name)) 2979 return false; 2980 2981 CPU = Name; 2982 return true; 2983 } 2984 }; 2985 2986 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 2987 MacroBuilder &Builder) const { 2988 Builder.defineMacro("qdsp6"); 2989 Builder.defineMacro("__qdsp6", "1"); 2990 Builder.defineMacro("__qdsp6__", "1"); 2991 2992 Builder.defineMacro("hexagon"); 2993 Builder.defineMacro("__hexagon", "1"); 2994 Builder.defineMacro("__hexagon__", "1"); 2995 2996 if(CPU == "hexagonv1") { 2997 Builder.defineMacro("__HEXAGON_V1__"); 2998 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 2999 if(Opts.HexagonQdsp6Compat) { 3000 Builder.defineMacro("__QDSP6_V1__"); 3001 Builder.defineMacro("__QDSP6_ARCH__", "1"); 3002 } 3003 } 3004 else if(CPU == "hexagonv2") { 3005 Builder.defineMacro("__HEXAGON_V2__"); 3006 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 3007 if(Opts.HexagonQdsp6Compat) { 3008 Builder.defineMacro("__QDSP6_V2__"); 3009 Builder.defineMacro("__QDSP6_ARCH__", "2"); 3010 } 3011 } 3012 else if(CPU == "hexagonv3") { 3013 Builder.defineMacro("__HEXAGON_V3__"); 3014 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 3015 if(Opts.HexagonQdsp6Compat) { 3016 Builder.defineMacro("__QDSP6_V3__"); 3017 Builder.defineMacro("__QDSP6_ARCH__", "3"); 3018 } 3019 } 3020 else if(CPU == "hexagonv4") { 3021 Builder.defineMacro("__HEXAGON_V4__"); 3022 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 3023 if(Opts.HexagonQdsp6Compat) { 3024 Builder.defineMacro("__QDSP6_V4__"); 3025 Builder.defineMacro("__QDSP6_ARCH__", "4"); 3026 } 3027 } 3028 } 3029 3030 const char * const HexagonTargetInfo::GCCRegNames[] = { 3031 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3032 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3033 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3034 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3035 "p0", "p1", "p2", "p3", 3036 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 3037 }; 3038 3039 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 3040 unsigned &NumNames) const { 3041 Names = GCCRegNames; 3042 NumNames = llvm::array_lengthof(GCCRegNames); 3043 } 3044 3045 3046 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 3047 { { "sp" }, "r29" }, 3048 { { "fp" }, "r30" }, 3049 { { "lr" }, "r31" }, 3050 }; 3051 3052 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3053 unsigned &NumAliases) const { 3054 Aliases = GCCRegAliases; 3055 NumAliases = llvm::array_lengthof(GCCRegAliases); 3056 } 3057 3058 3059 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 3060 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3061 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3062 ALL_LANGUAGES }, 3063 #include "clang/Basic/BuiltinsHexagon.def" 3064 }; 3065 } 3066 3067 3068 namespace { 3069 class SparcV8TargetInfo : public TargetInfo { 3070 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3071 static const char * const GCCRegNames[]; 3072 bool SoftFloat; 3073 public: 3074 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 3075 // FIXME: Support Sparc quad-precision long double? 3076 BigEndian = false; 3077 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 3078 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3079 } 3080 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3081 const std::string &Name, 3082 bool Enabled) const { 3083 if (Name == "soft-float") 3084 Features[Name] = Enabled; 3085 else 3086 return false; 3087 3088 return true; 3089 } 3090 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3091 SoftFloat = false; 3092 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3093 if (Features[i] == "+soft-float") 3094 SoftFloat = true; 3095 } 3096 virtual void getTargetDefines(const LangOptions &Opts, 3097 MacroBuilder &Builder) const { 3098 DefineStd(Builder, "sparc", Opts); 3099 Builder.defineMacro("__sparcv8"); 3100 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3101 3102 if (SoftFloat) 3103 Builder.defineMacro("SOFT_FLOAT", "1"); 3104 } 3105 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3106 unsigned &NumRecords) const { 3107 // FIXME: Implement! 3108 } 3109 virtual const char *getVAListDeclaration() const { 3110 return "typedef void* __builtin_va_list;"; 3111 } 3112 virtual void getGCCRegNames(const char * const *&Names, 3113 unsigned &NumNames) const; 3114 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3115 unsigned &NumAliases) const; 3116 virtual bool validateAsmConstraint(const char *&Name, 3117 TargetInfo::ConstraintInfo &info) const { 3118 // FIXME: Implement! 3119 return false; 3120 } 3121 virtual const char *getClobbers() const { 3122 // FIXME: Implement! 3123 return ""; 3124 } 3125 }; 3126 3127 const char * const SparcV8TargetInfo::GCCRegNames[] = { 3128 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3129 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3130 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3131 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3132 }; 3133 3134 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3135 unsigned &NumNames) const { 3136 Names = GCCRegNames; 3137 NumNames = llvm::array_lengthof(GCCRegNames); 3138 } 3139 3140 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3141 { { "g0" }, "r0" }, 3142 { { "g1" }, "r1" }, 3143 { { "g2" }, "r2" }, 3144 { { "g3" }, "r3" }, 3145 { { "g4" }, "r4" }, 3146 { { "g5" }, "r5" }, 3147 { { "g6" }, "r6" }, 3148 { { "g7" }, "r7" }, 3149 { { "o0" }, "r8" }, 3150 { { "o1" }, "r9" }, 3151 { { "o2" }, "r10" }, 3152 { { "o3" }, "r11" }, 3153 { { "o4" }, "r12" }, 3154 { { "o5" }, "r13" }, 3155 { { "o6", "sp" }, "r14" }, 3156 { { "o7" }, "r15" }, 3157 { { "l0" }, "r16" }, 3158 { { "l1" }, "r17" }, 3159 { { "l2" }, "r18" }, 3160 { { "l3" }, "r19" }, 3161 { { "l4" }, "r20" }, 3162 { { "l5" }, "r21" }, 3163 { { "l6" }, "r22" }, 3164 { { "l7" }, "r23" }, 3165 { { "i0" }, "r24" }, 3166 { { "i1" }, "r25" }, 3167 { { "i2" }, "r26" }, 3168 { { "i3" }, "r27" }, 3169 { { "i4" }, "r28" }, 3170 { { "i5" }, "r29" }, 3171 { { "i6", "fp" }, "r30" }, 3172 { { "i7" }, "r31" }, 3173 }; 3174 3175 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3176 unsigned &NumAliases) const { 3177 Aliases = GCCRegAliases; 3178 NumAliases = llvm::array_lengthof(GCCRegAliases); 3179 } 3180 } // end anonymous namespace. 3181 3182 namespace { 3183 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3184 public: 3185 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3186 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3187 SizeType = UnsignedInt; 3188 PtrDiffType = SignedInt; 3189 } 3190 }; 3191 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3192 public: 3193 SolarisSparcV8TargetInfo(const std::string& triple) : 3194 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3195 SizeType = UnsignedInt; 3196 PtrDiffType = SignedInt; 3197 } 3198 }; 3199 } // end anonymous namespace. 3200 3201 namespace { 3202 class MSP430TargetInfo : public TargetInfo { 3203 static const char * const GCCRegNames[]; 3204 public: 3205 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3206 BigEndian = false; 3207 TLSSupported = false; 3208 IntWidth = 16; IntAlign = 16; 3209 LongWidth = 32; LongLongWidth = 64; 3210 LongAlign = LongLongAlign = 16; 3211 PointerWidth = 16; PointerAlign = 16; 3212 SuitableAlign = 16; 3213 SizeType = UnsignedInt; 3214 IntMaxType = SignedLong; 3215 UIntMaxType = UnsignedLong; 3216 IntPtrType = SignedShort; 3217 PtrDiffType = SignedInt; 3218 SigAtomicType = SignedLong; 3219 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3220 } 3221 virtual void getTargetDefines(const LangOptions &Opts, 3222 MacroBuilder &Builder) const { 3223 Builder.defineMacro("MSP430"); 3224 Builder.defineMacro("__MSP430__"); 3225 // FIXME: defines for different 'flavours' of MCU 3226 } 3227 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3228 unsigned &NumRecords) const { 3229 // FIXME: Implement. 3230 Records = 0; 3231 NumRecords = 0; 3232 } 3233 virtual void getGCCRegNames(const char * const *&Names, 3234 unsigned &NumNames) const; 3235 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3236 unsigned &NumAliases) const { 3237 // No aliases. 3238 Aliases = 0; 3239 NumAliases = 0; 3240 } 3241 virtual bool validateAsmConstraint(const char *&Name, 3242 TargetInfo::ConstraintInfo &info) const { 3243 // No target constraints for now. 3244 return false; 3245 } 3246 virtual const char *getClobbers() const { 3247 // FIXME: Is this really right? 3248 return ""; 3249 } 3250 virtual const char *getVAListDeclaration() const { 3251 // FIXME: implement 3252 return "typedef char* __builtin_va_list;"; 3253 } 3254 }; 3255 3256 const char * const MSP430TargetInfo::GCCRegNames[] = { 3257 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3258 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3259 }; 3260 3261 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3262 unsigned &NumNames) const { 3263 Names = GCCRegNames; 3264 NumNames = llvm::array_lengthof(GCCRegNames); 3265 } 3266 } 3267 3268 namespace { 3269 3270 // LLVM and Clang cannot be used directly to output native binaries for 3271 // target, but is used to compile C code to llvm bitcode with correct 3272 // type and alignment information. 3273 // 3274 // TCE uses the llvm bitcode as input and uses it for generating customized 3275 // target processor and program binary. TCE co-design environment is 3276 // publicly available in http://tce.cs.tut.fi 3277 3278 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3279 3, // opencl_global 3280 4, // opencl_local 3281 5 // opencl_constant 3282 }; 3283 3284 class TCETargetInfo : public TargetInfo{ 3285 public: 3286 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3287 TLSSupported = false; 3288 IntWidth = 32; 3289 LongWidth = LongLongWidth = 32; 3290 PointerWidth = 32; 3291 IntAlign = 32; 3292 LongAlign = LongLongAlign = 32; 3293 PointerAlign = 32; 3294 SuitableAlign = 32; 3295 SizeType = UnsignedInt; 3296 IntMaxType = SignedLong; 3297 UIntMaxType = UnsignedLong; 3298 IntPtrType = SignedInt; 3299 PtrDiffType = SignedInt; 3300 FloatWidth = 32; 3301 FloatAlign = 32; 3302 DoubleWidth = 32; 3303 DoubleAlign = 32; 3304 LongDoubleWidth = 32; 3305 LongDoubleAlign = 32; 3306 FloatFormat = &llvm::APFloat::IEEEsingle; 3307 DoubleFormat = &llvm::APFloat::IEEEsingle; 3308 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3309 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3310 "i16:16:32-i32:32:32-i64:32:32-" 3311 "f32:32:32-f64:32:32-v64:32:32-" 3312 "v128:32:32-a0:0:32-n32"; 3313 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3314 } 3315 3316 virtual void getTargetDefines(const LangOptions &Opts, 3317 MacroBuilder &Builder) const { 3318 DefineStd(Builder, "tce", Opts); 3319 Builder.defineMacro("__TCE__"); 3320 Builder.defineMacro("__TCE_V1__"); 3321 } 3322 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3323 unsigned &NumRecords) const {} 3324 virtual const char *getClobbers() const { 3325 return ""; 3326 } 3327 virtual const char *getVAListDeclaration() const { 3328 return "typedef void* __builtin_va_list;"; 3329 } 3330 virtual void getGCCRegNames(const char * const *&Names, 3331 unsigned &NumNames) const {} 3332 virtual bool validateAsmConstraint(const char *&Name, 3333 TargetInfo::ConstraintInfo &info) const { 3334 return true; 3335 } 3336 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3337 unsigned &NumAliases) const {} 3338 }; 3339 } 3340 3341 namespace { 3342 class MipsTargetInfoBase : public TargetInfo { 3343 std::string CPU; 3344 protected: 3345 std::string ABI; 3346 public: 3347 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3348 : TargetInfo(triple), ABI(ABIStr) {} 3349 virtual const char *getABI() const { return ABI.c_str(); } 3350 virtual bool setABI(const std::string &Name) = 0; 3351 virtual bool setCPU(const std::string &Name) { 3352 CPU = Name; 3353 return true; 3354 } 3355 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3356 Features[ABI] = true; 3357 Features[CPU] = true; 3358 } 3359 virtual void getArchDefines(const LangOptions &Opts, 3360 MacroBuilder &Builder) const = 0; 3361 virtual void getTargetDefines(const LangOptions &Opts, 3362 MacroBuilder &Builder) const = 0; 3363 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3364 unsigned &NumRecords) const { 3365 // FIXME: Implement! 3366 } 3367 virtual const char *getVAListDeclaration() const { 3368 return "typedef void* __builtin_va_list;"; 3369 } 3370 virtual void getGCCRegNames(const char * const *&Names, 3371 unsigned &NumNames) const { 3372 static const char * const GCCRegNames[] = { 3373 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3374 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3375 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3376 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3377 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3378 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3379 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3380 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3381 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3382 "$fcc5","$fcc6","$fcc7" 3383 }; 3384 Names = GCCRegNames; 3385 NumNames = llvm::array_lengthof(GCCRegNames); 3386 } 3387 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3388 unsigned &NumAliases) const = 0; 3389 virtual bool validateAsmConstraint(const char *&Name, 3390 TargetInfo::ConstraintInfo &Info) const { 3391 switch (*Name) { 3392 default: 3393 return false; 3394 3395 case 'r': // CPU registers. 3396 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3397 case 'y': // Equivalent to "r", backwards compatibility only. 3398 case 'f': // floating-point registers. 3399 Info.setAllowsRegister(); 3400 return true; 3401 } 3402 } 3403 3404 virtual const char *getClobbers() const { 3405 // FIXME: Implement! 3406 return ""; 3407 } 3408 }; 3409 3410 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3411 public: 3412 Mips32TargetInfoBase(const std::string& triple) : 3413 MipsTargetInfoBase(triple, "o32") { 3414 SizeType = UnsignedInt; 3415 PtrDiffType = SignedInt; 3416 } 3417 virtual bool setABI(const std::string &Name) { 3418 if ((Name == "o32") || (Name == "eabi")) { 3419 ABI = Name; 3420 return true; 3421 } else 3422 return false; 3423 } 3424 virtual void getArchDefines(const LangOptions &Opts, 3425 MacroBuilder &Builder) const { 3426 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3427 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3428 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3429 3430 if (ABI == "o32") { 3431 Builder.defineMacro("__mips_o32"); 3432 Builder.defineMacro("_ABIO32", "1"); 3433 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3434 } 3435 else if (ABI == "eabi") 3436 Builder.defineMacro("__mips_eabi"); 3437 else 3438 llvm_unreachable("Invalid ABI for Mips32."); 3439 } 3440 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3441 unsigned &NumAliases) const { 3442 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3443 { { "at" }, "$1" }, 3444 { { "v0" }, "$2" }, 3445 { { "v1" }, "$3" }, 3446 { { "a0" }, "$4" }, 3447 { { "a1" }, "$5" }, 3448 { { "a2" }, "$6" }, 3449 { { "a3" }, "$7" }, 3450 { { "t0" }, "$8" }, 3451 { { "t1" }, "$9" }, 3452 { { "t2" }, "$10" }, 3453 { { "t3" }, "$11" }, 3454 { { "t4" }, "$12" }, 3455 { { "t5" }, "$13" }, 3456 { { "t6" }, "$14" }, 3457 { { "t7" }, "$15" }, 3458 { { "s0" }, "$16" }, 3459 { { "s1" }, "$17" }, 3460 { { "s2" }, "$18" }, 3461 { { "s3" }, "$19" }, 3462 { { "s4" }, "$20" }, 3463 { { "s5" }, "$21" }, 3464 { { "s6" }, "$22" }, 3465 { { "s7" }, "$23" }, 3466 { { "t8" }, "$24" }, 3467 { { "t9" }, "$25" }, 3468 { { "k0" }, "$26" }, 3469 { { "k1" }, "$27" }, 3470 { { "gp" }, "$28" }, 3471 { { "sp" }, "$29" }, 3472 { { "fp" }, "$30" }, 3473 { { "ra" }, "$31" } 3474 }; 3475 Aliases = GCCRegAliases; 3476 NumAliases = llvm::array_lengthof(GCCRegAliases); 3477 } 3478 }; 3479 3480 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3481 public: 3482 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3483 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3484 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3485 } 3486 virtual void getTargetDefines(const LangOptions &Opts, 3487 MacroBuilder &Builder) const { 3488 DefineStd(Builder, "mips", Opts); 3489 Builder.defineMacro("_mips"); 3490 DefineStd(Builder, "MIPSEB", Opts); 3491 Builder.defineMacro("_MIPSEB"); 3492 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3493 getArchDefines(Opts, Builder); 3494 } 3495 }; 3496 3497 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3498 public: 3499 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3500 BigEndian = false; 3501 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3502 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3503 } 3504 virtual void getTargetDefines(const LangOptions &Opts, 3505 MacroBuilder &Builder) const { 3506 DefineStd(Builder, "mips", Opts); 3507 Builder.defineMacro("_mips"); 3508 DefineStd(Builder, "MIPSEL", Opts); 3509 Builder.defineMacro("_MIPSEL"); 3510 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3511 getArchDefines(Opts, Builder); 3512 } 3513 }; 3514 3515 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3516 virtual void SetDescriptionString(const std::string &Name) = 0; 3517 public: 3518 Mips64TargetInfoBase(const std::string& triple) : 3519 MipsTargetInfoBase(triple, "n64") { 3520 LongWidth = LongAlign = 64; 3521 PointerWidth = PointerAlign = 64; 3522 LongDoubleWidth = LongDoubleAlign = 128; 3523 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3524 SuitableAlign = 128; 3525 } 3526 virtual bool setABI(const std::string &Name) { 3527 SetDescriptionString(Name); 3528 3529 if (Name != "n32" && Name != "n64") 3530 return false; 3531 3532 ABI = Name; 3533 3534 if (Name == "n32") { 3535 LongWidth = LongAlign = 32; 3536 PointerWidth = PointerAlign = 32; 3537 } 3538 3539 return true; 3540 } 3541 virtual void getArchDefines(const LangOptions &Opts, 3542 MacroBuilder &Builder) const { 3543 if (ABI == "n32") { 3544 Builder.defineMacro("__mips_n32"); 3545 Builder.defineMacro("_ABIN32", "2"); 3546 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3547 } 3548 else if (ABI == "n64") { 3549 Builder.defineMacro("__mips_n64"); 3550 Builder.defineMacro("_ABI64", "3"); 3551 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3552 } 3553 else 3554 llvm_unreachable("Invalid ABI for Mips64."); 3555 } 3556 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3557 unsigned &NumAliases) const { 3558 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3559 { { "at" }, "$1" }, 3560 { { "v0" }, "$2" }, 3561 { { "v1" }, "$3" }, 3562 { { "a0" }, "$4" }, 3563 { { "a1" }, "$5" }, 3564 { { "a2" }, "$6" }, 3565 { { "a3" }, "$7" }, 3566 { { "a4" }, "$8" }, 3567 { { "a5" }, "$9" }, 3568 { { "a6" }, "$10" }, 3569 { { "a7" }, "$11" }, 3570 { { "t0" }, "$12" }, 3571 { { "t1" }, "$13" }, 3572 { { "t2" }, "$14" }, 3573 { { "t3" }, "$15" }, 3574 { { "s0" }, "$16" }, 3575 { { "s1" }, "$17" }, 3576 { { "s2" }, "$18" }, 3577 { { "s3" }, "$19" }, 3578 { { "s4" }, "$20" }, 3579 { { "s5" }, "$21" }, 3580 { { "s6" }, "$22" }, 3581 { { "s7" }, "$23" }, 3582 { { "t8" }, "$24" }, 3583 { { "t9" }, "$25" }, 3584 { { "k0" }, "$26" }, 3585 { { "k1" }, "$27" }, 3586 { { "gp" }, "$28" }, 3587 { { "sp" }, "$29" }, 3588 { { "fp" }, "$30" }, 3589 { { "ra" }, "$31" } 3590 }; 3591 Aliases = GCCRegAliases; 3592 NumAliases = llvm::array_lengthof(GCCRegAliases); 3593 } 3594 }; 3595 3596 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3597 virtual void SetDescriptionString(const std::string &Name) { 3598 // Change DescriptionString only if ABI is n32. 3599 if (Name == "n32") 3600 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3601 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3602 "v64:64:64-n32"; 3603 } 3604 public: 3605 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3606 // Default ABI is n64. 3607 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3608 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3609 "v64:64:64-n32"; 3610 } 3611 virtual void getTargetDefines(const LangOptions &Opts, 3612 MacroBuilder &Builder) const { 3613 DefineStd(Builder, "mips", Opts); 3614 Builder.defineMacro("_mips"); 3615 DefineStd(Builder, "MIPSEB", Opts); 3616 Builder.defineMacro("_MIPSEB"); 3617 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3618 getArchDefines(Opts, Builder); 3619 } 3620 }; 3621 3622 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3623 virtual void SetDescriptionString(const std::string &Name) { 3624 // Change DescriptionString only if ABI is n32. 3625 if (Name == "n32") 3626 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3627 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3628 "-v64:64:64-n32"; 3629 } 3630 public: 3631 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3632 // Default ABI is n64. 3633 BigEndian = false; 3634 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3635 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3636 "v64:64:64-n32"; 3637 } 3638 virtual void getTargetDefines(const LangOptions &Opts, 3639 MacroBuilder &Builder) const { 3640 DefineStd(Builder, "mips", Opts); 3641 Builder.defineMacro("_mips"); 3642 DefineStd(Builder, "MIPSEL", Opts); 3643 Builder.defineMacro("_MIPSEL"); 3644 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3645 getArchDefines(Opts, Builder); 3646 } 3647 }; 3648 } // end anonymous namespace. 3649 3650 namespace { 3651 class PNaClTargetInfo : public TargetInfo { 3652 public: 3653 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3654 BigEndian = false; 3655 this->UserLabelPrefix = ""; 3656 this->LongAlign = 32; 3657 this->LongWidth = 32; 3658 this->PointerAlign = 32; 3659 this->PointerWidth = 32; 3660 this->IntMaxType = TargetInfo::SignedLongLong; 3661 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3662 this->Int64Type = TargetInfo::SignedLongLong; 3663 this->DoubleAlign = 64; 3664 this->LongDoubleWidth = 64; 3665 this->LongDoubleAlign = 64; 3666 this->SizeType = TargetInfo::UnsignedInt; 3667 this->PtrDiffType = TargetInfo::SignedInt; 3668 this->IntPtrType = TargetInfo::SignedInt; 3669 this->RegParmMax = 2; 3670 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3671 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3672 } 3673 3674 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3675 } 3676 virtual void getArchDefines(const LangOptions &Opts, 3677 MacroBuilder &Builder) const { 3678 Builder.defineMacro("__le32__"); 3679 Builder.defineMacro("__pnacl__"); 3680 } 3681 virtual void getTargetDefines(const LangOptions &Opts, 3682 MacroBuilder &Builder) const { 3683 DefineStd(Builder, "unix", Opts); 3684 Builder.defineMacro("__ELF__"); 3685 if (Opts.POSIXThreads) 3686 Builder.defineMacro("_REENTRANT"); 3687 if (Opts.CPlusPlus) 3688 Builder.defineMacro("_GNU_SOURCE"); 3689 3690 Builder.defineMacro("__native_client__"); 3691 getArchDefines(Opts, Builder); 3692 } 3693 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3694 unsigned &NumRecords) const { 3695 } 3696 virtual const char *getVAListDeclaration() const { 3697 return "typedef int __builtin_va_list[4];"; 3698 } 3699 virtual void getGCCRegNames(const char * const *&Names, 3700 unsigned &NumNames) const; 3701 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3702 unsigned &NumAliases) const; 3703 virtual bool validateAsmConstraint(const char *&Name, 3704 TargetInfo::ConstraintInfo &Info) const { 3705 return false; 3706 } 3707 3708 virtual const char *getClobbers() const { 3709 return ""; 3710 } 3711 }; 3712 3713 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3714 unsigned &NumNames) const { 3715 Names = NULL; 3716 NumNames = 0; 3717 } 3718 3719 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3720 unsigned &NumAliases) const { 3721 Aliases = NULL; 3722 NumAliases = 0; 3723 } 3724 } // end anonymous namespace. 3725 3726 3727 //===----------------------------------------------------------------------===// 3728 // Driver code 3729 //===----------------------------------------------------------------------===// 3730 3731 static TargetInfo *AllocateTarget(const std::string &T) { 3732 llvm::Triple Triple(T); 3733 llvm::Triple::OSType os = Triple.getOS(); 3734 3735 switch (Triple.getArch()) { 3736 default: 3737 return NULL; 3738 3739 case llvm::Triple::hexagon: 3740 return new HexagonTargetInfo(T); 3741 3742 case llvm::Triple::arm: 3743 case llvm::Triple::thumb: 3744 if (Triple.isOSDarwin()) 3745 return new DarwinARMTargetInfo(T); 3746 3747 switch (os) { 3748 case llvm::Triple::Linux: 3749 return new LinuxTargetInfo<ARMTargetInfo>(T); 3750 case llvm::Triple::FreeBSD: 3751 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3752 case llvm::Triple::NetBSD: 3753 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3754 case llvm::Triple::RTEMS: 3755 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3756 default: 3757 return new ARMTargetInfo(T); 3758 } 3759 3760 case llvm::Triple::msp430: 3761 return new MSP430TargetInfo(T); 3762 3763 case llvm::Triple::mips: 3764 switch (os) { 3765 case llvm::Triple::Linux: 3766 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3767 case llvm::Triple::RTEMS: 3768 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3769 case llvm::Triple::FreeBSD: 3770 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3771 case llvm::Triple::NetBSD: 3772 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3773 default: 3774 return new Mips32EBTargetInfo(T); 3775 } 3776 3777 case llvm::Triple::mipsel: 3778 switch (os) { 3779 case llvm::Triple::Linux: 3780 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3781 case llvm::Triple::RTEMS: 3782 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3783 case llvm::Triple::FreeBSD: 3784 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3785 case llvm::Triple::NetBSD: 3786 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3787 default: 3788 return new Mips32ELTargetInfo(T); 3789 } 3790 3791 case llvm::Triple::mips64: 3792 switch (os) { 3793 case llvm::Triple::Linux: 3794 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3795 case llvm::Triple::RTEMS: 3796 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3797 case llvm::Triple::FreeBSD: 3798 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3799 case llvm::Triple::NetBSD: 3800 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3801 default: 3802 return new Mips64EBTargetInfo(T); 3803 } 3804 3805 case llvm::Triple::mips64el: 3806 switch (os) { 3807 case llvm::Triple::Linux: 3808 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3809 case llvm::Triple::RTEMS: 3810 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3811 case llvm::Triple::FreeBSD: 3812 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3813 case llvm::Triple::NetBSD: 3814 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3815 default: 3816 return new Mips64ELTargetInfo(T); 3817 } 3818 3819 case llvm::Triple::le32: 3820 switch (os) { 3821 case llvm::Triple::NativeClient: 3822 return new PNaClTargetInfo(T); 3823 default: 3824 return NULL; 3825 } 3826 3827 case llvm::Triple::ppc: 3828 if (Triple.isOSDarwin()) 3829 return new DarwinPPC32TargetInfo(T); 3830 switch (os) { 3831 case llvm::Triple::Linux: 3832 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3833 case llvm::Triple::FreeBSD: 3834 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3835 case llvm::Triple::NetBSD: 3836 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3837 case llvm::Triple::RTEMS: 3838 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3839 default: 3840 return new PPC32TargetInfo(T); 3841 } 3842 3843 case llvm::Triple::ppc64: 3844 if (Triple.isOSDarwin()) 3845 return new DarwinPPC64TargetInfo(T); 3846 switch (os) { 3847 case llvm::Triple::Linux: 3848 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3849 case llvm::Triple::Lv2: 3850 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3851 case llvm::Triple::FreeBSD: 3852 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3853 case llvm::Triple::NetBSD: 3854 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3855 default: 3856 return new PPC64TargetInfo(T); 3857 } 3858 3859 case llvm::Triple::ptx32: 3860 return new PTX32TargetInfo(T); 3861 case llvm::Triple::ptx64: 3862 return new PTX64TargetInfo(T); 3863 3864 case llvm::Triple::mblaze: 3865 return new MBlazeTargetInfo(T); 3866 3867 case llvm::Triple::sparc: 3868 switch (os) { 3869 case llvm::Triple::Linux: 3870 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3871 case llvm::Triple::AuroraUX: 3872 return new AuroraUXSparcV8TargetInfo(T); 3873 case llvm::Triple::Solaris: 3874 return new SolarisSparcV8TargetInfo(T); 3875 case llvm::Triple::NetBSD: 3876 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3877 case llvm::Triple::RTEMS: 3878 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3879 default: 3880 return new SparcV8TargetInfo(T); 3881 } 3882 3883 // FIXME: Need a real SPU target. 3884 case llvm::Triple::cellspu: 3885 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3886 3887 case llvm::Triple::tce: 3888 return new TCETargetInfo(T); 3889 3890 case llvm::Triple::x86: 3891 if (Triple.isOSDarwin()) 3892 return new DarwinI386TargetInfo(T); 3893 3894 switch (os) { 3895 case llvm::Triple::AuroraUX: 3896 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3897 case llvm::Triple::Linux: 3898 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3899 case llvm::Triple::DragonFly: 3900 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3901 case llvm::Triple::NetBSD: 3902 return new NetBSDI386TargetInfo(T); 3903 case llvm::Triple::OpenBSD: 3904 return new OpenBSDI386TargetInfo(T); 3905 case llvm::Triple::FreeBSD: 3906 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3907 case llvm::Triple::Minix: 3908 return new MinixTargetInfo<X86_32TargetInfo>(T); 3909 case llvm::Triple::Solaris: 3910 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3911 case llvm::Triple::Cygwin: 3912 return new CygwinX86_32TargetInfo(T); 3913 case llvm::Triple::MinGW32: 3914 return new MinGWX86_32TargetInfo(T); 3915 case llvm::Triple::Win32: 3916 return new VisualStudioWindowsX86_32TargetInfo(T); 3917 case llvm::Triple::Haiku: 3918 return new HaikuX86_32TargetInfo(T); 3919 case llvm::Triple::RTEMS: 3920 return new RTEMSX86_32TargetInfo(T); 3921 default: 3922 return new X86_32TargetInfo(T); 3923 } 3924 3925 case llvm::Triple::x86_64: 3926 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3927 return new DarwinX86_64TargetInfo(T); 3928 3929 switch (os) { 3930 case llvm::Triple::AuroraUX: 3931 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3932 case llvm::Triple::Linux: 3933 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3934 case llvm::Triple::DragonFly: 3935 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3936 case llvm::Triple::NetBSD: 3937 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3938 case llvm::Triple::OpenBSD: 3939 return new OpenBSDX86_64TargetInfo(T); 3940 case llvm::Triple::FreeBSD: 3941 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3942 case llvm::Triple::Solaris: 3943 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3944 case llvm::Triple::MinGW32: 3945 return new MinGWX86_64TargetInfo(T); 3946 case llvm::Triple::Win32: // This is what Triple.h supports now. 3947 return new VisualStudioWindowsX86_64TargetInfo(T); 3948 default: 3949 return new X86_64TargetInfo(T); 3950 } 3951 } 3952 } 3953 3954 /// CreateTargetInfo - Return the target info object for the specified target 3955 /// triple. 3956 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3957 TargetOptions &Opts) { 3958 llvm::Triple Triple(Opts.Triple); 3959 3960 // Construct the target 3961 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3962 if (!Target) { 3963 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3964 return 0; 3965 } 3966 3967 // Set the target CPU if specified. 3968 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3969 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3970 return 0; 3971 } 3972 3973 // Set the target ABI if specified. 3974 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3975 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3976 return 0; 3977 } 3978 3979 // Set the target C++ ABI. 3980 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3981 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3982 return 0; 3983 } 3984 3985 // Compute the default target features, we need the target to handle this 3986 // because features may have dependencies on one another. 3987 llvm::StringMap<bool> Features; 3988 Target->getDefaultFeatures(Features); 3989 3990 // Apply the user specified deltas. 3991 // First the enables. 3992 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3993 ie = Opts.Features.end(); it != ie; ++it) { 3994 const char *Name = it->c_str(); 3995 3996 if (Name[0] != '+') 3997 continue; 3998 3999 // Apply the feature via the target. 4000 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 4001 Diags.Report(diag::err_target_invalid_feature) << Name; 4002 return 0; 4003 } 4004 } 4005 4006 // Then the disables. 4007 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4008 ie = Opts.Features.end(); it != ie; ++it) { 4009 const char *Name = it->c_str(); 4010 4011 if (Name[0] == '+') 4012 continue; 4013 4014 // Apply the feature via the target. 4015 if (Name[0] != '-' || 4016 !Target->setFeatureEnabled(Features, Name + 1, false)) { 4017 Diags.Report(diag::err_target_invalid_feature) << Name; 4018 return 0; 4019 } 4020 } 4021 4022 // Add the features to the compile options. 4023 // 4024 // FIXME: If we are completely confident that we have the right set, we only 4025 // need to pass the minuses. 4026 Opts.Features.clear(); 4027 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 4028 ie = Features.end(); it != ie; ++it) 4029 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 4030 it->first().str()); 4031 Target->HandleTargetFeatures(Opts.Features); 4032 4033 return Target.take(); 4034 } 4035