1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * Performance events: 4 * 5 * Copyright (C) 2008-2009, Thomas Gleixner <[email protected]> 6 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar 7 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra 8 * 9 * Data type definitions, declarations, prototypes. 10 * 11 * Started by: Thomas Gleixner and Ingo Molnar 12 * 13 * For licencing details see kernel-base/COPYING 14 */ 15 #ifndef _UAPI_LINUX_PERF_EVENT_H 16 #define _UAPI_LINUX_PERF_EVENT_H 17 18 #include <linux/types.h> 19 #include <linux/ioctl.h> 20 #include <asm/byteorder.h> 21 22 /* 23 * User-space ABI bits: 24 */ 25 26 /* 27 * attr.type 28 */ 29 enum perf_type_id { 30 PERF_TYPE_HARDWARE = 0, 31 PERF_TYPE_SOFTWARE = 1, 32 PERF_TYPE_TRACEPOINT = 2, 33 PERF_TYPE_HW_CACHE = 3, 34 PERF_TYPE_RAW = 4, 35 PERF_TYPE_BREAKPOINT = 5, 36 37 PERF_TYPE_MAX, /* non-ABI */ 38 }; 39 40 /* 41 * Generalized performance event event_id types, used by the 42 * attr.event_id parameter of the sys_perf_event_open() 43 * syscall: 44 */ 45 enum perf_hw_id { 46 /* 47 * Common hardware events, generalized by the kernel: 48 */ 49 PERF_COUNT_HW_CPU_CYCLES = 0, 50 PERF_COUNT_HW_INSTRUCTIONS = 1, 51 PERF_COUNT_HW_CACHE_REFERENCES = 2, 52 PERF_COUNT_HW_CACHE_MISSES = 3, 53 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 54 PERF_COUNT_HW_BRANCH_MISSES = 5, 55 PERF_COUNT_HW_BUS_CYCLES = 6, 56 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, 57 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, 58 PERF_COUNT_HW_REF_CPU_CYCLES = 9, 59 60 PERF_COUNT_HW_MAX, /* non-ABI */ 61 }; 62 63 /* 64 * Generalized hardware cache events: 65 * 66 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x 67 * { read, write, prefetch } x 68 * { accesses, misses } 69 */ 70 enum perf_hw_cache_id { 71 PERF_COUNT_HW_CACHE_L1D = 0, 72 PERF_COUNT_HW_CACHE_L1I = 1, 73 PERF_COUNT_HW_CACHE_LL = 2, 74 PERF_COUNT_HW_CACHE_DTLB = 3, 75 PERF_COUNT_HW_CACHE_ITLB = 4, 76 PERF_COUNT_HW_CACHE_BPU = 5, 77 PERF_COUNT_HW_CACHE_NODE = 6, 78 79 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ 80 }; 81 82 enum perf_hw_cache_op_id { 83 PERF_COUNT_HW_CACHE_OP_READ = 0, 84 PERF_COUNT_HW_CACHE_OP_WRITE = 1, 85 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 86 87 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ 88 }; 89 90 enum perf_hw_cache_op_result_id { 91 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 92 PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 93 94 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ 95 }; 96 97 /* 98 * Special "software" events provided by the kernel, even if the hardware 99 * does not support performance events. These events measure various 100 * physical and sw events of the kernel (and allow the profiling of them as 101 * well): 102 */ 103 enum perf_sw_ids { 104 PERF_COUNT_SW_CPU_CLOCK = 0, 105 PERF_COUNT_SW_TASK_CLOCK = 1, 106 PERF_COUNT_SW_PAGE_FAULTS = 2, 107 PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 108 PERF_COUNT_SW_CPU_MIGRATIONS = 4, 109 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 110 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 111 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 112 PERF_COUNT_SW_EMULATION_FAULTS = 8, 113 PERF_COUNT_SW_DUMMY = 9, 114 PERF_COUNT_SW_BPF_OUTPUT = 10, 115 116 PERF_COUNT_SW_MAX, /* non-ABI */ 117 }; 118 119 /* 120 * Bits that can be set in attr.sample_type to request information 121 * in the overflow packets. 122 */ 123 enum perf_event_sample_format { 124 PERF_SAMPLE_IP = 1U << 0, 125 PERF_SAMPLE_TID = 1U << 1, 126 PERF_SAMPLE_TIME = 1U << 2, 127 PERF_SAMPLE_ADDR = 1U << 3, 128 PERF_SAMPLE_READ = 1U << 4, 129 PERF_SAMPLE_CALLCHAIN = 1U << 5, 130 PERF_SAMPLE_ID = 1U << 6, 131 PERF_SAMPLE_CPU = 1U << 7, 132 PERF_SAMPLE_PERIOD = 1U << 8, 133 PERF_SAMPLE_STREAM_ID = 1U << 9, 134 PERF_SAMPLE_RAW = 1U << 10, 135 PERF_SAMPLE_BRANCH_STACK = 1U << 11, 136 PERF_SAMPLE_REGS_USER = 1U << 12, 137 PERF_SAMPLE_STACK_USER = 1U << 13, 138 PERF_SAMPLE_WEIGHT = 1U << 14, 139 PERF_SAMPLE_DATA_SRC = 1U << 15, 140 PERF_SAMPLE_IDENTIFIER = 1U << 16, 141 PERF_SAMPLE_TRANSACTION = 1U << 17, 142 PERF_SAMPLE_REGS_INTR = 1U << 18, 143 PERF_SAMPLE_PHYS_ADDR = 1U << 19, 144 PERF_SAMPLE_AUX = 1U << 20, 145 PERF_SAMPLE_CGROUP = 1U << 21, 146 PERF_SAMPLE_DATA_PAGE_SIZE = 1U << 22, 147 PERF_SAMPLE_CODE_PAGE_SIZE = 1U << 23, 148 149 PERF_SAMPLE_MAX = 1U << 24, /* non-ABI */ 150 151 __PERF_SAMPLE_CALLCHAIN_EARLY = 1ULL << 63, /* non-ABI; internal use */ 152 }; 153 154 /* 155 * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set 156 * 157 * If the user does not pass priv level information via branch_sample_type, 158 * the kernel uses the event's priv level. Branch and event priv levels do 159 * not have to match. Branch priv level is checked for permissions. 160 * 161 * The branch types can be combined, however BRANCH_ANY covers all types 162 * of branches and therefore it supersedes all the other types. 163 */ 164 enum perf_branch_sample_type_shift { 165 PERF_SAMPLE_BRANCH_USER_SHIFT = 0, /* user branches */ 166 PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1, /* kernel branches */ 167 PERF_SAMPLE_BRANCH_HV_SHIFT = 2, /* hypervisor branches */ 168 169 PERF_SAMPLE_BRANCH_ANY_SHIFT = 3, /* any branch types */ 170 PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4, /* any call branch */ 171 PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5, /* any return branch */ 172 PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6, /* indirect calls */ 173 PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7, /* transaction aborts */ 174 PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8, /* in transaction */ 175 PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */ 176 PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */ 177 178 PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* call/ret stack */ 179 PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12, /* indirect jumps */ 180 PERF_SAMPLE_BRANCH_CALL_SHIFT = 13, /* direct call */ 181 182 PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT = 14, /* no flags */ 183 PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT = 15, /* no cycles */ 184 185 PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT = 16, /* save branch type */ 186 187 PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT = 17, /* save low level index of raw branch records */ 188 189 PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */ 190 }; 191 192 enum perf_branch_sample_type { 193 PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT, 194 PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT, 195 PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT, 196 197 PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT, 198 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT, 199 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT, 200 PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT, 201 PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT, 202 PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT, 203 PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT, 204 PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT, 205 206 PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT, 207 PERF_SAMPLE_BRANCH_IND_JUMP = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT, 208 PERF_SAMPLE_BRANCH_CALL = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT, 209 210 PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT, 211 PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT, 212 213 PERF_SAMPLE_BRANCH_TYPE_SAVE = 214 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT, 215 216 PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT, 217 218 PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT, 219 }; 220 221 /* 222 * Common flow change classification 223 */ 224 enum { 225 PERF_BR_UNKNOWN = 0, /* unknown */ 226 PERF_BR_COND = 1, /* conditional */ 227 PERF_BR_UNCOND = 2, /* unconditional */ 228 PERF_BR_IND = 3, /* indirect */ 229 PERF_BR_CALL = 4, /* function call */ 230 PERF_BR_IND_CALL = 5, /* indirect function call */ 231 PERF_BR_RET = 6, /* function return */ 232 PERF_BR_SYSCALL = 7, /* syscall */ 233 PERF_BR_SYSRET = 8, /* syscall return */ 234 PERF_BR_COND_CALL = 9, /* conditional function call */ 235 PERF_BR_COND_RET = 10, /* conditional function return */ 236 PERF_BR_MAX, 237 }; 238 239 #define PERF_SAMPLE_BRANCH_PLM_ALL \ 240 (PERF_SAMPLE_BRANCH_USER|\ 241 PERF_SAMPLE_BRANCH_KERNEL|\ 242 PERF_SAMPLE_BRANCH_HV) 243 244 /* 245 * Values to determine ABI of the registers dump. 246 */ 247 enum perf_sample_regs_abi { 248 PERF_SAMPLE_REGS_ABI_NONE = 0, 249 PERF_SAMPLE_REGS_ABI_32 = 1, 250 PERF_SAMPLE_REGS_ABI_64 = 2, 251 }; 252 253 /* 254 * Values for the memory transaction event qualifier, mostly for 255 * abort events. Multiple bits can be set. 256 */ 257 enum { 258 PERF_TXN_ELISION = (1 << 0), /* From elision */ 259 PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */ 260 PERF_TXN_SYNC = (1 << 2), /* Instruction is related */ 261 PERF_TXN_ASYNC = (1 << 3), /* Instruction not related */ 262 PERF_TXN_RETRY = (1 << 4), /* Retry possible */ 263 PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */ 264 PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */ 265 PERF_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */ 266 267 PERF_TXN_MAX = (1 << 8), /* non-ABI */ 268 269 /* bits 32..63 are reserved for the abort code */ 270 271 PERF_TXN_ABORT_MASK = (0xffffffffULL << 32), 272 PERF_TXN_ABORT_SHIFT = 32, 273 }; 274 275 /* 276 * The format of the data returned by read() on a perf event fd, 277 * as specified by attr.read_format: 278 * 279 * struct read_format { 280 * { u64 value; 281 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 282 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 283 * { u64 id; } && PERF_FORMAT_ID 284 * } && !PERF_FORMAT_GROUP 285 * 286 * { u64 nr; 287 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 288 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 289 * { u64 value; 290 * { u64 id; } && PERF_FORMAT_ID 291 * } cntr[nr]; 292 * } && PERF_FORMAT_GROUP 293 * }; 294 */ 295 enum perf_event_read_format { 296 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 297 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 298 PERF_FORMAT_ID = 1U << 2, 299 PERF_FORMAT_GROUP = 1U << 3, 300 301 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ 302 }; 303 304 #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ 305 #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ 306 #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ 307 #define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */ 308 /* add: sample_stack_user */ 309 #define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */ 310 #define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ 311 #define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ 312 313 /* 314 * Hardware event_id to monitor via a performance monitoring event: 315 * 316 * @sample_max_stack: Max number of frame pointers in a callchain, 317 * should be < /proc/sys/kernel/perf_event_max_stack 318 */ 319 struct perf_event_attr { 320 321 /* 322 * Major type: hardware/software/tracepoint/etc. 323 */ 324 __u32 type; 325 326 /* 327 * Size of the attr structure, for fwd/bwd compat. 328 */ 329 __u32 size; 330 331 /* 332 * Type specific configuration information. 333 */ 334 __u64 config; 335 336 union { 337 __u64 sample_period; 338 __u64 sample_freq; 339 }; 340 341 __u64 sample_type; 342 __u64 read_format; 343 344 __u64 disabled : 1, /* off by default */ 345 inherit : 1, /* children inherit it */ 346 pinned : 1, /* must always be on PMU */ 347 exclusive : 1, /* only group on PMU */ 348 exclude_user : 1, /* don't count user */ 349 exclude_kernel : 1, /* ditto kernel */ 350 exclude_hv : 1, /* ditto hypervisor */ 351 exclude_idle : 1, /* don't count when idle */ 352 mmap : 1, /* include mmap data */ 353 comm : 1, /* include comm data */ 354 freq : 1, /* use freq, not period */ 355 inherit_stat : 1, /* per task counts */ 356 enable_on_exec : 1, /* next exec enables */ 357 task : 1, /* trace fork/exit */ 358 watermark : 1, /* wakeup_watermark */ 359 /* 360 * precise_ip: 361 * 362 * 0 - SAMPLE_IP can have arbitrary skid 363 * 1 - SAMPLE_IP must have constant skid 364 * 2 - SAMPLE_IP requested to have 0 skid 365 * 3 - SAMPLE_IP must have 0 skid 366 * 367 * See also PERF_RECORD_MISC_EXACT_IP 368 */ 369 precise_ip : 2, /* skid constraint */ 370 mmap_data : 1, /* non-exec mmap data */ 371 sample_id_all : 1, /* sample_type all events */ 372 373 exclude_host : 1, /* don't count in host */ 374 exclude_guest : 1, /* don't count in guest */ 375 376 exclude_callchain_kernel : 1, /* exclude kernel callchains */ 377 exclude_callchain_user : 1, /* exclude user callchains */ 378 mmap2 : 1, /* include mmap with inode data */ 379 comm_exec : 1, /* flag comm events that are due to an exec */ 380 use_clockid : 1, /* use @clockid for time fields */ 381 context_switch : 1, /* context switch data */ 382 write_backward : 1, /* Write ring buffer from end to beginning */ 383 namespaces : 1, /* include namespaces data */ 384 ksymbol : 1, /* include ksymbol events */ 385 bpf_event : 1, /* include bpf events */ 386 aux_output : 1, /* generate AUX records instead of events */ 387 cgroup : 1, /* include cgroup events */ 388 text_poke : 1, /* include text poke events */ 389 build_id : 1, /* use build id in mmap2 events */ 390 __reserved_1 : 29; 391 392 union { 393 __u32 wakeup_events; /* wakeup every n events */ 394 __u32 wakeup_watermark; /* bytes before wakeup */ 395 }; 396 397 __u32 bp_type; 398 union { 399 __u64 bp_addr; 400 __u64 kprobe_func; /* for perf_kprobe */ 401 __u64 uprobe_path; /* for perf_uprobe */ 402 __u64 config1; /* extension of config */ 403 }; 404 union { 405 __u64 bp_len; 406 __u64 kprobe_addr; /* when kprobe_func == NULL */ 407 __u64 probe_offset; /* for perf_[k,u]probe */ 408 __u64 config2; /* extension of config1 */ 409 }; 410 __u64 branch_sample_type; /* enum perf_branch_sample_type */ 411 412 /* 413 * Defines set of user regs to dump on samples. 414 * See asm/perf_regs.h for details. 415 */ 416 __u64 sample_regs_user; 417 418 /* 419 * Defines size of the user stack to dump on samples. 420 */ 421 __u32 sample_stack_user; 422 423 __s32 clockid; 424 /* 425 * Defines set of regs to dump for each sample 426 * state captured on: 427 * - precise = 0: PMU interrupt 428 * - precise > 0: sampled instruction 429 * 430 * See asm/perf_regs.h for details. 431 */ 432 __u64 sample_regs_intr; 433 434 /* 435 * Wakeup watermark for AUX area 436 */ 437 __u32 aux_watermark; 438 __u16 sample_max_stack; 439 __u16 __reserved_2; 440 __u32 aux_sample_size; 441 __u32 __reserved_3; 442 }; 443 444 /* 445 * Structure used by below PERF_EVENT_IOC_QUERY_BPF command 446 * to query bpf programs attached to the same perf tracepoint 447 * as the given perf event. 448 */ 449 struct perf_event_query_bpf { 450 /* 451 * The below ids array length 452 */ 453 __u32 ids_len; 454 /* 455 * Set by the kernel to indicate the number of 456 * available programs 457 */ 458 __u32 prog_cnt; 459 /* 460 * User provided buffer to store program ids 461 */ 462 __u32 ids[0]; 463 }; 464 465 /* 466 * Ioctls that can be done on a perf event fd: 467 */ 468 #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 469 #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 470 #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 471 #define PERF_EVENT_IOC_RESET _IO ('$', 3) 472 #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 473 #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 474 #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 475 #define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) 476 #define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32) 477 #define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW('$', 9, __u32) 478 #define PERF_EVENT_IOC_QUERY_BPF _IOWR('$', 10, struct perf_event_query_bpf *) 479 #define PERF_EVENT_IOC_MODIFY_ATTRIBUTES _IOW('$', 11, struct perf_event_attr *) 480 481 enum perf_event_ioc_flags { 482 PERF_IOC_FLAG_GROUP = 1U << 0, 483 }; 484 485 /* 486 * Structure of the page that can be mapped via mmap 487 */ 488 struct perf_event_mmap_page { 489 __u32 version; /* version number of this structure */ 490 __u32 compat_version; /* lowest version this is compat with */ 491 492 /* 493 * Bits needed to read the hw events in user-space. 494 * 495 * u32 seq, time_mult, time_shift, index, width; 496 * u64 count, enabled, running; 497 * u64 cyc, time_offset; 498 * s64 pmc = 0; 499 * 500 * do { 501 * seq = pc->lock; 502 * barrier() 503 * 504 * enabled = pc->time_enabled; 505 * running = pc->time_running; 506 * 507 * if (pc->cap_usr_time && enabled != running) { 508 * cyc = rdtsc(); 509 * time_offset = pc->time_offset; 510 * time_mult = pc->time_mult; 511 * time_shift = pc->time_shift; 512 * } 513 * 514 * index = pc->index; 515 * count = pc->offset; 516 * if (pc->cap_user_rdpmc && index) { 517 * width = pc->pmc_width; 518 * pmc = rdpmc(index - 1); 519 * } 520 * 521 * barrier(); 522 * } while (pc->lock != seq); 523 * 524 * NOTE: for obvious reason this only works on self-monitoring 525 * processes. 526 */ 527 __u32 lock; /* seqlock for synchronization */ 528 __u32 index; /* hardware event identifier */ 529 __s64 offset; /* add to hardware event value */ 530 __u64 time_enabled; /* time event active */ 531 __u64 time_running; /* time event on cpu */ 532 union { 533 __u64 capabilities; 534 struct { 535 __u64 cap_bit0 : 1, /* Always 0, deprecated, see commit 860f085b74e9 */ 536 cap_bit0_is_deprecated : 1, /* Always 1, signals that bit 0 is zero */ 537 538 cap_user_rdpmc : 1, /* The RDPMC instruction can be used to read counts */ 539 cap_user_time : 1, /* The time_{shift,mult,offset} fields are used */ 540 cap_user_time_zero : 1, /* The time_zero field is used */ 541 cap_user_time_short : 1, /* the time_{cycle,mask} fields are used */ 542 cap_____res : 58; 543 }; 544 }; 545 546 /* 547 * If cap_user_rdpmc this field provides the bit-width of the value 548 * read using the rdpmc() or equivalent instruction. This can be used 549 * to sign extend the result like: 550 * 551 * pmc <<= 64 - width; 552 * pmc >>= 64 - width; // signed shift right 553 * count += pmc; 554 */ 555 __u16 pmc_width; 556 557 /* 558 * If cap_usr_time the below fields can be used to compute the time 559 * delta since time_enabled (in ns) using rdtsc or similar. 560 * 561 * u64 quot, rem; 562 * u64 delta; 563 * 564 * quot = (cyc >> time_shift); 565 * rem = cyc & (((u64)1 << time_shift) - 1); 566 * delta = time_offset + quot * time_mult + 567 * ((rem * time_mult) >> time_shift); 568 * 569 * Where time_offset,time_mult,time_shift and cyc are read in the 570 * seqcount loop described above. This delta can then be added to 571 * enabled and possible running (if index), improving the scaling: 572 * 573 * enabled += delta; 574 * if (index) 575 * running += delta; 576 * 577 * quot = count / running; 578 * rem = count % running; 579 * count = quot * enabled + (rem * enabled) / running; 580 */ 581 __u16 time_shift; 582 __u32 time_mult; 583 __u64 time_offset; 584 /* 585 * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated 586 * from sample timestamps. 587 * 588 * time = timestamp - time_zero; 589 * quot = time / time_mult; 590 * rem = time % time_mult; 591 * cyc = (quot << time_shift) + (rem << time_shift) / time_mult; 592 * 593 * And vice versa: 594 * 595 * quot = cyc >> time_shift; 596 * rem = cyc & (((u64)1 << time_shift) - 1); 597 * timestamp = time_zero + quot * time_mult + 598 * ((rem * time_mult) >> time_shift); 599 */ 600 __u64 time_zero; 601 602 __u32 size; /* Header size up to __reserved[] fields. */ 603 __u32 __reserved_1; 604 605 /* 606 * If cap_usr_time_short, the hardware clock is less than 64bit wide 607 * and we must compute the 'cyc' value, as used by cap_usr_time, as: 608 * 609 * cyc = time_cycles + ((cyc - time_cycles) & time_mask) 610 * 611 * NOTE: this form is explicitly chosen such that cap_usr_time_short 612 * is a correction on top of cap_usr_time, and code that doesn't 613 * know about cap_usr_time_short still works under the assumption 614 * the counter doesn't wrap. 615 */ 616 __u64 time_cycles; 617 __u64 time_mask; 618 619 /* 620 * Hole for extension of the self monitor capabilities 621 */ 622 623 __u8 __reserved[116*8]; /* align to 1k. */ 624 625 /* 626 * Control data for the mmap() data buffer. 627 * 628 * User-space reading the @data_head value should issue an smp_rmb(), 629 * after reading this value. 630 * 631 * When the mapping is PROT_WRITE the @data_tail value should be 632 * written by userspace to reflect the last read data, after issueing 633 * an smp_mb() to separate the data read from the ->data_tail store. 634 * In this case the kernel will not over-write unread data. 635 * 636 * See perf_output_put_handle() for the data ordering. 637 * 638 * data_{offset,size} indicate the location and size of the perf record 639 * buffer within the mmapped area. 640 */ 641 __u64 data_head; /* head in the data section */ 642 __u64 data_tail; /* user-space written tail */ 643 __u64 data_offset; /* where the buffer starts */ 644 __u64 data_size; /* data buffer size */ 645 646 /* 647 * AUX area is defined by aux_{offset,size} fields that should be set 648 * by the userspace, so that 649 * 650 * aux_offset >= data_offset + data_size 651 * 652 * prior to mmap()ing it. Size of the mmap()ed area should be aux_size. 653 * 654 * Ring buffer pointers aux_{head,tail} have the same semantics as 655 * data_{head,tail} and same ordering rules apply. 656 */ 657 __u64 aux_head; 658 __u64 aux_tail; 659 __u64 aux_offset; 660 __u64 aux_size; 661 }; 662 663 /* 664 * The current state of perf_event_header::misc bits usage: 665 * ('|' used bit, '-' unused bit) 666 * 667 * 012 CDEF 668 * |||---------|||| 669 * 670 * Where: 671 * 0-2 CPUMODE_MASK 672 * 673 * C PROC_MAP_PARSE_TIMEOUT 674 * D MMAP_DATA / COMM_EXEC / FORK_EXEC / SWITCH_OUT 675 * E MMAP_BUILD_ID / EXACT_IP / SCHED_OUT_PREEMPT 676 * F (reserved) 677 */ 678 679 #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 680 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 681 #define PERF_RECORD_MISC_KERNEL (1 << 0) 682 #define PERF_RECORD_MISC_USER (2 << 0) 683 #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 684 #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 685 #define PERF_RECORD_MISC_GUEST_USER (5 << 0) 686 687 /* 688 * Indicates that /proc/PID/maps parsing are truncated by time out. 689 */ 690 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12) 691 /* 692 * Following PERF_RECORD_MISC_* are used on different 693 * events, so can reuse the same bit position: 694 * 695 * PERF_RECORD_MISC_MMAP_DATA - PERF_RECORD_MMAP* events 696 * PERF_RECORD_MISC_COMM_EXEC - PERF_RECORD_COMM event 697 * PERF_RECORD_MISC_FORK_EXEC - PERF_RECORD_FORK event (perf internal) 698 * PERF_RECORD_MISC_SWITCH_OUT - PERF_RECORD_SWITCH* events 699 */ 700 #define PERF_RECORD_MISC_MMAP_DATA (1 << 13) 701 #define PERF_RECORD_MISC_COMM_EXEC (1 << 13) 702 #define PERF_RECORD_MISC_FORK_EXEC (1 << 13) 703 #define PERF_RECORD_MISC_SWITCH_OUT (1 << 13) 704 /* 705 * These PERF_RECORD_MISC_* flags below are safely reused 706 * for the following events: 707 * 708 * PERF_RECORD_MISC_EXACT_IP - PERF_RECORD_SAMPLE of precise events 709 * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT - PERF_RECORD_SWITCH* events 710 * PERF_RECORD_MISC_MMAP_BUILD_ID - PERF_RECORD_MMAP2 event 711 * 712 * 713 * PERF_RECORD_MISC_EXACT_IP: 714 * Indicates that the content of PERF_SAMPLE_IP points to 715 * the actual instruction that triggered the event. See also 716 * perf_event_attr::precise_ip. 717 * 718 * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT: 719 * Indicates that thread was preempted in TASK_RUNNING state. 720 * 721 * PERF_RECORD_MISC_MMAP_BUILD_ID: 722 * Indicates that mmap2 event carries build id data. 723 */ 724 #define PERF_RECORD_MISC_EXACT_IP (1 << 14) 725 #define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT (1 << 14) 726 #define PERF_RECORD_MISC_MMAP_BUILD_ID (1 << 14) 727 /* 728 * Reserve the last bit to indicate some extended misc field 729 */ 730 #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 731 732 struct perf_event_header { 733 __u32 type; 734 __u16 misc; 735 __u16 size; 736 }; 737 738 struct perf_ns_link_info { 739 __u64 dev; 740 __u64 ino; 741 }; 742 743 enum { 744 NET_NS_INDEX = 0, 745 UTS_NS_INDEX = 1, 746 IPC_NS_INDEX = 2, 747 PID_NS_INDEX = 3, 748 USER_NS_INDEX = 4, 749 MNT_NS_INDEX = 5, 750 CGROUP_NS_INDEX = 6, 751 752 NR_NAMESPACES, /* number of available namespaces */ 753 }; 754 755 enum perf_event_type { 756 757 /* 758 * If perf_event_attr.sample_id_all is set then all event types will 759 * have the sample_type selected fields related to where/when 760 * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU, 761 * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed 762 * just after the perf_event_header and the fields already present for 763 * the existing fields, i.e. at the end of the payload. That way a newer 764 * perf.data file will be supported by older perf tools, with these new 765 * optional fields being ignored. 766 * 767 * struct sample_id { 768 * { u32 pid, tid; } && PERF_SAMPLE_TID 769 * { u64 time; } && PERF_SAMPLE_TIME 770 * { u64 id; } && PERF_SAMPLE_ID 771 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 772 * { u32 cpu, res; } && PERF_SAMPLE_CPU 773 * { u64 id; } && PERF_SAMPLE_IDENTIFIER 774 * } && perf_event_attr::sample_id_all 775 * 776 * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. The 777 * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed 778 * relative to header.size. 779 */ 780 781 /* 782 * The MMAP events record the PROT_EXEC mappings so that we can 783 * correlate userspace IPs to code. They have the following structure: 784 * 785 * struct { 786 * struct perf_event_header header; 787 * 788 * u32 pid, tid; 789 * u64 addr; 790 * u64 len; 791 * u64 pgoff; 792 * char filename[]; 793 * struct sample_id sample_id; 794 * }; 795 */ 796 PERF_RECORD_MMAP = 1, 797 798 /* 799 * struct { 800 * struct perf_event_header header; 801 * u64 id; 802 * u64 lost; 803 * struct sample_id sample_id; 804 * }; 805 */ 806 PERF_RECORD_LOST = 2, 807 808 /* 809 * struct { 810 * struct perf_event_header header; 811 * 812 * u32 pid, tid; 813 * char comm[]; 814 * struct sample_id sample_id; 815 * }; 816 */ 817 PERF_RECORD_COMM = 3, 818 819 /* 820 * struct { 821 * struct perf_event_header header; 822 * u32 pid, ppid; 823 * u32 tid, ptid; 824 * u64 time; 825 * struct sample_id sample_id; 826 * }; 827 */ 828 PERF_RECORD_EXIT = 4, 829 830 /* 831 * struct { 832 * struct perf_event_header header; 833 * u64 time; 834 * u64 id; 835 * u64 stream_id; 836 * struct sample_id sample_id; 837 * }; 838 */ 839 PERF_RECORD_THROTTLE = 5, 840 PERF_RECORD_UNTHROTTLE = 6, 841 842 /* 843 * struct { 844 * struct perf_event_header header; 845 * u32 pid, ppid; 846 * u32 tid, ptid; 847 * u64 time; 848 * struct sample_id sample_id; 849 * }; 850 */ 851 PERF_RECORD_FORK = 7, 852 853 /* 854 * struct { 855 * struct perf_event_header header; 856 * u32 pid, tid; 857 * 858 * struct read_format values; 859 * struct sample_id sample_id; 860 * }; 861 */ 862 PERF_RECORD_READ = 8, 863 864 /* 865 * struct { 866 * struct perf_event_header header; 867 * 868 * # 869 * # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. 870 * # The advantage of PERF_SAMPLE_IDENTIFIER is that its position 871 * # is fixed relative to header. 872 * # 873 * 874 * { u64 id; } && PERF_SAMPLE_IDENTIFIER 875 * { u64 ip; } && PERF_SAMPLE_IP 876 * { u32 pid, tid; } && PERF_SAMPLE_TID 877 * { u64 time; } && PERF_SAMPLE_TIME 878 * { u64 addr; } && PERF_SAMPLE_ADDR 879 * { u64 id; } && PERF_SAMPLE_ID 880 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 881 * { u32 cpu, res; } && PERF_SAMPLE_CPU 882 * { u64 period; } && PERF_SAMPLE_PERIOD 883 * 884 * { struct read_format values; } && PERF_SAMPLE_READ 885 * 886 * { u64 nr, 887 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN 888 * 889 * # 890 * # The RAW record below is opaque data wrt the ABI 891 * # 892 * # That is, the ABI doesn't make any promises wrt to 893 * # the stability of its content, it may vary depending 894 * # on event, hardware, kernel version and phase of 895 * # the moon. 896 * # 897 * # In other words, PERF_SAMPLE_RAW contents are not an ABI. 898 * # 899 * 900 * { u32 size; 901 * char data[size];}&& PERF_SAMPLE_RAW 902 * 903 * { u64 nr; 904 * { u64 hw_idx; } && PERF_SAMPLE_BRANCH_HW_INDEX 905 * { u64 from, to, flags } lbr[nr]; 906 * } && PERF_SAMPLE_BRANCH_STACK 907 * 908 * { u64 abi; # enum perf_sample_regs_abi 909 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER 910 * 911 * { u64 size; 912 * char data[size]; 913 * u64 dyn_size; } && PERF_SAMPLE_STACK_USER 914 * 915 * { u64 weight; } && PERF_SAMPLE_WEIGHT 916 * { u64 data_src; } && PERF_SAMPLE_DATA_SRC 917 * { u64 transaction; } && PERF_SAMPLE_TRANSACTION 918 * { u64 abi; # enum perf_sample_regs_abi 919 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR 920 * { u64 phys_addr;} && PERF_SAMPLE_PHYS_ADDR 921 * { u64 size; 922 * char data[size]; } && PERF_SAMPLE_AUX 923 * { u64 data_page_size;} && PERF_SAMPLE_DATA_PAGE_SIZE 924 * { u64 code_page_size;} && PERF_SAMPLE_CODE_PAGE_SIZE 925 * }; 926 */ 927 PERF_RECORD_SAMPLE = 9, 928 929 /* 930 * The MMAP2 records are an augmented version of MMAP, they add 931 * maj, min, ino numbers to be used to uniquely identify each mapping 932 * 933 * struct { 934 * struct perf_event_header header; 935 * 936 * u32 pid, tid; 937 * u64 addr; 938 * u64 len; 939 * u64 pgoff; 940 * union { 941 * struct { 942 * u32 maj; 943 * u32 min; 944 * u64 ino; 945 * u64 ino_generation; 946 * }; 947 * struct { 948 * u8 build_id_size; 949 * u8 __reserved_1; 950 * u16 __reserved_2; 951 * u8 build_id[20]; 952 * }; 953 * }; 954 * u32 prot, flags; 955 * char filename[]; 956 * struct sample_id sample_id; 957 * }; 958 */ 959 PERF_RECORD_MMAP2 = 10, 960 961 /* 962 * Records that new data landed in the AUX buffer part. 963 * 964 * struct { 965 * struct perf_event_header header; 966 * 967 * u64 aux_offset; 968 * u64 aux_size; 969 * u64 flags; 970 * struct sample_id sample_id; 971 * }; 972 */ 973 PERF_RECORD_AUX = 11, 974 975 /* 976 * Indicates that instruction trace has started 977 * 978 * struct { 979 * struct perf_event_header header; 980 * u32 pid; 981 * u32 tid; 982 * struct sample_id sample_id; 983 * }; 984 */ 985 PERF_RECORD_ITRACE_START = 12, 986 987 /* 988 * Records the dropped/lost sample number. 989 * 990 * struct { 991 * struct perf_event_header header; 992 * 993 * u64 lost; 994 * struct sample_id sample_id; 995 * }; 996 */ 997 PERF_RECORD_LOST_SAMPLES = 13, 998 999 /* 1000 * Records a context switch in or out (flagged by 1001 * PERF_RECORD_MISC_SWITCH_OUT). See also 1002 * PERF_RECORD_SWITCH_CPU_WIDE. 1003 * 1004 * struct { 1005 * struct perf_event_header header; 1006 * struct sample_id sample_id; 1007 * }; 1008 */ 1009 PERF_RECORD_SWITCH = 14, 1010 1011 /* 1012 * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and 1013 * next_prev_tid that are the next (switching out) or previous 1014 * (switching in) pid/tid. 1015 * 1016 * struct { 1017 * struct perf_event_header header; 1018 * u32 next_prev_pid; 1019 * u32 next_prev_tid; 1020 * struct sample_id sample_id; 1021 * }; 1022 */ 1023 PERF_RECORD_SWITCH_CPU_WIDE = 15, 1024 1025 /* 1026 * struct { 1027 * struct perf_event_header header; 1028 * u32 pid; 1029 * u32 tid; 1030 * u64 nr_namespaces; 1031 * { u64 dev, inode; } [nr_namespaces]; 1032 * struct sample_id sample_id; 1033 * }; 1034 */ 1035 PERF_RECORD_NAMESPACES = 16, 1036 1037 /* 1038 * Record ksymbol register/unregister events: 1039 * 1040 * struct { 1041 * struct perf_event_header header; 1042 * u64 addr; 1043 * u32 len; 1044 * u16 ksym_type; 1045 * u16 flags; 1046 * char name[]; 1047 * struct sample_id sample_id; 1048 * }; 1049 */ 1050 PERF_RECORD_KSYMBOL = 17, 1051 1052 /* 1053 * Record bpf events: 1054 * enum perf_bpf_event_type { 1055 * PERF_BPF_EVENT_UNKNOWN = 0, 1056 * PERF_BPF_EVENT_PROG_LOAD = 1, 1057 * PERF_BPF_EVENT_PROG_UNLOAD = 2, 1058 * }; 1059 * 1060 * struct { 1061 * struct perf_event_header header; 1062 * u16 type; 1063 * u16 flags; 1064 * u32 id; 1065 * u8 tag[BPF_TAG_SIZE]; 1066 * struct sample_id sample_id; 1067 * }; 1068 */ 1069 PERF_RECORD_BPF_EVENT = 18, 1070 1071 /* 1072 * struct { 1073 * struct perf_event_header header; 1074 * u64 id; 1075 * char path[]; 1076 * struct sample_id sample_id; 1077 * }; 1078 */ 1079 PERF_RECORD_CGROUP = 19, 1080 1081 /* 1082 * Records changes to kernel text i.e. self-modified code. 'old_len' is 1083 * the number of old bytes, 'new_len' is the number of new bytes. Either 1084 * 'old_len' or 'new_len' may be zero to indicate, for example, the 1085 * addition or removal of a trampoline. 'bytes' contains the old bytes 1086 * followed immediately by the new bytes. 1087 * 1088 * struct { 1089 * struct perf_event_header header; 1090 * u64 addr; 1091 * u16 old_len; 1092 * u16 new_len; 1093 * u8 bytes[]; 1094 * struct sample_id sample_id; 1095 * }; 1096 */ 1097 PERF_RECORD_TEXT_POKE = 20, 1098 1099 PERF_RECORD_MAX, /* non-ABI */ 1100 }; 1101 1102 enum perf_record_ksymbol_type { 1103 PERF_RECORD_KSYMBOL_TYPE_UNKNOWN = 0, 1104 PERF_RECORD_KSYMBOL_TYPE_BPF = 1, 1105 /* 1106 * Out of line code such as kprobe-replaced instructions or optimized 1107 * kprobes or ftrace trampolines. 1108 */ 1109 PERF_RECORD_KSYMBOL_TYPE_OOL = 2, 1110 PERF_RECORD_KSYMBOL_TYPE_MAX /* non-ABI */ 1111 }; 1112 1113 #define PERF_RECORD_KSYMBOL_FLAGS_UNREGISTER (1 << 0) 1114 1115 enum perf_bpf_event_type { 1116 PERF_BPF_EVENT_UNKNOWN = 0, 1117 PERF_BPF_EVENT_PROG_LOAD = 1, 1118 PERF_BPF_EVENT_PROG_UNLOAD = 2, 1119 PERF_BPF_EVENT_MAX, /* non-ABI */ 1120 }; 1121 1122 #define PERF_MAX_STACK_DEPTH 127 1123 #define PERF_MAX_CONTEXTS_PER_STACK 8 1124 1125 enum perf_callchain_context { 1126 PERF_CONTEXT_HV = (__u64)-32, 1127 PERF_CONTEXT_KERNEL = (__u64)-128, 1128 PERF_CONTEXT_USER = (__u64)-512, 1129 1130 PERF_CONTEXT_GUEST = (__u64)-2048, 1131 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 1132 PERF_CONTEXT_GUEST_USER = (__u64)-2560, 1133 1134 PERF_CONTEXT_MAX = (__u64)-4095, 1135 }; 1136 1137 /** 1138 * PERF_RECORD_AUX::flags bits 1139 */ 1140 #define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */ 1141 #define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */ 1142 #define PERF_AUX_FLAG_PARTIAL 0x04 /* record contains gaps */ 1143 #define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */ 1144 1145 #define PERF_FLAG_FD_NO_GROUP (1UL << 0) 1146 #define PERF_FLAG_FD_OUTPUT (1UL << 1) 1147 #define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ 1148 #define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */ 1149 1150 #if defined(__LITTLE_ENDIAN_BITFIELD) 1151 union perf_mem_data_src { 1152 __u64 val; 1153 struct { 1154 __u64 mem_op:5, /* type of opcode */ 1155 mem_lvl:14, /* memory hierarchy level */ 1156 mem_snoop:5, /* snoop mode */ 1157 mem_lock:2, /* lock instr */ 1158 mem_dtlb:7, /* tlb access */ 1159 mem_lvl_num:4, /* memory hierarchy level number */ 1160 mem_remote:1, /* remote */ 1161 mem_snoopx:2, /* snoop mode, ext */ 1162 mem_rsvd:24; 1163 }; 1164 }; 1165 #elif defined(__BIG_ENDIAN_BITFIELD) 1166 union perf_mem_data_src { 1167 __u64 val; 1168 struct { 1169 __u64 mem_rsvd:24, 1170 mem_snoopx:2, /* snoop mode, ext */ 1171 mem_remote:1, /* remote */ 1172 mem_lvl_num:4, /* memory hierarchy level number */ 1173 mem_dtlb:7, /* tlb access */ 1174 mem_lock:2, /* lock instr */ 1175 mem_snoop:5, /* snoop mode */ 1176 mem_lvl:14, /* memory hierarchy level */ 1177 mem_op:5; /* type of opcode */ 1178 }; 1179 }; 1180 #else 1181 #error "Unknown endianness" 1182 #endif 1183 1184 /* type of opcode (load/store/prefetch,code) */ 1185 #define PERF_MEM_OP_NA 0x01 /* not available */ 1186 #define PERF_MEM_OP_LOAD 0x02 /* load instruction */ 1187 #define PERF_MEM_OP_STORE 0x04 /* store instruction */ 1188 #define PERF_MEM_OP_PFETCH 0x08 /* prefetch */ 1189 #define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ 1190 #define PERF_MEM_OP_SHIFT 0 1191 1192 /* memory hierarchy (memory level, hit or miss) */ 1193 #define PERF_MEM_LVL_NA 0x01 /* not available */ 1194 #define PERF_MEM_LVL_HIT 0x02 /* hit level */ 1195 #define PERF_MEM_LVL_MISS 0x04 /* miss level */ 1196 #define PERF_MEM_LVL_L1 0x08 /* L1 */ 1197 #define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ 1198 #define PERF_MEM_LVL_L2 0x20 /* L2 */ 1199 #define PERF_MEM_LVL_L3 0x40 /* L3 */ 1200 #define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ 1201 #define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ 1202 #define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ 1203 #define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */ 1204 #define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */ 1205 #define PERF_MEM_LVL_IO 0x1000 /* I/O memory */ 1206 #define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */ 1207 #define PERF_MEM_LVL_SHIFT 5 1208 1209 #define PERF_MEM_REMOTE_REMOTE 0x01 /* Remote */ 1210 #define PERF_MEM_REMOTE_SHIFT 37 1211 1212 #define PERF_MEM_LVLNUM_L1 0x01 /* L1 */ 1213 #define PERF_MEM_LVLNUM_L2 0x02 /* L2 */ 1214 #define PERF_MEM_LVLNUM_L3 0x03 /* L3 */ 1215 #define PERF_MEM_LVLNUM_L4 0x04 /* L4 */ 1216 /* 5-0xa available */ 1217 #define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */ 1218 #define PERF_MEM_LVLNUM_LFB 0x0c /* LFB */ 1219 #define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */ 1220 #define PERF_MEM_LVLNUM_PMEM 0x0e /* PMEM */ 1221 #define PERF_MEM_LVLNUM_NA 0x0f /* N/A */ 1222 1223 #define PERF_MEM_LVLNUM_SHIFT 33 1224 1225 /* snoop mode */ 1226 #define PERF_MEM_SNOOP_NA 0x01 /* not available */ 1227 #define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */ 1228 #define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */ 1229 #define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */ 1230 #define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */ 1231 #define PERF_MEM_SNOOP_SHIFT 19 1232 1233 #define PERF_MEM_SNOOPX_FWD 0x01 /* forward */ 1234 /* 1 free */ 1235 #define PERF_MEM_SNOOPX_SHIFT 38 1236 1237 /* locked instruction */ 1238 #define PERF_MEM_LOCK_NA 0x01 /* not available */ 1239 #define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */ 1240 #define PERF_MEM_LOCK_SHIFT 24 1241 1242 /* TLB access */ 1243 #define PERF_MEM_TLB_NA 0x01 /* not available */ 1244 #define PERF_MEM_TLB_HIT 0x02 /* hit level */ 1245 #define PERF_MEM_TLB_MISS 0x04 /* miss level */ 1246 #define PERF_MEM_TLB_L1 0x08 /* L1 */ 1247 #define PERF_MEM_TLB_L2 0x10 /* L2 */ 1248 #define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/ 1249 #define PERF_MEM_TLB_OS 0x40 /* OS fault handler */ 1250 #define PERF_MEM_TLB_SHIFT 26 1251 1252 #define PERF_MEM_S(a, s) \ 1253 (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) 1254 1255 /* 1256 * single taken branch record layout: 1257 * 1258 * from: source instruction (may not always be a branch insn) 1259 * to: branch target 1260 * mispred: branch target was mispredicted 1261 * predicted: branch target was predicted 1262 * 1263 * support for mispred, predicted is optional. In case it 1264 * is not supported mispred = predicted = 0. 1265 * 1266 * in_tx: running in a hardware transaction 1267 * abort: aborting a hardware transaction 1268 * cycles: cycles from last branch (or 0 if not supported) 1269 * type: branch type 1270 */ 1271 struct perf_branch_entry { 1272 __u64 from; 1273 __u64 to; 1274 __u64 mispred:1, /* target mispredicted */ 1275 predicted:1,/* target predicted */ 1276 in_tx:1, /* in transaction */ 1277 abort:1, /* transaction abort */ 1278 cycles:16, /* cycle count to last branch */ 1279 type:4, /* branch type */ 1280 reserved:40; 1281 }; 1282 1283 #endif /* _UAPI_LINUX_PERF_EVENT_H */ 1284