1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * Performance events: 4 * 5 * Copyright (C) 2008-2009, Thomas Gleixner <[email protected]> 6 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar 7 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra 8 * 9 * Data type definitions, declarations, prototypes. 10 * 11 * Started by: Thomas Gleixner and Ingo Molnar 12 * 13 * For licencing details see kernel-base/COPYING 14 */ 15 #ifndef _UAPI_LINUX_PERF_EVENT_H 16 #define _UAPI_LINUX_PERF_EVENT_H 17 18 #include <linux/types.h> 19 #include <linux/ioctl.h> 20 #include <asm/byteorder.h> 21 22 /* 23 * User-space ABI bits: 24 */ 25 26 /* 27 * attr.type 28 */ 29 enum perf_type_id { 30 PERF_TYPE_HARDWARE = 0, 31 PERF_TYPE_SOFTWARE = 1, 32 PERF_TYPE_TRACEPOINT = 2, 33 PERF_TYPE_HW_CACHE = 3, 34 PERF_TYPE_RAW = 4, 35 PERF_TYPE_BREAKPOINT = 5, 36 37 PERF_TYPE_MAX, /* non-ABI */ 38 }; 39 40 /* 41 * attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE 42 * PERF_TYPE_HARDWARE: 0xEEEEEEEE000000AA 43 * AA: hardware event ID 44 * EEEEEEEE: PMU type ID 45 * PERF_TYPE_HW_CACHE: 0xEEEEEEEE00DDCCBB 46 * BB: hardware cache ID 47 * CC: hardware cache op ID 48 * DD: hardware cache op result ID 49 * EEEEEEEE: PMU type ID 50 * If the PMU type ID is 0, the PERF_TYPE_RAW will be applied. 51 */ 52 #define PERF_PMU_TYPE_SHIFT 32 53 #define PERF_HW_EVENT_MASK 0xffffffff 54 55 /* 56 * Generalized performance event event_id types, used by the 57 * attr.event_id parameter of the sys_perf_event_open() 58 * syscall: 59 */ 60 enum perf_hw_id { 61 /* 62 * Common hardware events, generalized by the kernel: 63 */ 64 PERF_COUNT_HW_CPU_CYCLES = 0, 65 PERF_COUNT_HW_INSTRUCTIONS = 1, 66 PERF_COUNT_HW_CACHE_REFERENCES = 2, 67 PERF_COUNT_HW_CACHE_MISSES = 3, 68 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 69 PERF_COUNT_HW_BRANCH_MISSES = 5, 70 PERF_COUNT_HW_BUS_CYCLES = 6, 71 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, 72 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, 73 PERF_COUNT_HW_REF_CPU_CYCLES = 9, 74 75 PERF_COUNT_HW_MAX, /* non-ABI */ 76 }; 77 78 /* 79 * Generalized hardware cache events: 80 * 81 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x 82 * { read, write, prefetch } x 83 * { accesses, misses } 84 */ 85 enum perf_hw_cache_id { 86 PERF_COUNT_HW_CACHE_L1D = 0, 87 PERF_COUNT_HW_CACHE_L1I = 1, 88 PERF_COUNT_HW_CACHE_LL = 2, 89 PERF_COUNT_HW_CACHE_DTLB = 3, 90 PERF_COUNT_HW_CACHE_ITLB = 4, 91 PERF_COUNT_HW_CACHE_BPU = 5, 92 PERF_COUNT_HW_CACHE_NODE = 6, 93 94 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ 95 }; 96 97 enum perf_hw_cache_op_id { 98 PERF_COUNT_HW_CACHE_OP_READ = 0, 99 PERF_COUNT_HW_CACHE_OP_WRITE = 1, 100 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 101 102 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ 103 }; 104 105 enum perf_hw_cache_op_result_id { 106 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 107 PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 108 109 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ 110 }; 111 112 /* 113 * Special "software" events provided by the kernel, even if the hardware 114 * does not support performance events. These events measure various 115 * physical and sw events of the kernel (and allow the profiling of them as 116 * well): 117 */ 118 enum perf_sw_ids { 119 PERF_COUNT_SW_CPU_CLOCK = 0, 120 PERF_COUNT_SW_TASK_CLOCK = 1, 121 PERF_COUNT_SW_PAGE_FAULTS = 2, 122 PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 123 PERF_COUNT_SW_CPU_MIGRATIONS = 4, 124 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 125 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 126 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 127 PERF_COUNT_SW_EMULATION_FAULTS = 8, 128 PERF_COUNT_SW_DUMMY = 9, 129 PERF_COUNT_SW_BPF_OUTPUT = 10, 130 131 PERF_COUNT_SW_MAX, /* non-ABI */ 132 }; 133 134 /* 135 * Bits that can be set in attr.sample_type to request information 136 * in the overflow packets. 137 */ 138 enum perf_event_sample_format { 139 PERF_SAMPLE_IP = 1U << 0, 140 PERF_SAMPLE_TID = 1U << 1, 141 PERF_SAMPLE_TIME = 1U << 2, 142 PERF_SAMPLE_ADDR = 1U << 3, 143 PERF_SAMPLE_READ = 1U << 4, 144 PERF_SAMPLE_CALLCHAIN = 1U << 5, 145 PERF_SAMPLE_ID = 1U << 6, 146 PERF_SAMPLE_CPU = 1U << 7, 147 PERF_SAMPLE_PERIOD = 1U << 8, 148 PERF_SAMPLE_STREAM_ID = 1U << 9, 149 PERF_SAMPLE_RAW = 1U << 10, 150 PERF_SAMPLE_BRANCH_STACK = 1U << 11, 151 PERF_SAMPLE_REGS_USER = 1U << 12, 152 PERF_SAMPLE_STACK_USER = 1U << 13, 153 PERF_SAMPLE_WEIGHT = 1U << 14, 154 PERF_SAMPLE_DATA_SRC = 1U << 15, 155 PERF_SAMPLE_IDENTIFIER = 1U << 16, 156 PERF_SAMPLE_TRANSACTION = 1U << 17, 157 PERF_SAMPLE_REGS_INTR = 1U << 18, 158 PERF_SAMPLE_PHYS_ADDR = 1U << 19, 159 PERF_SAMPLE_AUX = 1U << 20, 160 PERF_SAMPLE_CGROUP = 1U << 21, 161 PERF_SAMPLE_DATA_PAGE_SIZE = 1U << 22, 162 PERF_SAMPLE_CODE_PAGE_SIZE = 1U << 23, 163 PERF_SAMPLE_WEIGHT_STRUCT = 1U << 24, 164 165 PERF_SAMPLE_MAX = 1U << 25, /* non-ABI */ 166 167 __PERF_SAMPLE_CALLCHAIN_EARLY = 1ULL << 63, /* non-ABI; internal use */ 168 }; 169 170 #define PERF_SAMPLE_WEIGHT_TYPE (PERF_SAMPLE_WEIGHT | PERF_SAMPLE_WEIGHT_STRUCT) 171 /* 172 * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set 173 * 174 * If the user does not pass priv level information via branch_sample_type, 175 * the kernel uses the event's priv level. Branch and event priv levels do 176 * not have to match. Branch priv level is checked for permissions. 177 * 178 * The branch types can be combined, however BRANCH_ANY covers all types 179 * of branches and therefore it supersedes all the other types. 180 */ 181 enum perf_branch_sample_type_shift { 182 PERF_SAMPLE_BRANCH_USER_SHIFT = 0, /* user branches */ 183 PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1, /* kernel branches */ 184 PERF_SAMPLE_BRANCH_HV_SHIFT = 2, /* hypervisor branches */ 185 186 PERF_SAMPLE_BRANCH_ANY_SHIFT = 3, /* any branch types */ 187 PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4, /* any call branch */ 188 PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5, /* any return branch */ 189 PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6, /* indirect calls */ 190 PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7, /* transaction aborts */ 191 PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8, /* in transaction */ 192 PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */ 193 PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */ 194 195 PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* call/ret stack */ 196 PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12, /* indirect jumps */ 197 PERF_SAMPLE_BRANCH_CALL_SHIFT = 13, /* direct call */ 198 199 PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT = 14, /* no flags */ 200 PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT = 15, /* no cycles */ 201 202 PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT = 16, /* save branch type */ 203 204 PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT = 17, /* save low level index of raw branch records */ 205 206 PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */ 207 }; 208 209 enum perf_branch_sample_type { 210 PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT, 211 PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT, 212 PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT, 213 214 PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT, 215 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT, 216 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT, 217 PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT, 218 PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT, 219 PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT, 220 PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT, 221 PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT, 222 223 PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT, 224 PERF_SAMPLE_BRANCH_IND_JUMP = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT, 225 PERF_SAMPLE_BRANCH_CALL = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT, 226 227 PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT, 228 PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT, 229 230 PERF_SAMPLE_BRANCH_TYPE_SAVE = 231 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT, 232 233 PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT, 234 235 PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT, 236 }; 237 238 /* 239 * Common flow change classification 240 */ 241 enum { 242 PERF_BR_UNKNOWN = 0, /* unknown */ 243 PERF_BR_COND = 1, /* conditional */ 244 PERF_BR_UNCOND = 2, /* unconditional */ 245 PERF_BR_IND = 3, /* indirect */ 246 PERF_BR_CALL = 4, /* function call */ 247 PERF_BR_IND_CALL = 5, /* indirect function call */ 248 PERF_BR_RET = 6, /* function return */ 249 PERF_BR_SYSCALL = 7, /* syscall */ 250 PERF_BR_SYSRET = 8, /* syscall return */ 251 PERF_BR_COND_CALL = 9, /* conditional function call */ 252 PERF_BR_COND_RET = 10, /* conditional function return */ 253 PERF_BR_MAX, 254 }; 255 256 #define PERF_SAMPLE_BRANCH_PLM_ALL \ 257 (PERF_SAMPLE_BRANCH_USER|\ 258 PERF_SAMPLE_BRANCH_KERNEL|\ 259 PERF_SAMPLE_BRANCH_HV) 260 261 /* 262 * Values to determine ABI of the registers dump. 263 */ 264 enum perf_sample_regs_abi { 265 PERF_SAMPLE_REGS_ABI_NONE = 0, 266 PERF_SAMPLE_REGS_ABI_32 = 1, 267 PERF_SAMPLE_REGS_ABI_64 = 2, 268 }; 269 270 /* 271 * Values for the memory transaction event qualifier, mostly for 272 * abort events. Multiple bits can be set. 273 */ 274 enum { 275 PERF_TXN_ELISION = (1 << 0), /* From elision */ 276 PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */ 277 PERF_TXN_SYNC = (1 << 2), /* Instruction is related */ 278 PERF_TXN_ASYNC = (1 << 3), /* Instruction not related */ 279 PERF_TXN_RETRY = (1 << 4), /* Retry possible */ 280 PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */ 281 PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */ 282 PERF_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */ 283 284 PERF_TXN_MAX = (1 << 8), /* non-ABI */ 285 286 /* bits 32..63 are reserved for the abort code */ 287 288 PERF_TXN_ABORT_MASK = (0xffffffffULL << 32), 289 PERF_TXN_ABORT_SHIFT = 32, 290 }; 291 292 /* 293 * The format of the data returned by read() on a perf event fd, 294 * as specified by attr.read_format: 295 * 296 * struct read_format { 297 * { u64 value; 298 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 299 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 300 * { u64 id; } && PERF_FORMAT_ID 301 * } && !PERF_FORMAT_GROUP 302 * 303 * { u64 nr; 304 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 305 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 306 * { u64 value; 307 * { u64 id; } && PERF_FORMAT_ID 308 * } cntr[nr]; 309 * } && PERF_FORMAT_GROUP 310 * }; 311 */ 312 enum perf_event_read_format { 313 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 314 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 315 PERF_FORMAT_ID = 1U << 2, 316 PERF_FORMAT_GROUP = 1U << 3, 317 318 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ 319 }; 320 321 #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ 322 #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ 323 #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ 324 #define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */ 325 /* add: sample_stack_user */ 326 #define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */ 327 #define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ 328 #define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ 329 330 /* 331 * Hardware event_id to monitor via a performance monitoring event: 332 * 333 * @sample_max_stack: Max number of frame pointers in a callchain, 334 * should be < /proc/sys/kernel/perf_event_max_stack 335 */ 336 struct perf_event_attr { 337 338 /* 339 * Major type: hardware/software/tracepoint/etc. 340 */ 341 __u32 type; 342 343 /* 344 * Size of the attr structure, for fwd/bwd compat. 345 */ 346 __u32 size; 347 348 /* 349 * Type specific configuration information. 350 */ 351 __u64 config; 352 353 union { 354 __u64 sample_period; 355 __u64 sample_freq; 356 }; 357 358 __u64 sample_type; 359 __u64 read_format; 360 361 __u64 disabled : 1, /* off by default */ 362 inherit : 1, /* children inherit it */ 363 pinned : 1, /* must always be on PMU */ 364 exclusive : 1, /* only group on PMU */ 365 exclude_user : 1, /* don't count user */ 366 exclude_kernel : 1, /* ditto kernel */ 367 exclude_hv : 1, /* ditto hypervisor */ 368 exclude_idle : 1, /* don't count when idle */ 369 mmap : 1, /* include mmap data */ 370 comm : 1, /* include comm data */ 371 freq : 1, /* use freq, not period */ 372 inherit_stat : 1, /* per task counts */ 373 enable_on_exec : 1, /* next exec enables */ 374 task : 1, /* trace fork/exit */ 375 watermark : 1, /* wakeup_watermark */ 376 /* 377 * precise_ip: 378 * 379 * 0 - SAMPLE_IP can have arbitrary skid 380 * 1 - SAMPLE_IP must have constant skid 381 * 2 - SAMPLE_IP requested to have 0 skid 382 * 3 - SAMPLE_IP must have 0 skid 383 * 384 * See also PERF_RECORD_MISC_EXACT_IP 385 */ 386 precise_ip : 2, /* skid constraint */ 387 mmap_data : 1, /* non-exec mmap data */ 388 sample_id_all : 1, /* sample_type all events */ 389 390 exclude_host : 1, /* don't count in host */ 391 exclude_guest : 1, /* don't count in guest */ 392 393 exclude_callchain_kernel : 1, /* exclude kernel callchains */ 394 exclude_callchain_user : 1, /* exclude user callchains */ 395 mmap2 : 1, /* include mmap with inode data */ 396 comm_exec : 1, /* flag comm events that are due to an exec */ 397 use_clockid : 1, /* use @clockid for time fields */ 398 context_switch : 1, /* context switch data */ 399 write_backward : 1, /* Write ring buffer from end to beginning */ 400 namespaces : 1, /* include namespaces data */ 401 ksymbol : 1, /* include ksymbol events */ 402 bpf_event : 1, /* include bpf events */ 403 aux_output : 1, /* generate AUX records instead of events */ 404 cgroup : 1, /* include cgroup events */ 405 text_poke : 1, /* include text poke events */ 406 build_id : 1, /* use build id in mmap2 events */ 407 __reserved_1 : 29; 408 409 union { 410 __u32 wakeup_events; /* wakeup every n events */ 411 __u32 wakeup_watermark; /* bytes before wakeup */ 412 }; 413 414 __u32 bp_type; 415 union { 416 __u64 bp_addr; 417 __u64 kprobe_func; /* for perf_kprobe */ 418 __u64 uprobe_path; /* for perf_uprobe */ 419 __u64 config1; /* extension of config */ 420 }; 421 union { 422 __u64 bp_len; 423 __u64 kprobe_addr; /* when kprobe_func == NULL */ 424 __u64 probe_offset; /* for perf_[k,u]probe */ 425 __u64 config2; /* extension of config1 */ 426 }; 427 __u64 branch_sample_type; /* enum perf_branch_sample_type */ 428 429 /* 430 * Defines set of user regs to dump on samples. 431 * See asm/perf_regs.h for details. 432 */ 433 __u64 sample_regs_user; 434 435 /* 436 * Defines size of the user stack to dump on samples. 437 */ 438 __u32 sample_stack_user; 439 440 __s32 clockid; 441 /* 442 * Defines set of regs to dump for each sample 443 * state captured on: 444 * - precise = 0: PMU interrupt 445 * - precise > 0: sampled instruction 446 * 447 * See asm/perf_regs.h for details. 448 */ 449 __u64 sample_regs_intr; 450 451 /* 452 * Wakeup watermark for AUX area 453 */ 454 __u32 aux_watermark; 455 __u16 sample_max_stack; 456 __u16 __reserved_2; 457 __u32 aux_sample_size; 458 __u32 __reserved_3; 459 }; 460 461 /* 462 * Structure used by below PERF_EVENT_IOC_QUERY_BPF command 463 * to query bpf programs attached to the same perf tracepoint 464 * as the given perf event. 465 */ 466 struct perf_event_query_bpf { 467 /* 468 * The below ids array length 469 */ 470 __u32 ids_len; 471 /* 472 * Set by the kernel to indicate the number of 473 * available programs 474 */ 475 __u32 prog_cnt; 476 /* 477 * User provided buffer to store program ids 478 */ 479 __u32 ids[0]; 480 }; 481 482 /* 483 * Ioctls that can be done on a perf event fd: 484 */ 485 #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 486 #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 487 #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 488 #define PERF_EVENT_IOC_RESET _IO ('$', 3) 489 #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 490 #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 491 #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 492 #define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) 493 #define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32) 494 #define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW('$', 9, __u32) 495 #define PERF_EVENT_IOC_QUERY_BPF _IOWR('$', 10, struct perf_event_query_bpf *) 496 #define PERF_EVENT_IOC_MODIFY_ATTRIBUTES _IOW('$', 11, struct perf_event_attr *) 497 498 enum perf_event_ioc_flags { 499 PERF_IOC_FLAG_GROUP = 1U << 0, 500 }; 501 502 /* 503 * Structure of the page that can be mapped via mmap 504 */ 505 struct perf_event_mmap_page { 506 __u32 version; /* version number of this structure */ 507 __u32 compat_version; /* lowest version this is compat with */ 508 509 /* 510 * Bits needed to read the hw events in user-space. 511 * 512 * u32 seq, time_mult, time_shift, index, width; 513 * u64 count, enabled, running; 514 * u64 cyc, time_offset; 515 * s64 pmc = 0; 516 * 517 * do { 518 * seq = pc->lock; 519 * barrier() 520 * 521 * enabled = pc->time_enabled; 522 * running = pc->time_running; 523 * 524 * if (pc->cap_usr_time && enabled != running) { 525 * cyc = rdtsc(); 526 * time_offset = pc->time_offset; 527 * time_mult = pc->time_mult; 528 * time_shift = pc->time_shift; 529 * } 530 * 531 * index = pc->index; 532 * count = pc->offset; 533 * if (pc->cap_user_rdpmc && index) { 534 * width = pc->pmc_width; 535 * pmc = rdpmc(index - 1); 536 * } 537 * 538 * barrier(); 539 * } while (pc->lock != seq); 540 * 541 * NOTE: for obvious reason this only works on self-monitoring 542 * processes. 543 */ 544 __u32 lock; /* seqlock for synchronization */ 545 __u32 index; /* hardware event identifier */ 546 __s64 offset; /* add to hardware event value */ 547 __u64 time_enabled; /* time event active */ 548 __u64 time_running; /* time event on cpu */ 549 union { 550 __u64 capabilities; 551 struct { 552 __u64 cap_bit0 : 1, /* Always 0, deprecated, see commit 860f085b74e9 */ 553 cap_bit0_is_deprecated : 1, /* Always 1, signals that bit 0 is zero */ 554 555 cap_user_rdpmc : 1, /* The RDPMC instruction can be used to read counts */ 556 cap_user_time : 1, /* The time_{shift,mult,offset} fields are used */ 557 cap_user_time_zero : 1, /* The time_zero field is used */ 558 cap_user_time_short : 1, /* the time_{cycle,mask} fields are used */ 559 cap_____res : 58; 560 }; 561 }; 562 563 /* 564 * If cap_user_rdpmc this field provides the bit-width of the value 565 * read using the rdpmc() or equivalent instruction. This can be used 566 * to sign extend the result like: 567 * 568 * pmc <<= 64 - width; 569 * pmc >>= 64 - width; // signed shift right 570 * count += pmc; 571 */ 572 __u16 pmc_width; 573 574 /* 575 * If cap_usr_time the below fields can be used to compute the time 576 * delta since time_enabled (in ns) using rdtsc or similar. 577 * 578 * u64 quot, rem; 579 * u64 delta; 580 * 581 * quot = (cyc >> time_shift); 582 * rem = cyc & (((u64)1 << time_shift) - 1); 583 * delta = time_offset + quot * time_mult + 584 * ((rem * time_mult) >> time_shift); 585 * 586 * Where time_offset,time_mult,time_shift and cyc are read in the 587 * seqcount loop described above. This delta can then be added to 588 * enabled and possible running (if index), improving the scaling: 589 * 590 * enabled += delta; 591 * if (index) 592 * running += delta; 593 * 594 * quot = count / running; 595 * rem = count % running; 596 * count = quot * enabled + (rem * enabled) / running; 597 */ 598 __u16 time_shift; 599 __u32 time_mult; 600 __u64 time_offset; 601 /* 602 * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated 603 * from sample timestamps. 604 * 605 * time = timestamp - time_zero; 606 * quot = time / time_mult; 607 * rem = time % time_mult; 608 * cyc = (quot << time_shift) + (rem << time_shift) / time_mult; 609 * 610 * And vice versa: 611 * 612 * quot = cyc >> time_shift; 613 * rem = cyc & (((u64)1 << time_shift) - 1); 614 * timestamp = time_zero + quot * time_mult + 615 * ((rem * time_mult) >> time_shift); 616 */ 617 __u64 time_zero; 618 619 __u32 size; /* Header size up to __reserved[] fields. */ 620 __u32 __reserved_1; 621 622 /* 623 * If cap_usr_time_short, the hardware clock is less than 64bit wide 624 * and we must compute the 'cyc' value, as used by cap_usr_time, as: 625 * 626 * cyc = time_cycles + ((cyc - time_cycles) & time_mask) 627 * 628 * NOTE: this form is explicitly chosen such that cap_usr_time_short 629 * is a correction on top of cap_usr_time, and code that doesn't 630 * know about cap_usr_time_short still works under the assumption 631 * the counter doesn't wrap. 632 */ 633 __u64 time_cycles; 634 __u64 time_mask; 635 636 /* 637 * Hole for extension of the self monitor capabilities 638 */ 639 640 __u8 __reserved[116*8]; /* align to 1k. */ 641 642 /* 643 * Control data for the mmap() data buffer. 644 * 645 * User-space reading the @data_head value should issue an smp_rmb(), 646 * after reading this value. 647 * 648 * When the mapping is PROT_WRITE the @data_tail value should be 649 * written by userspace to reflect the last read data, after issueing 650 * an smp_mb() to separate the data read from the ->data_tail store. 651 * In this case the kernel will not over-write unread data. 652 * 653 * See perf_output_put_handle() for the data ordering. 654 * 655 * data_{offset,size} indicate the location and size of the perf record 656 * buffer within the mmapped area. 657 */ 658 __u64 data_head; /* head in the data section */ 659 __u64 data_tail; /* user-space written tail */ 660 __u64 data_offset; /* where the buffer starts */ 661 __u64 data_size; /* data buffer size */ 662 663 /* 664 * AUX area is defined by aux_{offset,size} fields that should be set 665 * by the userspace, so that 666 * 667 * aux_offset >= data_offset + data_size 668 * 669 * prior to mmap()ing it. Size of the mmap()ed area should be aux_size. 670 * 671 * Ring buffer pointers aux_{head,tail} have the same semantics as 672 * data_{head,tail} and same ordering rules apply. 673 */ 674 __u64 aux_head; 675 __u64 aux_tail; 676 __u64 aux_offset; 677 __u64 aux_size; 678 }; 679 680 /* 681 * The current state of perf_event_header::misc bits usage: 682 * ('|' used bit, '-' unused bit) 683 * 684 * 012 CDEF 685 * |||---------|||| 686 * 687 * Where: 688 * 0-2 CPUMODE_MASK 689 * 690 * C PROC_MAP_PARSE_TIMEOUT 691 * D MMAP_DATA / COMM_EXEC / FORK_EXEC / SWITCH_OUT 692 * E MMAP_BUILD_ID / EXACT_IP / SCHED_OUT_PREEMPT 693 * F (reserved) 694 */ 695 696 #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 697 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 698 #define PERF_RECORD_MISC_KERNEL (1 << 0) 699 #define PERF_RECORD_MISC_USER (2 << 0) 700 #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 701 #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 702 #define PERF_RECORD_MISC_GUEST_USER (5 << 0) 703 704 /* 705 * Indicates that /proc/PID/maps parsing are truncated by time out. 706 */ 707 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12) 708 /* 709 * Following PERF_RECORD_MISC_* are used on different 710 * events, so can reuse the same bit position: 711 * 712 * PERF_RECORD_MISC_MMAP_DATA - PERF_RECORD_MMAP* events 713 * PERF_RECORD_MISC_COMM_EXEC - PERF_RECORD_COMM event 714 * PERF_RECORD_MISC_FORK_EXEC - PERF_RECORD_FORK event (perf internal) 715 * PERF_RECORD_MISC_SWITCH_OUT - PERF_RECORD_SWITCH* events 716 */ 717 #define PERF_RECORD_MISC_MMAP_DATA (1 << 13) 718 #define PERF_RECORD_MISC_COMM_EXEC (1 << 13) 719 #define PERF_RECORD_MISC_FORK_EXEC (1 << 13) 720 #define PERF_RECORD_MISC_SWITCH_OUT (1 << 13) 721 /* 722 * These PERF_RECORD_MISC_* flags below are safely reused 723 * for the following events: 724 * 725 * PERF_RECORD_MISC_EXACT_IP - PERF_RECORD_SAMPLE of precise events 726 * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT - PERF_RECORD_SWITCH* events 727 * PERF_RECORD_MISC_MMAP_BUILD_ID - PERF_RECORD_MMAP2 event 728 * 729 * 730 * PERF_RECORD_MISC_EXACT_IP: 731 * Indicates that the content of PERF_SAMPLE_IP points to 732 * the actual instruction that triggered the event. See also 733 * perf_event_attr::precise_ip. 734 * 735 * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT: 736 * Indicates that thread was preempted in TASK_RUNNING state. 737 * 738 * PERF_RECORD_MISC_MMAP_BUILD_ID: 739 * Indicates that mmap2 event carries build id data. 740 */ 741 #define PERF_RECORD_MISC_EXACT_IP (1 << 14) 742 #define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT (1 << 14) 743 #define PERF_RECORD_MISC_MMAP_BUILD_ID (1 << 14) 744 /* 745 * Reserve the last bit to indicate some extended misc field 746 */ 747 #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 748 749 struct perf_event_header { 750 __u32 type; 751 __u16 misc; 752 __u16 size; 753 }; 754 755 struct perf_ns_link_info { 756 __u64 dev; 757 __u64 ino; 758 }; 759 760 enum { 761 NET_NS_INDEX = 0, 762 UTS_NS_INDEX = 1, 763 IPC_NS_INDEX = 2, 764 PID_NS_INDEX = 3, 765 USER_NS_INDEX = 4, 766 MNT_NS_INDEX = 5, 767 CGROUP_NS_INDEX = 6, 768 769 NR_NAMESPACES, /* number of available namespaces */ 770 }; 771 772 enum perf_event_type { 773 774 /* 775 * If perf_event_attr.sample_id_all is set then all event types will 776 * have the sample_type selected fields related to where/when 777 * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU, 778 * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed 779 * just after the perf_event_header and the fields already present for 780 * the existing fields, i.e. at the end of the payload. That way a newer 781 * perf.data file will be supported by older perf tools, with these new 782 * optional fields being ignored. 783 * 784 * struct sample_id { 785 * { u32 pid, tid; } && PERF_SAMPLE_TID 786 * { u64 time; } && PERF_SAMPLE_TIME 787 * { u64 id; } && PERF_SAMPLE_ID 788 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 789 * { u32 cpu, res; } && PERF_SAMPLE_CPU 790 * { u64 id; } && PERF_SAMPLE_IDENTIFIER 791 * } && perf_event_attr::sample_id_all 792 * 793 * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. The 794 * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed 795 * relative to header.size. 796 */ 797 798 /* 799 * The MMAP events record the PROT_EXEC mappings so that we can 800 * correlate userspace IPs to code. They have the following structure: 801 * 802 * struct { 803 * struct perf_event_header header; 804 * 805 * u32 pid, tid; 806 * u64 addr; 807 * u64 len; 808 * u64 pgoff; 809 * char filename[]; 810 * struct sample_id sample_id; 811 * }; 812 */ 813 PERF_RECORD_MMAP = 1, 814 815 /* 816 * struct { 817 * struct perf_event_header header; 818 * u64 id; 819 * u64 lost; 820 * struct sample_id sample_id; 821 * }; 822 */ 823 PERF_RECORD_LOST = 2, 824 825 /* 826 * struct { 827 * struct perf_event_header header; 828 * 829 * u32 pid, tid; 830 * char comm[]; 831 * struct sample_id sample_id; 832 * }; 833 */ 834 PERF_RECORD_COMM = 3, 835 836 /* 837 * struct { 838 * struct perf_event_header header; 839 * u32 pid, ppid; 840 * u32 tid, ptid; 841 * u64 time; 842 * struct sample_id sample_id; 843 * }; 844 */ 845 PERF_RECORD_EXIT = 4, 846 847 /* 848 * struct { 849 * struct perf_event_header header; 850 * u64 time; 851 * u64 id; 852 * u64 stream_id; 853 * struct sample_id sample_id; 854 * }; 855 */ 856 PERF_RECORD_THROTTLE = 5, 857 PERF_RECORD_UNTHROTTLE = 6, 858 859 /* 860 * struct { 861 * struct perf_event_header header; 862 * u32 pid, ppid; 863 * u32 tid, ptid; 864 * u64 time; 865 * struct sample_id sample_id; 866 * }; 867 */ 868 PERF_RECORD_FORK = 7, 869 870 /* 871 * struct { 872 * struct perf_event_header header; 873 * u32 pid, tid; 874 * 875 * struct read_format values; 876 * struct sample_id sample_id; 877 * }; 878 */ 879 PERF_RECORD_READ = 8, 880 881 /* 882 * struct { 883 * struct perf_event_header header; 884 * 885 * # 886 * # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. 887 * # The advantage of PERF_SAMPLE_IDENTIFIER is that its position 888 * # is fixed relative to header. 889 * # 890 * 891 * { u64 id; } && PERF_SAMPLE_IDENTIFIER 892 * { u64 ip; } && PERF_SAMPLE_IP 893 * { u32 pid, tid; } && PERF_SAMPLE_TID 894 * { u64 time; } && PERF_SAMPLE_TIME 895 * { u64 addr; } && PERF_SAMPLE_ADDR 896 * { u64 id; } && PERF_SAMPLE_ID 897 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 898 * { u32 cpu, res; } && PERF_SAMPLE_CPU 899 * { u64 period; } && PERF_SAMPLE_PERIOD 900 * 901 * { struct read_format values; } && PERF_SAMPLE_READ 902 * 903 * { u64 nr, 904 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN 905 * 906 * # 907 * # The RAW record below is opaque data wrt the ABI 908 * # 909 * # That is, the ABI doesn't make any promises wrt to 910 * # the stability of its content, it may vary depending 911 * # on event, hardware, kernel version and phase of 912 * # the moon. 913 * # 914 * # In other words, PERF_SAMPLE_RAW contents are not an ABI. 915 * # 916 * 917 * { u32 size; 918 * char data[size];}&& PERF_SAMPLE_RAW 919 * 920 * { u64 nr; 921 * { u64 hw_idx; } && PERF_SAMPLE_BRANCH_HW_INDEX 922 * { u64 from, to, flags } lbr[nr]; 923 * } && PERF_SAMPLE_BRANCH_STACK 924 * 925 * { u64 abi; # enum perf_sample_regs_abi 926 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER 927 * 928 * { u64 size; 929 * char data[size]; 930 * u64 dyn_size; } && PERF_SAMPLE_STACK_USER 931 * 932 * { union perf_sample_weight 933 * { 934 * u64 full; && PERF_SAMPLE_WEIGHT 935 * #if defined(__LITTLE_ENDIAN_BITFIELD) 936 * struct { 937 * u32 var1_dw; 938 * u16 var2_w; 939 * u16 var3_w; 940 * } && PERF_SAMPLE_WEIGHT_STRUCT 941 * #elif defined(__BIG_ENDIAN_BITFIELD) 942 * struct { 943 * u16 var3_w; 944 * u16 var2_w; 945 * u32 var1_dw; 946 * } && PERF_SAMPLE_WEIGHT_STRUCT 947 * #endif 948 * } 949 * } 950 * { u64 data_src; } && PERF_SAMPLE_DATA_SRC 951 * { u64 transaction; } && PERF_SAMPLE_TRANSACTION 952 * { u64 abi; # enum perf_sample_regs_abi 953 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR 954 * { u64 phys_addr;} && PERF_SAMPLE_PHYS_ADDR 955 * { u64 size; 956 * char data[size]; } && PERF_SAMPLE_AUX 957 * { u64 data_page_size;} && PERF_SAMPLE_DATA_PAGE_SIZE 958 * { u64 code_page_size;} && PERF_SAMPLE_CODE_PAGE_SIZE 959 * }; 960 */ 961 PERF_RECORD_SAMPLE = 9, 962 963 /* 964 * The MMAP2 records are an augmented version of MMAP, they add 965 * maj, min, ino numbers to be used to uniquely identify each mapping 966 * 967 * struct { 968 * struct perf_event_header header; 969 * 970 * u32 pid, tid; 971 * u64 addr; 972 * u64 len; 973 * u64 pgoff; 974 * union { 975 * struct { 976 * u32 maj; 977 * u32 min; 978 * u64 ino; 979 * u64 ino_generation; 980 * }; 981 * struct { 982 * u8 build_id_size; 983 * u8 __reserved_1; 984 * u16 __reserved_2; 985 * u8 build_id[20]; 986 * }; 987 * }; 988 * u32 prot, flags; 989 * char filename[]; 990 * struct sample_id sample_id; 991 * }; 992 */ 993 PERF_RECORD_MMAP2 = 10, 994 995 /* 996 * Records that new data landed in the AUX buffer part. 997 * 998 * struct { 999 * struct perf_event_header header; 1000 * 1001 * u64 aux_offset; 1002 * u64 aux_size; 1003 * u64 flags; 1004 * struct sample_id sample_id; 1005 * }; 1006 */ 1007 PERF_RECORD_AUX = 11, 1008 1009 /* 1010 * Indicates that instruction trace has started 1011 * 1012 * struct { 1013 * struct perf_event_header header; 1014 * u32 pid; 1015 * u32 tid; 1016 * struct sample_id sample_id; 1017 * }; 1018 */ 1019 PERF_RECORD_ITRACE_START = 12, 1020 1021 /* 1022 * Records the dropped/lost sample number. 1023 * 1024 * struct { 1025 * struct perf_event_header header; 1026 * 1027 * u64 lost; 1028 * struct sample_id sample_id; 1029 * }; 1030 */ 1031 PERF_RECORD_LOST_SAMPLES = 13, 1032 1033 /* 1034 * Records a context switch in or out (flagged by 1035 * PERF_RECORD_MISC_SWITCH_OUT). See also 1036 * PERF_RECORD_SWITCH_CPU_WIDE. 1037 * 1038 * struct { 1039 * struct perf_event_header header; 1040 * struct sample_id sample_id; 1041 * }; 1042 */ 1043 PERF_RECORD_SWITCH = 14, 1044 1045 /* 1046 * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and 1047 * next_prev_tid that are the next (switching out) or previous 1048 * (switching in) pid/tid. 1049 * 1050 * struct { 1051 * struct perf_event_header header; 1052 * u32 next_prev_pid; 1053 * u32 next_prev_tid; 1054 * struct sample_id sample_id; 1055 * }; 1056 */ 1057 PERF_RECORD_SWITCH_CPU_WIDE = 15, 1058 1059 /* 1060 * struct { 1061 * struct perf_event_header header; 1062 * u32 pid; 1063 * u32 tid; 1064 * u64 nr_namespaces; 1065 * { u64 dev, inode; } [nr_namespaces]; 1066 * struct sample_id sample_id; 1067 * }; 1068 */ 1069 PERF_RECORD_NAMESPACES = 16, 1070 1071 /* 1072 * Record ksymbol register/unregister events: 1073 * 1074 * struct { 1075 * struct perf_event_header header; 1076 * u64 addr; 1077 * u32 len; 1078 * u16 ksym_type; 1079 * u16 flags; 1080 * char name[]; 1081 * struct sample_id sample_id; 1082 * }; 1083 */ 1084 PERF_RECORD_KSYMBOL = 17, 1085 1086 /* 1087 * Record bpf events: 1088 * enum perf_bpf_event_type { 1089 * PERF_BPF_EVENT_UNKNOWN = 0, 1090 * PERF_BPF_EVENT_PROG_LOAD = 1, 1091 * PERF_BPF_EVENT_PROG_UNLOAD = 2, 1092 * }; 1093 * 1094 * struct { 1095 * struct perf_event_header header; 1096 * u16 type; 1097 * u16 flags; 1098 * u32 id; 1099 * u8 tag[BPF_TAG_SIZE]; 1100 * struct sample_id sample_id; 1101 * }; 1102 */ 1103 PERF_RECORD_BPF_EVENT = 18, 1104 1105 /* 1106 * struct { 1107 * struct perf_event_header header; 1108 * u64 id; 1109 * char path[]; 1110 * struct sample_id sample_id; 1111 * }; 1112 */ 1113 PERF_RECORD_CGROUP = 19, 1114 1115 /* 1116 * Records changes to kernel text i.e. self-modified code. 'old_len' is 1117 * the number of old bytes, 'new_len' is the number of new bytes. Either 1118 * 'old_len' or 'new_len' may be zero to indicate, for example, the 1119 * addition or removal of a trampoline. 'bytes' contains the old bytes 1120 * followed immediately by the new bytes. 1121 * 1122 * struct { 1123 * struct perf_event_header header; 1124 * u64 addr; 1125 * u16 old_len; 1126 * u16 new_len; 1127 * u8 bytes[]; 1128 * struct sample_id sample_id; 1129 * }; 1130 */ 1131 PERF_RECORD_TEXT_POKE = 20, 1132 1133 PERF_RECORD_MAX, /* non-ABI */ 1134 }; 1135 1136 enum perf_record_ksymbol_type { 1137 PERF_RECORD_KSYMBOL_TYPE_UNKNOWN = 0, 1138 PERF_RECORD_KSYMBOL_TYPE_BPF = 1, 1139 /* 1140 * Out of line code such as kprobe-replaced instructions or optimized 1141 * kprobes or ftrace trampolines. 1142 */ 1143 PERF_RECORD_KSYMBOL_TYPE_OOL = 2, 1144 PERF_RECORD_KSYMBOL_TYPE_MAX /* non-ABI */ 1145 }; 1146 1147 #define PERF_RECORD_KSYMBOL_FLAGS_UNREGISTER (1 << 0) 1148 1149 enum perf_bpf_event_type { 1150 PERF_BPF_EVENT_UNKNOWN = 0, 1151 PERF_BPF_EVENT_PROG_LOAD = 1, 1152 PERF_BPF_EVENT_PROG_UNLOAD = 2, 1153 PERF_BPF_EVENT_MAX, /* non-ABI */ 1154 }; 1155 1156 #define PERF_MAX_STACK_DEPTH 127 1157 #define PERF_MAX_CONTEXTS_PER_STACK 8 1158 1159 enum perf_callchain_context { 1160 PERF_CONTEXT_HV = (__u64)-32, 1161 PERF_CONTEXT_KERNEL = (__u64)-128, 1162 PERF_CONTEXT_USER = (__u64)-512, 1163 1164 PERF_CONTEXT_GUEST = (__u64)-2048, 1165 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 1166 PERF_CONTEXT_GUEST_USER = (__u64)-2560, 1167 1168 PERF_CONTEXT_MAX = (__u64)-4095, 1169 }; 1170 1171 /** 1172 * PERF_RECORD_AUX::flags bits 1173 */ 1174 #define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */ 1175 #define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */ 1176 #define PERF_AUX_FLAG_PARTIAL 0x04 /* record contains gaps */ 1177 #define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */ 1178 1179 #define PERF_FLAG_FD_NO_GROUP (1UL << 0) 1180 #define PERF_FLAG_FD_OUTPUT (1UL << 1) 1181 #define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ 1182 #define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */ 1183 1184 #if defined(__LITTLE_ENDIAN_BITFIELD) 1185 union perf_mem_data_src { 1186 __u64 val; 1187 struct { 1188 __u64 mem_op:5, /* type of opcode */ 1189 mem_lvl:14, /* memory hierarchy level */ 1190 mem_snoop:5, /* snoop mode */ 1191 mem_lock:2, /* lock instr */ 1192 mem_dtlb:7, /* tlb access */ 1193 mem_lvl_num:4, /* memory hierarchy level number */ 1194 mem_remote:1, /* remote */ 1195 mem_snoopx:2, /* snoop mode, ext */ 1196 mem_blk:3, /* access blocked */ 1197 mem_rsvd:21; 1198 }; 1199 }; 1200 #elif defined(__BIG_ENDIAN_BITFIELD) 1201 union perf_mem_data_src { 1202 __u64 val; 1203 struct { 1204 __u64 mem_rsvd:21, 1205 mem_blk:3, /* access blocked */ 1206 mem_snoopx:2, /* snoop mode, ext */ 1207 mem_remote:1, /* remote */ 1208 mem_lvl_num:4, /* memory hierarchy level number */ 1209 mem_dtlb:7, /* tlb access */ 1210 mem_lock:2, /* lock instr */ 1211 mem_snoop:5, /* snoop mode */ 1212 mem_lvl:14, /* memory hierarchy level */ 1213 mem_op:5; /* type of opcode */ 1214 }; 1215 }; 1216 #else 1217 #error "Unknown endianness" 1218 #endif 1219 1220 /* type of opcode (load/store/prefetch,code) */ 1221 #define PERF_MEM_OP_NA 0x01 /* not available */ 1222 #define PERF_MEM_OP_LOAD 0x02 /* load instruction */ 1223 #define PERF_MEM_OP_STORE 0x04 /* store instruction */ 1224 #define PERF_MEM_OP_PFETCH 0x08 /* prefetch */ 1225 #define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ 1226 #define PERF_MEM_OP_SHIFT 0 1227 1228 /* memory hierarchy (memory level, hit or miss) */ 1229 #define PERF_MEM_LVL_NA 0x01 /* not available */ 1230 #define PERF_MEM_LVL_HIT 0x02 /* hit level */ 1231 #define PERF_MEM_LVL_MISS 0x04 /* miss level */ 1232 #define PERF_MEM_LVL_L1 0x08 /* L1 */ 1233 #define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ 1234 #define PERF_MEM_LVL_L2 0x20 /* L2 */ 1235 #define PERF_MEM_LVL_L3 0x40 /* L3 */ 1236 #define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ 1237 #define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ 1238 #define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ 1239 #define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */ 1240 #define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */ 1241 #define PERF_MEM_LVL_IO 0x1000 /* I/O memory */ 1242 #define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */ 1243 #define PERF_MEM_LVL_SHIFT 5 1244 1245 #define PERF_MEM_REMOTE_REMOTE 0x01 /* Remote */ 1246 #define PERF_MEM_REMOTE_SHIFT 37 1247 1248 #define PERF_MEM_LVLNUM_L1 0x01 /* L1 */ 1249 #define PERF_MEM_LVLNUM_L2 0x02 /* L2 */ 1250 #define PERF_MEM_LVLNUM_L3 0x03 /* L3 */ 1251 #define PERF_MEM_LVLNUM_L4 0x04 /* L4 */ 1252 /* 5-0xa available */ 1253 #define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */ 1254 #define PERF_MEM_LVLNUM_LFB 0x0c /* LFB */ 1255 #define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */ 1256 #define PERF_MEM_LVLNUM_PMEM 0x0e /* PMEM */ 1257 #define PERF_MEM_LVLNUM_NA 0x0f /* N/A */ 1258 1259 #define PERF_MEM_LVLNUM_SHIFT 33 1260 1261 /* snoop mode */ 1262 #define PERF_MEM_SNOOP_NA 0x01 /* not available */ 1263 #define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */ 1264 #define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */ 1265 #define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */ 1266 #define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */ 1267 #define PERF_MEM_SNOOP_SHIFT 19 1268 1269 #define PERF_MEM_SNOOPX_FWD 0x01 /* forward */ 1270 /* 1 free */ 1271 #define PERF_MEM_SNOOPX_SHIFT 38 1272 1273 /* locked instruction */ 1274 #define PERF_MEM_LOCK_NA 0x01 /* not available */ 1275 #define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */ 1276 #define PERF_MEM_LOCK_SHIFT 24 1277 1278 /* TLB access */ 1279 #define PERF_MEM_TLB_NA 0x01 /* not available */ 1280 #define PERF_MEM_TLB_HIT 0x02 /* hit level */ 1281 #define PERF_MEM_TLB_MISS 0x04 /* miss level */ 1282 #define PERF_MEM_TLB_L1 0x08 /* L1 */ 1283 #define PERF_MEM_TLB_L2 0x10 /* L2 */ 1284 #define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/ 1285 #define PERF_MEM_TLB_OS 0x40 /* OS fault handler */ 1286 #define PERF_MEM_TLB_SHIFT 26 1287 1288 /* Access blocked */ 1289 #define PERF_MEM_BLK_NA 0x01 /* not available */ 1290 #define PERF_MEM_BLK_DATA 0x02 /* data could not be forwarded */ 1291 #define PERF_MEM_BLK_ADDR 0x04 /* address conflict */ 1292 #define PERF_MEM_BLK_SHIFT 40 1293 1294 #define PERF_MEM_S(a, s) \ 1295 (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) 1296 1297 /* 1298 * single taken branch record layout: 1299 * 1300 * from: source instruction (may not always be a branch insn) 1301 * to: branch target 1302 * mispred: branch target was mispredicted 1303 * predicted: branch target was predicted 1304 * 1305 * support for mispred, predicted is optional. In case it 1306 * is not supported mispred = predicted = 0. 1307 * 1308 * in_tx: running in a hardware transaction 1309 * abort: aborting a hardware transaction 1310 * cycles: cycles from last branch (or 0 if not supported) 1311 * type: branch type 1312 */ 1313 struct perf_branch_entry { 1314 __u64 from; 1315 __u64 to; 1316 __u64 mispred:1, /* target mispredicted */ 1317 predicted:1,/* target predicted */ 1318 in_tx:1, /* in transaction */ 1319 abort:1, /* transaction abort */ 1320 cycles:16, /* cycle count to last branch */ 1321 type:4, /* branch type */ 1322 reserved:40; 1323 }; 1324 1325 union perf_sample_weight { 1326 __u64 full; 1327 #if defined(__LITTLE_ENDIAN_BITFIELD) 1328 struct { 1329 __u32 var1_dw; 1330 __u16 var2_w; 1331 __u16 var3_w; 1332 }; 1333 #elif defined(__BIG_ENDIAN_BITFIELD) 1334 struct { 1335 __u16 var3_w; 1336 __u16 var2_w; 1337 __u32 var1_dw; 1338 }; 1339 #else 1340 #error "Unknown endianness" 1341 #endif 1342 }; 1343 1344 #endif /* _UAPI_LINUX_PERF_EVENT_H */ 1345