1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <[email protected]> 9 */ 10 11 #ifndef __SOUND_SOC_SOF_PRIV_H 12 #define __SOUND_SOC_SOF_PRIV_H 13 14 #include <linux/device.h> 15 #include <sound/hdaudio.h> 16 #include <sound/sof.h> 17 #include <sound/sof/info.h> 18 #include <sound/sof/pm.h> 19 #include <sound/sof/trace.h> 20 #include <uapi/sound/sof/fw.h> 21 #include <sound/sof/ext_manifest.h> 22 23 /* Flag definitions used in sof_core_debug (sof_debug module parameter) */ 24 #define SOF_DBG_ENABLE_TRACE BIT(0) 25 #define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */ 26 #define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */ 27 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token 28 * 1: override topology 29 */ 30 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines 31 * 1: use dynamic pipelines 32 */ 33 #define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets 34 * on primary core 35 */ 36 #define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */ 37 #define SOF_DBG_IGNORE_D3_PERSISTENT BIT(7) /* ignore the DSP D3 persistent capability 38 * and always download firmware upon D3 exit 39 */ 40 #define SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS BIT(8) /* print DMA position updates 41 * in dmesg logs 42 */ 43 #define SOF_DBG_PRINT_IPC_SUCCESS_LOGS BIT(9) /* print IPC success 44 * in dmesg logs 45 */ 46 #define SOF_DBG_FORCE_NOCODEC BIT(10) /* ignore all codec-related 47 * configurations 48 */ 49 50 /* Flag definitions used for controlling the DSP dump behavior */ 51 #define SOF_DBG_DUMP_REGS BIT(0) 52 #define SOF_DBG_DUMP_MBOX BIT(1) 53 #define SOF_DBG_DUMP_TEXT BIT(2) 54 #define SOF_DBG_DUMP_PCI BIT(3) 55 /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */ 56 #define SOF_DBG_DUMP_OPTIONAL BIT(4) 57 58 /* global debug state set by SOF_DBG_ flags */ 59 bool sof_debug_check_flag(int mask); 60 61 /* max BARs mmaped devices can use */ 62 #define SND_SOF_BARS 8 63 64 /* time in ms for runtime suspend delay */ 65 #define SND_SOF_SUSPEND_DELAY_MS 2000 66 67 /* DMA buffer size for trace */ 68 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) 69 70 #define SOF_IPC_DSP_REPLY 0 71 #define SOF_IPC_HOST_REPLY 1 72 73 /* convenience constructor for DAI driver streams */ 74 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \ 75 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \ 76 .rates = srates, .formats = sfmt} 77 78 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 79 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT) 80 81 /* So far the primary core on all DSPs has ID 0 */ 82 #define SOF_DSP_PRIMARY_CORE 0 83 84 /* max number of DSP cores */ 85 #define SOF_MAX_DSP_NUM_CORES 8 86 87 struct sof_dsp_power_state { 88 u32 state; 89 u32 substate; /* platform-specific */ 90 }; 91 92 /* System suspend target state */ 93 enum sof_system_suspend_state { 94 SOF_SUSPEND_NONE = 0, 95 SOF_SUSPEND_S0IX, 96 SOF_SUSPEND_S3, 97 SOF_SUSPEND_S4, 98 SOF_SUSPEND_S5, 99 }; 100 101 enum sof_dfsentry_type { 102 SOF_DFSENTRY_TYPE_IOMEM = 0, 103 SOF_DFSENTRY_TYPE_BUF, 104 }; 105 106 enum sof_debugfs_access_type { 107 SOF_DEBUGFS_ACCESS_ALWAYS = 0, 108 SOF_DEBUGFS_ACCESS_D0_ONLY, 109 }; 110 111 struct sof_compr_stream { 112 u64 copied_total; 113 u32 sampling_rate; 114 u16 channels; 115 u16 sample_container_bytes; 116 }; 117 118 struct snd_sof_dev; 119 struct snd_sof_ipc_msg; 120 struct snd_sof_ipc; 121 struct snd_sof_debugfs_map; 122 struct snd_soc_tplg_ops; 123 struct snd_soc_component; 124 struct snd_sof_pdata; 125 126 /** 127 * struct snd_sof_platform_stream_params - platform dependent stream parameters 128 * @stream_tag: Stream tag to use 129 * @use_phy_addr: Use the provided @phy_addr for configuration 130 * @phy_addr: Platform dependent address to be used, if @use_phy_addr 131 * is true 132 * @no_ipc_position: Disable position update IPC from firmware 133 */ 134 struct snd_sof_platform_stream_params { 135 u16 stream_tag; 136 bool use_phy_address; 137 u32 phy_addr; 138 bool no_ipc_position; 139 bool cont_update_posn; 140 }; 141 142 /** 143 * struct sof_firmware - Container struct for SOF firmware 144 * @fw: Pointer to the firmware 145 * @payload_offset: Offset of the data within the loaded firmware image to be 146 * loaded to the DSP (skipping for example ext_manifest section) 147 */ 148 struct sof_firmware { 149 const struct firmware *fw; 150 u32 payload_offset; 151 }; 152 153 /* 154 * SOF DSP HW abstraction operations. 155 * Used to abstract DSP HW architecture and any IO busses between host CPU 156 * and DSP device(s). 157 */ 158 struct snd_sof_dsp_ops { 159 160 /* probe/remove/shutdown */ 161 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ 162 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */ 163 int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */ 164 165 /* DSP core boot / reset */ 166 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ 167 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */ 168 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ 169 int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */ 170 int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */ 171 172 /* 173 * Register IO: only used by respective drivers themselves, 174 * TODO: consider removing these operations and calling respective 175 * implementations directly 176 */ 177 void (*write8)(struct snd_sof_dev *sof_dev, void __iomem *addr, 178 u8 value); /* optional */ 179 u8 (*read8)(struct snd_sof_dev *sof_dev, 180 void __iomem *addr); /* optional */ 181 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, 182 u32 value); /* optional */ 183 u32 (*read)(struct snd_sof_dev *sof_dev, 184 void __iomem *addr); /* optional */ 185 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, 186 u64 value); /* optional */ 187 u64 (*read64)(struct snd_sof_dev *sof_dev, 188 void __iomem *addr); /* optional */ 189 190 /* memcpy IO */ 191 int (*block_read)(struct snd_sof_dev *sof_dev, 192 enum snd_sof_fw_blk_type type, u32 offset, 193 void *dest, size_t size); /* mandatory */ 194 int (*block_write)(struct snd_sof_dev *sof_dev, 195 enum snd_sof_fw_blk_type type, u32 offset, 196 void *src, size_t size); /* mandatory */ 197 198 /* Mailbox IO */ 199 void (*mailbox_read)(struct snd_sof_dev *sof_dev, 200 u32 offset, void *dest, 201 size_t size); /* optional */ 202 void (*mailbox_write)(struct snd_sof_dev *sof_dev, 203 u32 offset, void *src, 204 size_t size); /* optional */ 205 206 /* doorbell */ 207 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ 208 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ 209 210 /* ipc */ 211 int (*send_msg)(struct snd_sof_dev *sof_dev, 212 struct snd_sof_ipc_msg *msg); /* mandatory */ 213 214 /* FW loading */ 215 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ 216 int (*load_module)(struct snd_sof_dev *sof_dev, 217 struct snd_sof_mod_hdr *hdr); /* optional */ 218 219 /* connect pcm substream to a host stream */ 220 int (*pcm_open)(struct snd_sof_dev *sdev, 221 struct snd_pcm_substream *substream); /* optional */ 222 /* disconnect pcm substream to a host stream */ 223 int (*pcm_close)(struct snd_sof_dev *sdev, 224 struct snd_pcm_substream *substream); /* optional */ 225 226 /* host stream hw params */ 227 int (*pcm_hw_params)(struct snd_sof_dev *sdev, 228 struct snd_pcm_substream *substream, 229 struct snd_pcm_hw_params *params, 230 struct snd_sof_platform_stream_params *platform_params); /* optional */ 231 232 /* host stream hw_free */ 233 int (*pcm_hw_free)(struct snd_sof_dev *sdev, 234 struct snd_pcm_substream *substream); /* optional */ 235 236 /* host stream trigger */ 237 int (*pcm_trigger)(struct snd_sof_dev *sdev, 238 struct snd_pcm_substream *substream, 239 int cmd); /* optional */ 240 241 /* host stream pointer */ 242 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, 243 struct snd_pcm_substream *substream); /* optional */ 244 245 /* pcm ack */ 246 int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */ 247 248 /* host read DSP stream data */ 249 int (*ipc_msg_data)(struct snd_sof_dev *sdev, 250 struct snd_pcm_substream *substream, 251 void *p, size_t sz); /* mandatory */ 252 253 /* host side configuration of the stream's data offset in stream mailbox area */ 254 int (*set_stream_data_offset)(struct snd_sof_dev *sdev, 255 struct snd_pcm_substream *substream, 256 size_t posn_offset); /* optional */ 257 258 /* pre/post firmware run */ 259 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 260 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 261 262 /* parse platform specific extended manifest, optional */ 263 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev, 264 const struct sof_ext_man_elem_header *hdr); 265 266 /* DSP PM */ 267 int (*suspend)(struct snd_sof_dev *sof_dev, 268 u32 target_state); /* optional */ 269 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ 270 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ 271 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ 272 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ 273 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ 274 int (*set_power_state)(struct snd_sof_dev *sdev, 275 const struct sof_dsp_power_state *target_state); /* optional */ 276 277 /* DSP clocking */ 278 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ 279 280 /* debug */ 281 const struct snd_sof_debugfs_map *debug_map; /* optional */ 282 int debug_map_count; /* optional */ 283 void (*dbg_dump)(struct snd_sof_dev *sof_dev, 284 u32 flags); /* optional */ 285 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ 286 int (*debugfs_add_region_item)(struct snd_sof_dev *sdev, 287 enum snd_sof_fw_blk_type blk_type, u32 offset, 288 size_t size, const char *name, 289 enum sof_debugfs_access_type access_type); /* optional */ 290 291 /* host DMA trace (IPC3) */ 292 int (*trace_init)(struct snd_sof_dev *sdev, 293 struct snd_dma_buffer *dmatb, 294 struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */ 295 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ 296 int (*trace_trigger)(struct snd_sof_dev *sdev, 297 int cmd); /* optional */ 298 299 /* misc */ 300 int (*get_bar_index)(struct snd_sof_dev *sdev, 301 u32 type); /* optional */ 302 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ 303 int (*get_window_offset)(struct snd_sof_dev *sdev, 304 u32 id);/* mandatory for common loader code */ 305 306 /* machine driver ops */ 307 int (*machine_register)(struct snd_sof_dev *sdev, 308 void *pdata); /* optional */ 309 void (*machine_unregister)(struct snd_sof_dev *sdev, 310 void *pdata); /* optional */ 311 struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */ 312 void (*set_mach_params)(struct snd_soc_acpi_mach *mach, 313 struct snd_sof_dev *sdev); /* optional */ 314 315 /* IPC client ops */ 316 int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */ 317 void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */ 318 319 /* DAI ops */ 320 struct snd_soc_dai_driver *drv; 321 int num_drv; 322 323 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ 324 u32 hw_info; 325 326 const struct dsp_arch_ops *dsp_arch_ops; 327 }; 328 329 /* DSP architecture specific callbacks for oops and stack dumps */ 330 struct dsp_arch_ops { 331 void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops); 332 void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops, 333 u32 *stack, u32 stack_words); 334 }; 335 336 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops) 337 338 /* FS entry for debug files that can expose DSP memories, registers */ 339 struct snd_sof_dfsentry { 340 size_t size; 341 size_t buf_data_size; /* length of buffered data for file read operation */ 342 enum sof_dfsentry_type type; 343 /* 344 * access_type specifies if the 345 * memory -> DSP resource (memory, register etc) is always accessible 346 * or if it is accessible only when the DSP is in D0. 347 */ 348 enum sof_debugfs_access_type access_type; 349 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) 350 char *cache_buf; /* buffer to cache the contents of debugfs memory */ 351 #endif 352 struct snd_sof_dev *sdev; 353 struct list_head list; /* list in sdev dfsentry list */ 354 union { 355 void __iomem *io_mem; 356 void *buf; 357 }; 358 }; 359 360 /* Debug mapping for any DSP memory or registers that can used for debug */ 361 struct snd_sof_debugfs_map { 362 const char *name; 363 u32 bar; 364 u32 offset; 365 u32 size; 366 /* 367 * access_type specifies if the memory is always accessible 368 * or if it is accessible only when the DSP is in D0. 369 */ 370 enum sof_debugfs_access_type access_type; 371 }; 372 373 /* mailbox descriptor, used for host <-> DSP IPC */ 374 struct snd_sof_mailbox { 375 u32 offset; 376 size_t size; 377 }; 378 379 /* IPC message descriptor for host <-> DSP IO */ 380 struct snd_sof_ipc_msg { 381 /* message data */ 382 void *msg_data; 383 void *reply_data; 384 size_t msg_size; 385 size_t reply_size; 386 int reply_error; 387 388 /* notification, firmware initiated messages */ 389 void *rx_data; 390 391 wait_queue_head_t waitq; 392 bool ipc_complete; 393 }; 394 395 /** 396 * struct sof_ipc_fw_tracing_ops - IPC-specific firmware tracing ops 397 * @init: Function pointer for initialization of the tracing 398 * @free: Optional function pointer for freeing of the tracing 399 * @fw_crashed: Optional function pointer to notify the tracing of a firmware crash 400 * @suspend: Function pointer for system/runtime suspend 401 * @resume: Function pointer for system/runtime resume 402 */ 403 struct sof_ipc_fw_tracing_ops { 404 int (*init)(struct snd_sof_dev *sdev); 405 void (*free)(struct snd_sof_dev *sdev); 406 void (*fw_crashed)(struct snd_sof_dev *sdev); 407 void (*suspend)(struct snd_sof_dev *sdev, pm_message_t pm_state); 408 int (*resume)(struct snd_sof_dev *sdev); 409 }; 410 411 /** 412 * struct sof_ipc_pm_ops - IPC-specific PM ops 413 * @ctx_save: Optional function pointer for context save 414 * @ctx_restore: Optional function pointer for context restore 415 * @set_core_state: Optional function pointer for turning on/off a DSP core 416 */ 417 struct sof_ipc_pm_ops { 418 int (*ctx_save)(struct snd_sof_dev *sdev); 419 int (*ctx_restore)(struct snd_sof_dev *sdev); 420 int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on); 421 }; 422 423 /** 424 * struct sof_ipc_fw_loader_ops - IPC/FW-specific loader ops 425 * @validate: Function pointer for validating the firmware image 426 * @parse_ext_manifest: Function pointer for parsing the manifest of the firmware 427 * @load_fw_to_dsp: Optional function pointer for loading the firmware to the 428 * DSP. 429 * The function implements generic, hardware independent way 430 * of loading the initial firmware and its modules (if any). 431 */ 432 struct sof_ipc_fw_loader_ops { 433 int (*validate)(struct snd_sof_dev *sdev); 434 size_t (*parse_ext_manifest)(struct snd_sof_dev *sdev); 435 int (*load_fw_to_dsp)(struct snd_sof_dev *sdev); 436 }; 437 438 struct sof_ipc_tplg_ops; 439 struct sof_ipc_pcm_ops; 440 441 /** 442 * struct sof_ipc_ops - IPC-specific ops 443 * @tplg: Pointer to IPC-specific topology ops 444 * @pm: Pointer to PM ops 445 * @pcm: Pointer to PCM ops 446 * @fw_loader: Pointer to Firmware Loader ops 447 * @fw_tracing: Optional pointer to Firmware tracing ops 448 * 449 * @init: Optional pointer for IPC related initialization 450 * @exit: Optional pointer for IPC related cleanup 451 * @post_fw_boot: Optional pointer to execute IPC related tasks after firmware 452 * boot. 453 * 454 * @tx_msg: Function pointer for sending a 'short' IPC message 455 * @set_get_data: Function pointer for set/get data ('large' IPC message). This 456 * function may split up the 'large' message and use the @tx_msg 457 * path to transfer individual chunks, or use other means to transfer 458 * the message. 459 * @get_reply: Function pointer for fetching the reply to 460 * sdev->ipc->msg.reply_data 461 * @rx_msg: Function pointer for handling a received message 462 * 463 * Note: both @tx_msg and @set_get_data considered as TX functions and they are 464 * serialized for the duration of the instructed transfer. A large message sent 465 * via @set_get_data is a single transfer even if at the hardware level it is 466 * handled with multiple chunks. 467 */ 468 struct sof_ipc_ops { 469 const struct sof_ipc_tplg_ops *tplg; 470 const struct sof_ipc_pm_ops *pm; 471 const struct sof_ipc_pcm_ops *pcm; 472 const struct sof_ipc_fw_loader_ops *fw_loader; 473 const struct sof_ipc_fw_tracing_ops *fw_tracing; 474 475 int (*init)(struct snd_sof_dev *sdev); 476 void (*exit)(struct snd_sof_dev *sdev); 477 int (*post_fw_boot)(struct snd_sof_dev *sdev); 478 479 int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, 480 void *reply_data, size_t reply_bytes, bool no_pm); 481 int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes, 482 bool set); 483 int (*get_reply)(struct snd_sof_dev *sdev); 484 void (*rx_msg)(struct snd_sof_dev *sdev); 485 }; 486 487 /* SOF generic IPC data */ 488 struct snd_sof_ipc { 489 struct snd_sof_dev *sdev; 490 491 /* protects messages and the disable flag */ 492 struct mutex tx_mutex; 493 /* disables further sending of ipc's */ 494 bool disable_ipc_tx; 495 496 /* Maximum allowed size of a single IPC message/reply */ 497 size_t max_payload_size; 498 499 struct snd_sof_ipc_msg msg; 500 501 /* IPC ops based on version */ 502 const struct sof_ipc_ops *ops; 503 }; 504 505 /* Helper to retrieve the IPC ops */ 506 #define sof_ipc_get_ops(sdev, ops_name) \ 507 (((sdev)->ipc && (sdev)->ipc->ops) ? (sdev)->ipc->ops->ops_name : NULL) 508 509 /* 510 * SOF Device Level. 511 */ 512 struct snd_sof_dev { 513 struct device *dev; 514 spinlock_t ipc_lock; /* lock for IPC users */ 515 spinlock_t hw_lock; /* lock for HW IO access */ 516 517 /* Main, Base firmware image */ 518 struct sof_firmware basefw; 519 520 /* 521 * ASoC components. plat_drv fields are set dynamically so 522 * can't use const 523 */ 524 struct snd_soc_component_driver plat_drv; 525 526 /* current DSP power state */ 527 struct sof_dsp_power_state dsp_power_state; 528 /* mutex to protect the dsp_power_state access */ 529 struct mutex power_state_access; 530 531 /* Intended power target of system suspend */ 532 enum sof_system_suspend_state system_suspend_target; 533 534 /* DSP firmware boot */ 535 wait_queue_head_t boot_wait; 536 enum sof_fw_state fw_state; 537 bool first_boot; 538 539 /* work queue in case the probe is implemented in two steps */ 540 struct work_struct probe_work; 541 bool probe_completed; 542 543 /* DSP HW differentiation */ 544 struct snd_sof_pdata *pdata; 545 546 /* IPC */ 547 struct snd_sof_ipc *ipc; 548 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ 549 struct snd_sof_mailbox host_box; /* Host initiated IPC */ 550 struct snd_sof_mailbox stream_box; /* Stream position update */ 551 struct snd_sof_mailbox debug_box; /* Debug info updates */ 552 struct snd_sof_ipc_msg *msg; 553 int ipc_irq; 554 u32 next_comp_id; /* monotonic - reset during S3 */ 555 556 /* memory bases for mmaped DSPs - set by dsp_init() */ 557 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ 558 int mmio_bar; 559 int mailbox_bar; 560 size_t dsp_oops_offset; 561 562 /* debug */ 563 struct dentry *debugfs_root; 564 struct list_head dfsentry_list; 565 bool dbg_dump_printed; 566 bool ipc_dump_printed; 567 568 /* firmware loader */ 569 struct sof_ipc_fw_ready fw_ready; 570 struct sof_ipc_fw_version fw_version; 571 struct sof_ipc_cc_version *cc_version; 572 573 /* topology */ 574 struct snd_soc_tplg_ops *tplg_ops; 575 struct list_head pcm_list; 576 struct list_head kcontrol_list; 577 struct list_head widget_list; 578 struct list_head dai_list; 579 struct list_head dai_link_list; 580 struct list_head route_list; 581 struct snd_soc_component *component; 582 u32 enabled_cores_mask; /* keep track of enabled cores */ 583 bool led_present; 584 585 /* FW configuration */ 586 struct sof_ipc_window *info_window; 587 588 /* IPC timeouts in ms */ 589 int ipc_timeout; 590 int boot_timeout; 591 592 /* firmwre tracing */ 593 bool fw_trace_is_supported; /* set with Kconfig or module parameter */ 594 void *fw_trace_data; /* private data used by firmware tracing implementation */ 595 596 bool msi_enabled; 597 598 /* DSP core context */ 599 u32 num_cores; 600 601 /* 602 * ref count per core that will be modified during system suspend/resume and during pcm 603 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm 604 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in 605 * sound/core/ when streams are active and during system suspend/resume, streams are 606 * already suspended. 607 */ 608 int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES]; 609 610 /* 611 * Used to keep track of registered IPC client devices so that they can 612 * be removed when the parent SOF module is removed. 613 */ 614 struct list_head ipc_client_list; 615 616 /* mutex to protect client list */ 617 struct mutex ipc_client_mutex; 618 619 /* 620 * Used for tracking the IPC client's RX registration for DSP initiated 621 * message handling. 622 */ 623 struct list_head ipc_rx_handler_list; 624 625 /* 626 * Used for tracking the IPC client's registration for DSP state change 627 * notification 628 */ 629 struct list_head fw_state_handler_list; 630 631 /* to protect the ipc_rx_handler_list and dsp_state_handler_list list */ 632 struct mutex client_event_handler_mutex; 633 634 /* quirks to override topology values */ 635 bool mclk_id_override; 636 u16 mclk_id_quirk; /* same size as in IPC3 definitions */ 637 638 void *private; /* core does not touch this */ 639 }; 640 641 /* 642 * Device Level. 643 */ 644 645 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); 646 int snd_sof_device_remove(struct device *dev); 647 int snd_sof_device_shutdown(struct device *dev); 648 bool snd_sof_device_probe_completed(struct device *dev); 649 650 int snd_sof_runtime_suspend(struct device *dev); 651 int snd_sof_runtime_resume(struct device *dev); 652 int snd_sof_runtime_idle(struct device *dev); 653 int snd_sof_resume(struct device *dev); 654 int snd_sof_suspend(struct device *dev); 655 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev); 656 int snd_sof_prepare(struct device *dev); 657 void snd_sof_complete(struct device *dev); 658 659 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); 660 661 /* 662 * Compress support 663 */ 664 extern struct snd_compress_ops sof_compressed_ops; 665 666 /* 667 * Firmware loading. 668 */ 669 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); 670 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); 671 int snd_sof_run_firmware(struct snd_sof_dev *sdev); 672 void snd_sof_fw_unload(struct snd_sof_dev *sdev); 673 674 /* 675 * IPC low level APIs. 676 */ 677 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); 678 void snd_sof_ipc_free(struct snd_sof_dev *sdev); 679 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev); 680 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); 681 static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 682 { 683 sdev->ipc->ops->rx_msg(sdev); 684 } 685 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes, 686 void *reply_data, size_t reply_bytes); 687 int sof_ipc_set_get_data(struct snd_sof_ipc *ipc, void *msg_data, 688 size_t msg_bytes, bool set); 689 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes, 690 void *reply_data, size_t reply_bytes); 691 int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, 692 size_t reply_bytes); 693 694 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id) 695 { 696 snd_sof_ipc_get_reply(sdev); 697 snd_sof_ipc_reply(sdev, msg_id); 698 } 699 700 /* 701 * Trace/debug 702 */ 703 int snd_sof_dbg_init(struct snd_sof_dev *sdev); 704 void snd_sof_free_debug(struct snd_sof_dev *sdev); 705 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, 706 void *base, size_t size, 707 const char *name, mode_t mode); 708 void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level, 709 u32 panic_code, u32 tracep_code, void *oops, 710 struct sof_ipc_panic_info *panic_info, 711 void *stack, size_t stack_words); 712 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev, const char *msg); 713 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev); 714 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev, 715 enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size, 716 const char *name, enum sof_debugfs_access_type access_type); 717 /* Firmware tracing */ 718 int sof_fw_trace_init(struct snd_sof_dev *sdev); 719 void sof_fw_trace_free(struct snd_sof_dev *sdev); 720 void sof_fw_trace_fw_crashed(struct snd_sof_dev *sdev); 721 void sof_fw_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state); 722 int sof_fw_trace_resume(struct snd_sof_dev *sdev); 723 724 /* 725 * DSP Architectures. 726 */ 727 static inline void sof_stack(struct snd_sof_dev *sdev, const char *level, 728 void *oops, u32 *stack, u32 stack_words) 729 { 730 sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level, oops, stack, 731 stack_words); 732 } 733 734 static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops) 735 { 736 if (sof_dsp_arch_ops(sdev)->dsp_oops) 737 sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops); 738 } 739 740 extern const struct dsp_arch_ops sof_xtensa_arch_ops; 741 742 /* 743 * Firmware state tracking 744 */ 745 void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state); 746 747 /* 748 * Utilities 749 */ 750 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); 751 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); 752 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); 753 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); 754 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, 755 void *message, size_t bytes); 756 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, 757 void *message, size_t bytes); 758 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 759 u32 offset, void *src, size_t size); 760 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 761 u32 offset, void *dest, size_t size); 762 763 int sof_ipc_msg_data(struct snd_sof_dev *sdev, 764 struct snd_pcm_substream *substream, 765 void *p, size_t sz); 766 int sof_set_stream_data_offset(struct snd_sof_dev *sdev, 767 struct snd_pcm_substream *substream, 768 size_t posn_offset); 769 770 int sof_stream_pcm_open(struct snd_sof_dev *sdev, 771 struct snd_pcm_substream *substream); 772 int sof_stream_pcm_close(struct snd_sof_dev *sdev, 773 struct snd_pcm_substream *substream); 774 775 int sof_machine_check(struct snd_sof_dev *sdev); 776 777 /* SOF client support */ 778 #if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT) 779 int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id, 780 const void *data, size_t size); 781 void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id); 782 int sof_register_clients(struct snd_sof_dev *sdev); 783 void sof_unregister_clients(struct snd_sof_dev *sdev); 784 void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf); 785 void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev); 786 int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state); 787 int sof_resume_clients(struct snd_sof_dev *sdev); 788 #else /* CONFIG_SND_SOC_SOF_CLIENT */ 789 static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, 790 u32 id, const void *data, size_t size) 791 { 792 return 0; 793 } 794 795 static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev, 796 const char *name, u32 id) 797 { 798 } 799 800 static inline int sof_register_clients(struct snd_sof_dev *sdev) 801 { 802 return 0; 803 } 804 805 static inline void sof_unregister_clients(struct snd_sof_dev *sdev) 806 { 807 } 808 809 static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf) 810 { 811 } 812 813 static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev) 814 { 815 } 816 817 static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state) 818 { 819 return 0; 820 } 821 822 static inline int sof_resume_clients(struct snd_sof_dev *sdev) 823 { 824 return 0; 825 } 826 #endif /* CONFIG_SND_SOC_SOF_CLIENT */ 827 828 /* Main ops for IPC implementations */ 829 extern const struct sof_ipc_ops ipc3_ops; 830 extern const struct sof_ipc_ops ipc4_ops; 831 832 #endif 833