xref: /linux-6.15/scripts/Makefile.build (revision 2e4c77be)
1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS   :=
22EXTRA_CFLAGS   :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS  :=
25asflags-y  :=
26ccflags-y  :=
27cppflags-y :=
28ldflags-y  :=
29
30# Read auto.conf if it exists, otherwise ignore
31-include include/config/auto.conf
32
33include scripts/Kbuild.include
34
35# For backward compatibility check that these variables do not change
36save-cflags := $(CFLAGS)
37
38# The filename Kbuild has precedence over Makefile
39kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
40kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
41include $(kbuild-file)
42
43# If the save-* variables changed error out
44ifeq ($(KBUILD_NOPEDANTIC),)
45        ifneq ("$(save-cflags)","$(CFLAGS)")
46                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
47        endif
48endif
49include scripts/Makefile.lib
50
51ifdef host-progs
52ifneq ($(hostprogs-y),$(host-progs))
53$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
54hostprogs-y += $(host-progs)
55endif
56endif
57
58# Do not include host rules unless needed
59ifneq ($(hostprogs-y)$(hostprogs-m),)
60include scripts/Makefile.host
61endif
62
63ifneq ($(KBUILD_SRC),)
64# Create output directory if not already present
65_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
66
67# Create directories for object files if directory does not exist
68# Needed when obj-y := dir/file.o syntax is used
69_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
70endif
71
72ifndef obj
73$(warning kbuild: Makefile.build is included improperly)
74endif
75
76# ===========================================================================
77
78ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
79lib-target := $(obj)/lib.a
80endif
81
82ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
83builtin-target := $(obj)/built-in.o
84endif
85
86modorder-target := $(obj)/modules.order
87
88# We keep a list of all modules in $(MODVERDIR)
89
90__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
91	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
92	 $(subdir-ym) $(always)
93	@:
94
95# Linus' kernel sanity checking tool
96ifneq ($(KBUILD_CHECKSRC),0)
97  ifeq ($(KBUILD_CHECKSRC),2)
98    quiet_cmd_force_checksrc = CHECK   $<
99          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
100  else
101      quiet_cmd_checksrc     = CHECK   $<
102            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
103  endif
104endif
105
106# Do section mismatch analysis for each module/built-in.o
107ifdef CONFIG_DEBUG_SECTION_MISMATCH
108  cmd_secanalysis = ; scripts/mod/modpost $@
109endif
110
111# Compile C sources (.c)
112# ---------------------------------------------------------------------------
113
114# Default is built-in, unless we know otherwise
115modkern_cflags := $(CFLAGS_KERNEL)
116quiet_modtag := $(empty)   $(empty)
117
118$(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
119$(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
120$(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
121$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
122
123$(real-objs-m)        : quiet_modtag := [M]
124$(real-objs-m:.o=.i)  : quiet_modtag := [M]
125$(real-objs-m:.o=.s)  : quiet_modtag := [M]
126$(real-objs-m:.o=.lst): quiet_modtag := [M]
127
128$(obj-m)              : quiet_modtag := [M]
129
130# Default for not multi-part modules
131modname = $(basetarget)
132
133$(multi-objs-m)         : modname = $(modname-multi)
134$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
135$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
136$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
137$(multi-objs-y)         : modname = $(modname-multi)
138$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
139$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
140$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
141
142quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
143cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
144
145$(obj)/%.s: $(src)/%.c FORCE
146	$(call if_changed_dep,cc_s_c)
147
148quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
149cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
150
151$(obj)/%.i: $(src)/%.c FORCE
152	$(call if_changed_dep,cc_i_c)
153
154cmd_genksyms =                                                              \
155    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
156    $(GENKSYMS) -T $@ -A -a $(ARCH)                                         \
157     $(if $(KBUILD_PRESERVE),-p)                                            \
158     $(if $(1),-r $(firstword $(wildcard $(@:.symtypes=.symref) /dev/null)))
159
160quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
161cmd_cc_symtypes_c =                                                         \
162    set -e;                                                                 \
163    $(call cmd_genksyms, true) >/dev/null;                                  \
164    test -s $@ || rm -f $@
165
166$(obj)/%.symtypes : $(src)/%.c FORCE
167	$(call cmd,cc_symtypes_c)
168
169# C (.c) files
170# The C file is compiled and updated dependency information is generated.
171# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
172
173quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
174
175ifndef CONFIG_MODVERSIONS
176cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
177
178else
179# When module versioning is enabled the following steps are executed:
180# o compile a .tmp_<file>.s from <file>.c
181# o if .tmp_<file>.s doesn't contain a __ksymtab version, i.e. does
182#   not export symbols, we just assemble .tmp_<file>.s to <file>.o and
183#   are done.
184# o otherwise, we calculate symbol versions using the good old
185#   genksyms on the preprocessed source and postprocess them in a way
186#   that they are usable as assembly source
187# o assemble <file>.o from .tmp_<file>.s forcing inclusion of directives
188#   defining the actual values of __crc_*, followed by objcopy-ing them
189#   to force these symbols to be local to permit stripping them later.
190s_file = $(@D)/.tmp_$(@F:.o=.s)
191v_file = $(@D)/.tmp_$(@F:.o=.v)
192tmp_o_file = $(@D)/.tmp_$(@F)
193no_g_c_flags = $(filter-out -g%,$(c_flags))
194
195cmd_cc_o_c = $(CC) $(c_flags) -S -o $(s_file) $<
196
197cmd_modversions =							\
198	if grep -q __ksymtab $(s_file); then				\
199		if $(call cmd_genksyms, $(KBUILD_SYMTYPES)) > $(v_file) \
200		   && $(CC) $(no_g_c_flags) -c -Wa,$(v_file)		\
201			    -o $(tmp_o_file) $(s_file)			\
202		   && $(OBJCOPY) -L '__crc_*' -L '___crc_*' -w		\
203				 $(tmp_o_file) $@;			\
204		then							\
205			: ;						\
206		else							\
207			rm -f $@; exit 1;				\
208		fi;							\
209	else								\
210		rm -f $(v_file);					\
211		$(CC) $(no_g_c_flags) -c -o $@ $(s_file);		\
212	fi;
213endif
214
215ifdef CONFIG_FTRACE_MCOUNT_RECORD
216cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
217	"$(if $(CONFIG_64BIT),64,32)" \
218	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" "$(NM)" "$(RM)" "$(MV)" "$(@)";
219endif
220
221define rule_cc_o_c
222	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
223	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
224	$(cmd_modversions)						  \
225	$(cmd_record_mcount)						  \
226	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
227	                                              $(dot-target).tmp;  \
228	if [ -r $(@D)/.tmp_$(@F:.o=.v) ]; then				  \
229		echo >> $(dot-target).tmp;				  \
230		echo '$@: $(GENKSYMS)' >> $(dot-target).tmp;		  \
231		echo '$(GENKSYMS):: ;' >> $(dot-target).tmp;		  \
232	fi;								  \
233	rm -f $(depfile) $(@D)/.tmp_$(@F:.o=.?);			  \
234	mv -f $(dot-target).tmp $(dot-target).cmd
235endef
236
237# Built-in and composite module parts
238$(obj)/%.o: $(src)/%.c FORCE
239	$(call cmd,force_checksrc)
240	$(call if_changed_rule,cc_o_c)
241
242# Single-part modules are special since we need to mark them in $(MODVERDIR)
243
244$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
245	$(call cmd,force_checksrc)
246	$(call if_changed_rule,cc_o_c)
247	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
248
249quiet_cmd_cc_lst_c = MKLST   $@
250      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
251		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
252				     System.map $(OBJDUMP) > $@
253
254$(obj)/%.lst: $(src)/%.c FORCE
255	$(call if_changed_dep,cc_lst_c)
256
257# Compile assembler sources (.S)
258# ---------------------------------------------------------------------------
259
260modkern_aflags := $(AFLAGS_KERNEL)
261
262$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
263$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
264
265quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
266cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
267
268$(obj)/%.s: $(src)/%.S FORCE
269	$(call if_changed_dep,as_s_S)
270
271quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
272cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
273
274$(obj)/%.o: $(src)/%.S FORCE
275	$(call if_changed_dep,as_o_S)
276
277targets += $(real-objs-y) $(real-objs-m) $(lib-y)
278targets += $(extra-y) $(MAKECMDGOALS) $(always)
279
280# Linker scripts preprocessor (.lds.S -> .lds)
281# ---------------------------------------------------------------------------
282quiet_cmd_cpp_lds_S = LDS     $@
283      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
284
285$(obj)/%.lds: $(src)/%.lds.S FORCE
286	$(call if_changed_dep,cpp_lds_S)
287
288# Build the compiled-in targets
289# ---------------------------------------------------------------------------
290
291# To build objects in subdirs, we need to descend into the directories
292$(sort $(subdir-obj-y)): $(subdir-ym) ;
293
294#
295# Rule to compile a set of .o files into one .o file
296#
297ifdef builtin-target
298quiet_cmd_link_o_target = LD      $@
299# If the list of objects to link is empty, just create an empty built-in.o
300cmd_link_o_target = $(if $(strip $(obj-y)),\
301		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
302		      $(cmd_secanalysis),\
303		      rm -f $@; $(AR) rcs $@)
304
305$(builtin-target): $(obj-y) FORCE
306	$(call if_changed,link_o_target)
307
308targets += $(builtin-target)
309endif # builtin-target
310
311#
312# Rule to create modules.order file
313#
314# Create commands to either record .ko file or cat modules.order from
315# a subdirectory
316modorder-cmds =						\
317	$(foreach m, $(modorder),			\
318		$(if $(filter %/modules.order, $m),	\
319			cat $m;, echo kernel/$m;))
320
321$(modorder-target): $(subdir-ym) FORCE
322	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
323
324#
325# Rule to compile a set of .o files into one .a file
326#
327ifdef lib-target
328quiet_cmd_link_l_target = AR      $@
329cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
330
331$(lib-target): $(lib-y) FORCE
332	$(call if_changed,link_l_target)
333
334targets += $(lib-target)
335endif
336
337#
338# Rule to link composite objects
339#
340#  Composite objects are specified in kbuild makefile as follows:
341#    <composite-object>-objs := <list of .o files>
342#  or
343#    <composite-object>-y    := <list of .o files>
344link_multi_deps =                     \
345$(filter $(addprefix $(obj)/,         \
346$($(subst $(obj)/,,$(@:.o=-objs)))    \
347$($(subst $(obj)/,,$(@:.o=-y)))), $^)
348
349quiet_cmd_link_multi-y = LD      $@
350cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
351
352quiet_cmd_link_multi-m = LD [M]  $@
353cmd_link_multi-m = $(cmd_link_multi-y)
354
355# We would rather have a list of rules like
356# 	foo.o: $(foo-objs)
357# but that's not so easy, so we rather make all composite objects depend
358# on the set of all their parts
359$(multi-used-y) : %.o: $(multi-objs-y) FORCE
360	$(call if_changed,link_multi-y)
361
362$(multi-used-m) : %.o: $(multi-objs-m) FORCE
363	$(call if_changed,link_multi-m)
364	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
365
366targets += $(multi-used-y) $(multi-used-m)
367
368
369# Descending
370# ---------------------------------------------------------------------------
371
372PHONY += $(subdir-ym)
373$(subdir-ym):
374	$(Q)$(MAKE) $(build)=$@
375
376# Add FORCE to the prequisites of a target to force it to be always rebuilt.
377# ---------------------------------------------------------------------------
378
379PHONY += FORCE
380
381FORCE:
382
383# Read all saved command lines and dependencies for the $(targets) we
384# may be building above, using $(if_changed{,_dep}). As an
385# optimization, we don't need to read them if the target does not
386# exist, we will rebuild anyway in that case.
387
388targets := $(wildcard $(sort $(targets)))
389cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
390
391ifneq ($(cmd_files),)
392  include $(cmd_files)
393endif
394
395
396# Declare the contents of the .PHONY variable as phony.  We keep that
397# information in a variable se we can use it in if_changed and friends.
398
399.PHONY: $(PHONY)
400