1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef _UAPILINUX_SERIAL_CORE_H 21 #define _UAPILINUX_SERIAL_CORE_H 22 23 #include <linux/serial.h> 24 25 /* 26 * The type definitions. These are from Ted Ts'o's serial.h 27 */ 28 #define PORT_UNKNOWN 0 29 #define PORT_8250 1 30 #define PORT_16450 2 31 #define PORT_16550 3 32 #define PORT_16550A 4 33 #define PORT_CIRRUS 5 34 #define PORT_16650 6 35 #define PORT_16650V2 7 36 #define PORT_16750 8 37 #define PORT_STARTECH 9 38 #define PORT_16C950 10 39 #define PORT_16654 11 40 #define PORT_16850 12 41 #define PORT_RSA 13 42 #define PORT_NS16550A 14 43 #define PORT_XSCALE 15 44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 48 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 49 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */ 50 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */ 51 #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */ 52 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */ 53 #define PORT_MAX_8250 24 /* max port ID */ 54 55 /* 56 * ARM specific type numbers. These are not currently guaranteed 57 * to be implemented, and will change in the future. These are 58 * separate so any additions to the old serial.c that occur before 59 * we are merged can be easily merged here. 60 */ 61 #define PORT_PXA 31 62 #define PORT_AMBA 32 63 #define PORT_CLPS711X 33 64 #define PORT_SA1100 34 65 #define PORT_UART00 35 66 #define PORT_21285 37 67 68 /* Sparc type numbers. */ 69 #define PORT_SUNZILOG 38 70 #define PORT_SUNSAB 39 71 72 /* DEC */ 73 #define PORT_DZ 46 74 #define PORT_ZS 47 75 76 /* Parisc type numbers. */ 77 #define PORT_MUX 48 78 79 /* Atmel AT91 / AT32 SoC */ 80 #define PORT_ATMEL 49 81 82 /* Macintosh Zilog type numbers */ 83 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 84 #define PORT_PMAC_ZILOG 51 85 86 /* SH-SCI */ 87 #define PORT_SCI 52 88 #define PORT_SCIF 53 89 #define PORT_IRDA 54 90 91 /* Samsung S3C2410 SoC and derivatives thereof */ 92 #define PORT_S3C2410 55 93 94 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 95 #define PORT_IP22ZILOG 56 96 97 /* Sharp LH7a40x -- an ARM9 SoC series */ 98 #define PORT_LH7A40X 57 99 100 /* PPC CPM type number */ 101 #define PORT_CPM 58 102 103 /* MPC52xx (and MPC512x) type numbers */ 104 #define PORT_MPC52xx 59 105 106 /* IBM icom */ 107 #define PORT_ICOM 60 108 109 /* Samsung S3C2440 SoC */ 110 #define PORT_S3C2440 61 111 112 /* Motorola i.MX SoC */ 113 #define PORT_IMX 62 114 115 /* Marvell MPSC */ 116 #define PORT_MPSC 63 117 118 /* TXX9 type number */ 119 #define PORT_TXX9 64 120 121 /* NEC VR4100 series SIU/DSIU */ 122 #define PORT_VR41XX_SIU 65 123 #define PORT_VR41XX_DSIU 66 124 125 /* Samsung S3C2400 SoC */ 126 #define PORT_S3C2400 67 127 128 /* M32R SIO */ 129 #define PORT_M32R_SIO 68 130 131 /*Digi jsm */ 132 #define PORT_JSM 69 133 134 #define PORT_PNX8XXX 70 135 136 /* Hilscher netx */ 137 #define PORT_NETX 71 138 139 /* SUN4V Hypervisor Console */ 140 #define PORT_SUNHV 72 141 142 #define PORT_S3C2412 73 143 144 /* Xilinx uartlite */ 145 #define PORT_UARTLITE 74 146 147 /* Blackfin bf5xx */ 148 #define PORT_BFIN 75 149 150 /* Micrel KS8695 */ 151 #define PORT_KS8695 76 152 153 /* Broadcom SB1250, etc. SOC */ 154 #define PORT_SB1250_DUART 77 155 156 /* Freescale ColdFire */ 157 #define PORT_MCF 78 158 159 /* Blackfin SPORT */ 160 #define PORT_BFIN_SPORT 79 161 162 /* MN10300 on-chip UART numbers */ 163 #define PORT_MN10300 80 164 #define PORT_MN10300_CTS 81 165 166 #define PORT_SC26XX 82 167 168 /* SH-SCI */ 169 #define PORT_SCIFA 83 170 171 #define PORT_S3C6400 84 172 173 /* NWPSERIAL */ 174 #define PORT_NWPSERIAL 85 175 176 /* MAX3100 */ 177 #define PORT_MAX3100 86 178 179 /* Timberdale UART */ 180 #define PORT_TIMBUART 87 181 182 /* Qualcomm MSM SoCs */ 183 #define PORT_MSM 88 184 185 /* BCM63xx family SoCs */ 186 #define PORT_BCM63XX 89 187 188 /* Aeroflex Gaisler GRLIB APBUART */ 189 #define PORT_APBUART 90 190 191 /* Altera UARTs */ 192 #define PORT_ALTERA_JTAGUART 91 193 #define PORT_ALTERA_UART 92 194 195 /* SH-SCI */ 196 #define PORT_SCIFB 93 197 198 /* MAX310X */ 199 #define PORT_MAX310X 94 200 201 /* High Speed UART for Medfield */ 202 #define PORT_MFD 95 203 204 /* TI OMAP-UART */ 205 #define PORT_OMAP 96 206 207 /* VIA VT8500 SoC */ 208 #define PORT_VT8500 97 209 210 /* Xilinx PSS UART */ 211 #define PORT_XUARTPS 98 212 213 /* Atheros AR933X SoC */ 214 #define PORT_AR933X 99 215 216 /* Energy Micro efm32 SoC */ 217 #define PORT_EFMUART 100 218 219 /* ARC (Synopsys) on-chip UART */ 220 #define PORT_ARC 101 221 222 #endif /* _UAPILINUX_SERIAL_CORE_H */ 223