1 /* 2 * Performance events: 3 * 4 * Copyright (C) 2008-2009, Thomas Gleixner <[email protected]> 5 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar 6 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra 7 * 8 * Data type definitions, declarations, prototypes. 9 * 10 * Started by: Thomas Gleixner and Ingo Molnar 11 * 12 * For licencing details see kernel-base/COPYING 13 */ 14 #ifndef _UAPI_LINUX_PERF_EVENT_H 15 #define _UAPI_LINUX_PERF_EVENT_H 16 17 #include <linux/types.h> 18 #include <linux/ioctl.h> 19 #include <asm/byteorder.h> 20 21 /* 22 * User-space ABI bits: 23 */ 24 25 /* 26 * attr.type 27 */ 28 enum perf_type_id { 29 PERF_TYPE_HARDWARE = 0, 30 PERF_TYPE_SOFTWARE = 1, 31 PERF_TYPE_TRACEPOINT = 2, 32 PERF_TYPE_HW_CACHE = 3, 33 PERF_TYPE_RAW = 4, 34 PERF_TYPE_BREAKPOINT = 5, 35 36 PERF_TYPE_MAX, /* non-ABI */ 37 }; 38 39 /* 40 * Generalized performance event event_id types, used by the 41 * attr.event_id parameter of the sys_perf_event_open() 42 * syscall: 43 */ 44 enum perf_hw_id { 45 /* 46 * Common hardware events, generalized by the kernel: 47 */ 48 PERF_COUNT_HW_CPU_CYCLES = 0, 49 PERF_COUNT_HW_INSTRUCTIONS = 1, 50 PERF_COUNT_HW_CACHE_REFERENCES = 2, 51 PERF_COUNT_HW_CACHE_MISSES = 3, 52 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 53 PERF_COUNT_HW_BRANCH_MISSES = 5, 54 PERF_COUNT_HW_BUS_CYCLES = 6, 55 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, 56 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, 57 PERF_COUNT_HW_REF_CPU_CYCLES = 9, 58 59 PERF_COUNT_HW_MAX, /* non-ABI */ 60 }; 61 62 /* 63 * Generalized hardware cache events: 64 * 65 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x 66 * { read, write, prefetch } x 67 * { accesses, misses } 68 */ 69 enum perf_hw_cache_id { 70 PERF_COUNT_HW_CACHE_L1D = 0, 71 PERF_COUNT_HW_CACHE_L1I = 1, 72 PERF_COUNT_HW_CACHE_LL = 2, 73 PERF_COUNT_HW_CACHE_DTLB = 3, 74 PERF_COUNT_HW_CACHE_ITLB = 4, 75 PERF_COUNT_HW_CACHE_BPU = 5, 76 PERF_COUNT_HW_CACHE_NODE = 6, 77 78 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ 79 }; 80 81 enum perf_hw_cache_op_id { 82 PERF_COUNT_HW_CACHE_OP_READ = 0, 83 PERF_COUNT_HW_CACHE_OP_WRITE = 1, 84 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 85 86 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ 87 }; 88 89 enum perf_hw_cache_op_result_id { 90 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 91 PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 92 93 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ 94 }; 95 96 /* 97 * Special "software" events provided by the kernel, even if the hardware 98 * does not support performance events. These events measure various 99 * physical and sw events of the kernel (and allow the profiling of them as 100 * well): 101 */ 102 enum perf_sw_ids { 103 PERF_COUNT_SW_CPU_CLOCK = 0, 104 PERF_COUNT_SW_TASK_CLOCK = 1, 105 PERF_COUNT_SW_PAGE_FAULTS = 2, 106 PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 107 PERF_COUNT_SW_CPU_MIGRATIONS = 4, 108 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 109 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 110 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 111 PERF_COUNT_SW_EMULATION_FAULTS = 8, 112 113 PERF_COUNT_SW_MAX, /* non-ABI */ 114 }; 115 116 /* 117 * Bits that can be set in attr.sample_type to request information 118 * in the overflow packets. 119 */ 120 enum perf_event_sample_format { 121 PERF_SAMPLE_IP = 1U << 0, 122 PERF_SAMPLE_TID = 1U << 1, 123 PERF_SAMPLE_TIME = 1U << 2, 124 PERF_SAMPLE_ADDR = 1U << 3, 125 PERF_SAMPLE_READ = 1U << 4, 126 PERF_SAMPLE_CALLCHAIN = 1U << 5, 127 PERF_SAMPLE_ID = 1U << 6, 128 PERF_SAMPLE_CPU = 1U << 7, 129 PERF_SAMPLE_PERIOD = 1U << 8, 130 PERF_SAMPLE_STREAM_ID = 1U << 9, 131 PERF_SAMPLE_RAW = 1U << 10, 132 PERF_SAMPLE_BRANCH_STACK = 1U << 11, 133 PERF_SAMPLE_REGS_USER = 1U << 12, 134 PERF_SAMPLE_STACK_USER = 1U << 13, 135 PERF_SAMPLE_WEIGHT = 1U << 14, 136 PERF_SAMPLE_DATA_SRC = 1U << 15, 137 138 PERF_SAMPLE_MAX = 1U << 16, /* non-ABI */ 139 }; 140 141 /* 142 * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set 143 * 144 * If the user does not pass priv level information via branch_sample_type, 145 * the kernel uses the event's priv level. Branch and event priv levels do 146 * not have to match. Branch priv level is checked for permissions. 147 * 148 * The branch types can be combined, however BRANCH_ANY covers all types 149 * of branches and therefore it supersedes all the other types. 150 */ 151 enum perf_branch_sample_type { 152 PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */ 153 PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */ 154 PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */ 155 156 PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */ 157 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */ 158 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */ 159 PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */ 160 PERF_SAMPLE_BRANCH_ABORT_TX = 1U << 7, /* transaction aborts */ 161 PERF_SAMPLE_BRANCH_IN_TX = 1U << 8, /* in transaction */ 162 PERF_SAMPLE_BRANCH_NO_TX = 1U << 9, /* not in transaction */ 163 164 PERF_SAMPLE_BRANCH_MAX = 1U << 10, /* non-ABI */ 165 }; 166 167 #define PERF_SAMPLE_BRANCH_PLM_ALL \ 168 (PERF_SAMPLE_BRANCH_USER|\ 169 PERF_SAMPLE_BRANCH_KERNEL|\ 170 PERF_SAMPLE_BRANCH_HV) 171 172 /* 173 * Values to determine ABI of the registers dump. 174 */ 175 enum perf_sample_regs_abi { 176 PERF_SAMPLE_REGS_ABI_NONE = 0, 177 PERF_SAMPLE_REGS_ABI_32 = 1, 178 PERF_SAMPLE_REGS_ABI_64 = 2, 179 }; 180 181 /* 182 * The format of the data returned by read() on a perf event fd, 183 * as specified by attr.read_format: 184 * 185 * struct read_format { 186 * { u64 value; 187 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 188 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 189 * { u64 id; } && PERF_FORMAT_ID 190 * } && !PERF_FORMAT_GROUP 191 * 192 * { u64 nr; 193 * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 194 * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 195 * { u64 value; 196 * { u64 id; } && PERF_FORMAT_ID 197 * } cntr[nr]; 198 * } && PERF_FORMAT_GROUP 199 * }; 200 */ 201 enum perf_event_read_format { 202 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 203 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 204 PERF_FORMAT_ID = 1U << 2, 205 PERF_FORMAT_GROUP = 1U << 3, 206 207 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ 208 }; 209 210 #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ 211 #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ 212 #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ 213 #define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */ 214 /* add: sample_stack_user */ 215 216 /* 217 * Hardware event_id to monitor via a performance monitoring event: 218 */ 219 struct perf_event_attr { 220 221 /* 222 * Major type: hardware/software/tracepoint/etc. 223 */ 224 __u32 type; 225 226 /* 227 * Size of the attr structure, for fwd/bwd compat. 228 */ 229 __u32 size; 230 231 /* 232 * Type specific configuration information. 233 */ 234 __u64 config; 235 236 union { 237 __u64 sample_period; 238 __u64 sample_freq; 239 }; 240 241 __u64 sample_type; 242 __u64 read_format; 243 244 __u64 disabled : 1, /* off by default */ 245 inherit : 1, /* children inherit it */ 246 pinned : 1, /* must always be on PMU */ 247 exclusive : 1, /* only group on PMU */ 248 exclude_user : 1, /* don't count user */ 249 exclude_kernel : 1, /* ditto kernel */ 250 exclude_hv : 1, /* ditto hypervisor */ 251 exclude_idle : 1, /* don't count when idle */ 252 mmap : 1, /* include mmap data */ 253 comm : 1, /* include comm data */ 254 freq : 1, /* use freq, not period */ 255 inherit_stat : 1, /* per task counts */ 256 enable_on_exec : 1, /* next exec enables */ 257 task : 1, /* trace fork/exit */ 258 watermark : 1, /* wakeup_watermark */ 259 /* 260 * precise_ip: 261 * 262 * 0 - SAMPLE_IP can have arbitrary skid 263 * 1 - SAMPLE_IP must have constant skid 264 * 2 - SAMPLE_IP requested to have 0 skid 265 * 3 - SAMPLE_IP must have 0 skid 266 * 267 * See also PERF_RECORD_MISC_EXACT_IP 268 */ 269 precise_ip : 2, /* skid constraint */ 270 mmap_data : 1, /* non-exec mmap data */ 271 sample_id_all : 1, /* sample_type all events */ 272 273 exclude_host : 1, /* don't count in host */ 274 exclude_guest : 1, /* don't count in guest */ 275 276 exclude_callchain_kernel : 1, /* exclude kernel callchains */ 277 exclude_callchain_user : 1, /* exclude user callchains */ 278 279 __reserved_1 : 41; 280 281 union { 282 __u32 wakeup_events; /* wakeup every n events */ 283 __u32 wakeup_watermark; /* bytes before wakeup */ 284 }; 285 286 __u32 bp_type; 287 union { 288 __u64 bp_addr; 289 __u64 config1; /* extension of config */ 290 }; 291 union { 292 __u64 bp_len; 293 __u64 config2; /* extension of config1 */ 294 }; 295 __u64 branch_sample_type; /* enum perf_branch_sample_type */ 296 297 /* 298 * Defines set of user regs to dump on samples. 299 * See asm/perf_regs.h for details. 300 */ 301 __u64 sample_regs_user; 302 303 /* 304 * Defines size of the user stack to dump on samples. 305 */ 306 __u32 sample_stack_user; 307 308 /* Align to u64. */ 309 __u32 __reserved_2; 310 }; 311 312 #define perf_flags(attr) (*(&(attr)->read_format + 1)) 313 314 /* 315 * Ioctls that can be done on a perf event fd: 316 */ 317 #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 318 #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 319 #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 320 #define PERF_EVENT_IOC_RESET _IO ('$', 3) 321 #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 322 #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 323 #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 324 325 enum perf_event_ioc_flags { 326 PERF_IOC_FLAG_GROUP = 1U << 0, 327 }; 328 329 /* 330 * Structure of the page that can be mapped via mmap 331 */ 332 struct perf_event_mmap_page { 333 __u32 version; /* version number of this structure */ 334 __u32 compat_version; /* lowest version this is compat with */ 335 336 /* 337 * Bits needed to read the hw events in user-space. 338 * 339 * u32 seq, time_mult, time_shift, idx, width; 340 * u64 count, enabled, running; 341 * u64 cyc, time_offset; 342 * s64 pmc = 0; 343 * 344 * do { 345 * seq = pc->lock; 346 * barrier() 347 * 348 * enabled = pc->time_enabled; 349 * running = pc->time_running; 350 * 351 * if (pc->cap_usr_time && enabled != running) { 352 * cyc = rdtsc(); 353 * time_offset = pc->time_offset; 354 * time_mult = pc->time_mult; 355 * time_shift = pc->time_shift; 356 * } 357 * 358 * idx = pc->index; 359 * count = pc->offset; 360 * if (pc->cap_usr_rdpmc && idx) { 361 * width = pc->pmc_width; 362 * pmc = rdpmc(idx - 1); 363 * } 364 * 365 * barrier(); 366 * } while (pc->lock != seq); 367 * 368 * NOTE: for obvious reason this only works on self-monitoring 369 * processes. 370 */ 371 __u32 lock; /* seqlock for synchronization */ 372 __u32 index; /* hardware event identifier */ 373 __s64 offset; /* add to hardware event value */ 374 __u64 time_enabled; /* time event active */ 375 __u64 time_running; /* time event on cpu */ 376 union { 377 __u64 capabilities; 378 __u64 cap_usr_time : 1, 379 cap_usr_rdpmc : 1, 380 cap_____res : 62; 381 }; 382 383 /* 384 * If cap_usr_rdpmc this field provides the bit-width of the value 385 * read using the rdpmc() or equivalent instruction. This can be used 386 * to sign extend the result like: 387 * 388 * pmc <<= 64 - width; 389 * pmc >>= 64 - width; // signed shift right 390 * count += pmc; 391 */ 392 __u16 pmc_width; 393 394 /* 395 * If cap_usr_time the below fields can be used to compute the time 396 * delta since time_enabled (in ns) using rdtsc or similar. 397 * 398 * u64 quot, rem; 399 * u64 delta; 400 * 401 * quot = (cyc >> time_shift); 402 * rem = cyc & ((1 << time_shift) - 1); 403 * delta = time_offset + quot * time_mult + 404 * ((rem * time_mult) >> time_shift); 405 * 406 * Where time_offset,time_mult,time_shift and cyc are read in the 407 * seqcount loop described above. This delta can then be added to 408 * enabled and possible running (if idx), improving the scaling: 409 * 410 * enabled += delta; 411 * if (idx) 412 * running += delta; 413 * 414 * quot = count / running; 415 * rem = count % running; 416 * count = quot * enabled + (rem * enabled) / running; 417 */ 418 __u16 time_shift; 419 __u32 time_mult; 420 __u64 time_offset; 421 422 /* 423 * Hole for extension of the self monitor capabilities 424 */ 425 426 __u64 __reserved[120]; /* align to 1k */ 427 428 /* 429 * Control data for the mmap() data buffer. 430 * 431 * User-space reading the @data_head value should issue an rmb(), on 432 * SMP capable platforms, after reading this value -- see 433 * perf_event_wakeup(). 434 * 435 * When the mapping is PROT_WRITE the @data_tail value should be 436 * written by userspace to reflect the last read data. In this case 437 * the kernel will not over-write unread data. 438 */ 439 __u64 data_head; /* head in the data section */ 440 __u64 data_tail; /* user-space written tail */ 441 }; 442 443 #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 444 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 445 #define PERF_RECORD_MISC_KERNEL (1 << 0) 446 #define PERF_RECORD_MISC_USER (2 << 0) 447 #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 448 #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 449 #define PERF_RECORD_MISC_GUEST_USER (5 << 0) 450 451 #define PERF_RECORD_MISC_MMAP_DATA (1 << 13) 452 /* 453 * Indicates that the content of PERF_SAMPLE_IP points to 454 * the actual instruction that triggered the event. See also 455 * perf_event_attr::precise_ip. 456 */ 457 #define PERF_RECORD_MISC_EXACT_IP (1 << 14) 458 /* 459 * Reserve the last bit to indicate some extended misc field 460 */ 461 #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 462 463 struct perf_event_header { 464 __u32 type; 465 __u16 misc; 466 __u16 size; 467 }; 468 469 enum perf_event_type { 470 471 /* 472 * If perf_event_attr.sample_id_all is set then all event types will 473 * have the sample_type selected fields related to where/when 474 * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID) 475 * described in PERF_RECORD_SAMPLE below, it will be stashed just after 476 * the perf_event_header and the fields already present for the existing 477 * fields, i.e. at the end of the payload. That way a newer perf.data 478 * file will be supported by older perf tools, with these new optional 479 * fields being ignored. 480 * 481 * The MMAP events record the PROT_EXEC mappings so that we can 482 * correlate userspace IPs to code. They have the following structure: 483 * 484 * struct { 485 * struct perf_event_header header; 486 * 487 * u32 pid, tid; 488 * u64 addr; 489 * u64 len; 490 * u64 pgoff; 491 * char filename[]; 492 * }; 493 */ 494 PERF_RECORD_MMAP = 1, 495 496 /* 497 * struct { 498 * struct perf_event_header header; 499 * u64 id; 500 * u64 lost; 501 * }; 502 */ 503 PERF_RECORD_LOST = 2, 504 505 /* 506 * struct { 507 * struct perf_event_header header; 508 * 509 * u32 pid, tid; 510 * char comm[]; 511 * }; 512 */ 513 PERF_RECORD_COMM = 3, 514 515 /* 516 * struct { 517 * struct perf_event_header header; 518 * u32 pid, ppid; 519 * u32 tid, ptid; 520 * u64 time; 521 * }; 522 */ 523 PERF_RECORD_EXIT = 4, 524 525 /* 526 * struct { 527 * struct perf_event_header header; 528 * u64 time; 529 * u64 id; 530 * u64 stream_id; 531 * }; 532 */ 533 PERF_RECORD_THROTTLE = 5, 534 PERF_RECORD_UNTHROTTLE = 6, 535 536 /* 537 * struct { 538 * struct perf_event_header header; 539 * u32 pid, ppid; 540 * u32 tid, ptid; 541 * u64 time; 542 * }; 543 */ 544 PERF_RECORD_FORK = 7, 545 546 /* 547 * struct { 548 * struct perf_event_header header; 549 * u32 pid, tid; 550 * 551 * struct read_format values; 552 * }; 553 */ 554 PERF_RECORD_READ = 8, 555 556 /* 557 * struct { 558 * struct perf_event_header header; 559 * 560 * { u64 ip; } && PERF_SAMPLE_IP 561 * { u32 pid, tid; } && PERF_SAMPLE_TID 562 * { u64 time; } && PERF_SAMPLE_TIME 563 * { u64 addr; } && PERF_SAMPLE_ADDR 564 * { u64 id; } && PERF_SAMPLE_ID 565 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 566 * { u32 cpu, res; } && PERF_SAMPLE_CPU 567 * { u64 period; } && PERF_SAMPLE_PERIOD 568 * 569 * { struct read_format values; } && PERF_SAMPLE_READ 570 * 571 * { u64 nr, 572 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN 573 * 574 * # 575 * # The RAW record below is opaque data wrt the ABI 576 * # 577 * # That is, the ABI doesn't make any promises wrt to 578 * # the stability of its content, it may vary depending 579 * # on event, hardware, kernel version and phase of 580 * # the moon. 581 * # 582 * # In other words, PERF_SAMPLE_RAW contents are not an ABI. 583 * # 584 * 585 * { u32 size; 586 * char data[size];}&& PERF_SAMPLE_RAW 587 * 588 * { u64 nr; 589 * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK 590 * 591 * { u64 abi; # enum perf_sample_regs_abi 592 * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER 593 * 594 * { u64 size; 595 * char data[size]; 596 * u64 dyn_size; } && PERF_SAMPLE_STACK_USER 597 * 598 * { u64 weight; } && PERF_SAMPLE_WEIGHT 599 * { u64 data_src; } && PERF_SAMPLE_DATA_SRC 600 * }; 601 */ 602 PERF_RECORD_SAMPLE = 9, 603 604 PERF_RECORD_MAX, /* non-ABI */ 605 }; 606 607 #define PERF_MAX_STACK_DEPTH 127 608 609 enum perf_callchain_context { 610 PERF_CONTEXT_HV = (__u64)-32, 611 PERF_CONTEXT_KERNEL = (__u64)-128, 612 PERF_CONTEXT_USER = (__u64)-512, 613 614 PERF_CONTEXT_GUEST = (__u64)-2048, 615 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 616 PERF_CONTEXT_GUEST_USER = (__u64)-2560, 617 618 PERF_CONTEXT_MAX = (__u64)-4095, 619 }; 620 621 #define PERF_FLAG_FD_NO_GROUP (1U << 0) 622 #define PERF_FLAG_FD_OUTPUT (1U << 1) 623 #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ 624 625 union perf_mem_data_src { 626 __u64 val; 627 struct { 628 __u64 mem_op:5, /* type of opcode */ 629 mem_lvl:14, /* memory hierarchy level */ 630 mem_snoop:5, /* snoop mode */ 631 mem_lock:2, /* lock instr */ 632 mem_dtlb:7, /* tlb access */ 633 mem_rsvd:31; 634 }; 635 }; 636 637 /* type of opcode (load/store/prefetch,code) */ 638 #define PERF_MEM_OP_NA 0x01 /* not available */ 639 #define PERF_MEM_OP_LOAD 0x02 /* load instruction */ 640 #define PERF_MEM_OP_STORE 0x04 /* store instruction */ 641 #define PERF_MEM_OP_PFETCH 0x08 /* prefetch */ 642 #define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ 643 #define PERF_MEM_OP_SHIFT 0 644 645 /* memory hierarchy (memory level, hit or miss) */ 646 #define PERF_MEM_LVL_NA 0x01 /* not available */ 647 #define PERF_MEM_LVL_HIT 0x02 /* hit level */ 648 #define PERF_MEM_LVL_MISS 0x04 /* miss level */ 649 #define PERF_MEM_LVL_L1 0x08 /* L1 */ 650 #define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ 651 #define PERF_MEM_LVL_L2 0x20 /* L2 */ 652 #define PERF_MEM_LVL_L3 0x40 /* L3 */ 653 #define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ 654 #define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ 655 #define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ 656 #define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */ 657 #define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */ 658 #define PERF_MEM_LVL_IO 0x1000 /* I/O memory */ 659 #define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */ 660 #define PERF_MEM_LVL_SHIFT 5 661 662 /* snoop mode */ 663 #define PERF_MEM_SNOOP_NA 0x01 /* not available */ 664 #define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */ 665 #define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */ 666 #define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */ 667 #define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */ 668 #define PERF_MEM_SNOOP_SHIFT 19 669 670 /* locked instruction */ 671 #define PERF_MEM_LOCK_NA 0x01 /* not available */ 672 #define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */ 673 #define PERF_MEM_LOCK_SHIFT 24 674 675 /* TLB access */ 676 #define PERF_MEM_TLB_NA 0x01 /* not available */ 677 #define PERF_MEM_TLB_HIT 0x02 /* hit level */ 678 #define PERF_MEM_TLB_MISS 0x04 /* miss level */ 679 #define PERF_MEM_TLB_L1 0x08 /* L1 */ 680 #define PERF_MEM_TLB_L2 0x10 /* L2 */ 681 #define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/ 682 #define PERF_MEM_TLB_OS 0x40 /* OS fault handler */ 683 #define PERF_MEM_TLB_SHIFT 26 684 685 #define PERF_MEM_S(a, s) \ 686 (((u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) 687 688 #endif /* _UAPI_LINUX_PERF_EVENT_H */ 689