1 /* 2 * Copyright (c) 2014-2015, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU Lesser General Public License, 6 * version 2.1, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT ANY 9 * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 10 * FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for 11 * more details. 12 */ 13 #ifndef __NDCTL_H__ 14 #define __NDCTL_H__ 15 16 #include <linux/types.h> 17 18 struct nd_cmd_smart { 19 __u32 status; 20 __u8 data[128]; 21 } __packed; 22 23 struct nd_cmd_smart_threshold { 24 __u32 status; 25 __u8 data[8]; 26 } __packed; 27 28 struct nd_cmd_dimm_flags { 29 __u32 status; 30 __u32 flags; 31 } __packed; 32 33 struct nd_cmd_get_config_size { 34 __u32 status; 35 __u32 config_size; 36 __u32 max_xfer; 37 } __packed; 38 39 struct nd_cmd_get_config_data_hdr { 40 __u32 in_offset; 41 __u32 in_length; 42 __u32 status; 43 __u8 out_buf[0]; 44 } __packed; 45 46 struct nd_cmd_set_config_hdr { 47 __u32 in_offset; 48 __u32 in_length; 49 __u8 in_buf[0]; 50 } __packed; 51 52 struct nd_cmd_vendor_hdr { 53 __u32 opcode; 54 __u32 in_length; 55 __u8 in_buf[0]; 56 } __packed; 57 58 struct nd_cmd_vendor_tail { 59 __u32 status; 60 __u32 out_length; 61 __u8 out_buf[0]; 62 } __packed; 63 64 struct nd_cmd_ars_cap { 65 __u64 address; 66 __u64 length; 67 __u32 status; 68 __u32 max_ars_out; 69 __u32 clear_err_unit; 70 __u32 reserved; 71 } __packed; 72 73 struct nd_cmd_ars_start { 74 __u64 address; 75 __u64 length; 76 __u16 type; 77 __u8 flags; 78 __u8 reserved[5]; 79 __u32 status; 80 __u32 scrub_time; 81 } __packed; 82 83 struct nd_cmd_ars_status { 84 __u32 status; 85 __u32 out_length; 86 __u64 address; 87 __u64 length; 88 __u64 restart_address; 89 __u64 restart_length; 90 __u16 type; 91 __u16 flags; 92 __u32 num_records; 93 struct nd_ars_record { 94 __u32 handle; 95 __u32 reserved; 96 __u64 err_address; 97 __u64 length; 98 } __packed records[0]; 99 } __packed; 100 101 struct nd_cmd_clear_error { 102 __u64 address; 103 __u64 length; 104 __u32 status; 105 __u8 reserved[4]; 106 __u64 cleared; 107 } __packed; 108 109 enum { 110 ND_CMD_IMPLEMENTED = 0, 111 112 /* bus commands */ 113 ND_CMD_ARS_CAP = 1, 114 ND_CMD_ARS_START = 2, 115 ND_CMD_ARS_STATUS = 3, 116 ND_CMD_CLEAR_ERROR = 4, 117 118 /* per-dimm commands */ 119 ND_CMD_SMART = 1, 120 ND_CMD_SMART_THRESHOLD = 2, 121 ND_CMD_DIMM_FLAGS = 3, 122 ND_CMD_GET_CONFIG_SIZE = 4, 123 ND_CMD_GET_CONFIG_DATA = 5, 124 ND_CMD_SET_CONFIG_DATA = 6, 125 ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7, 126 ND_CMD_VENDOR_EFFECT_LOG = 8, 127 ND_CMD_VENDOR = 9, 128 }; 129 130 enum { 131 ND_ARS_VOLATILE = 1, 132 ND_ARS_PERSISTENT = 2, 133 }; 134 135 static inline const char *nvdimm_bus_cmd_name(unsigned cmd) 136 { 137 static const char * const names[] = { 138 [ND_CMD_ARS_CAP] = "ars_cap", 139 [ND_CMD_ARS_START] = "ars_start", 140 [ND_CMD_ARS_STATUS] = "ars_status", 141 [ND_CMD_CLEAR_ERROR] = "clear_error", 142 }; 143 144 if (cmd < ARRAY_SIZE(names) && names[cmd]) 145 return names[cmd]; 146 return "unknown"; 147 } 148 149 static inline const char *nvdimm_cmd_name(unsigned cmd) 150 { 151 static const char * const names[] = { 152 [ND_CMD_SMART] = "smart", 153 [ND_CMD_SMART_THRESHOLD] = "smart_thresh", 154 [ND_CMD_DIMM_FLAGS] = "flags", 155 [ND_CMD_GET_CONFIG_SIZE] = "get_size", 156 [ND_CMD_GET_CONFIG_DATA] = "get_data", 157 [ND_CMD_SET_CONFIG_DATA] = "set_data", 158 [ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size", 159 [ND_CMD_VENDOR_EFFECT_LOG] = "effect_log", 160 [ND_CMD_VENDOR] = "vendor", 161 }; 162 163 if (cmd < ARRAY_SIZE(names) && names[cmd]) 164 return names[cmd]; 165 return "unknown"; 166 } 167 168 #define ND_IOCTL 'N' 169 170 #define ND_IOCTL_SMART _IOWR(ND_IOCTL, ND_CMD_SMART,\ 171 struct nd_cmd_smart) 172 173 #define ND_IOCTL_SMART_THRESHOLD _IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\ 174 struct nd_cmd_smart_threshold) 175 176 #define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\ 177 struct nd_cmd_dimm_flags) 178 179 #define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\ 180 struct nd_cmd_get_config_size) 181 182 #define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\ 183 struct nd_cmd_get_config_data_hdr) 184 185 #define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\ 186 struct nd_cmd_set_config_hdr) 187 188 #define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\ 189 struct nd_cmd_vendor_hdr) 190 191 #define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\ 192 struct nd_cmd_ars_cap) 193 194 #define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\ 195 struct nd_cmd_ars_start) 196 197 #define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\ 198 struct nd_cmd_ars_status) 199 200 #define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\ 201 struct nd_cmd_clear_error) 202 203 #define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */ 204 #define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */ 205 #define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */ 206 #define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */ 207 #define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */ 208 #define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */ 209 #define ND_DEVICE_DAX_PMEM 7 /* Device DAX interface to pmem */ 210 211 enum nd_driver_flags { 212 ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM, 213 ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM, 214 ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK, 215 ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO, 216 ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM, 217 ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK, 218 ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM, 219 }; 220 221 enum { 222 ND_MIN_NAMESPACE_SIZE = 0x00400000, 223 }; 224 225 enum ars_masks { 226 ARS_STATUS_MASK = 0x0000FFFF, 227 ARS_EXT_STATUS_SHIFT = 16, 228 }; 229 #endif /* __NDCTL_H__ */ 230