1 /* 2 * Copyright (c) 2014-2016, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU Lesser General Public License, 6 * version 2.1, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT ANY 9 * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 10 * FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for 11 * more details. 12 */ 13 #ifndef __NDCTL_H__ 14 #define __NDCTL_H__ 15 16 #include <linux/types.h> 17 18 struct nd_cmd_smart { 19 __u32 status; 20 __u8 data[128]; 21 } __packed; 22 23 #define ND_SMART_HEALTH_VALID (1 << 0) 24 #define ND_SMART_TEMP_VALID (1 << 1) 25 #define ND_SMART_SPARES_VALID (1 << 2) 26 #define ND_SMART_ALARM_VALID (1 << 3) 27 #define ND_SMART_USED_VALID (1 << 4) 28 #define ND_SMART_SHUTDOWN_VALID (1 << 5) 29 #define ND_SMART_VENDOR_VALID (1 << 6) 30 #define ND_SMART_TEMP_TRIP (1 << 0) 31 #define ND_SMART_SPARE_TRIP (1 << 1) 32 #define ND_SMART_NON_CRITICAL_HEALTH (1 << 0) 33 #define ND_SMART_CRITICAL_HEALTH (1 << 1) 34 #define ND_SMART_FATAL_HEALTH (1 << 2) 35 36 struct nd_smart_payload { 37 __u32 flags; 38 __u8 reserved0[4]; 39 __u8 health; 40 __u16 temperature; 41 __u8 spares; 42 __u8 alarm_flags; 43 __u8 life_used; 44 __u8 shutdown_state; 45 __u8 reserved1; 46 __u32 vendor_size; 47 __u8 vendor_data[108]; 48 } __packed; 49 50 struct nd_cmd_smart_threshold { 51 __u32 status; 52 __u8 data[8]; 53 } __packed; 54 55 struct nd_smart_threshold_payload { 56 __u16 alarm_control; 57 __u16 temperature; 58 __u8 spares; 59 __u8 reserved[3]; 60 } __packed; 61 62 struct nd_cmd_dimm_flags { 63 __u32 status; 64 __u32 flags; 65 } __packed; 66 67 struct nd_cmd_get_config_size { 68 __u32 status; 69 __u32 config_size; 70 __u32 max_xfer; 71 } __packed; 72 73 struct nd_cmd_get_config_data_hdr { 74 __u32 in_offset; 75 __u32 in_length; 76 __u32 status; 77 __u8 out_buf[0]; 78 } __packed; 79 80 struct nd_cmd_set_config_hdr { 81 __u32 in_offset; 82 __u32 in_length; 83 __u8 in_buf[0]; 84 } __packed; 85 86 struct nd_cmd_vendor_hdr { 87 __u32 opcode; 88 __u32 in_length; 89 __u8 in_buf[0]; 90 } __packed; 91 92 struct nd_cmd_vendor_tail { 93 __u32 status; 94 __u32 out_length; 95 __u8 out_buf[0]; 96 } __packed; 97 98 struct nd_cmd_ars_cap { 99 __u64 address; 100 __u64 length; 101 __u32 status; 102 __u32 max_ars_out; 103 __u32 clear_err_unit; 104 __u32 reserved; 105 } __packed; 106 107 struct nd_cmd_ars_start { 108 __u64 address; 109 __u64 length; 110 __u16 type; 111 __u8 flags; 112 __u8 reserved[5]; 113 __u32 status; 114 __u32 scrub_time; 115 } __packed; 116 117 struct nd_cmd_ars_status { 118 __u32 status; 119 __u32 out_length; 120 __u64 address; 121 __u64 length; 122 __u64 restart_address; 123 __u64 restart_length; 124 __u16 type; 125 __u16 flags; 126 __u32 num_records; 127 struct nd_ars_record { 128 __u32 handle; 129 __u32 reserved; 130 __u64 err_address; 131 __u64 length; 132 } __packed records[0]; 133 } __packed; 134 135 struct nd_cmd_clear_error { 136 __u64 address; 137 __u64 length; 138 __u32 status; 139 __u8 reserved[4]; 140 __u64 cleared; 141 } __packed; 142 143 enum { 144 ND_CMD_IMPLEMENTED = 0, 145 146 /* bus commands */ 147 ND_CMD_ARS_CAP = 1, 148 ND_CMD_ARS_START = 2, 149 ND_CMD_ARS_STATUS = 3, 150 ND_CMD_CLEAR_ERROR = 4, 151 152 /* per-dimm commands */ 153 ND_CMD_SMART = 1, 154 ND_CMD_SMART_THRESHOLD = 2, 155 ND_CMD_DIMM_FLAGS = 3, 156 ND_CMD_GET_CONFIG_SIZE = 4, 157 ND_CMD_GET_CONFIG_DATA = 5, 158 ND_CMD_SET_CONFIG_DATA = 6, 159 ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7, 160 ND_CMD_VENDOR_EFFECT_LOG = 8, 161 ND_CMD_VENDOR = 9, 162 ND_CMD_CALL = 10, 163 }; 164 165 enum { 166 ND_ARS_VOLATILE = 1, 167 ND_ARS_PERSISTENT = 2, 168 }; 169 170 static inline const char *nvdimm_bus_cmd_name(unsigned cmd) 171 { 172 static const char * const names[] = { 173 [ND_CMD_ARS_CAP] = "ars_cap", 174 [ND_CMD_ARS_START] = "ars_start", 175 [ND_CMD_ARS_STATUS] = "ars_status", 176 [ND_CMD_CLEAR_ERROR] = "clear_error", 177 }; 178 179 if (cmd < ARRAY_SIZE(names) && names[cmd]) 180 return names[cmd]; 181 return "unknown"; 182 } 183 184 static inline const char *nvdimm_cmd_name(unsigned cmd) 185 { 186 static const char * const names[] = { 187 [ND_CMD_SMART] = "smart", 188 [ND_CMD_SMART_THRESHOLD] = "smart_thresh", 189 [ND_CMD_DIMM_FLAGS] = "flags", 190 [ND_CMD_GET_CONFIG_SIZE] = "get_size", 191 [ND_CMD_GET_CONFIG_DATA] = "get_data", 192 [ND_CMD_SET_CONFIG_DATA] = "set_data", 193 [ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size", 194 [ND_CMD_VENDOR_EFFECT_LOG] = "effect_log", 195 [ND_CMD_VENDOR] = "vendor", 196 [ND_CMD_CALL] = "cmd_call", 197 }; 198 199 if (cmd < ARRAY_SIZE(names) && names[cmd]) 200 return names[cmd]; 201 return "unknown"; 202 } 203 204 #define ND_IOCTL 'N' 205 206 #define ND_IOCTL_SMART _IOWR(ND_IOCTL, ND_CMD_SMART,\ 207 struct nd_cmd_smart) 208 209 #define ND_IOCTL_SMART_THRESHOLD _IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\ 210 struct nd_cmd_smart_threshold) 211 212 #define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\ 213 struct nd_cmd_dimm_flags) 214 215 #define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\ 216 struct nd_cmd_get_config_size) 217 218 #define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\ 219 struct nd_cmd_get_config_data_hdr) 220 221 #define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\ 222 struct nd_cmd_set_config_hdr) 223 224 #define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\ 225 struct nd_cmd_vendor_hdr) 226 227 #define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\ 228 struct nd_cmd_ars_cap) 229 230 #define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\ 231 struct nd_cmd_ars_start) 232 233 #define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\ 234 struct nd_cmd_ars_status) 235 236 #define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\ 237 struct nd_cmd_clear_error) 238 239 #define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */ 240 #define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */ 241 #define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */ 242 #define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */ 243 #define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */ 244 #define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */ 245 #define ND_DEVICE_DAX_PMEM 7 /* Device DAX interface to pmem */ 246 247 enum nd_driver_flags { 248 ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM, 249 ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM, 250 ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK, 251 ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO, 252 ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM, 253 ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK, 254 ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM, 255 }; 256 257 enum { 258 ND_MIN_NAMESPACE_SIZE = 0x00400000, 259 }; 260 261 enum ars_masks { 262 ARS_STATUS_MASK = 0x0000FFFF, 263 ARS_EXT_STATUS_SHIFT = 16, 264 }; 265 266 /* 267 * struct nd_cmd_pkg 268 * 269 * is a wrapper to a quasi pass thru interface for invoking firmware 270 * associated with nvdimms. 271 * 272 * INPUT PARAMETERS 273 * 274 * nd_family corresponds to the firmware (e.g. DSM) interface. 275 * 276 * nd_command are the function index advertised by the firmware. 277 * 278 * nd_size_in is the size of the input parameters being passed to firmware 279 * 280 * OUTPUT PARAMETERS 281 * 282 * nd_fw_size is the size of the data firmware wants to return for 283 * the call. If nd_fw_size is greater than size of nd_size_out, only 284 * the first nd_size_out bytes are returned. 285 */ 286 287 struct nd_cmd_pkg { 288 __u64 nd_family; /* family of commands */ 289 __u64 nd_command; 290 __u32 nd_size_in; /* INPUT: size of input args */ 291 __u32 nd_size_out; /* INPUT: size of payload */ 292 __u32 nd_reserved2[9]; /* reserved must be zero */ 293 __u32 nd_fw_size; /* OUTPUT: size fw wants to return */ 294 unsigned char nd_payload[]; /* Contents of call */ 295 }; 296 297 /* These NVDIMM families represent pre-standardization command sets */ 298 #define NVDIMM_FAMILY_INTEL 0 299 #define NVDIMM_FAMILY_HPE1 1 300 #define NVDIMM_FAMILY_HPE2 2 301 302 #define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL,\ 303 struct nd_cmd_pkg) 304 305 #endif /* __NDCTL_H__ */ 306