1 /* 2 * Copyright (c) 2014-2016, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU Lesser General Public License, 6 * version 2.1, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT ANY 9 * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 10 * FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for 11 * more details. 12 */ 13 #ifndef __NDCTL_H__ 14 #define __NDCTL_H__ 15 16 #include <linux/types.h> 17 18 struct nd_cmd_smart { 19 __u32 status; 20 __u8 data[128]; 21 } __packed; 22 23 #define ND_SMART_HEALTH_VALID (1 << 0) 24 #define ND_SMART_SPARES_VALID (1 << 1) 25 #define ND_SMART_USED_VALID (1 << 2) 26 #define ND_SMART_TEMP_VALID (1 << 3) 27 #define ND_SMART_CTEMP_VALID (1 << 4) 28 #define ND_SMART_ALARM_VALID (1 << 9) 29 #define ND_SMART_SHUTDOWN_VALID (1 << 10) 30 #define ND_SMART_VENDOR_VALID (1 << 11) 31 #define ND_SMART_SPARE_TRIP (1 << 0) 32 #define ND_SMART_TEMP_TRIP (1 << 1) 33 #define ND_SMART_CTEMP_TRIP (1 << 2) 34 #define ND_SMART_NON_CRITICAL_HEALTH (1 << 0) 35 #define ND_SMART_CRITICAL_HEALTH (1 << 1) 36 #define ND_SMART_FATAL_HEALTH (1 << 2) 37 38 struct nd_smart_payload { 39 __u32 flags; 40 __u8 reserved0[4]; 41 __u8 health; 42 __u8 spares; 43 __u8 life_used; 44 __u8 alarm_flags; 45 __u16 temperature; 46 __u16 ctrl_temperature; 47 __u8 reserved1[15]; 48 __u8 shutdown_state; 49 __u32 vendor_size; 50 __u8 vendor_data[92]; 51 } __packed; 52 53 struct nd_cmd_smart_threshold { 54 __u32 status; 55 __u8 data[8]; 56 } __packed; 57 58 struct nd_smart_threshold_payload { 59 __u8 alarm_control; 60 __u8 reserved0; 61 __u16 temperature; 62 __u8 spares; 63 __u8 reserved[3]; 64 } __packed; 65 66 struct nd_cmd_dimm_flags { 67 __u32 status; 68 __u32 flags; 69 } __packed; 70 71 struct nd_cmd_get_config_size { 72 __u32 status; 73 __u32 config_size; 74 __u32 max_xfer; 75 } __packed; 76 77 struct nd_cmd_get_config_data_hdr { 78 __u32 in_offset; 79 __u32 in_length; 80 __u32 status; 81 __u8 out_buf[0]; 82 } __packed; 83 84 struct nd_cmd_set_config_hdr { 85 __u32 in_offset; 86 __u32 in_length; 87 __u8 in_buf[0]; 88 } __packed; 89 90 struct nd_cmd_vendor_hdr { 91 __u32 opcode; 92 __u32 in_length; 93 __u8 in_buf[0]; 94 } __packed; 95 96 struct nd_cmd_vendor_tail { 97 __u32 status; 98 __u32 out_length; 99 __u8 out_buf[0]; 100 } __packed; 101 102 struct nd_cmd_ars_cap { 103 __u64 address; 104 __u64 length; 105 __u32 status; 106 __u32 max_ars_out; 107 __u32 clear_err_unit; 108 __u16 flags; 109 __u16 reserved; 110 } __packed; 111 112 struct nd_cmd_ars_start { 113 __u64 address; 114 __u64 length; 115 __u16 type; 116 __u8 flags; 117 __u8 reserved[5]; 118 __u32 status; 119 __u32 scrub_time; 120 } __packed; 121 122 struct nd_cmd_ars_status { 123 __u32 status; 124 __u32 out_length; 125 __u64 address; 126 __u64 length; 127 __u64 restart_address; 128 __u64 restart_length; 129 __u16 type; 130 __u16 flags; 131 __u32 num_records; 132 struct nd_ars_record { 133 __u32 handle; 134 __u32 reserved; 135 __u64 err_address; 136 __u64 length; 137 } __packed records[0]; 138 } __packed; 139 140 struct nd_cmd_clear_error { 141 __u64 address; 142 __u64 length; 143 __u32 status; 144 __u8 reserved[4]; 145 __u64 cleared; 146 } __packed; 147 148 struct nd_cmd_trans_spa { 149 __u64 spa; 150 __u32 status; 151 __u8 flags; 152 __u8 _reserved[3]; 153 __u64 trans_length; 154 __u32 num_nvdimms; 155 struct nd_nvdimm_device { 156 __u32 nfit_device_handle; 157 __u32 _reserved; 158 __u64 dpa; 159 } __packed devices[0]; 160 161 } __packed; 162 163 struct nd_cmd_ars_err_inj { 164 __u64 err_inj_spa_range_base; 165 __u64 err_inj_spa_range_length; 166 __u8 err_inj_options; 167 __u32 status; 168 } __packed; 169 170 struct nd_cmd_ars_err_inj_clr { 171 __u64 err_inj_clr_spa_range_base; 172 __u64 err_inj_clr_spa_range_length; 173 __u32 status; 174 } __packed; 175 176 struct nd_cmd_ars_err_inj_stat { 177 __u32 status; 178 __u32 inj_err_rec_count; 179 struct nd_error_stat_query_record { 180 __u64 err_inj_stat_spa_range_base; 181 __u64 err_inj_stat_spa_range_length; 182 } __packed record[0]; 183 } __packed; 184 185 enum { 186 ND_CMD_IMPLEMENTED = 0, 187 188 /* bus commands */ 189 ND_CMD_ARS_CAP = 1, 190 ND_CMD_ARS_START = 2, 191 ND_CMD_ARS_STATUS = 3, 192 ND_CMD_CLEAR_ERROR = 4, 193 194 /* per-dimm commands */ 195 ND_CMD_SMART = 1, 196 ND_CMD_SMART_THRESHOLD = 2, 197 ND_CMD_DIMM_FLAGS = 3, 198 ND_CMD_GET_CONFIG_SIZE = 4, 199 ND_CMD_GET_CONFIG_DATA = 5, 200 ND_CMD_SET_CONFIG_DATA = 6, 201 ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7, 202 ND_CMD_VENDOR_EFFECT_LOG = 8, 203 ND_CMD_VENDOR = 9, 204 ND_CMD_CALL = 10, 205 }; 206 207 enum { 208 ND_ARS_VOLATILE = 1, 209 ND_ARS_PERSISTENT = 2, 210 ND_CONFIG_LOCKED = 1, 211 }; 212 213 static inline const char *nvdimm_bus_cmd_name(unsigned cmd) 214 { 215 static const char * const names[] = { 216 [ND_CMD_ARS_CAP] = "ars_cap", 217 [ND_CMD_ARS_START] = "ars_start", 218 [ND_CMD_ARS_STATUS] = "ars_status", 219 [ND_CMD_CLEAR_ERROR] = "clear_error", 220 [ND_CMD_CALL] = "cmd_call", 221 }; 222 223 if (cmd < ARRAY_SIZE(names) && names[cmd]) 224 return names[cmd]; 225 return "unknown"; 226 } 227 228 static inline const char *nvdimm_cmd_name(unsigned cmd) 229 { 230 static const char * const names[] = { 231 [ND_CMD_SMART] = "smart", 232 [ND_CMD_SMART_THRESHOLD] = "smart_thresh", 233 [ND_CMD_DIMM_FLAGS] = "flags", 234 [ND_CMD_GET_CONFIG_SIZE] = "get_size", 235 [ND_CMD_GET_CONFIG_DATA] = "get_data", 236 [ND_CMD_SET_CONFIG_DATA] = "set_data", 237 [ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size", 238 [ND_CMD_VENDOR_EFFECT_LOG] = "effect_log", 239 [ND_CMD_VENDOR] = "vendor", 240 [ND_CMD_CALL] = "cmd_call", 241 }; 242 243 if (cmd < ARRAY_SIZE(names) && names[cmd]) 244 return names[cmd]; 245 return "unknown"; 246 } 247 248 #define ND_IOCTL 'N' 249 250 #define ND_IOCTL_SMART _IOWR(ND_IOCTL, ND_CMD_SMART,\ 251 struct nd_cmd_smart) 252 253 #define ND_IOCTL_SMART_THRESHOLD _IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\ 254 struct nd_cmd_smart_threshold) 255 256 #define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\ 257 struct nd_cmd_dimm_flags) 258 259 #define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\ 260 struct nd_cmd_get_config_size) 261 262 #define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\ 263 struct nd_cmd_get_config_data_hdr) 264 265 #define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\ 266 struct nd_cmd_set_config_hdr) 267 268 #define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\ 269 struct nd_cmd_vendor_hdr) 270 271 #define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\ 272 struct nd_cmd_ars_cap) 273 274 #define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\ 275 struct nd_cmd_ars_start) 276 277 #define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\ 278 struct nd_cmd_ars_status) 279 280 #define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\ 281 struct nd_cmd_clear_error) 282 283 #define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */ 284 #define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */ 285 #define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */ 286 #define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */ 287 #define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */ 288 #define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */ 289 #define ND_DEVICE_DAX_PMEM 7 /* Device DAX interface to pmem */ 290 291 enum nd_driver_flags { 292 ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM, 293 ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM, 294 ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK, 295 ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO, 296 ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM, 297 ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK, 298 ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM, 299 }; 300 301 enum { 302 ND_MIN_NAMESPACE_SIZE = 0x00400000, 303 }; 304 305 enum ars_masks { 306 ARS_STATUS_MASK = 0x0000FFFF, 307 ARS_EXT_STATUS_SHIFT = 16, 308 }; 309 310 /* 311 * struct nd_cmd_pkg 312 * 313 * is a wrapper to a quasi pass thru interface for invoking firmware 314 * associated with nvdimms. 315 * 316 * INPUT PARAMETERS 317 * 318 * nd_family corresponds to the firmware (e.g. DSM) interface. 319 * 320 * nd_command are the function index advertised by the firmware. 321 * 322 * nd_size_in is the size of the input parameters being passed to firmware 323 * 324 * OUTPUT PARAMETERS 325 * 326 * nd_fw_size is the size of the data firmware wants to return for 327 * the call. If nd_fw_size is greater than size of nd_size_out, only 328 * the first nd_size_out bytes are returned. 329 */ 330 331 struct nd_cmd_pkg { 332 __u64 nd_family; /* family of commands */ 333 __u64 nd_command; 334 __u32 nd_size_in; /* INPUT: size of input args */ 335 __u32 nd_size_out; /* INPUT: size of payload */ 336 __u32 nd_reserved2[9]; /* reserved must be zero */ 337 __u32 nd_fw_size; /* OUTPUT: size fw wants to return */ 338 unsigned char nd_payload[]; /* Contents of call */ 339 }; 340 341 /* These NVDIMM families represent pre-standardization command sets */ 342 #define NVDIMM_FAMILY_INTEL 0 343 #define NVDIMM_FAMILY_HPE1 1 344 #define NVDIMM_FAMILY_HPE2 2 345 #define NVDIMM_FAMILY_MSFT 3 346 347 #define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL,\ 348 struct nd_cmd_pkg) 349 350 #endif /* __NDCTL_H__ */ 351