1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef KFD_IOCTL_H_INCLUDED 24 #define KFD_IOCTL_H_INCLUDED 25 26 #include <drm/drm.h> 27 #include <linux/ioctl.h> 28 29 /* 30 * - 1.1 - initial version 31 * - 1.3 - Add SMI events support 32 * - 1.4 - Indicate new SRAM EDC bit in device properties 33 * - 1.5 - Add SVM API 34 * - 1.6 - Query clear flags in SVM get_attr API 35 * - 1.7 - Checkpoint Restore (CRIU) API 36 * - 1.8 - CRIU - Support for SDMA transfers with GTT BOs 37 * - 1.9 - Add available memory ioctl 38 * - 1.10 - Add SMI profiler event log 39 * - 1.11 - Add unified memory for ctx save/restore area 40 * - 1.12 - Add DMA buf export ioctl 41 * - 1.13 - Add debugger API 42 * - 1.14 - Update kfd_event_data 43 * - 1.15 - Enable managing mappings in compute VMs with GEM_VA ioctl 44 * - 1.16 - Add contiguous VRAM allocation flag 45 * - 1.17 - Add SDMA queue creation with target SDMA engine ID 46 */ 47 #define KFD_IOCTL_MAJOR_VERSION 1 48 #define KFD_IOCTL_MINOR_VERSION 17 49 50 struct kfd_ioctl_get_version_args { 51 __u32 major_version; /* from KFD */ 52 __u32 minor_version; /* from KFD */ 53 }; 54 55 /* For kfd_ioctl_create_queue_args.queue_type. */ 56 #define KFD_IOC_QUEUE_TYPE_COMPUTE 0x0 57 #define KFD_IOC_QUEUE_TYPE_SDMA 0x1 58 #define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2 59 #define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3 60 #define KFD_IOC_QUEUE_TYPE_SDMA_BY_ENG_ID 0x4 61 62 #define KFD_MAX_QUEUE_PERCENTAGE 100 63 #define KFD_MAX_QUEUE_PRIORITY 15 64 65 struct kfd_ioctl_create_queue_args { 66 __u64 ring_base_address; /* to KFD */ 67 __u64 write_pointer_address; /* from KFD */ 68 __u64 read_pointer_address; /* from KFD */ 69 __u64 doorbell_offset; /* from KFD */ 70 71 __u32 ring_size; /* to KFD */ 72 __u32 gpu_id; /* to KFD */ 73 __u32 queue_type; /* to KFD */ 74 __u32 queue_percentage; /* to KFD */ 75 __u32 queue_priority; /* to KFD */ 76 __u32 queue_id; /* from KFD */ 77 78 __u64 eop_buffer_address; /* to KFD */ 79 __u64 eop_buffer_size; /* to KFD */ 80 __u64 ctx_save_restore_address; /* to KFD */ 81 __u32 ctx_save_restore_size; /* to KFD */ 82 __u32 ctl_stack_size; /* to KFD */ 83 __u32 sdma_engine_id; /* to KFD */ 84 __u32 pad; 85 }; 86 87 struct kfd_ioctl_destroy_queue_args { 88 __u32 queue_id; /* to KFD */ 89 __u32 pad; 90 }; 91 92 struct kfd_ioctl_update_queue_args { 93 __u64 ring_base_address; /* to KFD */ 94 95 __u32 queue_id; /* to KFD */ 96 __u32 ring_size; /* to KFD */ 97 __u32 queue_percentage; /* to KFD */ 98 __u32 queue_priority; /* to KFD */ 99 }; 100 101 struct kfd_ioctl_set_cu_mask_args { 102 __u32 queue_id; /* to KFD */ 103 __u32 num_cu_mask; /* to KFD */ 104 __u64 cu_mask_ptr; /* to KFD */ 105 }; 106 107 struct kfd_ioctl_get_queue_wave_state_args { 108 __u64 ctl_stack_address; /* to KFD */ 109 __u32 ctl_stack_used_size; /* from KFD */ 110 __u32 save_area_used_size; /* from KFD */ 111 __u32 queue_id; /* to KFD */ 112 __u32 pad; 113 }; 114 115 struct kfd_ioctl_get_available_memory_args { 116 __u64 available; /* from KFD */ 117 __u32 gpu_id; /* to KFD */ 118 __u32 pad; 119 }; 120 121 struct kfd_dbg_device_info_entry { 122 __u64 exception_status; 123 __u64 lds_base; 124 __u64 lds_limit; 125 __u64 scratch_base; 126 __u64 scratch_limit; 127 __u64 gpuvm_base; 128 __u64 gpuvm_limit; 129 __u32 gpu_id; 130 __u32 location_id; 131 __u32 vendor_id; 132 __u32 device_id; 133 __u32 revision_id; 134 __u32 subsystem_vendor_id; 135 __u32 subsystem_device_id; 136 __u32 fw_version; 137 __u32 gfx_target_version; 138 __u32 simd_count; 139 __u32 max_waves_per_simd; 140 __u32 array_count; 141 __u32 simd_arrays_per_engine; 142 __u32 num_xcc; 143 __u32 capability; 144 __u32 debug_prop; 145 }; 146 147 /* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */ 148 #define KFD_IOC_CACHE_POLICY_COHERENT 0 149 #define KFD_IOC_CACHE_POLICY_NONCOHERENT 1 150 151 struct kfd_ioctl_set_memory_policy_args { 152 __u64 alternate_aperture_base; /* to KFD */ 153 __u64 alternate_aperture_size; /* to KFD */ 154 155 __u32 gpu_id; /* to KFD */ 156 __u32 default_policy; /* to KFD */ 157 __u32 alternate_policy; /* to KFD */ 158 __u32 pad; 159 }; 160 161 /* 162 * All counters are monotonic. They are used for profiling of compute jobs. 163 * The profiling is done by userspace. 164 * 165 * In case of GPU reset, the counter should not be affected. 166 */ 167 168 struct kfd_ioctl_get_clock_counters_args { 169 __u64 gpu_clock_counter; /* from KFD */ 170 __u64 cpu_clock_counter; /* from KFD */ 171 __u64 system_clock_counter; /* from KFD */ 172 __u64 system_clock_freq; /* from KFD */ 173 174 __u32 gpu_id; /* to KFD */ 175 __u32 pad; 176 }; 177 178 struct kfd_process_device_apertures { 179 __u64 lds_base; /* from KFD */ 180 __u64 lds_limit; /* from KFD */ 181 __u64 scratch_base; /* from KFD */ 182 __u64 scratch_limit; /* from KFD */ 183 __u64 gpuvm_base; /* from KFD */ 184 __u64 gpuvm_limit; /* from KFD */ 185 __u32 gpu_id; /* from KFD */ 186 __u32 pad; 187 }; 188 189 /* 190 * AMDKFD_IOC_GET_PROCESS_APERTURES is deprecated. Use 191 * AMDKFD_IOC_GET_PROCESS_APERTURES_NEW instead, which supports an 192 * unlimited number of GPUs. 193 */ 194 #define NUM_OF_SUPPORTED_GPUS 7 195 struct kfd_ioctl_get_process_apertures_args { 196 struct kfd_process_device_apertures 197 process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */ 198 199 /* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */ 200 __u32 num_of_nodes; 201 __u32 pad; 202 }; 203 204 struct kfd_ioctl_get_process_apertures_new_args { 205 /* User allocated. Pointer to struct kfd_process_device_apertures 206 * filled in by Kernel 207 */ 208 __u64 kfd_process_device_apertures_ptr; 209 /* to KFD - indicates amount of memory present in 210 * kfd_process_device_apertures_ptr 211 * from KFD - Number of entries filled by KFD. 212 */ 213 __u32 num_of_nodes; 214 __u32 pad; 215 }; 216 217 #define MAX_ALLOWED_NUM_POINTS 100 218 #define MAX_ALLOWED_AW_BUFF_SIZE 4096 219 #define MAX_ALLOWED_WAC_BUFF_SIZE 128 220 221 struct kfd_ioctl_dbg_register_args { 222 __u32 gpu_id; /* to KFD */ 223 __u32 pad; 224 }; 225 226 struct kfd_ioctl_dbg_unregister_args { 227 __u32 gpu_id; /* to KFD */ 228 __u32 pad; 229 }; 230 231 struct kfd_ioctl_dbg_address_watch_args { 232 __u64 content_ptr; /* a pointer to the actual content */ 233 __u32 gpu_id; /* to KFD */ 234 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */ 235 }; 236 237 struct kfd_ioctl_dbg_wave_control_args { 238 __u64 content_ptr; /* a pointer to the actual content */ 239 __u32 gpu_id; /* to KFD */ 240 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */ 241 }; 242 243 #define KFD_INVALID_FD 0xffffffff 244 245 /* Matching HSA_EVENTTYPE */ 246 #define KFD_IOC_EVENT_SIGNAL 0 247 #define KFD_IOC_EVENT_NODECHANGE 1 248 #define KFD_IOC_EVENT_DEVICESTATECHANGE 2 249 #define KFD_IOC_EVENT_HW_EXCEPTION 3 250 #define KFD_IOC_EVENT_SYSTEM_EVENT 4 251 #define KFD_IOC_EVENT_DEBUG_EVENT 5 252 #define KFD_IOC_EVENT_PROFILE_EVENT 6 253 #define KFD_IOC_EVENT_QUEUE_EVENT 7 254 #define KFD_IOC_EVENT_MEMORY 8 255 256 #define KFD_IOC_WAIT_RESULT_COMPLETE 0 257 #define KFD_IOC_WAIT_RESULT_TIMEOUT 1 258 #define KFD_IOC_WAIT_RESULT_FAIL 2 259 260 #define KFD_SIGNAL_EVENT_LIMIT 4096 261 262 /* For kfd_event_data.hw_exception_data.reset_type. */ 263 #define KFD_HW_EXCEPTION_WHOLE_GPU_RESET 0 264 #define KFD_HW_EXCEPTION_PER_ENGINE_RESET 1 265 266 /* For kfd_event_data.hw_exception_data.reset_cause. */ 267 #define KFD_HW_EXCEPTION_GPU_HANG 0 268 #define KFD_HW_EXCEPTION_ECC 1 269 270 /* For kfd_hsa_memory_exception_data.ErrorType */ 271 #define KFD_MEM_ERR_NO_RAS 0 272 #define KFD_MEM_ERR_SRAM_ECC 1 273 #define KFD_MEM_ERR_POISON_CONSUMED 2 274 #define KFD_MEM_ERR_GPU_HANG 3 275 276 struct kfd_ioctl_create_event_args { 277 __u64 event_page_offset; /* from KFD */ 278 __u32 event_trigger_data; /* from KFD - signal events only */ 279 __u32 event_type; /* to KFD */ 280 __u32 auto_reset; /* to KFD */ 281 __u32 node_id; /* to KFD - only valid for certain 282 event types */ 283 __u32 event_id; /* from KFD */ 284 __u32 event_slot_index; /* from KFD */ 285 }; 286 287 struct kfd_ioctl_destroy_event_args { 288 __u32 event_id; /* to KFD */ 289 __u32 pad; 290 }; 291 292 struct kfd_ioctl_set_event_args { 293 __u32 event_id; /* to KFD */ 294 __u32 pad; 295 }; 296 297 struct kfd_ioctl_reset_event_args { 298 __u32 event_id; /* to KFD */ 299 __u32 pad; 300 }; 301 302 struct kfd_memory_exception_failure { 303 __u32 NotPresent; /* Page not present or supervisor privilege */ 304 __u32 ReadOnly; /* Write access to a read-only page */ 305 __u32 NoExecute; /* Execute access to a page marked NX */ 306 __u32 imprecise; /* Can't determine the exact fault address */ 307 }; 308 309 /* memory exception data */ 310 struct kfd_hsa_memory_exception_data { 311 struct kfd_memory_exception_failure failure; 312 __u64 va; 313 __u32 gpu_id; 314 __u32 ErrorType; /* 0 = no RAS error, 315 * 1 = ECC_SRAM, 316 * 2 = Link_SYNFLOOD (poison), 317 * 3 = GPU hang (not attributable to a specific cause), 318 * other values reserved 319 */ 320 }; 321 322 /* hw exception data */ 323 struct kfd_hsa_hw_exception_data { 324 __u32 reset_type; 325 __u32 reset_cause; 326 __u32 memory_lost; 327 __u32 gpu_id; 328 }; 329 330 /* hsa signal event data */ 331 struct kfd_hsa_signal_event_data { 332 __u64 last_event_age; /* to and from KFD */ 333 }; 334 335 /* Event data */ 336 struct kfd_event_data { 337 union { 338 /* From KFD */ 339 struct kfd_hsa_memory_exception_data memory_exception_data; 340 struct kfd_hsa_hw_exception_data hw_exception_data; 341 /* To and From KFD */ 342 struct kfd_hsa_signal_event_data signal_event_data; 343 }; 344 __u64 kfd_event_data_ext; /* pointer to an extension structure 345 for future exception types */ 346 __u32 event_id; /* to KFD */ 347 __u32 pad; 348 }; 349 350 struct kfd_ioctl_wait_events_args { 351 __u64 events_ptr; /* pointed to struct 352 kfd_event_data array, to KFD */ 353 __u32 num_events; /* to KFD */ 354 __u32 wait_for_all; /* to KFD */ 355 __u32 timeout; /* to KFD */ 356 __u32 wait_result; /* from KFD */ 357 }; 358 359 struct kfd_ioctl_set_scratch_backing_va_args { 360 __u64 va_addr; /* to KFD */ 361 __u32 gpu_id; /* to KFD */ 362 __u32 pad; 363 }; 364 365 struct kfd_ioctl_get_tile_config_args { 366 /* to KFD: pointer to tile array */ 367 __u64 tile_config_ptr; 368 /* to KFD: pointer to macro tile array */ 369 __u64 macro_tile_config_ptr; 370 /* to KFD: array size allocated by user mode 371 * from KFD: array size filled by kernel 372 */ 373 __u32 num_tile_configs; 374 /* to KFD: array size allocated by user mode 375 * from KFD: array size filled by kernel 376 */ 377 __u32 num_macro_tile_configs; 378 379 __u32 gpu_id; /* to KFD */ 380 __u32 gb_addr_config; /* from KFD */ 381 __u32 num_banks; /* from KFD */ 382 __u32 num_ranks; /* from KFD */ 383 /* struct size can be extended later if needed 384 * without breaking ABI compatibility 385 */ 386 }; 387 388 struct kfd_ioctl_set_trap_handler_args { 389 __u64 tba_addr; /* to KFD */ 390 __u64 tma_addr; /* to KFD */ 391 __u32 gpu_id; /* to KFD */ 392 __u32 pad; 393 }; 394 395 struct kfd_ioctl_acquire_vm_args { 396 __u32 drm_fd; /* to KFD */ 397 __u32 gpu_id; /* to KFD */ 398 }; 399 400 /* Allocation flags: memory types */ 401 #define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0) 402 #define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1) 403 #define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2) 404 #define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3) 405 #define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP (1 << 4) 406 /* Allocation flags: attributes/access options */ 407 #define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31) 408 #define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30) 409 #define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29) 410 #define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28) 411 #define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27) 412 #define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26) 413 #define KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED (1 << 25) 414 #define KFD_IOC_ALLOC_MEM_FLAGS_EXT_COHERENT (1 << 24) 415 #define KFD_IOC_ALLOC_MEM_FLAGS_CONTIGUOUS (1 << 23) 416 417 /* Allocate memory for later SVM (shared virtual memory) mapping. 418 * 419 * @va_addr: virtual address of the memory to be allocated 420 * all later mappings on all GPUs will use this address 421 * @size: size in bytes 422 * @handle: buffer handle returned to user mode, used to refer to 423 * this allocation for mapping, unmapping and freeing 424 * @mmap_offset: for CPU-mapping the allocation by mmapping a render node 425 * for userptrs this is overloaded to specify the CPU address 426 * @gpu_id: device identifier 427 * @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above 428 */ 429 struct kfd_ioctl_alloc_memory_of_gpu_args { 430 __u64 va_addr; /* to KFD */ 431 __u64 size; /* to KFD */ 432 __u64 handle; /* from KFD */ 433 __u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */ 434 __u32 gpu_id; /* to KFD */ 435 __u32 flags; 436 }; 437 438 /* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu 439 * 440 * @handle: memory handle returned by alloc 441 */ 442 struct kfd_ioctl_free_memory_of_gpu_args { 443 __u64 handle; /* to KFD */ 444 }; 445 446 /* Map memory to one or more GPUs 447 * 448 * @handle: memory handle returned by alloc 449 * @device_ids_array_ptr: array of gpu_ids (__u32 per device) 450 * @n_devices: number of devices in the array 451 * @n_success: number of devices mapped successfully 452 * 453 * @n_success returns information to the caller how many devices from 454 * the start of the array have mapped the buffer successfully. It can 455 * be passed into a subsequent retry call to skip those devices. For 456 * the first call the caller should initialize it to 0. 457 * 458 * If the ioctl completes with return code 0 (success), n_success == 459 * n_devices. 460 */ 461 struct kfd_ioctl_map_memory_to_gpu_args { 462 __u64 handle; /* to KFD */ 463 __u64 device_ids_array_ptr; /* to KFD */ 464 __u32 n_devices; /* to KFD */ 465 __u32 n_success; /* to/from KFD */ 466 }; 467 468 /* Unmap memory from one or more GPUs 469 * 470 * same arguments as for mapping 471 */ 472 struct kfd_ioctl_unmap_memory_from_gpu_args { 473 __u64 handle; /* to KFD */ 474 __u64 device_ids_array_ptr; /* to KFD */ 475 __u32 n_devices; /* to KFD */ 476 __u32 n_success; /* to/from KFD */ 477 }; 478 479 /* Allocate GWS for specific queue 480 * 481 * @queue_id: queue's id that GWS is allocated for 482 * @num_gws: how many GWS to allocate 483 * @first_gws: index of the first GWS allocated. 484 * only support contiguous GWS allocation 485 */ 486 struct kfd_ioctl_alloc_queue_gws_args { 487 __u32 queue_id; /* to KFD */ 488 __u32 num_gws; /* to KFD */ 489 __u32 first_gws; /* from KFD */ 490 __u32 pad; 491 }; 492 493 struct kfd_ioctl_get_dmabuf_info_args { 494 __u64 size; /* from KFD */ 495 __u64 metadata_ptr; /* to KFD */ 496 __u32 metadata_size; /* to KFD (space allocated by user) 497 * from KFD (actual metadata size) 498 */ 499 __u32 gpu_id; /* from KFD */ 500 __u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */ 501 __u32 dmabuf_fd; /* to KFD */ 502 }; 503 504 struct kfd_ioctl_import_dmabuf_args { 505 __u64 va_addr; /* to KFD */ 506 __u64 handle; /* from KFD */ 507 __u32 gpu_id; /* to KFD */ 508 __u32 dmabuf_fd; /* to KFD */ 509 }; 510 511 struct kfd_ioctl_export_dmabuf_args { 512 __u64 handle; /* to KFD */ 513 __u32 flags; /* to KFD */ 514 __u32 dmabuf_fd; /* from KFD */ 515 }; 516 517 /* 518 * KFD SMI(System Management Interface) events 519 */ 520 enum kfd_smi_event { 521 KFD_SMI_EVENT_NONE = 0, /* not used */ 522 KFD_SMI_EVENT_VMFAULT = 1, /* event start counting at 1 */ 523 KFD_SMI_EVENT_THERMAL_THROTTLE = 2, 524 KFD_SMI_EVENT_GPU_PRE_RESET = 3, 525 KFD_SMI_EVENT_GPU_POST_RESET = 4, 526 KFD_SMI_EVENT_MIGRATE_START = 5, 527 KFD_SMI_EVENT_MIGRATE_END = 6, 528 KFD_SMI_EVENT_PAGE_FAULT_START = 7, 529 KFD_SMI_EVENT_PAGE_FAULT_END = 8, 530 KFD_SMI_EVENT_QUEUE_EVICTION = 9, 531 KFD_SMI_EVENT_QUEUE_RESTORE = 10, 532 KFD_SMI_EVENT_UNMAP_FROM_GPU = 11, 533 534 /* 535 * max event number, as a flag bit to get events from all processes, 536 * this requires super user permission, otherwise will not be able to 537 * receive event from any process. Without this flag to receive events 538 * from same process. 539 */ 540 KFD_SMI_EVENT_ALL_PROCESS = 64 541 }; 542 543 enum KFD_MIGRATE_TRIGGERS { 544 KFD_MIGRATE_TRIGGER_PREFETCH, 545 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 546 KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU, 547 KFD_MIGRATE_TRIGGER_TTM_EVICTION 548 }; 549 550 enum KFD_QUEUE_EVICTION_TRIGGERS { 551 KFD_QUEUE_EVICTION_TRIGGER_SVM, 552 KFD_QUEUE_EVICTION_TRIGGER_USERPTR, 553 KFD_QUEUE_EVICTION_TRIGGER_TTM, 554 KFD_QUEUE_EVICTION_TRIGGER_SUSPEND, 555 KFD_QUEUE_EVICTION_CRIU_CHECKPOINT, 556 KFD_QUEUE_EVICTION_CRIU_RESTORE 557 }; 558 559 enum KFD_SVM_UNMAP_TRIGGERS { 560 KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY, 561 KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE, 562 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU 563 }; 564 565 #define KFD_SMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1)) 566 #define KFD_SMI_EVENT_MSG_SIZE 96 567 568 struct kfd_ioctl_smi_events_args { 569 __u32 gpuid; /* to KFD */ 570 __u32 anon_fd; /* from KFD */ 571 }; 572 573 /************************************************************************************************** 574 * CRIU IOCTLs (Checkpoint Restore In Userspace) 575 * 576 * When checkpointing a process, the userspace application will perform: 577 * 1. PROCESS_INFO op to determine current process information. This pauses execution and evicts 578 * all the queues. 579 * 2. CHECKPOINT op to checkpoint process contents (BOs, queues, events, svm-ranges) 580 * 3. UNPAUSE op to un-evict all the queues 581 * 582 * When restoring a process, the CRIU userspace application will perform: 583 * 584 * 1. RESTORE op to restore process contents 585 * 2. RESUME op to start the process 586 * 587 * Note: Queues are forced into an evicted state after a successful PROCESS_INFO. User 588 * application needs to perform an UNPAUSE operation after calling PROCESS_INFO. 589 */ 590 591 enum kfd_criu_op { 592 KFD_CRIU_OP_PROCESS_INFO, 593 KFD_CRIU_OP_CHECKPOINT, 594 KFD_CRIU_OP_UNPAUSE, 595 KFD_CRIU_OP_RESTORE, 596 KFD_CRIU_OP_RESUME, 597 }; 598 599 /** 600 * kfd_ioctl_criu_args - Arguments perform CRIU operation 601 * @devices: [in/out] User pointer to memory location for devices information. 602 * This is an array of type kfd_criu_device_bucket. 603 * @bos: [in/out] User pointer to memory location for BOs information 604 * This is an array of type kfd_criu_bo_bucket. 605 * @priv_data: [in/out] User pointer to memory location for private data 606 * @priv_data_size: [in/out] Size of priv_data in bytes 607 * @num_devices: [in/out] Number of GPUs used by process. Size of @devices array. 608 * @num_bos [in/out] Number of BOs used by process. Size of @bos array. 609 * @num_objects: [in/out] Number of objects used by process. Objects are opaque to 610 * user application. 611 * @pid: [in/out] PID of the process being checkpointed 612 * @op [in] Type of operation (kfd_criu_op) 613 * 614 * Return: 0 on success, -errno on failure 615 */ 616 struct kfd_ioctl_criu_args { 617 __u64 devices; /* Used during ops: CHECKPOINT, RESTORE */ 618 __u64 bos; /* Used during ops: CHECKPOINT, RESTORE */ 619 __u64 priv_data; /* Used during ops: CHECKPOINT, RESTORE */ 620 __u64 priv_data_size; /* Used during ops: PROCESS_INFO, RESTORE */ 621 __u32 num_devices; /* Used during ops: PROCESS_INFO, RESTORE */ 622 __u32 num_bos; /* Used during ops: PROCESS_INFO, RESTORE */ 623 __u32 num_objects; /* Used during ops: PROCESS_INFO, RESTORE */ 624 __u32 pid; /* Used during ops: PROCESS_INFO, RESUME */ 625 __u32 op; 626 }; 627 628 struct kfd_criu_device_bucket { 629 __u32 user_gpu_id; 630 __u32 actual_gpu_id; 631 __u32 drm_fd; 632 __u32 pad; 633 }; 634 635 struct kfd_criu_bo_bucket { 636 __u64 addr; 637 __u64 size; 638 __u64 offset; 639 __u64 restored_offset; /* During restore, updated offset for BO */ 640 __u32 gpu_id; /* This is the user_gpu_id */ 641 __u32 alloc_flags; 642 __u32 dmabuf_fd; 643 __u32 pad; 644 }; 645 646 /* CRIU IOCTLs - END */ 647 /**************************************************************************************************/ 648 649 /* Register offset inside the remapped mmio page 650 */ 651 enum kfd_mmio_remap { 652 KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0, 653 KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4, 654 }; 655 656 /* Guarantee host access to memory */ 657 #define KFD_IOCTL_SVM_FLAG_HOST_ACCESS 0x00000001 658 /* Fine grained coherency between all devices with access */ 659 #define KFD_IOCTL_SVM_FLAG_COHERENT 0x00000002 660 /* Use any GPU in same hive as preferred device */ 661 #define KFD_IOCTL_SVM_FLAG_HIVE_LOCAL 0x00000004 662 /* GPUs only read, allows replication */ 663 #define KFD_IOCTL_SVM_FLAG_GPU_RO 0x00000008 664 /* Allow execution on GPU */ 665 #define KFD_IOCTL_SVM_FLAG_GPU_EXEC 0x00000010 666 /* GPUs mostly read, may allow similar optimizations as RO, but writes fault */ 667 #define KFD_IOCTL_SVM_FLAG_GPU_READ_MOSTLY 0x00000020 668 /* Keep GPU memory mapping always valid as if XNACK is disable */ 669 #define KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED 0x00000040 670 /* Fine grained coherency between all devices using device-scope atomics */ 671 #define KFD_IOCTL_SVM_FLAG_EXT_COHERENT 0x00000080 672 673 /** 674 * kfd_ioctl_svm_op - SVM ioctl operations 675 * 676 * @KFD_IOCTL_SVM_OP_SET_ATTR: Modify one or more attributes 677 * @KFD_IOCTL_SVM_OP_GET_ATTR: Query one or more attributes 678 */ 679 enum kfd_ioctl_svm_op { 680 KFD_IOCTL_SVM_OP_SET_ATTR, 681 KFD_IOCTL_SVM_OP_GET_ATTR 682 }; 683 684 /** kfd_ioctl_svm_location - Enum for preferred and prefetch locations 685 * 686 * GPU IDs are used to specify GPUs as preferred and prefetch locations. 687 * Below definitions are used for system memory or for leaving the preferred 688 * location unspecified. 689 */ 690 enum kfd_ioctl_svm_location { 691 KFD_IOCTL_SVM_LOCATION_SYSMEM = 0, 692 KFD_IOCTL_SVM_LOCATION_UNDEFINED = 0xffffffff 693 }; 694 695 /** 696 * kfd_ioctl_svm_attr_type - SVM attribute types 697 * 698 * @KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: gpuid of the preferred location, 0 for 699 * system memory 700 * @KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: gpuid of the prefetch location, 0 for 701 * system memory. Setting this triggers an 702 * immediate prefetch (migration). 703 * @KFD_IOCTL_SVM_ATTR_ACCESS: 704 * @KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 705 * @KFD_IOCTL_SVM_ATTR_NO_ACCESS: specify memory access for the gpuid given 706 * by the attribute value 707 * @KFD_IOCTL_SVM_ATTR_SET_FLAGS: bitmask of flags to set (see 708 * KFD_IOCTL_SVM_FLAG_...) 709 * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS: bitmask of flags to clear 710 * @KFD_IOCTL_SVM_ATTR_GRANULARITY: migration granularity 711 * (log2 num pages) 712 */ 713 enum kfd_ioctl_svm_attr_type { 714 KFD_IOCTL_SVM_ATTR_PREFERRED_LOC, 715 KFD_IOCTL_SVM_ATTR_PREFETCH_LOC, 716 KFD_IOCTL_SVM_ATTR_ACCESS, 717 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE, 718 KFD_IOCTL_SVM_ATTR_NO_ACCESS, 719 KFD_IOCTL_SVM_ATTR_SET_FLAGS, 720 KFD_IOCTL_SVM_ATTR_CLR_FLAGS, 721 KFD_IOCTL_SVM_ATTR_GRANULARITY 722 }; 723 724 /** 725 * kfd_ioctl_svm_attribute - Attributes as pairs of type and value 726 * 727 * The meaning of the @value depends on the attribute type. 728 * 729 * @type: attribute type (see enum @kfd_ioctl_svm_attr_type) 730 * @value: attribute value 731 */ 732 struct kfd_ioctl_svm_attribute { 733 __u32 type; 734 __u32 value; 735 }; 736 737 /** 738 * kfd_ioctl_svm_args - Arguments for SVM ioctl 739 * 740 * @op specifies the operation to perform (see enum 741 * @kfd_ioctl_svm_op). @start_addr and @size are common for all 742 * operations. 743 * 744 * A variable number of attributes can be given in @attrs. 745 * @nattr specifies the number of attributes. New attributes can be 746 * added in the future without breaking the ABI. If unknown attributes 747 * are given, the function returns -EINVAL. 748 * 749 * @KFD_IOCTL_SVM_OP_SET_ATTR sets attributes for a virtual address 750 * range. It may overlap existing virtual address ranges. If it does, 751 * the existing ranges will be split such that the attribute changes 752 * only apply to the specified address range. 753 * 754 * @KFD_IOCTL_SVM_OP_GET_ATTR returns the intersection of attributes 755 * over all memory in the given range and returns the result as the 756 * attribute value. If different pages have different preferred or 757 * prefetch locations, 0xffffffff will be returned for 758 * @KFD_IOCTL_SVM_ATTR_PREFERRED_LOC or 759 * @KFD_IOCTL_SVM_ATTR_PREFETCH_LOC resepctively. For 760 * @KFD_IOCTL_SVM_ATTR_SET_FLAGS, flags of all pages will be 761 * aggregated by bitwise AND. That means, a flag will be set in the 762 * output, if that flag is set for all pages in the range. For 763 * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS, flags of all pages will be 764 * aggregated by bitwise NOR. That means, a flag will be set in the 765 * output, if that flag is clear for all pages in the range. 766 * The minimum migration granularity throughout the range will be 767 * returned for @KFD_IOCTL_SVM_ATTR_GRANULARITY. 768 * 769 * Querying of accessibility attributes works by initializing the 770 * attribute type to @KFD_IOCTL_SVM_ATTR_ACCESS and the value to the 771 * GPUID being queried. Multiple attributes can be given to allow 772 * querying multiple GPUIDs. The ioctl function overwrites the 773 * attribute type to indicate the access for the specified GPU. 774 */ 775 struct kfd_ioctl_svm_args { 776 __u64 start_addr; 777 __u64 size; 778 __u32 op; 779 __u32 nattr; 780 /* Variable length array of attributes */ 781 struct kfd_ioctl_svm_attribute attrs[]; 782 }; 783 784 /** 785 * kfd_ioctl_set_xnack_mode_args - Arguments for set_xnack_mode 786 * 787 * @xnack_enabled: [in/out] Whether to enable XNACK mode for this process 788 * 789 * @xnack_enabled indicates whether recoverable page faults should be 790 * enabled for the current process. 0 means disabled, positive means 791 * enabled, negative means leave unchanged. If enabled, virtual address 792 * translations on GFXv9 and later AMD GPUs can return XNACK and retry 793 * the access until a valid PTE is available. This is used to implement 794 * device page faults. 795 * 796 * On output, @xnack_enabled returns the (new) current mode (0 or 797 * positive). Therefore, a negative input value can be used to query 798 * the current mode without changing it. 799 * 800 * The XNACK mode fundamentally changes the way SVM managed memory works 801 * in the driver, with subtle effects on application performance and 802 * functionality. 803 * 804 * Enabling XNACK mode requires shader programs to be compiled 805 * differently. Furthermore, not all GPUs support changing the mode 806 * per-process. Therefore changing the mode is only allowed while no 807 * user mode queues exist in the process. This ensure that no shader 808 * code is running that may be compiled for the wrong mode. And GPUs 809 * that cannot change to the requested mode will prevent the XNACK 810 * mode from occurring. All GPUs used by the process must be in the 811 * same XNACK mode. 812 * 813 * GFXv8 or older GPUs do not support 48 bit virtual addresses or SVM. 814 * Therefore those GPUs are not considered for the XNACK mode switch. 815 * 816 * Return: 0 on success, -errno on failure 817 */ 818 struct kfd_ioctl_set_xnack_mode_args { 819 __s32 xnack_enabled; 820 }; 821 822 /* Wave launch override modes */ 823 enum kfd_dbg_trap_override_mode { 824 KFD_DBG_TRAP_OVERRIDE_OR = 0, 825 KFD_DBG_TRAP_OVERRIDE_REPLACE = 1 826 }; 827 828 /* Wave launch overrides */ 829 enum kfd_dbg_trap_mask { 830 KFD_DBG_TRAP_MASK_FP_INVALID = 1, 831 KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL = 2, 832 KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO = 4, 833 KFD_DBG_TRAP_MASK_FP_OVERFLOW = 8, 834 KFD_DBG_TRAP_MASK_FP_UNDERFLOW = 16, 835 KFD_DBG_TRAP_MASK_FP_INEXACT = 32, 836 KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO = 64, 837 KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH = 128, 838 KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION = 256, 839 KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_START = (1 << 30), 840 KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_END = (1 << 31) 841 }; 842 843 /* Wave launch modes */ 844 enum kfd_dbg_trap_wave_launch_mode { 845 KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL = 0, 846 KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT = 1, 847 KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG = 3 848 }; 849 850 /* Address watch modes */ 851 enum kfd_dbg_trap_address_watch_mode { 852 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_READ = 0, 853 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_NONREAD = 1, 854 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ATOMIC = 2, 855 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ALL = 3 856 }; 857 858 /* Additional wave settings */ 859 enum kfd_dbg_trap_flags { 860 KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP = 1, 861 KFD_DBG_TRAP_FLAG_SINGLE_ALU_OP = 2, 862 }; 863 864 /* Trap exceptions */ 865 enum kfd_dbg_trap_exception_code { 866 EC_NONE = 0, 867 /* per queue */ 868 EC_QUEUE_WAVE_ABORT = 1, 869 EC_QUEUE_WAVE_TRAP = 2, 870 EC_QUEUE_WAVE_MATH_ERROR = 3, 871 EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION = 4, 872 EC_QUEUE_WAVE_MEMORY_VIOLATION = 5, 873 EC_QUEUE_WAVE_APERTURE_VIOLATION = 6, 874 EC_QUEUE_PACKET_DISPATCH_DIM_INVALID = 16, 875 EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID = 17, 876 EC_QUEUE_PACKET_DISPATCH_CODE_INVALID = 18, 877 EC_QUEUE_PACKET_RESERVED = 19, 878 EC_QUEUE_PACKET_UNSUPPORTED = 20, 879 EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID = 21, 880 EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID = 22, 881 EC_QUEUE_PACKET_VENDOR_UNSUPPORTED = 23, 882 EC_QUEUE_PREEMPTION_ERROR = 30, 883 EC_QUEUE_NEW = 31, 884 /* per device */ 885 EC_DEVICE_QUEUE_DELETE = 32, 886 EC_DEVICE_MEMORY_VIOLATION = 33, 887 EC_DEVICE_RAS_ERROR = 34, 888 EC_DEVICE_FATAL_HALT = 35, 889 EC_DEVICE_NEW = 36, 890 /* per process */ 891 EC_PROCESS_RUNTIME = 48, 892 EC_PROCESS_DEVICE_REMOVE = 49, 893 EC_MAX 894 }; 895 896 /* Mask generated by ecode in kfd_dbg_trap_exception_code */ 897 #define KFD_EC_MASK(ecode) (1ULL << (ecode - 1)) 898 899 /* Masks for exception code type checks below */ 900 #define KFD_EC_MASK_QUEUE (KFD_EC_MASK(EC_QUEUE_WAVE_ABORT) | \ 901 KFD_EC_MASK(EC_QUEUE_WAVE_TRAP) | \ 902 KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR) | \ 903 KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION) | \ 904 KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION) | \ 905 KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION) | \ 906 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) | \ 907 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) | \ 908 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) | \ 909 KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) | \ 910 KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) | \ 911 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) | \ 912 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) | \ 913 KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED) | \ 914 KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR) | \ 915 KFD_EC_MASK(EC_QUEUE_NEW)) 916 #define KFD_EC_MASK_DEVICE (KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE) | \ 917 KFD_EC_MASK(EC_DEVICE_RAS_ERROR) | \ 918 KFD_EC_MASK(EC_DEVICE_FATAL_HALT) | \ 919 KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION) | \ 920 KFD_EC_MASK(EC_DEVICE_NEW)) 921 #define KFD_EC_MASK_PROCESS (KFD_EC_MASK(EC_PROCESS_RUNTIME) | \ 922 KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE)) 923 #define KFD_EC_MASK_PACKET (KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) | \ 924 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) | \ 925 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) | \ 926 KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) | \ 927 KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) | \ 928 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) | \ 929 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) | \ 930 KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED)) 931 932 /* Checks for exception code types for KFD search */ 933 #define KFD_DBG_EC_IS_VALID(ecode) (ecode > EC_NONE && ecode < EC_MAX) 934 #define KFD_DBG_EC_TYPE_IS_QUEUE(ecode) \ 935 (KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_QUEUE)) 936 #define KFD_DBG_EC_TYPE_IS_DEVICE(ecode) \ 937 (KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_DEVICE)) 938 #define KFD_DBG_EC_TYPE_IS_PROCESS(ecode) \ 939 (KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS)) 940 #define KFD_DBG_EC_TYPE_IS_PACKET(ecode) \ 941 (KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_PACKET)) 942 943 944 /* Runtime enable states */ 945 enum kfd_dbg_runtime_state { 946 DEBUG_RUNTIME_STATE_DISABLED = 0, 947 DEBUG_RUNTIME_STATE_ENABLED = 1, 948 DEBUG_RUNTIME_STATE_ENABLED_BUSY = 2, 949 DEBUG_RUNTIME_STATE_ENABLED_ERROR = 3 950 }; 951 952 /* Runtime enable status */ 953 struct kfd_runtime_info { 954 __u64 r_debug; 955 __u32 runtime_state; 956 __u32 ttmp_setup; 957 }; 958 959 /* Enable modes for runtime enable */ 960 #define KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK 1 961 #define KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK 2 962 963 /** 964 * kfd_ioctl_runtime_enable_args - Arguments for runtime enable 965 * 966 * Coordinates debug exception signalling and debug device enablement with runtime. 967 * 968 * @r_debug - pointer to user struct for sharing information between ROCr and the debuggger 969 * @mode_mask - mask to set mode 970 * KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK - enable runtime for debugging, otherwise disable 971 * KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK - enable trap temporary setup (ignore on disable) 972 * @capabilities_mask - mask to notify runtime on what KFD supports 973 * 974 * Return - 0 on SUCCESS. 975 * - EBUSY if runtime enable call already pending. 976 * - EEXIST if user queues already active prior to call. 977 * If process is debug enabled, runtime enable will enable debug devices and 978 * wait for debugger process to send runtime exception EC_PROCESS_RUNTIME 979 * to unblock - see kfd_ioctl_dbg_trap_args. 980 * 981 */ 982 struct kfd_ioctl_runtime_enable_args { 983 __u64 r_debug; 984 __u32 mode_mask; 985 __u32 capabilities_mask; 986 }; 987 988 /* Queue information */ 989 struct kfd_queue_snapshot_entry { 990 __u64 exception_status; 991 __u64 ring_base_address; 992 __u64 write_pointer_address; 993 __u64 read_pointer_address; 994 __u64 ctx_save_restore_address; 995 __u32 queue_id; 996 __u32 gpu_id; 997 __u32 ring_size; 998 __u32 queue_type; 999 __u32 ctx_save_restore_area_size; 1000 __u32 reserved; 1001 }; 1002 1003 /* Queue status return for suspend/resume */ 1004 #define KFD_DBG_QUEUE_ERROR_BIT 30 1005 #define KFD_DBG_QUEUE_INVALID_BIT 31 1006 #define KFD_DBG_QUEUE_ERROR_MASK (1 << KFD_DBG_QUEUE_ERROR_BIT) 1007 #define KFD_DBG_QUEUE_INVALID_MASK (1 << KFD_DBG_QUEUE_INVALID_BIT) 1008 1009 /* Context save area header information */ 1010 struct kfd_context_save_area_header { 1011 struct { 1012 __u32 control_stack_offset; 1013 __u32 control_stack_size; 1014 __u32 wave_state_offset; 1015 __u32 wave_state_size; 1016 } wave_state; 1017 __u32 debug_offset; 1018 __u32 debug_size; 1019 __u64 err_payload_addr; 1020 __u32 err_event_id; 1021 __u32 reserved1; 1022 }; 1023 1024 /* 1025 * Debug operations 1026 * 1027 * For specifics on usage and return values, see documentation per operation 1028 * below. Otherwise, generic error returns apply: 1029 * - ESRCH if the process to debug does not exist. 1030 * 1031 * - EINVAL (with KFD_IOC_DBG_TRAP_ENABLE exempt) if operation 1032 * KFD_IOC_DBG_TRAP_ENABLE has not succeeded prior. 1033 * Also returns this error if GPU hardware scheduling is not supported. 1034 * 1035 * - EPERM (with KFD_IOC_DBG_TRAP_DISABLE exempt) if target process is not 1036 * PTRACE_ATTACHED. KFD_IOC_DBG_TRAP_DISABLE is exempt to allow 1037 * clean up of debug mode as long as process is debug enabled. 1038 * 1039 * - EACCES if any DBG_HW_OP (debug hardware operation) is requested when 1040 * AMDKFD_IOC_RUNTIME_ENABLE has not succeeded prior. 1041 * 1042 * - ENODEV if any GPU does not support debugging on a DBG_HW_OP call. 1043 * 1044 * - Other errors may be returned when a DBG_HW_OP occurs while the GPU 1045 * is in a fatal state. 1046 * 1047 */ 1048 enum kfd_dbg_trap_operations { 1049 KFD_IOC_DBG_TRAP_ENABLE = 0, 1050 KFD_IOC_DBG_TRAP_DISABLE = 1, 1051 KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT = 2, 1052 KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED = 3, 1053 KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE = 4, /* DBG_HW_OP */ 1054 KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE = 5, /* DBG_HW_OP */ 1055 KFD_IOC_DBG_TRAP_SUSPEND_QUEUES = 6, /* DBG_HW_OP */ 1056 KFD_IOC_DBG_TRAP_RESUME_QUEUES = 7, /* DBG_HW_OP */ 1057 KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH = 8, /* DBG_HW_OP */ 1058 KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH = 9, /* DBG_HW_OP */ 1059 KFD_IOC_DBG_TRAP_SET_FLAGS = 10, 1060 KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT = 11, 1061 KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO = 12, 1062 KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT = 13, 1063 KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT = 14 1064 }; 1065 1066 /** 1067 * kfd_ioctl_dbg_trap_enable_args 1068 * 1069 * Arguments for KFD_IOC_DBG_TRAP_ENABLE. 1070 * 1071 * Enables debug session for target process. Call @op KFD_IOC_DBG_TRAP_DISABLE in 1072 * kfd_ioctl_dbg_trap_args to disable debug session. 1073 * 1074 * @exception_mask (IN) - exceptions to raise to the debugger 1075 * @rinfo_ptr (IN) - pointer to runtime info buffer (see kfd_runtime_info) 1076 * @rinfo_size (IN/OUT) - size of runtime info buffer in bytes 1077 * @dbg_fd (IN) - fd the KFD will nofify the debugger with of raised 1078 * exceptions set in exception_mask. 1079 * 1080 * Generic errors apply (see kfd_dbg_trap_operations). 1081 * Return - 0 on SUCCESS. 1082 * Copies KFD saved kfd_runtime_info to @rinfo_ptr on enable. 1083 * Size of kfd_runtime saved by the KFD returned to @rinfo_size. 1084 * - EBADF if KFD cannot get a reference to dbg_fd. 1085 * - EFAULT if KFD cannot copy runtime info to rinfo_ptr. 1086 * - EINVAL if target process is already debug enabled. 1087 * 1088 */ 1089 struct kfd_ioctl_dbg_trap_enable_args { 1090 __u64 exception_mask; 1091 __u64 rinfo_ptr; 1092 __u32 rinfo_size; 1093 __u32 dbg_fd; 1094 }; 1095 1096 /** 1097 * kfd_ioctl_dbg_trap_send_runtime_event_args 1098 * 1099 * 1100 * Arguments for KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT. 1101 * Raises exceptions to runtime. 1102 * 1103 * @exception_mask (IN) - exceptions to raise to runtime 1104 * @gpu_id (IN) - target device id 1105 * @queue_id (IN) - target queue id 1106 * 1107 * Generic errors apply (see kfd_dbg_trap_operations). 1108 * Return - 0 on SUCCESS. 1109 * - ENODEV if gpu_id not found. 1110 * If exception_mask contains EC_PROCESS_RUNTIME, unblocks pending 1111 * AMDKFD_IOC_RUNTIME_ENABLE call - see kfd_ioctl_runtime_enable_args. 1112 * All other exceptions are raised to runtime through err_payload_addr. 1113 * See kfd_context_save_area_header. 1114 */ 1115 struct kfd_ioctl_dbg_trap_send_runtime_event_args { 1116 __u64 exception_mask; 1117 __u32 gpu_id; 1118 __u32 queue_id; 1119 }; 1120 1121 /** 1122 * kfd_ioctl_dbg_trap_set_exceptions_enabled_args 1123 * 1124 * Arguments for KFD_IOC_SET_EXCEPTIONS_ENABLED 1125 * Set new exceptions to be raised to the debugger. 1126 * 1127 * @exception_mask (IN) - new exceptions to raise the debugger 1128 * 1129 * Generic errors apply (see kfd_dbg_trap_operations). 1130 * Return - 0 on SUCCESS. 1131 */ 1132 struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args { 1133 __u64 exception_mask; 1134 }; 1135 1136 /** 1137 * kfd_ioctl_dbg_trap_set_wave_launch_override_args 1138 * 1139 * Arguments for KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE 1140 * Enable HW exceptions to raise trap. 1141 * 1142 * @override_mode (IN) - see kfd_dbg_trap_override_mode 1143 * @enable_mask (IN/OUT) - reference kfd_dbg_trap_mask. 1144 * IN is the override modes requested to be enabled. 1145 * OUT is referenced in Return below. 1146 * @support_request_mask (IN/OUT) - reference kfd_dbg_trap_mask. 1147 * IN is the override modes requested for support check. 1148 * OUT is referenced in Return below. 1149 * 1150 * Generic errors apply (see kfd_dbg_trap_operations). 1151 * Return - 0 on SUCCESS. 1152 * Previous enablement is returned in @enable_mask. 1153 * Actual override support is returned in @support_request_mask. 1154 * - EINVAL if override mode is not supported. 1155 * - EACCES if trap support requested is not actually supported. 1156 * i.e. enable_mask (IN) is not a subset of support_request_mask (OUT). 1157 * Otherwise it is considered a generic error (see kfd_dbg_trap_operations). 1158 */ 1159 struct kfd_ioctl_dbg_trap_set_wave_launch_override_args { 1160 __u32 override_mode; 1161 __u32 enable_mask; 1162 __u32 support_request_mask; 1163 __u32 pad; 1164 }; 1165 1166 /** 1167 * kfd_ioctl_dbg_trap_set_wave_launch_mode_args 1168 * 1169 * Arguments for KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE 1170 * Set wave launch mode. 1171 * 1172 * @mode (IN) - see kfd_dbg_trap_wave_launch_mode 1173 * 1174 * Generic errors apply (see kfd_dbg_trap_operations). 1175 * Return - 0 on SUCCESS. 1176 */ 1177 struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args { 1178 __u32 launch_mode; 1179 __u32 pad; 1180 }; 1181 1182 /** 1183 * kfd_ioctl_dbg_trap_suspend_queues_ags 1184 * 1185 * Arguments for KFD_IOC_DBG_TRAP_SUSPEND_QUEUES 1186 * Suspend queues. 1187 * 1188 * @exception_mask (IN) - raised exceptions to clear 1189 * @queue_array_ptr (IN) - pointer to array of queue ids (u32 per queue id) 1190 * to suspend 1191 * @num_queues (IN) - number of queues to suspend in @queue_array_ptr 1192 * @grace_period (IN) - wave time allowance before preemption 1193 * per 1K GPU clock cycle unit 1194 * 1195 * Generic errors apply (see kfd_dbg_trap_operations). 1196 * Destruction of a suspended queue is blocked until the queue is 1197 * resumed. This allows the debugger to access queue information and 1198 * the its context save area without running into a race condition on 1199 * queue destruction. 1200 * Automatically copies per queue context save area header information 1201 * into the save area base 1202 * (see kfd_queue_snapshot_entry and kfd_context_save_area_header). 1203 * 1204 * Return - Number of queues suspended on SUCCESS. 1205 * . KFD_DBG_QUEUE_ERROR_MASK and KFD_DBG_QUEUE_INVALID_MASK masked 1206 * for each queue id in @queue_array_ptr array reports unsuccessful 1207 * suspend reason. 1208 * KFD_DBG_QUEUE_ERROR_MASK = HW failure. 1209 * KFD_DBG_QUEUE_INVALID_MASK = queue does not exist, is new or 1210 * is being destroyed. 1211 */ 1212 struct kfd_ioctl_dbg_trap_suspend_queues_args { 1213 __u64 exception_mask; 1214 __u64 queue_array_ptr; 1215 __u32 num_queues; 1216 __u32 grace_period; 1217 }; 1218 1219 /** 1220 * kfd_ioctl_dbg_trap_resume_queues_args 1221 * 1222 * Arguments for KFD_IOC_DBG_TRAP_RESUME_QUEUES 1223 * Resume queues. 1224 * 1225 * @queue_array_ptr (IN) - pointer to array of queue ids (u32 per queue id) 1226 * to resume 1227 * @num_queues (IN) - number of queues to resume in @queue_array_ptr 1228 * 1229 * Generic errors apply (see kfd_dbg_trap_operations). 1230 * Return - Number of queues resumed on SUCCESS. 1231 * KFD_DBG_QUEUE_ERROR_MASK and KFD_DBG_QUEUE_INVALID_MASK mask 1232 * for each queue id in @queue_array_ptr array reports unsuccessful 1233 * resume reason. 1234 * KFD_DBG_QUEUE_ERROR_MASK = HW failure. 1235 * KFD_DBG_QUEUE_INVALID_MASK = queue does not exist. 1236 */ 1237 struct kfd_ioctl_dbg_trap_resume_queues_args { 1238 __u64 queue_array_ptr; 1239 __u32 num_queues; 1240 __u32 pad; 1241 }; 1242 1243 /** 1244 * kfd_ioctl_dbg_trap_set_node_address_watch_args 1245 * 1246 * Arguments for KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH 1247 * Sets address watch for device. 1248 * 1249 * @address (IN) - watch address to set 1250 * @mode (IN) - see kfd_dbg_trap_address_watch_mode 1251 * @mask (IN) - watch address mask 1252 * @gpu_id (IN) - target gpu to set watch point 1253 * @id (OUT) - watch id allocated 1254 * 1255 * Generic errors apply (see kfd_dbg_trap_operations). 1256 * Return - 0 on SUCCESS. 1257 * Allocated watch ID returned to @id. 1258 * - ENODEV if gpu_id not found. 1259 * - ENOMEM if watch IDs can be allocated 1260 */ 1261 struct kfd_ioctl_dbg_trap_set_node_address_watch_args { 1262 __u64 address; 1263 __u32 mode; 1264 __u32 mask; 1265 __u32 gpu_id; 1266 __u32 id; 1267 }; 1268 1269 /** 1270 * kfd_ioctl_dbg_trap_clear_node_address_watch_args 1271 * 1272 * Arguments for KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH 1273 * Clear address watch for device. 1274 * 1275 * @gpu_id (IN) - target device to clear watch point 1276 * @id (IN) - allocated watch id to clear 1277 * 1278 * Generic errors apply (see kfd_dbg_trap_operations). 1279 * Return - 0 on SUCCESS. 1280 * - ENODEV if gpu_id not found. 1281 * - EINVAL if watch ID has not been allocated. 1282 */ 1283 struct kfd_ioctl_dbg_trap_clear_node_address_watch_args { 1284 __u32 gpu_id; 1285 __u32 id; 1286 }; 1287 1288 /** 1289 * kfd_ioctl_dbg_trap_set_flags_args 1290 * 1291 * Arguments for KFD_IOC_DBG_TRAP_SET_FLAGS 1292 * Sets flags for wave behaviour. 1293 * 1294 * @flags (IN/OUT) - IN = flags to enable, OUT = flags previously enabled 1295 * 1296 * Generic errors apply (see kfd_dbg_trap_operations). 1297 * Return - 0 on SUCCESS. 1298 * - EACCESS if any debug device does not allow flag options. 1299 */ 1300 struct kfd_ioctl_dbg_trap_set_flags_args { 1301 __u32 flags; 1302 __u32 pad; 1303 }; 1304 1305 /** 1306 * kfd_ioctl_dbg_trap_query_debug_event_args 1307 * 1308 * Arguments for KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT 1309 * 1310 * Find one or more raised exceptions. This function can return multiple 1311 * exceptions from a single queue or a single device with one call. To find 1312 * all raised exceptions, this function must be called repeatedly until it 1313 * returns -EAGAIN. Returned exceptions can optionally be cleared by 1314 * setting the corresponding bit in the @exception_mask input parameter. 1315 * However, clearing an exception prevents retrieving further information 1316 * about it with KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO. 1317 * 1318 * @exception_mask (IN/OUT) - exception to clear (IN) and raised (OUT) 1319 * @gpu_id (OUT) - gpu id of exceptions raised 1320 * @queue_id (OUT) - queue id of exceptions raised 1321 * 1322 * Generic errors apply (see kfd_dbg_trap_operations). 1323 * Return - 0 on raised exception found 1324 * Raised exceptions found are returned in @exception mask 1325 * with reported source id returned in @gpu_id or @queue_id. 1326 * - EAGAIN if no raised exception has been found 1327 */ 1328 struct kfd_ioctl_dbg_trap_query_debug_event_args { 1329 __u64 exception_mask; 1330 __u32 gpu_id; 1331 __u32 queue_id; 1332 }; 1333 1334 /** 1335 * kfd_ioctl_dbg_trap_query_exception_info_args 1336 * 1337 * Arguments KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO 1338 * Get additional info on raised exception. 1339 * 1340 * @info_ptr (IN) - pointer to exception info buffer to copy to 1341 * @info_size (IN/OUT) - exception info buffer size (bytes) 1342 * @source_id (IN) - target gpu or queue id 1343 * @exception_code (IN) - target exception 1344 * @clear_exception (IN) - clear raised @exception_code exception 1345 * (0 = false, 1 = true) 1346 * 1347 * Generic errors apply (see kfd_dbg_trap_operations). 1348 * Return - 0 on SUCCESS. 1349 * If @exception_code is EC_DEVICE_MEMORY_VIOLATION, copy @info_size(OUT) 1350 * bytes of memory exception data to @info_ptr. 1351 * If @exception_code is EC_PROCESS_RUNTIME, copy saved 1352 * kfd_runtime_info to @info_ptr. 1353 * Actual required @info_ptr size (bytes) is returned in @info_size. 1354 */ 1355 struct kfd_ioctl_dbg_trap_query_exception_info_args { 1356 __u64 info_ptr; 1357 __u32 info_size; 1358 __u32 source_id; 1359 __u32 exception_code; 1360 __u32 clear_exception; 1361 }; 1362 1363 /** 1364 * kfd_ioctl_dbg_trap_get_queue_snapshot_args 1365 * 1366 * Arguments KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT 1367 * Get queue information. 1368 * 1369 * @exception_mask (IN) - exceptions raised to clear 1370 * @snapshot_buf_ptr (IN) - queue snapshot entry buffer (see kfd_queue_snapshot_entry) 1371 * @num_queues (IN/OUT) - number of queue snapshot entries 1372 * The debugger specifies the size of the array allocated in @num_queues. 1373 * KFD returns the number of queues that actually existed. If this is 1374 * larger than the size specified by the debugger, KFD will not overflow 1375 * the array allocated by the debugger. 1376 * 1377 * @entry_size (IN/OUT) - size per entry in bytes 1378 * The debugger specifies sizeof(struct kfd_queue_snapshot_entry) in 1379 * @entry_size. KFD returns the number of bytes actually populated per 1380 * entry. The debugger should use the KFD_IOCTL_MINOR_VERSION to determine, 1381 * which fields in struct kfd_queue_snapshot_entry are valid. This allows 1382 * growing the ABI in a backwards compatible manner. 1383 * Note that entry_size(IN) should still be used to stride the snapshot buffer in the 1384 * event that it's larger than actual kfd_queue_snapshot_entry. 1385 * 1386 * Generic errors apply (see kfd_dbg_trap_operations). 1387 * Return - 0 on SUCCESS. 1388 * Copies @num_queues(IN) queue snapshot entries of size @entry_size(IN) 1389 * into @snapshot_buf_ptr if @num_queues(IN) > 0. 1390 * Otherwise return @num_queues(OUT) queue snapshot entries that exist. 1391 */ 1392 struct kfd_ioctl_dbg_trap_queue_snapshot_args { 1393 __u64 exception_mask; 1394 __u64 snapshot_buf_ptr; 1395 __u32 num_queues; 1396 __u32 entry_size; 1397 }; 1398 1399 /** 1400 * kfd_ioctl_dbg_trap_get_device_snapshot_args 1401 * 1402 * Arguments for KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT 1403 * Get device information. 1404 * 1405 * @exception_mask (IN) - exceptions raised to clear 1406 * @snapshot_buf_ptr (IN) - pointer to snapshot buffer (see kfd_dbg_device_info_entry) 1407 * @num_devices (IN/OUT) - number of debug devices to snapshot 1408 * The debugger specifies the size of the array allocated in @num_devices. 1409 * KFD returns the number of devices that actually existed. If this is 1410 * larger than the size specified by the debugger, KFD will not overflow 1411 * the array allocated by the debugger. 1412 * 1413 * @entry_size (IN/OUT) - size per entry in bytes 1414 * The debugger specifies sizeof(struct kfd_dbg_device_info_entry) in 1415 * @entry_size. KFD returns the number of bytes actually populated. The 1416 * debugger should use KFD_IOCTL_MINOR_VERSION to determine, which fields 1417 * in struct kfd_dbg_device_info_entry are valid. This allows growing the 1418 * ABI in a backwards compatible manner. 1419 * Note that entry_size(IN) should still be used to stride the snapshot buffer in the 1420 * event that it's larger than actual kfd_dbg_device_info_entry. 1421 * 1422 * Generic errors apply (see kfd_dbg_trap_operations). 1423 * Return - 0 on SUCCESS. 1424 * Copies @num_devices(IN) device snapshot entries of size @entry_size(IN) 1425 * into @snapshot_buf_ptr if @num_devices(IN) > 0. 1426 * Otherwise return @num_devices(OUT) queue snapshot entries that exist. 1427 */ 1428 struct kfd_ioctl_dbg_trap_device_snapshot_args { 1429 __u64 exception_mask; 1430 __u64 snapshot_buf_ptr; 1431 __u32 num_devices; 1432 __u32 entry_size; 1433 }; 1434 1435 /** 1436 * kfd_ioctl_dbg_trap_args 1437 * 1438 * Arguments to debug target process. 1439 * 1440 * @pid - target process to debug 1441 * @op - debug operation (see kfd_dbg_trap_operations) 1442 * 1443 * @op determines which union struct args to use. 1444 * Refer to kern docs for each kfd_ioctl_dbg_trap_*_args struct. 1445 */ 1446 struct kfd_ioctl_dbg_trap_args { 1447 __u32 pid; 1448 __u32 op; 1449 1450 union { 1451 struct kfd_ioctl_dbg_trap_enable_args enable; 1452 struct kfd_ioctl_dbg_trap_send_runtime_event_args send_runtime_event; 1453 struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args set_exceptions_enabled; 1454 struct kfd_ioctl_dbg_trap_set_wave_launch_override_args launch_override; 1455 struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args launch_mode; 1456 struct kfd_ioctl_dbg_trap_suspend_queues_args suspend_queues; 1457 struct kfd_ioctl_dbg_trap_resume_queues_args resume_queues; 1458 struct kfd_ioctl_dbg_trap_set_node_address_watch_args set_node_address_watch; 1459 struct kfd_ioctl_dbg_trap_clear_node_address_watch_args clear_node_address_watch; 1460 struct kfd_ioctl_dbg_trap_set_flags_args set_flags; 1461 struct kfd_ioctl_dbg_trap_query_debug_event_args query_debug_event; 1462 struct kfd_ioctl_dbg_trap_query_exception_info_args query_exception_info; 1463 struct kfd_ioctl_dbg_trap_queue_snapshot_args queue_snapshot; 1464 struct kfd_ioctl_dbg_trap_device_snapshot_args device_snapshot; 1465 }; 1466 }; 1467 1468 #define AMDKFD_IOCTL_BASE 'K' 1469 #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr) 1470 #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type) 1471 #define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type) 1472 #define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type) 1473 1474 #define AMDKFD_IOC_GET_VERSION \ 1475 AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args) 1476 1477 #define AMDKFD_IOC_CREATE_QUEUE \ 1478 AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args) 1479 1480 #define AMDKFD_IOC_DESTROY_QUEUE \ 1481 AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args) 1482 1483 #define AMDKFD_IOC_SET_MEMORY_POLICY \ 1484 AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args) 1485 1486 #define AMDKFD_IOC_GET_CLOCK_COUNTERS \ 1487 AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args) 1488 1489 #define AMDKFD_IOC_GET_PROCESS_APERTURES \ 1490 AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args) 1491 1492 #define AMDKFD_IOC_UPDATE_QUEUE \ 1493 AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args) 1494 1495 #define AMDKFD_IOC_CREATE_EVENT \ 1496 AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args) 1497 1498 #define AMDKFD_IOC_DESTROY_EVENT \ 1499 AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args) 1500 1501 #define AMDKFD_IOC_SET_EVENT \ 1502 AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args) 1503 1504 #define AMDKFD_IOC_RESET_EVENT \ 1505 AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args) 1506 1507 #define AMDKFD_IOC_WAIT_EVENTS \ 1508 AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args) 1509 1510 #define AMDKFD_IOC_DBG_REGISTER_DEPRECATED \ 1511 AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args) 1512 1513 #define AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED \ 1514 AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args) 1515 1516 #define AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED \ 1517 AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args) 1518 1519 #define AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED \ 1520 AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args) 1521 1522 #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \ 1523 AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args) 1524 1525 #define AMDKFD_IOC_GET_TILE_CONFIG \ 1526 AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args) 1527 1528 #define AMDKFD_IOC_SET_TRAP_HANDLER \ 1529 AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args) 1530 1531 #define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \ 1532 AMDKFD_IOWR(0x14, \ 1533 struct kfd_ioctl_get_process_apertures_new_args) 1534 1535 #define AMDKFD_IOC_ACQUIRE_VM \ 1536 AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args) 1537 1538 #define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \ 1539 AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args) 1540 1541 #define AMDKFD_IOC_FREE_MEMORY_OF_GPU \ 1542 AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args) 1543 1544 #define AMDKFD_IOC_MAP_MEMORY_TO_GPU \ 1545 AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args) 1546 1547 #define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \ 1548 AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args) 1549 1550 #define AMDKFD_IOC_SET_CU_MASK \ 1551 AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args) 1552 1553 #define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \ 1554 AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args) 1555 1556 #define AMDKFD_IOC_GET_DMABUF_INFO \ 1557 AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args) 1558 1559 #define AMDKFD_IOC_IMPORT_DMABUF \ 1560 AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args) 1561 1562 #define AMDKFD_IOC_ALLOC_QUEUE_GWS \ 1563 AMDKFD_IOWR(0x1E, struct kfd_ioctl_alloc_queue_gws_args) 1564 1565 #define AMDKFD_IOC_SMI_EVENTS \ 1566 AMDKFD_IOWR(0x1F, struct kfd_ioctl_smi_events_args) 1567 1568 #define AMDKFD_IOC_SVM AMDKFD_IOWR(0x20, struct kfd_ioctl_svm_args) 1569 1570 #define AMDKFD_IOC_SET_XNACK_MODE \ 1571 AMDKFD_IOWR(0x21, struct kfd_ioctl_set_xnack_mode_args) 1572 1573 #define AMDKFD_IOC_CRIU_OP \ 1574 AMDKFD_IOWR(0x22, struct kfd_ioctl_criu_args) 1575 1576 #define AMDKFD_IOC_AVAILABLE_MEMORY \ 1577 AMDKFD_IOWR(0x23, struct kfd_ioctl_get_available_memory_args) 1578 1579 #define AMDKFD_IOC_EXPORT_DMABUF \ 1580 AMDKFD_IOWR(0x24, struct kfd_ioctl_export_dmabuf_args) 1581 1582 #define AMDKFD_IOC_RUNTIME_ENABLE \ 1583 AMDKFD_IOWR(0x25, struct kfd_ioctl_runtime_enable_args) 1584 1585 #define AMDKFD_IOC_DBG_TRAP \ 1586 AMDKFD_IOWR(0x26, struct kfd_ioctl_dbg_trap_args) 1587 1588 #define AMDKFD_COMMAND_START 0x01 1589 #define AMDKFD_COMMAND_END 0x27 1590 1591 #endif 1592