1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef KFD_IOCTL_H_INCLUDED 24 #define KFD_IOCTL_H_INCLUDED 25 26 #include <drm/drm.h> 27 #include <linux/ioctl.h> 28 29 /* 30 * - 1.1 - initial version 31 * - 1.3 - Add SMI events support 32 * - 1.4 - Indicate new SRAM EDC bit in device properties 33 * - 1.5 - Add SVM API 34 * - 1.6 - Query clear flags in SVM get_attr API 35 * - 1.7 - Checkpoint Restore (CRIU) API 36 * - 1.8 - CRIU - Support for SDMA transfers with GTT BOs 37 * - 1.9 - Add available memory ioctl 38 * - 1.10 - Add SMI profiler event log 39 * - 1.11 - Add unified memory for ctx save/restore area 40 * - 1.12 - Add DMA buf export ioctl 41 */ 42 #define KFD_IOCTL_MAJOR_VERSION 1 43 #define KFD_IOCTL_MINOR_VERSION 12 44 45 struct kfd_ioctl_get_version_args { 46 __u32 major_version; /* from KFD */ 47 __u32 minor_version; /* from KFD */ 48 }; 49 50 /* For kfd_ioctl_create_queue_args.queue_type. */ 51 #define KFD_IOC_QUEUE_TYPE_COMPUTE 0x0 52 #define KFD_IOC_QUEUE_TYPE_SDMA 0x1 53 #define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2 54 #define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3 55 56 #define KFD_MAX_QUEUE_PERCENTAGE 100 57 #define KFD_MAX_QUEUE_PRIORITY 15 58 59 struct kfd_ioctl_create_queue_args { 60 __u64 ring_base_address; /* to KFD */ 61 __u64 write_pointer_address; /* from KFD */ 62 __u64 read_pointer_address; /* from KFD */ 63 __u64 doorbell_offset; /* from KFD */ 64 65 __u32 ring_size; /* to KFD */ 66 __u32 gpu_id; /* to KFD */ 67 __u32 queue_type; /* to KFD */ 68 __u32 queue_percentage; /* to KFD */ 69 __u32 queue_priority; /* to KFD */ 70 __u32 queue_id; /* from KFD */ 71 72 __u64 eop_buffer_address; /* to KFD */ 73 __u64 eop_buffer_size; /* to KFD */ 74 __u64 ctx_save_restore_address; /* to KFD */ 75 __u32 ctx_save_restore_size; /* to KFD */ 76 __u32 ctl_stack_size; /* to KFD */ 77 }; 78 79 struct kfd_ioctl_destroy_queue_args { 80 __u32 queue_id; /* to KFD */ 81 __u32 pad; 82 }; 83 84 struct kfd_ioctl_update_queue_args { 85 __u64 ring_base_address; /* to KFD */ 86 87 __u32 queue_id; /* to KFD */ 88 __u32 ring_size; /* to KFD */ 89 __u32 queue_percentage; /* to KFD */ 90 __u32 queue_priority; /* to KFD */ 91 }; 92 93 struct kfd_ioctl_set_cu_mask_args { 94 __u32 queue_id; /* to KFD */ 95 __u32 num_cu_mask; /* to KFD */ 96 __u64 cu_mask_ptr; /* to KFD */ 97 }; 98 99 struct kfd_ioctl_get_queue_wave_state_args { 100 __u64 ctl_stack_address; /* to KFD */ 101 __u32 ctl_stack_used_size; /* from KFD */ 102 __u32 save_area_used_size; /* from KFD */ 103 __u32 queue_id; /* to KFD */ 104 __u32 pad; 105 }; 106 107 struct kfd_ioctl_get_available_memory_args { 108 __u64 available; /* from KFD */ 109 __u32 gpu_id; /* to KFD */ 110 __u32 pad; 111 }; 112 113 struct kfd_dbg_device_info_entry { 114 __u64 exception_status; 115 __u64 lds_base; 116 __u64 lds_limit; 117 __u64 scratch_base; 118 __u64 scratch_limit; 119 __u64 gpuvm_base; 120 __u64 gpuvm_limit; 121 __u32 gpu_id; 122 __u32 location_id; 123 __u32 vendor_id; 124 __u32 device_id; 125 __u32 revision_id; 126 __u32 subsystem_vendor_id; 127 __u32 subsystem_device_id; 128 __u32 fw_version; 129 __u32 gfx_target_version; 130 __u32 simd_count; 131 __u32 max_waves_per_simd; 132 __u32 array_count; 133 __u32 simd_arrays_per_engine; 134 __u32 num_xcc; 135 __u32 capability; 136 __u32 debug_prop; 137 }; 138 139 /* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */ 140 #define KFD_IOC_CACHE_POLICY_COHERENT 0 141 #define KFD_IOC_CACHE_POLICY_NONCOHERENT 1 142 143 struct kfd_ioctl_set_memory_policy_args { 144 __u64 alternate_aperture_base; /* to KFD */ 145 __u64 alternate_aperture_size; /* to KFD */ 146 147 __u32 gpu_id; /* to KFD */ 148 __u32 default_policy; /* to KFD */ 149 __u32 alternate_policy; /* to KFD */ 150 __u32 pad; 151 }; 152 153 /* 154 * All counters are monotonic. They are used for profiling of compute jobs. 155 * The profiling is done by userspace. 156 * 157 * In case of GPU reset, the counter should not be affected. 158 */ 159 160 struct kfd_ioctl_get_clock_counters_args { 161 __u64 gpu_clock_counter; /* from KFD */ 162 __u64 cpu_clock_counter; /* from KFD */ 163 __u64 system_clock_counter; /* from KFD */ 164 __u64 system_clock_freq; /* from KFD */ 165 166 __u32 gpu_id; /* to KFD */ 167 __u32 pad; 168 }; 169 170 struct kfd_process_device_apertures { 171 __u64 lds_base; /* from KFD */ 172 __u64 lds_limit; /* from KFD */ 173 __u64 scratch_base; /* from KFD */ 174 __u64 scratch_limit; /* from KFD */ 175 __u64 gpuvm_base; /* from KFD */ 176 __u64 gpuvm_limit; /* from KFD */ 177 __u32 gpu_id; /* from KFD */ 178 __u32 pad; 179 }; 180 181 /* 182 * AMDKFD_IOC_GET_PROCESS_APERTURES is deprecated. Use 183 * AMDKFD_IOC_GET_PROCESS_APERTURES_NEW instead, which supports an 184 * unlimited number of GPUs. 185 */ 186 #define NUM_OF_SUPPORTED_GPUS 7 187 struct kfd_ioctl_get_process_apertures_args { 188 struct kfd_process_device_apertures 189 process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */ 190 191 /* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */ 192 __u32 num_of_nodes; 193 __u32 pad; 194 }; 195 196 struct kfd_ioctl_get_process_apertures_new_args { 197 /* User allocated. Pointer to struct kfd_process_device_apertures 198 * filled in by Kernel 199 */ 200 __u64 kfd_process_device_apertures_ptr; 201 /* to KFD - indicates amount of memory present in 202 * kfd_process_device_apertures_ptr 203 * from KFD - Number of entries filled by KFD. 204 */ 205 __u32 num_of_nodes; 206 __u32 pad; 207 }; 208 209 #define MAX_ALLOWED_NUM_POINTS 100 210 #define MAX_ALLOWED_AW_BUFF_SIZE 4096 211 #define MAX_ALLOWED_WAC_BUFF_SIZE 128 212 213 struct kfd_ioctl_dbg_register_args { 214 __u32 gpu_id; /* to KFD */ 215 __u32 pad; 216 }; 217 218 struct kfd_ioctl_dbg_unregister_args { 219 __u32 gpu_id; /* to KFD */ 220 __u32 pad; 221 }; 222 223 struct kfd_ioctl_dbg_address_watch_args { 224 __u64 content_ptr; /* a pointer to the actual content */ 225 __u32 gpu_id; /* to KFD */ 226 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */ 227 }; 228 229 struct kfd_ioctl_dbg_wave_control_args { 230 __u64 content_ptr; /* a pointer to the actual content */ 231 __u32 gpu_id; /* to KFD */ 232 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */ 233 }; 234 235 #define KFD_INVALID_FD 0xffffffff 236 237 /* Matching HSA_EVENTTYPE */ 238 #define KFD_IOC_EVENT_SIGNAL 0 239 #define KFD_IOC_EVENT_NODECHANGE 1 240 #define KFD_IOC_EVENT_DEVICESTATECHANGE 2 241 #define KFD_IOC_EVENT_HW_EXCEPTION 3 242 #define KFD_IOC_EVENT_SYSTEM_EVENT 4 243 #define KFD_IOC_EVENT_DEBUG_EVENT 5 244 #define KFD_IOC_EVENT_PROFILE_EVENT 6 245 #define KFD_IOC_EVENT_QUEUE_EVENT 7 246 #define KFD_IOC_EVENT_MEMORY 8 247 248 #define KFD_IOC_WAIT_RESULT_COMPLETE 0 249 #define KFD_IOC_WAIT_RESULT_TIMEOUT 1 250 #define KFD_IOC_WAIT_RESULT_FAIL 2 251 252 #define KFD_SIGNAL_EVENT_LIMIT 4096 253 254 /* For kfd_event_data.hw_exception_data.reset_type. */ 255 #define KFD_HW_EXCEPTION_WHOLE_GPU_RESET 0 256 #define KFD_HW_EXCEPTION_PER_ENGINE_RESET 1 257 258 /* For kfd_event_data.hw_exception_data.reset_cause. */ 259 #define KFD_HW_EXCEPTION_GPU_HANG 0 260 #define KFD_HW_EXCEPTION_ECC 1 261 262 /* For kfd_hsa_memory_exception_data.ErrorType */ 263 #define KFD_MEM_ERR_NO_RAS 0 264 #define KFD_MEM_ERR_SRAM_ECC 1 265 #define KFD_MEM_ERR_POISON_CONSUMED 2 266 #define KFD_MEM_ERR_GPU_HANG 3 267 268 struct kfd_ioctl_create_event_args { 269 __u64 event_page_offset; /* from KFD */ 270 __u32 event_trigger_data; /* from KFD - signal events only */ 271 __u32 event_type; /* to KFD */ 272 __u32 auto_reset; /* to KFD */ 273 __u32 node_id; /* to KFD - only valid for certain 274 event types */ 275 __u32 event_id; /* from KFD */ 276 __u32 event_slot_index; /* from KFD */ 277 }; 278 279 struct kfd_ioctl_destroy_event_args { 280 __u32 event_id; /* to KFD */ 281 __u32 pad; 282 }; 283 284 struct kfd_ioctl_set_event_args { 285 __u32 event_id; /* to KFD */ 286 __u32 pad; 287 }; 288 289 struct kfd_ioctl_reset_event_args { 290 __u32 event_id; /* to KFD */ 291 __u32 pad; 292 }; 293 294 struct kfd_memory_exception_failure { 295 __u32 NotPresent; /* Page not present or supervisor privilege */ 296 __u32 ReadOnly; /* Write access to a read-only page */ 297 __u32 NoExecute; /* Execute access to a page marked NX */ 298 __u32 imprecise; /* Can't determine the exact fault address */ 299 }; 300 301 /* memory exception data */ 302 struct kfd_hsa_memory_exception_data { 303 struct kfd_memory_exception_failure failure; 304 __u64 va; 305 __u32 gpu_id; 306 __u32 ErrorType; /* 0 = no RAS error, 307 * 1 = ECC_SRAM, 308 * 2 = Link_SYNFLOOD (poison), 309 * 3 = GPU hang (not attributable to a specific cause), 310 * other values reserved 311 */ 312 }; 313 314 /* hw exception data */ 315 struct kfd_hsa_hw_exception_data { 316 __u32 reset_type; 317 __u32 reset_cause; 318 __u32 memory_lost; 319 __u32 gpu_id; 320 }; 321 322 /* Event data */ 323 struct kfd_event_data { 324 union { 325 struct kfd_hsa_memory_exception_data memory_exception_data; 326 struct kfd_hsa_hw_exception_data hw_exception_data; 327 }; /* From KFD */ 328 __u64 kfd_event_data_ext; /* pointer to an extension structure 329 for future exception types */ 330 __u32 event_id; /* to KFD */ 331 __u32 pad; 332 }; 333 334 struct kfd_ioctl_wait_events_args { 335 __u64 events_ptr; /* pointed to struct 336 kfd_event_data array, to KFD */ 337 __u32 num_events; /* to KFD */ 338 __u32 wait_for_all; /* to KFD */ 339 __u32 timeout; /* to KFD */ 340 __u32 wait_result; /* from KFD */ 341 }; 342 343 struct kfd_ioctl_set_scratch_backing_va_args { 344 __u64 va_addr; /* to KFD */ 345 __u32 gpu_id; /* to KFD */ 346 __u32 pad; 347 }; 348 349 struct kfd_ioctl_get_tile_config_args { 350 /* to KFD: pointer to tile array */ 351 __u64 tile_config_ptr; 352 /* to KFD: pointer to macro tile array */ 353 __u64 macro_tile_config_ptr; 354 /* to KFD: array size allocated by user mode 355 * from KFD: array size filled by kernel 356 */ 357 __u32 num_tile_configs; 358 /* to KFD: array size allocated by user mode 359 * from KFD: array size filled by kernel 360 */ 361 __u32 num_macro_tile_configs; 362 363 __u32 gpu_id; /* to KFD */ 364 __u32 gb_addr_config; /* from KFD */ 365 __u32 num_banks; /* from KFD */ 366 __u32 num_ranks; /* from KFD */ 367 /* struct size can be extended later if needed 368 * without breaking ABI compatibility 369 */ 370 }; 371 372 struct kfd_ioctl_set_trap_handler_args { 373 __u64 tba_addr; /* to KFD */ 374 __u64 tma_addr; /* to KFD */ 375 __u32 gpu_id; /* to KFD */ 376 __u32 pad; 377 }; 378 379 struct kfd_ioctl_acquire_vm_args { 380 __u32 drm_fd; /* to KFD */ 381 __u32 gpu_id; /* to KFD */ 382 }; 383 384 /* Allocation flags: memory types */ 385 #define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0) 386 #define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1) 387 #define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2) 388 #define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3) 389 #define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP (1 << 4) 390 /* Allocation flags: attributes/access options */ 391 #define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31) 392 #define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30) 393 #define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29) 394 #define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28) 395 #define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27) 396 #define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26) 397 #define KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED (1 << 25) 398 399 /* Allocate memory for later SVM (shared virtual memory) mapping. 400 * 401 * @va_addr: virtual address of the memory to be allocated 402 * all later mappings on all GPUs will use this address 403 * @size: size in bytes 404 * @handle: buffer handle returned to user mode, used to refer to 405 * this allocation for mapping, unmapping and freeing 406 * @mmap_offset: for CPU-mapping the allocation by mmapping a render node 407 * for userptrs this is overloaded to specify the CPU address 408 * @gpu_id: device identifier 409 * @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above 410 */ 411 struct kfd_ioctl_alloc_memory_of_gpu_args { 412 __u64 va_addr; /* to KFD */ 413 __u64 size; /* to KFD */ 414 __u64 handle; /* from KFD */ 415 __u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */ 416 __u32 gpu_id; /* to KFD */ 417 __u32 flags; 418 }; 419 420 /* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu 421 * 422 * @handle: memory handle returned by alloc 423 */ 424 struct kfd_ioctl_free_memory_of_gpu_args { 425 __u64 handle; /* to KFD */ 426 }; 427 428 /* Map memory to one or more GPUs 429 * 430 * @handle: memory handle returned by alloc 431 * @device_ids_array_ptr: array of gpu_ids (__u32 per device) 432 * @n_devices: number of devices in the array 433 * @n_success: number of devices mapped successfully 434 * 435 * @n_success returns information to the caller how many devices from 436 * the start of the array have mapped the buffer successfully. It can 437 * be passed into a subsequent retry call to skip those devices. For 438 * the first call the caller should initialize it to 0. 439 * 440 * If the ioctl completes with return code 0 (success), n_success == 441 * n_devices. 442 */ 443 struct kfd_ioctl_map_memory_to_gpu_args { 444 __u64 handle; /* to KFD */ 445 __u64 device_ids_array_ptr; /* to KFD */ 446 __u32 n_devices; /* to KFD */ 447 __u32 n_success; /* to/from KFD */ 448 }; 449 450 /* Unmap memory from one or more GPUs 451 * 452 * same arguments as for mapping 453 */ 454 struct kfd_ioctl_unmap_memory_from_gpu_args { 455 __u64 handle; /* to KFD */ 456 __u64 device_ids_array_ptr; /* to KFD */ 457 __u32 n_devices; /* to KFD */ 458 __u32 n_success; /* to/from KFD */ 459 }; 460 461 /* Allocate GWS for specific queue 462 * 463 * @queue_id: queue's id that GWS is allocated for 464 * @num_gws: how many GWS to allocate 465 * @first_gws: index of the first GWS allocated. 466 * only support contiguous GWS allocation 467 */ 468 struct kfd_ioctl_alloc_queue_gws_args { 469 __u32 queue_id; /* to KFD */ 470 __u32 num_gws; /* to KFD */ 471 __u32 first_gws; /* from KFD */ 472 __u32 pad; 473 }; 474 475 struct kfd_ioctl_get_dmabuf_info_args { 476 __u64 size; /* from KFD */ 477 __u64 metadata_ptr; /* to KFD */ 478 __u32 metadata_size; /* to KFD (space allocated by user) 479 * from KFD (actual metadata size) 480 */ 481 __u32 gpu_id; /* from KFD */ 482 __u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */ 483 __u32 dmabuf_fd; /* to KFD */ 484 }; 485 486 struct kfd_ioctl_import_dmabuf_args { 487 __u64 va_addr; /* to KFD */ 488 __u64 handle; /* from KFD */ 489 __u32 gpu_id; /* to KFD */ 490 __u32 dmabuf_fd; /* to KFD */ 491 }; 492 493 struct kfd_ioctl_export_dmabuf_args { 494 __u64 handle; /* to KFD */ 495 __u32 flags; /* to KFD */ 496 __u32 dmabuf_fd; /* from KFD */ 497 }; 498 499 /* 500 * KFD SMI(System Management Interface) events 501 */ 502 enum kfd_smi_event { 503 KFD_SMI_EVENT_NONE = 0, /* not used */ 504 KFD_SMI_EVENT_VMFAULT = 1, /* event start counting at 1 */ 505 KFD_SMI_EVENT_THERMAL_THROTTLE = 2, 506 KFD_SMI_EVENT_GPU_PRE_RESET = 3, 507 KFD_SMI_EVENT_GPU_POST_RESET = 4, 508 KFD_SMI_EVENT_MIGRATE_START = 5, 509 KFD_SMI_EVENT_MIGRATE_END = 6, 510 KFD_SMI_EVENT_PAGE_FAULT_START = 7, 511 KFD_SMI_EVENT_PAGE_FAULT_END = 8, 512 KFD_SMI_EVENT_QUEUE_EVICTION = 9, 513 KFD_SMI_EVENT_QUEUE_RESTORE = 10, 514 KFD_SMI_EVENT_UNMAP_FROM_GPU = 11, 515 516 /* 517 * max event number, as a flag bit to get events from all processes, 518 * this requires super user permission, otherwise will not be able to 519 * receive event from any process. Without this flag to receive events 520 * from same process. 521 */ 522 KFD_SMI_EVENT_ALL_PROCESS = 64 523 }; 524 525 enum KFD_MIGRATE_TRIGGERS { 526 KFD_MIGRATE_TRIGGER_PREFETCH, 527 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, 528 KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU, 529 KFD_MIGRATE_TRIGGER_TTM_EVICTION 530 }; 531 532 enum KFD_QUEUE_EVICTION_TRIGGERS { 533 KFD_QUEUE_EVICTION_TRIGGER_SVM, 534 KFD_QUEUE_EVICTION_TRIGGER_USERPTR, 535 KFD_QUEUE_EVICTION_TRIGGER_TTM, 536 KFD_QUEUE_EVICTION_TRIGGER_SUSPEND, 537 KFD_QUEUE_EVICTION_CRIU_CHECKPOINT, 538 KFD_QUEUE_EVICTION_CRIU_RESTORE 539 }; 540 541 enum KFD_SVM_UNMAP_TRIGGERS { 542 KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY, 543 KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE, 544 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU 545 }; 546 547 #define KFD_SMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1)) 548 #define KFD_SMI_EVENT_MSG_SIZE 96 549 550 struct kfd_ioctl_smi_events_args { 551 __u32 gpuid; /* to KFD */ 552 __u32 anon_fd; /* from KFD */ 553 }; 554 555 /************************************************************************************************** 556 * CRIU IOCTLs (Checkpoint Restore In Userspace) 557 * 558 * When checkpointing a process, the userspace application will perform: 559 * 1. PROCESS_INFO op to determine current process information. This pauses execution and evicts 560 * all the queues. 561 * 2. CHECKPOINT op to checkpoint process contents (BOs, queues, events, svm-ranges) 562 * 3. UNPAUSE op to un-evict all the queues 563 * 564 * When restoring a process, the CRIU userspace application will perform: 565 * 566 * 1. RESTORE op to restore process contents 567 * 2. RESUME op to start the process 568 * 569 * Note: Queues are forced into an evicted state after a successful PROCESS_INFO. User 570 * application needs to perform an UNPAUSE operation after calling PROCESS_INFO. 571 */ 572 573 enum kfd_criu_op { 574 KFD_CRIU_OP_PROCESS_INFO, 575 KFD_CRIU_OP_CHECKPOINT, 576 KFD_CRIU_OP_UNPAUSE, 577 KFD_CRIU_OP_RESTORE, 578 KFD_CRIU_OP_RESUME, 579 }; 580 581 /** 582 * kfd_ioctl_criu_args - Arguments perform CRIU operation 583 * @devices: [in/out] User pointer to memory location for devices information. 584 * This is an array of type kfd_criu_device_bucket. 585 * @bos: [in/out] User pointer to memory location for BOs information 586 * This is an array of type kfd_criu_bo_bucket. 587 * @priv_data: [in/out] User pointer to memory location for private data 588 * @priv_data_size: [in/out] Size of priv_data in bytes 589 * @num_devices: [in/out] Number of GPUs used by process. Size of @devices array. 590 * @num_bos [in/out] Number of BOs used by process. Size of @bos array. 591 * @num_objects: [in/out] Number of objects used by process. Objects are opaque to 592 * user application. 593 * @pid: [in/out] PID of the process being checkpointed 594 * @op [in] Type of operation (kfd_criu_op) 595 * 596 * Return: 0 on success, -errno on failure 597 */ 598 struct kfd_ioctl_criu_args { 599 __u64 devices; /* Used during ops: CHECKPOINT, RESTORE */ 600 __u64 bos; /* Used during ops: CHECKPOINT, RESTORE */ 601 __u64 priv_data; /* Used during ops: CHECKPOINT, RESTORE */ 602 __u64 priv_data_size; /* Used during ops: PROCESS_INFO, RESTORE */ 603 __u32 num_devices; /* Used during ops: PROCESS_INFO, RESTORE */ 604 __u32 num_bos; /* Used during ops: PROCESS_INFO, RESTORE */ 605 __u32 num_objects; /* Used during ops: PROCESS_INFO, RESTORE */ 606 __u32 pid; /* Used during ops: PROCESS_INFO, RESUME */ 607 __u32 op; 608 }; 609 610 struct kfd_criu_device_bucket { 611 __u32 user_gpu_id; 612 __u32 actual_gpu_id; 613 __u32 drm_fd; 614 __u32 pad; 615 }; 616 617 struct kfd_criu_bo_bucket { 618 __u64 addr; 619 __u64 size; 620 __u64 offset; 621 __u64 restored_offset; /* During restore, updated offset for BO */ 622 __u32 gpu_id; /* This is the user_gpu_id */ 623 __u32 alloc_flags; 624 __u32 dmabuf_fd; 625 __u32 pad; 626 }; 627 628 /* CRIU IOCTLs - END */ 629 /**************************************************************************************************/ 630 631 /* Register offset inside the remapped mmio page 632 */ 633 enum kfd_mmio_remap { 634 KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0, 635 KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4, 636 }; 637 638 /* Guarantee host access to memory */ 639 #define KFD_IOCTL_SVM_FLAG_HOST_ACCESS 0x00000001 640 /* Fine grained coherency between all devices with access */ 641 #define KFD_IOCTL_SVM_FLAG_COHERENT 0x00000002 642 /* Use any GPU in same hive as preferred device */ 643 #define KFD_IOCTL_SVM_FLAG_HIVE_LOCAL 0x00000004 644 /* GPUs only read, allows replication */ 645 #define KFD_IOCTL_SVM_FLAG_GPU_RO 0x00000008 646 /* Allow execution on GPU */ 647 #define KFD_IOCTL_SVM_FLAG_GPU_EXEC 0x00000010 648 /* GPUs mostly read, may allow similar optimizations as RO, but writes fault */ 649 #define KFD_IOCTL_SVM_FLAG_GPU_READ_MOSTLY 0x00000020 650 /* Keep GPU memory mapping always valid as if XNACK is disable */ 651 #define KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED 0x00000040 652 653 /** 654 * kfd_ioctl_svm_op - SVM ioctl operations 655 * 656 * @KFD_IOCTL_SVM_OP_SET_ATTR: Modify one or more attributes 657 * @KFD_IOCTL_SVM_OP_GET_ATTR: Query one or more attributes 658 */ 659 enum kfd_ioctl_svm_op { 660 KFD_IOCTL_SVM_OP_SET_ATTR, 661 KFD_IOCTL_SVM_OP_GET_ATTR 662 }; 663 664 /** kfd_ioctl_svm_location - Enum for preferred and prefetch locations 665 * 666 * GPU IDs are used to specify GPUs as preferred and prefetch locations. 667 * Below definitions are used for system memory or for leaving the preferred 668 * location unspecified. 669 */ 670 enum kfd_ioctl_svm_location { 671 KFD_IOCTL_SVM_LOCATION_SYSMEM = 0, 672 KFD_IOCTL_SVM_LOCATION_UNDEFINED = 0xffffffff 673 }; 674 675 /** 676 * kfd_ioctl_svm_attr_type - SVM attribute types 677 * 678 * @KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: gpuid of the preferred location, 0 for 679 * system memory 680 * @KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: gpuid of the prefetch location, 0 for 681 * system memory. Setting this triggers an 682 * immediate prefetch (migration). 683 * @KFD_IOCTL_SVM_ATTR_ACCESS: 684 * @KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 685 * @KFD_IOCTL_SVM_ATTR_NO_ACCESS: specify memory access for the gpuid given 686 * by the attribute value 687 * @KFD_IOCTL_SVM_ATTR_SET_FLAGS: bitmask of flags to set (see 688 * KFD_IOCTL_SVM_FLAG_...) 689 * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS: bitmask of flags to clear 690 * @KFD_IOCTL_SVM_ATTR_GRANULARITY: migration granularity 691 * (log2 num pages) 692 */ 693 enum kfd_ioctl_svm_attr_type { 694 KFD_IOCTL_SVM_ATTR_PREFERRED_LOC, 695 KFD_IOCTL_SVM_ATTR_PREFETCH_LOC, 696 KFD_IOCTL_SVM_ATTR_ACCESS, 697 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE, 698 KFD_IOCTL_SVM_ATTR_NO_ACCESS, 699 KFD_IOCTL_SVM_ATTR_SET_FLAGS, 700 KFD_IOCTL_SVM_ATTR_CLR_FLAGS, 701 KFD_IOCTL_SVM_ATTR_GRANULARITY 702 }; 703 704 /** 705 * kfd_ioctl_svm_attribute - Attributes as pairs of type and value 706 * 707 * The meaning of the @value depends on the attribute type. 708 * 709 * @type: attribute type (see enum @kfd_ioctl_svm_attr_type) 710 * @value: attribute value 711 */ 712 struct kfd_ioctl_svm_attribute { 713 __u32 type; 714 __u32 value; 715 }; 716 717 /** 718 * kfd_ioctl_svm_args - Arguments for SVM ioctl 719 * 720 * @op specifies the operation to perform (see enum 721 * @kfd_ioctl_svm_op). @start_addr and @size are common for all 722 * operations. 723 * 724 * A variable number of attributes can be given in @attrs. 725 * @nattr specifies the number of attributes. New attributes can be 726 * added in the future without breaking the ABI. If unknown attributes 727 * are given, the function returns -EINVAL. 728 * 729 * @KFD_IOCTL_SVM_OP_SET_ATTR sets attributes for a virtual address 730 * range. It may overlap existing virtual address ranges. If it does, 731 * the existing ranges will be split such that the attribute changes 732 * only apply to the specified address range. 733 * 734 * @KFD_IOCTL_SVM_OP_GET_ATTR returns the intersection of attributes 735 * over all memory in the given range and returns the result as the 736 * attribute value. If different pages have different preferred or 737 * prefetch locations, 0xffffffff will be returned for 738 * @KFD_IOCTL_SVM_ATTR_PREFERRED_LOC or 739 * @KFD_IOCTL_SVM_ATTR_PREFETCH_LOC resepctively. For 740 * @KFD_IOCTL_SVM_ATTR_SET_FLAGS, flags of all pages will be 741 * aggregated by bitwise AND. That means, a flag will be set in the 742 * output, if that flag is set for all pages in the range. For 743 * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS, flags of all pages will be 744 * aggregated by bitwise NOR. That means, a flag will be set in the 745 * output, if that flag is clear for all pages in the range. 746 * The minimum migration granularity throughout the range will be 747 * returned for @KFD_IOCTL_SVM_ATTR_GRANULARITY. 748 * 749 * Querying of accessibility attributes works by initializing the 750 * attribute type to @KFD_IOCTL_SVM_ATTR_ACCESS and the value to the 751 * GPUID being queried. Multiple attributes can be given to allow 752 * querying multiple GPUIDs. The ioctl function overwrites the 753 * attribute type to indicate the access for the specified GPU. 754 */ 755 struct kfd_ioctl_svm_args { 756 __u64 start_addr; 757 __u64 size; 758 __u32 op; 759 __u32 nattr; 760 /* Variable length array of attributes */ 761 struct kfd_ioctl_svm_attribute attrs[]; 762 }; 763 764 /** 765 * kfd_ioctl_set_xnack_mode_args - Arguments for set_xnack_mode 766 * 767 * @xnack_enabled: [in/out] Whether to enable XNACK mode for this process 768 * 769 * @xnack_enabled indicates whether recoverable page faults should be 770 * enabled for the current process. 0 means disabled, positive means 771 * enabled, negative means leave unchanged. If enabled, virtual address 772 * translations on GFXv9 and later AMD GPUs can return XNACK and retry 773 * the access until a valid PTE is available. This is used to implement 774 * device page faults. 775 * 776 * On output, @xnack_enabled returns the (new) current mode (0 or 777 * positive). Therefore, a negative input value can be used to query 778 * the current mode without changing it. 779 * 780 * The XNACK mode fundamentally changes the way SVM managed memory works 781 * in the driver, with subtle effects on application performance and 782 * functionality. 783 * 784 * Enabling XNACK mode requires shader programs to be compiled 785 * differently. Furthermore, not all GPUs support changing the mode 786 * per-process. Therefore changing the mode is only allowed while no 787 * user mode queues exist in the process. This ensure that no shader 788 * code is running that may be compiled for the wrong mode. And GPUs 789 * that cannot change to the requested mode will prevent the XNACK 790 * mode from occurring. All GPUs used by the process must be in the 791 * same XNACK mode. 792 * 793 * GFXv8 or older GPUs do not support 48 bit virtual addresses or SVM. 794 * Therefore those GPUs are not considered for the XNACK mode switch. 795 * 796 * Return: 0 on success, -errno on failure 797 */ 798 struct kfd_ioctl_set_xnack_mode_args { 799 __s32 xnack_enabled; 800 }; 801 802 /* Wave launch override modes */ 803 enum kfd_dbg_trap_override_mode { 804 KFD_DBG_TRAP_OVERRIDE_OR = 0, 805 KFD_DBG_TRAP_OVERRIDE_REPLACE = 1 806 }; 807 808 /* Wave launch overrides */ 809 enum kfd_dbg_trap_mask { 810 KFD_DBG_TRAP_MASK_FP_INVALID = 1, 811 KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL = 2, 812 KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO = 4, 813 KFD_DBG_TRAP_MASK_FP_OVERFLOW = 8, 814 KFD_DBG_TRAP_MASK_FP_UNDERFLOW = 16, 815 KFD_DBG_TRAP_MASK_FP_INEXACT = 32, 816 KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO = 64, 817 KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH = 128, 818 KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION = 256, 819 KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_START = (1 << 30), 820 KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_END = (1 << 31) 821 }; 822 823 /* Wave launch modes */ 824 enum kfd_dbg_trap_wave_launch_mode { 825 KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL = 0, 826 KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT = 1, 827 KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG = 3 828 }; 829 830 /* Address watch modes */ 831 enum kfd_dbg_trap_address_watch_mode { 832 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_READ = 0, 833 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_NONREAD = 1, 834 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ATOMIC = 2, 835 KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ALL = 3 836 }; 837 838 /* Additional wave settings */ 839 enum kfd_dbg_trap_flags { 840 KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP = 1, 841 }; 842 843 /* Trap exceptions */ 844 enum kfd_dbg_trap_exception_code { 845 EC_NONE = 0, 846 /* per queue */ 847 EC_QUEUE_WAVE_ABORT = 1, 848 EC_QUEUE_WAVE_TRAP = 2, 849 EC_QUEUE_WAVE_MATH_ERROR = 3, 850 EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION = 4, 851 EC_QUEUE_WAVE_MEMORY_VIOLATION = 5, 852 EC_QUEUE_WAVE_APERTURE_VIOLATION = 6, 853 EC_QUEUE_PACKET_DISPATCH_DIM_INVALID = 16, 854 EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID = 17, 855 EC_QUEUE_PACKET_DISPATCH_CODE_INVALID = 18, 856 EC_QUEUE_PACKET_RESERVED = 19, 857 EC_QUEUE_PACKET_UNSUPPORTED = 20, 858 EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID = 21, 859 EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID = 22, 860 EC_QUEUE_PACKET_VENDOR_UNSUPPORTED = 23, 861 EC_QUEUE_PREEMPTION_ERROR = 30, 862 EC_QUEUE_NEW = 31, 863 /* per device */ 864 EC_DEVICE_QUEUE_DELETE = 32, 865 EC_DEVICE_MEMORY_VIOLATION = 33, 866 EC_DEVICE_RAS_ERROR = 34, 867 EC_DEVICE_FATAL_HALT = 35, 868 EC_DEVICE_NEW = 36, 869 /* per process */ 870 EC_PROCESS_RUNTIME = 48, 871 EC_PROCESS_DEVICE_REMOVE = 49, 872 EC_MAX 873 }; 874 875 /* Mask generated by ecode in kfd_dbg_trap_exception_code */ 876 #define KFD_EC_MASK(ecode) (1ULL << (ecode - 1)) 877 878 /* Masks for exception code type checks below */ 879 #define KFD_EC_MASK_QUEUE (KFD_EC_MASK(EC_QUEUE_WAVE_ABORT) | \ 880 KFD_EC_MASK(EC_QUEUE_WAVE_TRAP) | \ 881 KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR) | \ 882 KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION) | \ 883 KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION) | \ 884 KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION) | \ 885 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) | \ 886 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) | \ 887 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) | \ 888 KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) | \ 889 KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) | \ 890 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) | \ 891 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) | \ 892 KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED) | \ 893 KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR) | \ 894 KFD_EC_MASK(EC_QUEUE_NEW)) 895 #define KFD_EC_MASK_DEVICE (KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE) | \ 896 KFD_EC_MASK(EC_DEVICE_RAS_ERROR) | \ 897 KFD_EC_MASK(EC_DEVICE_FATAL_HALT) | \ 898 KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION) | \ 899 KFD_EC_MASK(EC_DEVICE_NEW)) 900 #define KFD_EC_MASK_PROCESS (KFD_EC_MASK(EC_PROCESS_RUNTIME) | \ 901 KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE)) 902 903 /* Checks for exception code types for KFD search */ 904 #define KFD_DBG_EC_TYPE_IS_QUEUE(ecode) \ 905 (!!(KFD_EC_MASK(ecode) & KFD_EC_MASK_QUEUE)) 906 #define KFD_DBG_EC_TYPE_IS_DEVICE(ecode) \ 907 (!!(KFD_EC_MASK(ecode) & KFD_EC_MASK_DEVICE)) 908 #define KFD_DBG_EC_TYPE_IS_PROCESS(ecode) \ 909 (!!(KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS)) 910 911 912 /* Runtime enable states */ 913 enum kfd_dbg_runtime_state { 914 DEBUG_RUNTIME_STATE_DISABLED = 0, 915 DEBUG_RUNTIME_STATE_ENABLED = 1, 916 DEBUG_RUNTIME_STATE_ENABLED_BUSY = 2, 917 DEBUG_RUNTIME_STATE_ENABLED_ERROR = 3 918 }; 919 920 /* Runtime enable status */ 921 struct kfd_runtime_info { 922 __u64 r_debug; 923 __u32 runtime_state; 924 __u32 ttmp_setup; 925 }; 926 927 /* Enable modes for runtime enable */ 928 #define KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK 1 929 #define KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK 2 930 931 /** 932 * kfd_ioctl_runtime_enable_args - Arguments for runtime enable 933 * 934 * Coordinates debug exception signalling and debug device enablement with runtime. 935 * 936 * @r_debug - pointer to user struct for sharing information between ROCr and the debuggger 937 * @mode_mask - mask to set mode 938 * KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK - enable runtime for debugging, otherwise disable 939 * KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK - enable trap temporary setup (ignore on disable) 940 * @capabilities_mask - mask to notify runtime on what KFD supports 941 * 942 * Return - 0 on SUCCESS. 943 * - EBUSY if runtime enable call already pending. 944 * - EEXIST if user queues already active prior to call. 945 * If process is debug enabled, runtime enable will enable debug devices and 946 * wait for debugger process to send runtime exception EC_PROCESS_RUNTIME 947 * to unblock - see kfd_ioctl_dbg_trap_args. 948 * 949 */ 950 struct kfd_ioctl_runtime_enable_args { 951 __u64 r_debug; 952 __u32 mode_mask; 953 __u32 capabilities_mask; 954 }; 955 956 /* Queue information */ 957 struct kfd_queue_snapshot_entry { 958 __u64 exception_status; 959 __u64 ring_base_address; 960 __u64 write_pointer_address; 961 __u64 read_pointer_address; 962 __u64 ctx_save_restore_address; 963 __u32 queue_id; 964 __u32 gpu_id; 965 __u32 ring_size; 966 __u32 queue_type; 967 __u32 ctx_save_restore_area_size; 968 __u32 reserved; 969 }; 970 971 /* Queue status return for suspend/resume */ 972 #define KFD_DBG_QUEUE_ERROR_BIT 30 973 #define KFD_DBG_QUEUE_INVALID_BIT 31 974 #define KFD_DBG_QUEUE_ERROR_MASK (1 << KFD_DBG_QUEUE_ERROR_BIT) 975 #define KFD_DBG_QUEUE_INVALID_MASK (1 << KFD_DBG_QUEUE_INVALID_BIT) 976 977 /* Context save area header information */ 978 struct kfd_context_save_area_header { 979 struct { 980 __u32 control_stack_offset; 981 __u32 control_stack_size; 982 __u32 wave_state_offset; 983 __u32 wave_state_size; 984 } wave_state; 985 __u32 debug_offset; 986 __u32 debug_size; 987 __u64 err_payload_addr; 988 __u32 err_event_id; 989 __u32 reserved1; 990 }; 991 992 /* 993 * Debug operations 994 * 995 * For specifics on usage and return values, see documentation per operation 996 * below. Otherwise, generic error returns apply: 997 * - ESRCH if the process to debug does not exist. 998 * 999 * - EINVAL (with KFD_IOC_DBG_TRAP_ENABLE exempt) if operation 1000 * KFD_IOC_DBG_TRAP_ENABLE has not succeeded prior. 1001 * Also returns this error if GPU hardware scheduling is not supported. 1002 * 1003 * - EPERM (with KFD_IOC_DBG_TRAP_DISABLE exempt) if target process is not 1004 * PTRACE_ATTACHED. KFD_IOC_DBG_TRAP_DISABLE is exempt to allow 1005 * clean up of debug mode as long as process is debug enabled. 1006 * 1007 * - EACCES if any DBG_HW_OP (debug hardware operation) is requested when 1008 * AMDKFD_IOC_RUNTIME_ENABLE has not succeeded prior. 1009 * 1010 * - ENODEV if any GPU does not support debugging on a DBG_HW_OP call. 1011 * 1012 * - Other errors may be returned when a DBG_HW_OP occurs while the GPU 1013 * is in a fatal state. 1014 * 1015 */ 1016 enum kfd_dbg_trap_operations { 1017 KFD_IOC_DBG_TRAP_ENABLE = 0, 1018 KFD_IOC_DBG_TRAP_DISABLE = 1, 1019 KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT = 2, 1020 KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED = 3, 1021 KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE = 4, /* DBG_HW_OP */ 1022 KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE = 5, /* DBG_HW_OP */ 1023 KFD_IOC_DBG_TRAP_SUSPEND_QUEUES = 6, /* DBG_HW_OP */ 1024 KFD_IOC_DBG_TRAP_RESUME_QUEUES = 7, /* DBG_HW_OP */ 1025 KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH = 8, /* DBG_HW_OP */ 1026 KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH = 9, /* DBG_HW_OP */ 1027 KFD_IOC_DBG_TRAP_SET_FLAGS = 10, 1028 KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT = 11, 1029 KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO = 12, 1030 KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT = 13, 1031 KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT = 14 1032 }; 1033 1034 /** 1035 * kfd_ioctl_dbg_trap_enable_args 1036 * 1037 * Arguments for KFD_IOC_DBG_TRAP_ENABLE. 1038 * 1039 * Enables debug session for target process. Call @op KFD_IOC_DBG_TRAP_DISABLE in 1040 * kfd_ioctl_dbg_trap_args to disable debug session. 1041 * 1042 * @exception_mask (IN) - exceptions to raise to the debugger 1043 * @rinfo_ptr (IN) - pointer to runtime info buffer (see kfd_runtime_info) 1044 * @rinfo_size (IN/OUT) - size of runtime info buffer in bytes 1045 * @dbg_fd (IN) - fd the KFD will nofify the debugger with of raised 1046 * exceptions set in exception_mask. 1047 * 1048 * Generic errors apply (see kfd_dbg_trap_operations). 1049 * Return - 0 on SUCCESS. 1050 * Copies KFD saved kfd_runtime_info to @rinfo_ptr on enable. 1051 * Size of kfd_runtime saved by the KFD returned to @rinfo_size. 1052 * - EBADF if KFD cannot get a reference to dbg_fd. 1053 * - EFAULT if KFD cannot copy runtime info to rinfo_ptr. 1054 * - EINVAL if target process is already debug enabled. 1055 * 1056 */ 1057 struct kfd_ioctl_dbg_trap_enable_args { 1058 __u64 exception_mask; 1059 __u64 rinfo_ptr; 1060 __u32 rinfo_size; 1061 __u32 dbg_fd; 1062 }; 1063 1064 /** 1065 * kfd_ioctl_dbg_trap_send_runtime_event_args 1066 * 1067 * 1068 * Arguments for KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT. 1069 * Raises exceptions to runtime. 1070 * 1071 * @exception_mask (IN) - exceptions to raise to runtime 1072 * @gpu_id (IN) - target device id 1073 * @queue_id (IN) - target queue id 1074 * 1075 * Generic errors apply (see kfd_dbg_trap_operations). 1076 * Return - 0 on SUCCESS. 1077 * - ENODEV if gpu_id not found. 1078 * If exception_mask contains EC_PROCESS_RUNTIME, unblocks pending 1079 * AMDKFD_IOC_RUNTIME_ENABLE call - see kfd_ioctl_runtime_enable_args. 1080 * All other exceptions are raised to runtime through err_payload_addr. 1081 * See kfd_context_save_area_header. 1082 */ 1083 struct kfd_ioctl_dbg_trap_send_runtime_event_args { 1084 __u64 exception_mask; 1085 __u32 gpu_id; 1086 __u32 queue_id; 1087 }; 1088 1089 /** 1090 * kfd_ioctl_dbg_trap_set_exceptions_enabled_args 1091 * 1092 * Arguments for KFD_IOC_SET_EXCEPTIONS_ENABLED 1093 * Set new exceptions to be raised to the debugger. 1094 * 1095 * @exception_mask (IN) - new exceptions to raise the debugger 1096 * 1097 * Generic errors apply (see kfd_dbg_trap_operations). 1098 * Return - 0 on SUCCESS. 1099 */ 1100 struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args { 1101 __u64 exception_mask; 1102 }; 1103 1104 /** 1105 * kfd_ioctl_dbg_trap_set_wave_launch_override_args 1106 * 1107 * Arguments for KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE 1108 * Enable HW exceptions to raise trap. 1109 * 1110 * @override_mode (IN) - see kfd_dbg_trap_override_mode 1111 * @enable_mask (IN/OUT) - reference kfd_dbg_trap_mask. 1112 * IN is the override modes requested to be enabled. 1113 * OUT is referenced in Return below. 1114 * @support_request_mask (IN/OUT) - reference kfd_dbg_trap_mask. 1115 * IN is the override modes requested for support check. 1116 * OUT is referenced in Return below. 1117 * 1118 * Generic errors apply (see kfd_dbg_trap_operations). 1119 * Return - 0 on SUCCESS. 1120 * Previous enablement is returned in @enable_mask. 1121 * Actual override support is returned in @support_request_mask. 1122 * - EINVAL if override mode is not supported. 1123 * - EACCES if trap support requested is not actually supported. 1124 * i.e. enable_mask (IN) is not a subset of support_request_mask (OUT). 1125 * Otherwise it is considered a generic error (see kfd_dbg_trap_operations). 1126 */ 1127 struct kfd_ioctl_dbg_trap_set_wave_launch_override_args { 1128 __u32 override_mode; 1129 __u32 enable_mask; 1130 __u32 support_request_mask; 1131 __u32 pad; 1132 }; 1133 1134 /** 1135 * kfd_ioctl_dbg_trap_set_wave_launch_mode_args 1136 * 1137 * Arguments for KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE 1138 * Set wave launch mode. 1139 * 1140 * @mode (IN) - see kfd_dbg_trap_wave_launch_mode 1141 * 1142 * Generic errors apply (see kfd_dbg_trap_operations). 1143 * Return - 0 on SUCCESS. 1144 */ 1145 struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args { 1146 __u32 launch_mode; 1147 __u32 pad; 1148 }; 1149 1150 /** 1151 * kfd_ioctl_dbg_trap_suspend_queues_ags 1152 * 1153 * Arguments for KFD_IOC_DBG_TRAP_SUSPEND_QUEUES 1154 * Suspend queues. 1155 * 1156 * @exception_mask (IN) - raised exceptions to clear 1157 * @queue_array_ptr (IN) - pointer to array of queue ids (u32 per queue id) 1158 * to suspend 1159 * @num_queues (IN) - number of queues to suspend in @queue_array_ptr 1160 * @grace_period (IN) - wave time allowance before preemption 1161 * per 1K GPU clock cycle unit 1162 * 1163 * Generic errors apply (see kfd_dbg_trap_operations). 1164 * Destruction of a suspended queue is blocked until the queue is 1165 * resumed. This allows the debugger to access queue information and 1166 * the its context save area without running into a race condition on 1167 * queue destruction. 1168 * Automatically copies per queue context save area header information 1169 * into the save area base 1170 * (see kfd_queue_snapshot_entry and kfd_context_save_area_header). 1171 * 1172 * Return - Number of queues suspended on SUCCESS. 1173 * . KFD_DBG_QUEUE_ERROR_MASK and KFD_DBG_QUEUE_INVALID_MASK masked 1174 * for each queue id in @queue_array_ptr array reports unsuccessful 1175 * suspend reason. 1176 * KFD_DBG_QUEUE_ERROR_MASK = HW failure. 1177 * KFD_DBG_QUEUE_INVALID_MASK = queue does not exist, is new or 1178 * is being destroyed. 1179 */ 1180 struct kfd_ioctl_dbg_trap_suspend_queues_args { 1181 __u64 exception_mask; 1182 __u64 queue_array_ptr; 1183 __u32 num_queues; 1184 __u32 grace_period; 1185 }; 1186 1187 /** 1188 * kfd_ioctl_dbg_trap_resume_queues_args 1189 * 1190 * Arguments for KFD_IOC_DBG_TRAP_RESUME_QUEUES 1191 * Resume queues. 1192 * 1193 * @queue_array_ptr (IN) - pointer to array of queue ids (u32 per queue id) 1194 * to resume 1195 * @num_queues (IN) - number of queues to resume in @queue_array_ptr 1196 * 1197 * Generic errors apply (see kfd_dbg_trap_operations). 1198 * Return - Number of queues resumed on SUCCESS. 1199 * KFD_DBG_QUEUE_ERROR_MASK and KFD_DBG_QUEUE_INVALID_MASK mask 1200 * for each queue id in @queue_array_ptr array reports unsuccessful 1201 * resume reason. 1202 * KFD_DBG_QUEUE_ERROR_MASK = HW failure. 1203 * KFD_DBG_QUEUE_INVALID_MASK = queue does not exist. 1204 */ 1205 struct kfd_ioctl_dbg_trap_resume_queues_args { 1206 __u64 queue_array_ptr; 1207 __u32 num_queues; 1208 __u32 pad; 1209 }; 1210 1211 /** 1212 * kfd_ioctl_dbg_trap_set_node_address_watch_args 1213 * 1214 * Arguments for KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH 1215 * Sets address watch for device. 1216 * 1217 * @address (IN) - watch address to set 1218 * @mode (IN) - see kfd_dbg_trap_address_watch_mode 1219 * @mask (IN) - watch address mask 1220 * @gpu_id (IN) - target gpu to set watch point 1221 * @id (OUT) - watch id allocated 1222 * 1223 * Generic errors apply (see kfd_dbg_trap_operations). 1224 * Return - 0 on SUCCESS. 1225 * Allocated watch ID returned to @id. 1226 * - ENODEV if gpu_id not found. 1227 * - ENOMEM if watch IDs can be allocated 1228 */ 1229 struct kfd_ioctl_dbg_trap_set_node_address_watch_args { 1230 __u64 address; 1231 __u32 mode; 1232 __u32 mask; 1233 __u32 gpu_id; 1234 __u32 id; 1235 }; 1236 1237 /** 1238 * kfd_ioctl_dbg_trap_clear_node_address_watch_args 1239 * 1240 * Arguments for KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH 1241 * Clear address watch for device. 1242 * 1243 * @gpu_id (IN) - target device to clear watch point 1244 * @id (IN) - allocated watch id to clear 1245 * 1246 * Generic errors apply (see kfd_dbg_trap_operations). 1247 * Return - 0 on SUCCESS. 1248 * - ENODEV if gpu_id not found. 1249 * - EINVAL if watch ID has not been allocated. 1250 */ 1251 struct kfd_ioctl_dbg_trap_clear_node_address_watch_args { 1252 __u32 gpu_id; 1253 __u32 id; 1254 }; 1255 1256 /** 1257 * kfd_ioctl_dbg_trap_set_flags_args 1258 * 1259 * Arguments for KFD_IOC_DBG_TRAP_SET_FLAGS 1260 * Sets flags for wave behaviour. 1261 * 1262 * @flags (IN/OUT) - IN = flags to enable, OUT = flags previously enabled 1263 * 1264 * Generic errors apply (see kfd_dbg_trap_operations). 1265 * Return - 0 on SUCCESS. 1266 * - EACCESS if any debug device does not allow flag options. 1267 */ 1268 struct kfd_ioctl_dbg_trap_set_flags_args { 1269 __u32 flags; 1270 __u32 pad; 1271 }; 1272 1273 /** 1274 * kfd_ioctl_dbg_trap_query_debug_event_args 1275 * 1276 * Arguments for KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT 1277 * 1278 * Find one or more raised exceptions. This function can return multiple 1279 * exceptions from a single queue or a single device with one call. To find 1280 * all raised exceptions, this function must be called repeatedly until it 1281 * returns -EAGAIN. Returned exceptions can optionally be cleared by 1282 * setting the corresponding bit in the @exception_mask input parameter. 1283 * However, clearing an exception prevents retrieving further information 1284 * about it with KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO. 1285 * 1286 * @exception_mask (IN/OUT) - exception to clear (IN) and raised (OUT) 1287 * @gpu_id (OUT) - gpu id of exceptions raised 1288 * @queue_id (OUT) - queue id of exceptions raised 1289 * 1290 * Generic errors apply (see kfd_dbg_trap_operations). 1291 * Return - 0 on raised exception found 1292 * Raised exceptions found are returned in @exception mask 1293 * with reported source id returned in @gpu_id or @queue_id. 1294 * - EAGAIN if no raised exception has been found 1295 */ 1296 struct kfd_ioctl_dbg_trap_query_debug_event_args { 1297 __u64 exception_mask; 1298 __u32 gpu_id; 1299 __u32 queue_id; 1300 }; 1301 1302 /** 1303 * kfd_ioctl_dbg_trap_query_exception_info_args 1304 * 1305 * Arguments KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO 1306 * Get additional info on raised exception. 1307 * 1308 * @info_ptr (IN) - pointer to exception info buffer to copy to 1309 * @info_size (IN/OUT) - exception info buffer size (bytes) 1310 * @source_id (IN) - target gpu or queue id 1311 * @exception_code (IN) - target exception 1312 * @clear_exception (IN) - clear raised @exception_code exception 1313 * (0 = false, 1 = true) 1314 * 1315 * Generic errors apply (see kfd_dbg_trap_operations). 1316 * Return - 0 on SUCCESS. 1317 * If @exception_code is EC_DEVICE_MEMORY_VIOLATION, copy @info_size(OUT) 1318 * bytes of memory exception data to @info_ptr. 1319 * If @exception_code is EC_PROCESS_RUNTIME, copy saved 1320 * kfd_runtime_info to @info_ptr. 1321 * Actual required @info_ptr size (bytes) is returned in @info_size. 1322 */ 1323 struct kfd_ioctl_dbg_trap_query_exception_info_args { 1324 __u64 info_ptr; 1325 __u32 info_size; 1326 __u32 source_id; 1327 __u32 exception_code; 1328 __u32 clear_exception; 1329 }; 1330 1331 /** 1332 * kfd_ioctl_dbg_trap_get_queue_snapshot_args 1333 * 1334 * Arguments KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT 1335 * Get queue information. 1336 * 1337 * @exception_mask (IN) - exceptions raised to clear 1338 * @snapshot_buf_ptr (IN) - queue snapshot entry buffer (see kfd_queue_snapshot_entry) 1339 * @num_queues (IN/OUT) - number of queue snapshot entries 1340 * The debugger specifies the size of the array allocated in @num_queues. 1341 * KFD returns the number of queues that actually existed. If this is 1342 * larger than the size specified by the debugger, KFD will not overflow 1343 * the array allocated by the debugger. 1344 * 1345 * @entry_size (IN/OUT) - size per entry in bytes 1346 * The debugger specifies sizeof(struct kfd_queue_snapshot_entry) in 1347 * @entry_size. KFD returns the number of bytes actually populated per 1348 * entry. The debugger should use the KFD_IOCTL_MINOR_VERSION to determine, 1349 * which fields in struct kfd_queue_snapshot_entry are valid. This allows 1350 * growing the ABI in a backwards compatible manner. 1351 * Note that entry_size(IN) should still be used to stride the snapshot buffer in the 1352 * event that it's larger than actual kfd_queue_snapshot_entry. 1353 * 1354 * Generic errors apply (see kfd_dbg_trap_operations). 1355 * Return - 0 on SUCCESS. 1356 * Copies @num_queues(IN) queue snapshot entries of size @entry_size(IN) 1357 * into @snapshot_buf_ptr if @num_queues(IN) > 0. 1358 * Otherwise return @num_queues(OUT) queue snapshot entries that exist. 1359 */ 1360 struct kfd_ioctl_dbg_trap_queue_snapshot_args { 1361 __u64 exception_mask; 1362 __u64 snapshot_buf_ptr; 1363 __u32 num_queues; 1364 __u32 entry_size; 1365 }; 1366 1367 /** 1368 * kfd_ioctl_dbg_trap_get_device_snapshot_args 1369 * 1370 * Arguments for KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT 1371 * Get device information. 1372 * 1373 * @exception_mask (IN) - exceptions raised to clear 1374 * @snapshot_buf_ptr (IN) - pointer to snapshot buffer (see kfd_dbg_device_info_entry) 1375 * @num_devices (IN/OUT) - number of debug devices to snapshot 1376 * The debugger specifies the size of the array allocated in @num_devices. 1377 * KFD returns the number of devices that actually existed. If this is 1378 * larger than the size specified by the debugger, KFD will not overflow 1379 * the array allocated by the debugger. 1380 * 1381 * @entry_size (IN/OUT) - size per entry in bytes 1382 * The debugger specifies sizeof(struct kfd_dbg_device_info_entry) in 1383 * @entry_size. KFD returns the number of bytes actually populated. The 1384 * debugger should use KFD_IOCTL_MINOR_VERSION to determine, which fields 1385 * in struct kfd_dbg_device_info_entry are valid. This allows growing the 1386 * ABI in a backwards compatible manner. 1387 * Note that entry_size(IN) should still be used to stride the snapshot buffer in the 1388 * event that it's larger than actual kfd_dbg_device_info_entry. 1389 * 1390 * Generic errors apply (see kfd_dbg_trap_operations). 1391 * Return - 0 on SUCCESS. 1392 * Copies @num_devices(IN) device snapshot entries of size @entry_size(IN) 1393 * into @snapshot_buf_ptr if @num_devices(IN) > 0. 1394 * Otherwise return @num_devices(OUT) queue snapshot entries that exist. 1395 */ 1396 struct kfd_ioctl_dbg_trap_device_snapshot_args { 1397 __u64 exception_mask; 1398 __u64 snapshot_buf_ptr; 1399 __u32 num_devices; 1400 __u32 entry_size; 1401 }; 1402 1403 /** 1404 * kfd_ioctl_dbg_trap_args 1405 * 1406 * Arguments to debug target process. 1407 * 1408 * @pid - target process to debug 1409 * @op - debug operation (see kfd_dbg_trap_operations) 1410 * 1411 * @op determines which union struct args to use. 1412 * Refer to kern docs for each kfd_ioctl_dbg_trap_*_args struct. 1413 */ 1414 struct kfd_ioctl_dbg_trap_args { 1415 __u32 pid; 1416 __u32 op; 1417 1418 union { 1419 struct kfd_ioctl_dbg_trap_enable_args enable; 1420 struct kfd_ioctl_dbg_trap_send_runtime_event_args send_runtime_event; 1421 struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args set_exceptions_enabled; 1422 struct kfd_ioctl_dbg_trap_set_wave_launch_override_args launch_override; 1423 struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args launch_mode; 1424 struct kfd_ioctl_dbg_trap_suspend_queues_args suspend_queues; 1425 struct kfd_ioctl_dbg_trap_resume_queues_args resume_queues; 1426 struct kfd_ioctl_dbg_trap_set_node_address_watch_args set_node_address_watch; 1427 struct kfd_ioctl_dbg_trap_clear_node_address_watch_args clear_node_address_watch; 1428 struct kfd_ioctl_dbg_trap_set_flags_args set_flags; 1429 struct kfd_ioctl_dbg_trap_query_debug_event_args query_debug_event; 1430 struct kfd_ioctl_dbg_trap_query_exception_info_args query_exception_info; 1431 struct kfd_ioctl_dbg_trap_queue_snapshot_args queue_snapshot; 1432 struct kfd_ioctl_dbg_trap_device_snapshot_args device_snapshot; 1433 }; 1434 }; 1435 1436 #define AMDKFD_IOCTL_BASE 'K' 1437 #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr) 1438 #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type) 1439 #define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type) 1440 #define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type) 1441 1442 #define AMDKFD_IOC_GET_VERSION \ 1443 AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args) 1444 1445 #define AMDKFD_IOC_CREATE_QUEUE \ 1446 AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args) 1447 1448 #define AMDKFD_IOC_DESTROY_QUEUE \ 1449 AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args) 1450 1451 #define AMDKFD_IOC_SET_MEMORY_POLICY \ 1452 AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args) 1453 1454 #define AMDKFD_IOC_GET_CLOCK_COUNTERS \ 1455 AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args) 1456 1457 #define AMDKFD_IOC_GET_PROCESS_APERTURES \ 1458 AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args) 1459 1460 #define AMDKFD_IOC_UPDATE_QUEUE \ 1461 AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args) 1462 1463 #define AMDKFD_IOC_CREATE_EVENT \ 1464 AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args) 1465 1466 #define AMDKFD_IOC_DESTROY_EVENT \ 1467 AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args) 1468 1469 #define AMDKFD_IOC_SET_EVENT \ 1470 AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args) 1471 1472 #define AMDKFD_IOC_RESET_EVENT \ 1473 AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args) 1474 1475 #define AMDKFD_IOC_WAIT_EVENTS \ 1476 AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args) 1477 1478 #define AMDKFD_IOC_DBG_REGISTER_DEPRECATED \ 1479 AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args) 1480 1481 #define AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED \ 1482 AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args) 1483 1484 #define AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED \ 1485 AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args) 1486 1487 #define AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED \ 1488 AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args) 1489 1490 #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \ 1491 AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args) 1492 1493 #define AMDKFD_IOC_GET_TILE_CONFIG \ 1494 AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args) 1495 1496 #define AMDKFD_IOC_SET_TRAP_HANDLER \ 1497 AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args) 1498 1499 #define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \ 1500 AMDKFD_IOWR(0x14, \ 1501 struct kfd_ioctl_get_process_apertures_new_args) 1502 1503 #define AMDKFD_IOC_ACQUIRE_VM \ 1504 AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args) 1505 1506 #define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \ 1507 AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args) 1508 1509 #define AMDKFD_IOC_FREE_MEMORY_OF_GPU \ 1510 AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args) 1511 1512 #define AMDKFD_IOC_MAP_MEMORY_TO_GPU \ 1513 AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args) 1514 1515 #define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \ 1516 AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args) 1517 1518 #define AMDKFD_IOC_SET_CU_MASK \ 1519 AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args) 1520 1521 #define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \ 1522 AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args) 1523 1524 #define AMDKFD_IOC_GET_DMABUF_INFO \ 1525 AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args) 1526 1527 #define AMDKFD_IOC_IMPORT_DMABUF \ 1528 AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args) 1529 1530 #define AMDKFD_IOC_ALLOC_QUEUE_GWS \ 1531 AMDKFD_IOWR(0x1E, struct kfd_ioctl_alloc_queue_gws_args) 1532 1533 #define AMDKFD_IOC_SMI_EVENTS \ 1534 AMDKFD_IOWR(0x1F, struct kfd_ioctl_smi_events_args) 1535 1536 #define AMDKFD_IOC_SVM AMDKFD_IOWR(0x20, struct kfd_ioctl_svm_args) 1537 1538 #define AMDKFD_IOC_SET_XNACK_MODE \ 1539 AMDKFD_IOWR(0x21, struct kfd_ioctl_set_xnack_mode_args) 1540 1541 #define AMDKFD_IOC_CRIU_OP \ 1542 AMDKFD_IOWR(0x22, struct kfd_ioctl_criu_args) 1543 1544 #define AMDKFD_IOC_AVAILABLE_MEMORY \ 1545 AMDKFD_IOWR(0x23, struct kfd_ioctl_get_available_memory_args) 1546 1547 #define AMDKFD_IOC_EXPORT_DMABUF \ 1548 AMDKFD_IOWR(0x24, struct kfd_ioctl_export_dmabuf_args) 1549 1550 #define AMDKFD_IOC_RUNTIME_ENABLE \ 1551 AMDKFD_IOWR(0x25, struct kfd_ioctl_runtime_enable_args) 1552 1553 #define AMDKFD_IOC_DBG_TRAP \ 1554 AMDKFD_IOWR(0x26, struct kfd_ioctl_dbg_trap_args) 1555 1556 #define AMDKFD_COMMAND_START 0x01 1557 #define AMDKFD_COMMAND_END 0x27 1558 1559 #endif 1560