xref: /linux-6.15/include/uapi/linux/kfd_ioctl.h (revision 155ce502)
1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef KFD_IOCTL_H_INCLUDED
24 #define KFD_IOCTL_H_INCLUDED
25 
26 #include <drm/drm.h>
27 #include <linux/ioctl.h>
28 
29 /*
30  * - 1.1 - initial version
31  * - 1.3 - Add SMI events support
32  * - 1.4 - Indicate new SRAM EDC bit in device properties
33  * - 1.5 - Add SVM API
34  * - 1.6 - Query clear flags in SVM get_attr API
35  * - 1.7 - Checkpoint Restore (CRIU) API
36  * - 1.8 - CRIU - Support for SDMA transfers with GTT BOs
37  * - 1.9 - Add available memory ioctl
38  * - 1.10 - Add SMI profiler event log
39  * - 1.11 - Add unified memory for ctx save/restore area
40  * - 1.12 - Add DMA buf export ioctl
41  * - 1.13 - Add debugger API
42  * - 1.14 - Update kfd_event_data
43  * - 1.15 - Enable managing mappings in compute VMs with GEM_VA ioctl
44  */
45 #define KFD_IOCTL_MAJOR_VERSION 1
46 #define KFD_IOCTL_MINOR_VERSION 15
47 
48 struct kfd_ioctl_get_version_args {
49 	__u32 major_version;	/* from KFD */
50 	__u32 minor_version;	/* from KFD */
51 };
52 
53 /* For kfd_ioctl_create_queue_args.queue_type. */
54 #define KFD_IOC_QUEUE_TYPE_COMPUTE		0x0
55 #define KFD_IOC_QUEUE_TYPE_SDMA			0x1
56 #define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL		0x2
57 #define KFD_IOC_QUEUE_TYPE_SDMA_XGMI		0x3
58 
59 #define KFD_MAX_QUEUE_PERCENTAGE	100
60 #define KFD_MAX_QUEUE_PRIORITY		15
61 
62 struct kfd_ioctl_create_queue_args {
63 	__u64 ring_base_address;	/* to KFD */
64 	__u64 write_pointer_address;	/* from KFD */
65 	__u64 read_pointer_address;	/* from KFD */
66 	__u64 doorbell_offset;	/* from KFD */
67 
68 	__u32 ring_size;		/* to KFD */
69 	__u32 gpu_id;		/* to KFD */
70 	__u32 queue_type;		/* to KFD */
71 	__u32 queue_percentage;	/* to KFD */
72 	__u32 queue_priority;	/* to KFD */
73 	__u32 queue_id;		/* from KFD */
74 
75 	__u64 eop_buffer_address;	/* to KFD */
76 	__u64 eop_buffer_size;	/* to KFD */
77 	__u64 ctx_save_restore_address; /* to KFD */
78 	__u32 ctx_save_restore_size;	/* to KFD */
79 	__u32 ctl_stack_size;		/* to KFD */
80 };
81 
82 struct kfd_ioctl_destroy_queue_args {
83 	__u32 queue_id;		/* to KFD */
84 	__u32 pad;
85 };
86 
87 struct kfd_ioctl_update_queue_args {
88 	__u64 ring_base_address;	/* to KFD */
89 
90 	__u32 queue_id;		/* to KFD */
91 	__u32 ring_size;		/* to KFD */
92 	__u32 queue_percentage;	/* to KFD */
93 	__u32 queue_priority;	/* to KFD */
94 };
95 
96 struct kfd_ioctl_set_cu_mask_args {
97 	__u32 queue_id;		/* to KFD */
98 	__u32 num_cu_mask;		/* to KFD */
99 	__u64 cu_mask_ptr;		/* to KFD */
100 };
101 
102 struct kfd_ioctl_get_queue_wave_state_args {
103 	__u64 ctl_stack_address;	/* to KFD */
104 	__u32 ctl_stack_used_size;	/* from KFD */
105 	__u32 save_area_used_size;	/* from KFD */
106 	__u32 queue_id;			/* to KFD */
107 	__u32 pad;
108 };
109 
110 struct kfd_ioctl_get_available_memory_args {
111 	__u64 available;	/* from KFD */
112 	__u32 gpu_id;		/* to KFD */
113 	__u32 pad;
114 };
115 
116 struct kfd_dbg_device_info_entry {
117 	__u64 exception_status;
118 	__u64 lds_base;
119 	__u64 lds_limit;
120 	__u64 scratch_base;
121 	__u64 scratch_limit;
122 	__u64 gpuvm_base;
123 	__u64 gpuvm_limit;
124 	__u32 gpu_id;
125 	__u32 location_id;
126 	__u32 vendor_id;
127 	__u32 device_id;
128 	__u32 revision_id;
129 	__u32 subsystem_vendor_id;
130 	__u32 subsystem_device_id;
131 	__u32 fw_version;
132 	__u32 gfx_target_version;
133 	__u32 simd_count;
134 	__u32 max_waves_per_simd;
135 	__u32 array_count;
136 	__u32 simd_arrays_per_engine;
137 	__u32 num_xcc;
138 	__u32 capability;
139 	__u32 debug_prop;
140 };
141 
142 /* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
143 #define KFD_IOC_CACHE_POLICY_COHERENT 0
144 #define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
145 
146 struct kfd_ioctl_set_memory_policy_args {
147 	__u64 alternate_aperture_base;	/* to KFD */
148 	__u64 alternate_aperture_size;	/* to KFD */
149 
150 	__u32 gpu_id;			/* to KFD */
151 	__u32 default_policy;		/* to KFD */
152 	__u32 alternate_policy;		/* to KFD */
153 	__u32 pad;
154 };
155 
156 /*
157  * All counters are monotonic. They are used for profiling of compute jobs.
158  * The profiling is done by userspace.
159  *
160  * In case of GPU reset, the counter should not be affected.
161  */
162 
163 struct kfd_ioctl_get_clock_counters_args {
164 	__u64 gpu_clock_counter;	/* from KFD */
165 	__u64 cpu_clock_counter;	/* from KFD */
166 	__u64 system_clock_counter;	/* from KFD */
167 	__u64 system_clock_freq;	/* from KFD */
168 
169 	__u32 gpu_id;		/* to KFD */
170 	__u32 pad;
171 };
172 
173 struct kfd_process_device_apertures {
174 	__u64 lds_base;		/* from KFD */
175 	__u64 lds_limit;		/* from KFD */
176 	__u64 scratch_base;		/* from KFD */
177 	__u64 scratch_limit;		/* from KFD */
178 	__u64 gpuvm_base;		/* from KFD */
179 	__u64 gpuvm_limit;		/* from KFD */
180 	__u32 gpu_id;		/* from KFD */
181 	__u32 pad;
182 };
183 
184 /*
185  * AMDKFD_IOC_GET_PROCESS_APERTURES is deprecated. Use
186  * AMDKFD_IOC_GET_PROCESS_APERTURES_NEW instead, which supports an
187  * unlimited number of GPUs.
188  */
189 #define NUM_OF_SUPPORTED_GPUS 7
190 struct kfd_ioctl_get_process_apertures_args {
191 	struct kfd_process_device_apertures
192 			process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
193 
194 	/* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
195 	__u32 num_of_nodes;
196 	__u32 pad;
197 };
198 
199 struct kfd_ioctl_get_process_apertures_new_args {
200 	/* User allocated. Pointer to struct kfd_process_device_apertures
201 	 * filled in by Kernel
202 	 */
203 	__u64 kfd_process_device_apertures_ptr;
204 	/* to KFD - indicates amount of memory present in
205 	 *  kfd_process_device_apertures_ptr
206 	 * from KFD - Number of entries filled by KFD.
207 	 */
208 	__u32 num_of_nodes;
209 	__u32 pad;
210 };
211 
212 #define MAX_ALLOWED_NUM_POINTS    100
213 #define MAX_ALLOWED_AW_BUFF_SIZE 4096
214 #define MAX_ALLOWED_WAC_BUFF_SIZE  128
215 
216 struct kfd_ioctl_dbg_register_args {
217 	__u32 gpu_id;		/* to KFD */
218 	__u32 pad;
219 };
220 
221 struct kfd_ioctl_dbg_unregister_args {
222 	__u32 gpu_id;		/* to KFD */
223 	__u32 pad;
224 };
225 
226 struct kfd_ioctl_dbg_address_watch_args {
227 	__u64 content_ptr;		/* a pointer to the actual content */
228 	__u32 gpu_id;		/* to KFD */
229 	__u32 buf_size_in_bytes;	/*including gpu_id and buf_size */
230 };
231 
232 struct kfd_ioctl_dbg_wave_control_args {
233 	__u64 content_ptr;		/* a pointer to the actual content */
234 	__u32 gpu_id;		/* to KFD */
235 	__u32 buf_size_in_bytes;	/*including gpu_id and buf_size */
236 };
237 
238 #define KFD_INVALID_FD     0xffffffff
239 
240 /* Matching HSA_EVENTTYPE */
241 #define KFD_IOC_EVENT_SIGNAL			0
242 #define KFD_IOC_EVENT_NODECHANGE		1
243 #define KFD_IOC_EVENT_DEVICESTATECHANGE		2
244 #define KFD_IOC_EVENT_HW_EXCEPTION		3
245 #define KFD_IOC_EVENT_SYSTEM_EVENT		4
246 #define KFD_IOC_EVENT_DEBUG_EVENT		5
247 #define KFD_IOC_EVENT_PROFILE_EVENT		6
248 #define KFD_IOC_EVENT_QUEUE_EVENT		7
249 #define KFD_IOC_EVENT_MEMORY			8
250 
251 #define KFD_IOC_WAIT_RESULT_COMPLETE		0
252 #define KFD_IOC_WAIT_RESULT_TIMEOUT		1
253 #define KFD_IOC_WAIT_RESULT_FAIL		2
254 
255 #define KFD_SIGNAL_EVENT_LIMIT			4096
256 
257 /* For kfd_event_data.hw_exception_data.reset_type. */
258 #define KFD_HW_EXCEPTION_WHOLE_GPU_RESET	0
259 #define KFD_HW_EXCEPTION_PER_ENGINE_RESET	1
260 
261 /* For kfd_event_data.hw_exception_data.reset_cause. */
262 #define KFD_HW_EXCEPTION_GPU_HANG	0
263 #define KFD_HW_EXCEPTION_ECC		1
264 
265 /* For kfd_hsa_memory_exception_data.ErrorType */
266 #define KFD_MEM_ERR_NO_RAS		0
267 #define KFD_MEM_ERR_SRAM_ECC		1
268 #define KFD_MEM_ERR_POISON_CONSUMED	2
269 #define KFD_MEM_ERR_GPU_HANG		3
270 
271 struct kfd_ioctl_create_event_args {
272 	__u64 event_page_offset;	/* from KFD */
273 	__u32 event_trigger_data;	/* from KFD - signal events only */
274 	__u32 event_type;		/* to KFD */
275 	__u32 auto_reset;		/* to KFD */
276 	__u32 node_id;		/* to KFD - only valid for certain
277 							event types */
278 	__u32 event_id;		/* from KFD */
279 	__u32 event_slot_index;	/* from KFD */
280 };
281 
282 struct kfd_ioctl_destroy_event_args {
283 	__u32 event_id;		/* to KFD */
284 	__u32 pad;
285 };
286 
287 struct kfd_ioctl_set_event_args {
288 	__u32 event_id;		/* to KFD */
289 	__u32 pad;
290 };
291 
292 struct kfd_ioctl_reset_event_args {
293 	__u32 event_id;		/* to KFD */
294 	__u32 pad;
295 };
296 
297 struct kfd_memory_exception_failure {
298 	__u32 NotPresent;	/* Page not present or supervisor privilege */
299 	__u32 ReadOnly;	/* Write access to a read-only page */
300 	__u32 NoExecute;	/* Execute access to a page marked NX */
301 	__u32 imprecise;	/* Can't determine the	exact fault address */
302 };
303 
304 /* memory exception data */
305 struct kfd_hsa_memory_exception_data {
306 	struct kfd_memory_exception_failure failure;
307 	__u64 va;
308 	__u32 gpu_id;
309 	__u32 ErrorType; /* 0 = no RAS error,
310 			  * 1 = ECC_SRAM,
311 			  * 2 = Link_SYNFLOOD (poison),
312 			  * 3 = GPU hang (not attributable to a specific cause),
313 			  * other values reserved
314 			  */
315 };
316 
317 /* hw exception data */
318 struct kfd_hsa_hw_exception_data {
319 	__u32 reset_type;
320 	__u32 reset_cause;
321 	__u32 memory_lost;
322 	__u32 gpu_id;
323 };
324 
325 /* hsa signal event data */
326 struct kfd_hsa_signal_event_data {
327 	__u64 last_event_age;	/* to and from KFD */
328 };
329 
330 /* Event data */
331 struct kfd_event_data {
332 	union {
333 		/* From KFD */
334 		struct kfd_hsa_memory_exception_data memory_exception_data;
335 		struct kfd_hsa_hw_exception_data hw_exception_data;
336 		/* To and From KFD */
337 		struct kfd_hsa_signal_event_data signal_event_data;
338 	};
339 	__u64 kfd_event_data_ext;	/* pointer to an extension structure
340 					   for future exception types */
341 	__u32 event_id;		/* to KFD */
342 	__u32 pad;
343 };
344 
345 struct kfd_ioctl_wait_events_args {
346 	__u64 events_ptr;		/* pointed to struct
347 					   kfd_event_data array, to KFD */
348 	__u32 num_events;		/* to KFD */
349 	__u32 wait_for_all;		/* to KFD */
350 	__u32 timeout;		/* to KFD */
351 	__u32 wait_result;		/* from KFD */
352 };
353 
354 struct kfd_ioctl_set_scratch_backing_va_args {
355 	__u64 va_addr;	/* to KFD */
356 	__u32 gpu_id;	/* to KFD */
357 	__u32 pad;
358 };
359 
360 struct kfd_ioctl_get_tile_config_args {
361 	/* to KFD: pointer to tile array */
362 	__u64 tile_config_ptr;
363 	/* to KFD: pointer to macro tile array */
364 	__u64 macro_tile_config_ptr;
365 	/* to KFD: array size allocated by user mode
366 	 * from KFD: array size filled by kernel
367 	 */
368 	__u32 num_tile_configs;
369 	/* to KFD: array size allocated by user mode
370 	 * from KFD: array size filled by kernel
371 	 */
372 	__u32 num_macro_tile_configs;
373 
374 	__u32 gpu_id;		/* to KFD */
375 	__u32 gb_addr_config;	/* from KFD */
376 	__u32 num_banks;		/* from KFD */
377 	__u32 num_ranks;		/* from KFD */
378 	/* struct size can be extended later if needed
379 	 * without breaking ABI compatibility
380 	 */
381 };
382 
383 struct kfd_ioctl_set_trap_handler_args {
384 	__u64 tba_addr;		/* to KFD */
385 	__u64 tma_addr;		/* to KFD */
386 	__u32 gpu_id;		/* to KFD */
387 	__u32 pad;
388 };
389 
390 struct kfd_ioctl_acquire_vm_args {
391 	__u32 drm_fd;	/* to KFD */
392 	__u32 gpu_id;	/* to KFD */
393 };
394 
395 /* Allocation flags: memory types */
396 #define KFD_IOC_ALLOC_MEM_FLAGS_VRAM		(1 << 0)
397 #define KFD_IOC_ALLOC_MEM_FLAGS_GTT		(1 << 1)
398 #define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR		(1 << 2)
399 #define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL	(1 << 3)
400 #define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP	(1 << 4)
401 /* Allocation flags: attributes/access options */
402 #define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE	(1 << 31)
403 #define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE	(1 << 30)
404 #define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC		(1 << 29)
405 #define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE	(1 << 28)
406 #define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM	(1 << 27)
407 #define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT	(1 << 26)
408 #define KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED	(1 << 25)
409 #define KFD_IOC_ALLOC_MEM_FLAGS_EXT_COHERENT	(1 << 24)
410 #define KFD_IOC_ALLOC_MEM_FLAGS_CONTIGUOUS	(1 << 23)
411 
412 /* Allocate memory for later SVM (shared virtual memory) mapping.
413  *
414  * @va_addr:     virtual address of the memory to be allocated
415  *               all later mappings on all GPUs will use this address
416  * @size:        size in bytes
417  * @handle:      buffer handle returned to user mode, used to refer to
418  *               this allocation for mapping, unmapping and freeing
419  * @mmap_offset: for CPU-mapping the allocation by mmapping a render node
420  *               for userptrs this is overloaded to specify the CPU address
421  * @gpu_id:      device identifier
422  * @flags:       memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above
423  */
424 struct kfd_ioctl_alloc_memory_of_gpu_args {
425 	__u64 va_addr;		/* to KFD */
426 	__u64 size;		/* to KFD */
427 	__u64 handle;		/* from KFD */
428 	__u64 mmap_offset;	/* to KFD (userptr), from KFD (mmap offset) */
429 	__u32 gpu_id;		/* to KFD */
430 	__u32 flags;
431 };
432 
433 /* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu
434  *
435  * @handle: memory handle returned by alloc
436  */
437 struct kfd_ioctl_free_memory_of_gpu_args {
438 	__u64 handle;		/* to KFD */
439 };
440 
441 /* Map memory to one or more GPUs
442  *
443  * @handle:                memory handle returned by alloc
444  * @device_ids_array_ptr:  array of gpu_ids (__u32 per device)
445  * @n_devices:             number of devices in the array
446  * @n_success:             number of devices mapped successfully
447  *
448  * @n_success returns information to the caller how many devices from
449  * the start of the array have mapped the buffer successfully. It can
450  * be passed into a subsequent retry call to skip those devices. For
451  * the first call the caller should initialize it to 0.
452  *
453  * If the ioctl completes with return code 0 (success), n_success ==
454  * n_devices.
455  */
456 struct kfd_ioctl_map_memory_to_gpu_args {
457 	__u64 handle;			/* to KFD */
458 	__u64 device_ids_array_ptr;	/* to KFD */
459 	__u32 n_devices;		/* to KFD */
460 	__u32 n_success;		/* to/from KFD */
461 };
462 
463 /* Unmap memory from one or more GPUs
464  *
465  * same arguments as for mapping
466  */
467 struct kfd_ioctl_unmap_memory_from_gpu_args {
468 	__u64 handle;			/* to KFD */
469 	__u64 device_ids_array_ptr;	/* to KFD */
470 	__u32 n_devices;		/* to KFD */
471 	__u32 n_success;		/* to/from KFD */
472 };
473 
474 /* Allocate GWS for specific queue
475  *
476  * @queue_id:    queue's id that GWS is allocated for
477  * @num_gws:     how many GWS to allocate
478  * @first_gws:   index of the first GWS allocated.
479  *               only support contiguous GWS allocation
480  */
481 struct kfd_ioctl_alloc_queue_gws_args {
482 	__u32 queue_id;		/* to KFD */
483 	__u32 num_gws;		/* to KFD */
484 	__u32 first_gws;	/* from KFD */
485 	__u32 pad;
486 };
487 
488 struct kfd_ioctl_get_dmabuf_info_args {
489 	__u64 size;		/* from KFD */
490 	__u64 metadata_ptr;	/* to KFD */
491 	__u32 metadata_size;	/* to KFD (space allocated by user)
492 				 * from KFD (actual metadata size)
493 				 */
494 	__u32 gpu_id;	/* from KFD */
495 	__u32 flags;		/* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */
496 	__u32 dmabuf_fd;	/* to KFD */
497 };
498 
499 struct kfd_ioctl_import_dmabuf_args {
500 	__u64 va_addr;	/* to KFD */
501 	__u64 handle;	/* from KFD */
502 	__u32 gpu_id;	/* to KFD */
503 	__u32 dmabuf_fd;	/* to KFD */
504 };
505 
506 struct kfd_ioctl_export_dmabuf_args {
507 	__u64 handle;		/* to KFD */
508 	__u32 flags;		/* to KFD */
509 	__u32 dmabuf_fd;	/* from KFD */
510 };
511 
512 /*
513  * KFD SMI(System Management Interface) events
514  */
515 enum kfd_smi_event {
516 	KFD_SMI_EVENT_NONE = 0, /* not used */
517 	KFD_SMI_EVENT_VMFAULT = 1, /* event start counting at 1 */
518 	KFD_SMI_EVENT_THERMAL_THROTTLE = 2,
519 	KFD_SMI_EVENT_GPU_PRE_RESET = 3,
520 	KFD_SMI_EVENT_GPU_POST_RESET = 4,
521 	KFD_SMI_EVENT_MIGRATE_START = 5,
522 	KFD_SMI_EVENT_MIGRATE_END = 6,
523 	KFD_SMI_EVENT_PAGE_FAULT_START = 7,
524 	KFD_SMI_EVENT_PAGE_FAULT_END = 8,
525 	KFD_SMI_EVENT_QUEUE_EVICTION = 9,
526 	KFD_SMI_EVENT_QUEUE_RESTORE = 10,
527 	KFD_SMI_EVENT_UNMAP_FROM_GPU = 11,
528 
529 	/*
530 	 * max event number, as a flag bit to get events from all processes,
531 	 * this requires super user permission, otherwise will not be able to
532 	 * receive event from any process. Without this flag to receive events
533 	 * from same process.
534 	 */
535 	KFD_SMI_EVENT_ALL_PROCESS = 64
536 };
537 
538 enum KFD_MIGRATE_TRIGGERS {
539 	KFD_MIGRATE_TRIGGER_PREFETCH,
540 	KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
541 	KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU,
542 	KFD_MIGRATE_TRIGGER_TTM_EVICTION
543 };
544 
545 enum KFD_QUEUE_EVICTION_TRIGGERS {
546 	KFD_QUEUE_EVICTION_TRIGGER_SVM,
547 	KFD_QUEUE_EVICTION_TRIGGER_USERPTR,
548 	KFD_QUEUE_EVICTION_TRIGGER_TTM,
549 	KFD_QUEUE_EVICTION_TRIGGER_SUSPEND,
550 	KFD_QUEUE_EVICTION_CRIU_CHECKPOINT,
551 	KFD_QUEUE_EVICTION_CRIU_RESTORE
552 };
553 
554 enum KFD_SVM_UNMAP_TRIGGERS {
555 	KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY,
556 	KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE,
557 	KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU
558 };
559 
560 #define KFD_SMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
561 #define KFD_SMI_EVENT_MSG_SIZE	96
562 
563 struct kfd_ioctl_smi_events_args {
564 	__u32 gpuid;	/* to KFD */
565 	__u32 anon_fd;	/* from KFD */
566 };
567 
568 /**************************************************************************************************
569  * CRIU IOCTLs (Checkpoint Restore In Userspace)
570  *
571  * When checkpointing a process, the userspace application will perform:
572  * 1. PROCESS_INFO op to determine current process information. This pauses execution and evicts
573  *    all the queues.
574  * 2. CHECKPOINT op to checkpoint process contents (BOs, queues, events, svm-ranges)
575  * 3. UNPAUSE op to un-evict all the queues
576  *
577  * When restoring a process, the CRIU userspace application will perform:
578  *
579  * 1. RESTORE op to restore process contents
580  * 2. RESUME op to start the process
581  *
582  * Note: Queues are forced into an evicted state after a successful PROCESS_INFO. User
583  * application needs to perform an UNPAUSE operation after calling PROCESS_INFO.
584  */
585 
586 enum kfd_criu_op {
587 	KFD_CRIU_OP_PROCESS_INFO,
588 	KFD_CRIU_OP_CHECKPOINT,
589 	KFD_CRIU_OP_UNPAUSE,
590 	KFD_CRIU_OP_RESTORE,
591 	KFD_CRIU_OP_RESUME,
592 };
593 
594 /**
595  * kfd_ioctl_criu_args - Arguments perform CRIU operation
596  * @devices:		[in/out] User pointer to memory location for devices information.
597  * 			This is an array of type kfd_criu_device_bucket.
598  * @bos:		[in/out] User pointer to memory location for BOs information
599  * 			This is an array of type kfd_criu_bo_bucket.
600  * @priv_data:		[in/out] User pointer to memory location for private data
601  * @priv_data_size:	[in/out] Size of priv_data in bytes
602  * @num_devices:	[in/out] Number of GPUs used by process. Size of @devices array.
603  * @num_bos		[in/out] Number of BOs used by process. Size of @bos array.
604  * @num_objects:	[in/out] Number of objects used by process. Objects are opaque to
605  *				 user application.
606  * @pid:		[in/out] PID of the process being checkpointed
607  * @op			[in] Type of operation (kfd_criu_op)
608  *
609  * Return: 0 on success, -errno on failure
610  */
611 struct kfd_ioctl_criu_args {
612 	__u64 devices;		/* Used during ops: CHECKPOINT, RESTORE */
613 	__u64 bos;		/* Used during ops: CHECKPOINT, RESTORE */
614 	__u64 priv_data;	/* Used during ops: CHECKPOINT, RESTORE */
615 	__u64 priv_data_size;	/* Used during ops: PROCESS_INFO, RESTORE */
616 	__u32 num_devices;	/* Used during ops: PROCESS_INFO, RESTORE */
617 	__u32 num_bos;		/* Used during ops: PROCESS_INFO, RESTORE */
618 	__u32 num_objects;	/* Used during ops: PROCESS_INFO, RESTORE */
619 	__u32 pid;		/* Used during ops: PROCESS_INFO, RESUME */
620 	__u32 op;
621 };
622 
623 struct kfd_criu_device_bucket {
624 	__u32 user_gpu_id;
625 	__u32 actual_gpu_id;
626 	__u32 drm_fd;
627 	__u32 pad;
628 };
629 
630 struct kfd_criu_bo_bucket {
631 	__u64 addr;
632 	__u64 size;
633 	__u64 offset;
634 	__u64 restored_offset;    /* During restore, updated offset for BO */
635 	__u32 gpu_id;             /* This is the user_gpu_id */
636 	__u32 alloc_flags;
637 	__u32 dmabuf_fd;
638 	__u32 pad;
639 };
640 
641 /* CRIU IOCTLs - END */
642 /**************************************************************************************************/
643 
644 /* Register offset inside the remapped mmio page
645  */
646 enum kfd_mmio_remap {
647 	KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0,
648 	KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4,
649 };
650 
651 /* Guarantee host access to memory */
652 #define KFD_IOCTL_SVM_FLAG_HOST_ACCESS 0x00000001
653 /* Fine grained coherency between all devices with access */
654 #define KFD_IOCTL_SVM_FLAG_COHERENT    0x00000002
655 /* Use any GPU in same hive as preferred device */
656 #define KFD_IOCTL_SVM_FLAG_HIVE_LOCAL  0x00000004
657 /* GPUs only read, allows replication */
658 #define KFD_IOCTL_SVM_FLAG_GPU_RO      0x00000008
659 /* Allow execution on GPU */
660 #define KFD_IOCTL_SVM_FLAG_GPU_EXEC    0x00000010
661 /* GPUs mostly read, may allow similar optimizations as RO, but writes fault */
662 #define KFD_IOCTL_SVM_FLAG_GPU_READ_MOSTLY     0x00000020
663 /* Keep GPU memory mapping always valid as if XNACK is disable */
664 #define KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED   0x00000040
665 /* Fine grained coherency between all devices using device-scope atomics */
666 #define KFD_IOCTL_SVM_FLAG_EXT_COHERENT        0x00000080
667 
668 /**
669  * kfd_ioctl_svm_op - SVM ioctl operations
670  *
671  * @KFD_IOCTL_SVM_OP_SET_ATTR: Modify one or more attributes
672  * @KFD_IOCTL_SVM_OP_GET_ATTR: Query one or more attributes
673  */
674 enum kfd_ioctl_svm_op {
675 	KFD_IOCTL_SVM_OP_SET_ATTR,
676 	KFD_IOCTL_SVM_OP_GET_ATTR
677 };
678 
679 /** kfd_ioctl_svm_location - Enum for preferred and prefetch locations
680  *
681  * GPU IDs are used to specify GPUs as preferred and prefetch locations.
682  * Below definitions are used for system memory or for leaving the preferred
683  * location unspecified.
684  */
685 enum kfd_ioctl_svm_location {
686 	KFD_IOCTL_SVM_LOCATION_SYSMEM = 0,
687 	KFD_IOCTL_SVM_LOCATION_UNDEFINED = 0xffffffff
688 };
689 
690 /**
691  * kfd_ioctl_svm_attr_type - SVM attribute types
692  *
693  * @KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: gpuid of the preferred location, 0 for
694  *                                    system memory
695  * @KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: gpuid of the prefetch location, 0 for
696  *                                   system memory. Setting this triggers an
697  *                                   immediate prefetch (migration).
698  * @KFD_IOCTL_SVM_ATTR_ACCESS:
699  * @KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
700  * @KFD_IOCTL_SVM_ATTR_NO_ACCESS: specify memory access for the gpuid given
701  *                                by the attribute value
702  * @KFD_IOCTL_SVM_ATTR_SET_FLAGS: bitmask of flags to set (see
703  *                                KFD_IOCTL_SVM_FLAG_...)
704  * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS: bitmask of flags to clear
705  * @KFD_IOCTL_SVM_ATTR_GRANULARITY: migration granularity
706  *                                  (log2 num pages)
707  */
708 enum kfd_ioctl_svm_attr_type {
709 	KFD_IOCTL_SVM_ATTR_PREFERRED_LOC,
710 	KFD_IOCTL_SVM_ATTR_PREFETCH_LOC,
711 	KFD_IOCTL_SVM_ATTR_ACCESS,
712 	KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE,
713 	KFD_IOCTL_SVM_ATTR_NO_ACCESS,
714 	KFD_IOCTL_SVM_ATTR_SET_FLAGS,
715 	KFD_IOCTL_SVM_ATTR_CLR_FLAGS,
716 	KFD_IOCTL_SVM_ATTR_GRANULARITY
717 };
718 
719 /**
720  * kfd_ioctl_svm_attribute - Attributes as pairs of type and value
721  *
722  * The meaning of the @value depends on the attribute type.
723  *
724  * @type: attribute type (see enum @kfd_ioctl_svm_attr_type)
725  * @value: attribute value
726  */
727 struct kfd_ioctl_svm_attribute {
728 	__u32 type;
729 	__u32 value;
730 };
731 
732 /**
733  * kfd_ioctl_svm_args - Arguments for SVM ioctl
734  *
735  * @op specifies the operation to perform (see enum
736  * @kfd_ioctl_svm_op).  @start_addr and @size are common for all
737  * operations.
738  *
739  * A variable number of attributes can be given in @attrs.
740  * @nattr specifies the number of attributes. New attributes can be
741  * added in the future without breaking the ABI. If unknown attributes
742  * are given, the function returns -EINVAL.
743  *
744  * @KFD_IOCTL_SVM_OP_SET_ATTR sets attributes for a virtual address
745  * range. It may overlap existing virtual address ranges. If it does,
746  * the existing ranges will be split such that the attribute changes
747  * only apply to the specified address range.
748  *
749  * @KFD_IOCTL_SVM_OP_GET_ATTR returns the intersection of attributes
750  * over all memory in the given range and returns the result as the
751  * attribute value. If different pages have different preferred or
752  * prefetch locations, 0xffffffff will be returned for
753  * @KFD_IOCTL_SVM_ATTR_PREFERRED_LOC or
754  * @KFD_IOCTL_SVM_ATTR_PREFETCH_LOC resepctively. For
755  * @KFD_IOCTL_SVM_ATTR_SET_FLAGS, flags of all pages will be
756  * aggregated by bitwise AND. That means, a flag will be set in the
757  * output, if that flag is set for all pages in the range. For
758  * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS, flags of all pages will be
759  * aggregated by bitwise NOR. That means, a flag will be set in the
760  * output, if that flag is clear for all pages in the range.
761  * The minimum migration granularity throughout the range will be
762  * returned for @KFD_IOCTL_SVM_ATTR_GRANULARITY.
763  *
764  * Querying of accessibility attributes works by initializing the
765  * attribute type to @KFD_IOCTL_SVM_ATTR_ACCESS and the value to the
766  * GPUID being queried. Multiple attributes can be given to allow
767  * querying multiple GPUIDs. The ioctl function overwrites the
768  * attribute type to indicate the access for the specified GPU.
769  */
770 struct kfd_ioctl_svm_args {
771 	__u64 start_addr;
772 	__u64 size;
773 	__u32 op;
774 	__u32 nattr;
775 	/* Variable length array of attributes */
776 	struct kfd_ioctl_svm_attribute attrs[];
777 };
778 
779 /**
780  * kfd_ioctl_set_xnack_mode_args - Arguments for set_xnack_mode
781  *
782  * @xnack_enabled:       [in/out] Whether to enable XNACK mode for this process
783  *
784  * @xnack_enabled indicates whether recoverable page faults should be
785  * enabled for the current process. 0 means disabled, positive means
786  * enabled, negative means leave unchanged. If enabled, virtual address
787  * translations on GFXv9 and later AMD GPUs can return XNACK and retry
788  * the access until a valid PTE is available. This is used to implement
789  * device page faults.
790  *
791  * On output, @xnack_enabled returns the (new) current mode (0 or
792  * positive). Therefore, a negative input value can be used to query
793  * the current mode without changing it.
794  *
795  * The XNACK mode fundamentally changes the way SVM managed memory works
796  * in the driver, with subtle effects on application performance and
797  * functionality.
798  *
799  * Enabling XNACK mode requires shader programs to be compiled
800  * differently. Furthermore, not all GPUs support changing the mode
801  * per-process. Therefore changing the mode is only allowed while no
802  * user mode queues exist in the process. This ensure that no shader
803  * code is running that may be compiled for the wrong mode. And GPUs
804  * that cannot change to the requested mode will prevent the XNACK
805  * mode from occurring. All GPUs used by the process must be in the
806  * same XNACK mode.
807  *
808  * GFXv8 or older GPUs do not support 48 bit virtual addresses or SVM.
809  * Therefore those GPUs are not considered for the XNACK mode switch.
810  *
811  * Return: 0 on success, -errno on failure
812  */
813 struct kfd_ioctl_set_xnack_mode_args {
814 	__s32 xnack_enabled;
815 };
816 
817 /* Wave launch override modes */
818 enum kfd_dbg_trap_override_mode {
819 	KFD_DBG_TRAP_OVERRIDE_OR = 0,
820 	KFD_DBG_TRAP_OVERRIDE_REPLACE = 1
821 };
822 
823 /* Wave launch overrides */
824 enum kfd_dbg_trap_mask {
825 	KFD_DBG_TRAP_MASK_FP_INVALID = 1,
826 	KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL = 2,
827 	KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO = 4,
828 	KFD_DBG_TRAP_MASK_FP_OVERFLOW = 8,
829 	KFD_DBG_TRAP_MASK_FP_UNDERFLOW = 16,
830 	KFD_DBG_TRAP_MASK_FP_INEXACT = 32,
831 	KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO = 64,
832 	KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH = 128,
833 	KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION = 256,
834 	KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_START = (1 << 30),
835 	KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_END = (1 << 31)
836 };
837 
838 /* Wave launch modes */
839 enum kfd_dbg_trap_wave_launch_mode {
840 	KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL = 0,
841 	KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT = 1,
842 	KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG = 3
843 };
844 
845 /* Address watch modes */
846 enum kfd_dbg_trap_address_watch_mode {
847 	KFD_DBG_TRAP_ADDRESS_WATCH_MODE_READ = 0,
848 	KFD_DBG_TRAP_ADDRESS_WATCH_MODE_NONREAD = 1,
849 	KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ATOMIC = 2,
850 	KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ALL = 3
851 };
852 
853 /* Additional wave settings */
854 enum kfd_dbg_trap_flags {
855 	KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP = 1,
856 };
857 
858 /* Trap exceptions */
859 enum kfd_dbg_trap_exception_code {
860 	EC_NONE = 0,
861 	/* per queue */
862 	EC_QUEUE_WAVE_ABORT = 1,
863 	EC_QUEUE_WAVE_TRAP = 2,
864 	EC_QUEUE_WAVE_MATH_ERROR = 3,
865 	EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION = 4,
866 	EC_QUEUE_WAVE_MEMORY_VIOLATION = 5,
867 	EC_QUEUE_WAVE_APERTURE_VIOLATION = 6,
868 	EC_QUEUE_PACKET_DISPATCH_DIM_INVALID = 16,
869 	EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID = 17,
870 	EC_QUEUE_PACKET_DISPATCH_CODE_INVALID = 18,
871 	EC_QUEUE_PACKET_RESERVED = 19,
872 	EC_QUEUE_PACKET_UNSUPPORTED = 20,
873 	EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID = 21,
874 	EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID = 22,
875 	EC_QUEUE_PACKET_VENDOR_UNSUPPORTED = 23,
876 	EC_QUEUE_PREEMPTION_ERROR = 30,
877 	EC_QUEUE_NEW = 31,
878 	/* per device */
879 	EC_DEVICE_QUEUE_DELETE = 32,
880 	EC_DEVICE_MEMORY_VIOLATION = 33,
881 	EC_DEVICE_RAS_ERROR = 34,
882 	EC_DEVICE_FATAL_HALT = 35,
883 	EC_DEVICE_NEW = 36,
884 	/* per process */
885 	EC_PROCESS_RUNTIME = 48,
886 	EC_PROCESS_DEVICE_REMOVE = 49,
887 	EC_MAX
888 };
889 
890 /* Mask generated by ecode in kfd_dbg_trap_exception_code */
891 #define KFD_EC_MASK(ecode)	(1ULL << (ecode - 1))
892 
893 /* Masks for exception code type checks below */
894 #define KFD_EC_MASK_QUEUE	(KFD_EC_MASK(EC_QUEUE_WAVE_ABORT) |	\
895 				 KFD_EC_MASK(EC_QUEUE_WAVE_TRAP) |	\
896 				 KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR) |	\
897 				 KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION) |	\
898 				 KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION) |	\
899 				 KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION) |	\
900 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) |	\
901 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) |	\
902 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) |	\
903 				 KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) |	\
904 				 KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) |	\
905 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) |	\
906 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) |	\
907 				 KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED)	|	\
908 				 KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR)	|	\
909 				 KFD_EC_MASK(EC_QUEUE_NEW))
910 #define KFD_EC_MASK_DEVICE	(KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE) |		\
911 				 KFD_EC_MASK(EC_DEVICE_RAS_ERROR) |		\
912 				 KFD_EC_MASK(EC_DEVICE_FATAL_HALT) |		\
913 				 KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION) |	\
914 				 KFD_EC_MASK(EC_DEVICE_NEW))
915 #define KFD_EC_MASK_PROCESS	(KFD_EC_MASK(EC_PROCESS_RUNTIME) |	\
916 				 KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE))
917 #define KFD_EC_MASK_PACKET	(KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) |	\
918 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) |	\
919 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) |	\
920 				 KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) |	\
921 				 KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) |	\
922 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) |	\
923 				 KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) |	\
924 				 KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED))
925 
926 /* Checks for exception code types for KFD search */
927 #define KFD_DBG_EC_IS_VALID(ecode) (ecode > EC_NONE && ecode < EC_MAX)
928 #define KFD_DBG_EC_TYPE_IS_QUEUE(ecode)					\
929 			(KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_QUEUE))
930 #define KFD_DBG_EC_TYPE_IS_DEVICE(ecode)				\
931 			(KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_DEVICE))
932 #define KFD_DBG_EC_TYPE_IS_PROCESS(ecode)				\
933 			(KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS))
934 #define KFD_DBG_EC_TYPE_IS_PACKET(ecode)				\
935 			(KFD_DBG_EC_IS_VALID(ecode) && !!(KFD_EC_MASK(ecode) & KFD_EC_MASK_PACKET))
936 
937 
938 /* Runtime enable states */
939 enum kfd_dbg_runtime_state {
940 	DEBUG_RUNTIME_STATE_DISABLED = 0,
941 	DEBUG_RUNTIME_STATE_ENABLED = 1,
942 	DEBUG_RUNTIME_STATE_ENABLED_BUSY = 2,
943 	DEBUG_RUNTIME_STATE_ENABLED_ERROR = 3
944 };
945 
946 /* Runtime enable status */
947 struct kfd_runtime_info {
948 	__u64 r_debug;
949 	__u32 runtime_state;
950 	__u32 ttmp_setup;
951 };
952 
953 /* Enable modes for runtime enable */
954 #define KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK	1
955 #define KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK	2
956 
957 /**
958  * kfd_ioctl_runtime_enable_args - Arguments for runtime enable
959  *
960  * Coordinates debug exception signalling and debug device enablement with runtime.
961  *
962  * @r_debug - pointer to user struct for sharing information between ROCr and the debuggger
963  * @mode_mask - mask to set mode
964  *	KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK - enable runtime for debugging, otherwise disable
965  *	KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK - enable trap temporary setup (ignore on disable)
966  * @capabilities_mask - mask to notify runtime on what KFD supports
967  *
968  * Return - 0 on SUCCESS.
969  *	  - EBUSY if runtime enable call already pending.
970  *	  - EEXIST if user queues already active prior to call.
971  *	    If process is debug enabled, runtime enable will enable debug devices and
972  *	    wait for debugger process to send runtime exception EC_PROCESS_RUNTIME
973  *	    to unblock - see kfd_ioctl_dbg_trap_args.
974  *
975  */
976 struct kfd_ioctl_runtime_enable_args {
977 	__u64 r_debug;
978 	__u32 mode_mask;
979 	__u32 capabilities_mask;
980 };
981 
982 /* Queue information */
983 struct kfd_queue_snapshot_entry {
984 	__u64 exception_status;
985 	__u64 ring_base_address;
986 	__u64 write_pointer_address;
987 	__u64 read_pointer_address;
988 	__u64 ctx_save_restore_address;
989 	__u32 queue_id;
990 	__u32 gpu_id;
991 	__u32 ring_size;
992 	__u32 queue_type;
993 	__u32 ctx_save_restore_area_size;
994 	__u32 reserved;
995 };
996 
997 /* Queue status return for suspend/resume */
998 #define KFD_DBG_QUEUE_ERROR_BIT		30
999 #define KFD_DBG_QUEUE_INVALID_BIT	31
1000 #define KFD_DBG_QUEUE_ERROR_MASK	(1 << KFD_DBG_QUEUE_ERROR_BIT)
1001 #define KFD_DBG_QUEUE_INVALID_MASK	(1 << KFD_DBG_QUEUE_INVALID_BIT)
1002 
1003 /* Context save area header information */
1004 struct kfd_context_save_area_header {
1005 	struct {
1006 		__u32 control_stack_offset;
1007 		__u32 control_stack_size;
1008 		__u32 wave_state_offset;
1009 		__u32 wave_state_size;
1010 	} wave_state;
1011 	__u32 debug_offset;
1012 	__u32 debug_size;
1013 	__u64 err_payload_addr;
1014 	__u32 err_event_id;
1015 	__u32 reserved1;
1016 };
1017 
1018 /*
1019  * Debug operations
1020  *
1021  * For specifics on usage and return values, see documentation per operation
1022  * below.  Otherwise, generic error returns apply:
1023  *	- ESRCH if the process to debug does not exist.
1024  *
1025  *	- EINVAL (with KFD_IOC_DBG_TRAP_ENABLE exempt) if operation
1026  *		 KFD_IOC_DBG_TRAP_ENABLE has not succeeded prior.
1027  *		 Also returns this error if GPU hardware scheduling is not supported.
1028  *
1029  *	- EPERM (with KFD_IOC_DBG_TRAP_DISABLE exempt) if target process is not
1030  *		 PTRACE_ATTACHED.  KFD_IOC_DBG_TRAP_DISABLE is exempt to allow
1031  *		 clean up of debug mode as long as process is debug enabled.
1032  *
1033  *	- EACCES if any DBG_HW_OP (debug hardware operation) is requested when
1034  *		 AMDKFD_IOC_RUNTIME_ENABLE has not succeeded prior.
1035  *
1036  *	- ENODEV if any GPU does not support debugging on a DBG_HW_OP call.
1037  *
1038  *	- Other errors may be returned when a DBG_HW_OP occurs while the GPU
1039  *	  is in a fatal state.
1040  *
1041  */
1042 enum kfd_dbg_trap_operations {
1043 	KFD_IOC_DBG_TRAP_ENABLE = 0,
1044 	KFD_IOC_DBG_TRAP_DISABLE = 1,
1045 	KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT = 2,
1046 	KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED = 3,
1047 	KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE = 4,  /* DBG_HW_OP */
1048 	KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE = 5,      /* DBG_HW_OP */
1049 	KFD_IOC_DBG_TRAP_SUSPEND_QUEUES = 6,		/* DBG_HW_OP */
1050 	KFD_IOC_DBG_TRAP_RESUME_QUEUES = 7,		/* DBG_HW_OP */
1051 	KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH = 8,	/* DBG_HW_OP */
1052 	KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH = 9,	/* DBG_HW_OP */
1053 	KFD_IOC_DBG_TRAP_SET_FLAGS = 10,
1054 	KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT = 11,
1055 	KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO = 12,
1056 	KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT = 13,
1057 	KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT = 14
1058 };
1059 
1060 /**
1061  * kfd_ioctl_dbg_trap_enable_args
1062  *
1063  *     Arguments for KFD_IOC_DBG_TRAP_ENABLE.
1064  *
1065  *     Enables debug session for target process. Call @op KFD_IOC_DBG_TRAP_DISABLE in
1066  *     kfd_ioctl_dbg_trap_args to disable debug session.
1067  *
1068  *     @exception_mask (IN)	- exceptions to raise to the debugger
1069  *     @rinfo_ptr      (IN)	- pointer to runtime info buffer (see kfd_runtime_info)
1070  *     @rinfo_size     (IN/OUT)	- size of runtime info buffer in bytes
1071  *     @dbg_fd	       (IN)	- fd the KFD will nofify the debugger with of raised
1072  *				  exceptions set in exception_mask.
1073  *
1074  *     Generic errors apply (see kfd_dbg_trap_operations).
1075  *     Return - 0 on SUCCESS.
1076  *		Copies KFD saved kfd_runtime_info to @rinfo_ptr on enable.
1077  *		Size of kfd_runtime saved by the KFD returned to @rinfo_size.
1078  *            - EBADF if KFD cannot get a reference to dbg_fd.
1079  *            - EFAULT if KFD cannot copy runtime info to rinfo_ptr.
1080  *            - EINVAL if target process is already debug enabled.
1081  *
1082  */
1083 struct kfd_ioctl_dbg_trap_enable_args {
1084 	__u64 exception_mask;
1085 	__u64 rinfo_ptr;
1086 	__u32 rinfo_size;
1087 	__u32 dbg_fd;
1088 };
1089 
1090 /**
1091  * kfd_ioctl_dbg_trap_send_runtime_event_args
1092  *
1093  *
1094  *     Arguments for KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT.
1095  *     Raises exceptions to runtime.
1096  *
1097  *     @exception_mask (IN) - exceptions to raise to runtime
1098  *     @gpu_id	       (IN) - target device id
1099  *     @queue_id       (IN) - target queue id
1100  *
1101  *     Generic errors apply (see kfd_dbg_trap_operations).
1102  *     Return - 0 on SUCCESS.
1103  *	      - ENODEV if gpu_id not found.
1104  *		If exception_mask contains EC_PROCESS_RUNTIME, unblocks pending
1105  *		AMDKFD_IOC_RUNTIME_ENABLE call - see kfd_ioctl_runtime_enable_args.
1106  *		All other exceptions are raised to runtime through err_payload_addr.
1107  *		See kfd_context_save_area_header.
1108  */
1109 struct kfd_ioctl_dbg_trap_send_runtime_event_args {
1110 	__u64 exception_mask;
1111 	__u32 gpu_id;
1112 	__u32 queue_id;
1113 };
1114 
1115 /**
1116  * kfd_ioctl_dbg_trap_set_exceptions_enabled_args
1117  *
1118  *     Arguments for KFD_IOC_SET_EXCEPTIONS_ENABLED
1119  *     Set new exceptions to be raised to the debugger.
1120  *
1121  *     @exception_mask (IN) - new exceptions to raise the debugger
1122  *
1123  *     Generic errors apply (see kfd_dbg_trap_operations).
1124  *     Return - 0 on SUCCESS.
1125  */
1126 struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args {
1127 	__u64 exception_mask;
1128 };
1129 
1130 /**
1131  * kfd_ioctl_dbg_trap_set_wave_launch_override_args
1132  *
1133  *     Arguments for KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE
1134  *     Enable HW exceptions to raise trap.
1135  *
1136  *     @override_mode	     (IN)     - see kfd_dbg_trap_override_mode
1137  *     @enable_mask	     (IN/OUT) - reference kfd_dbg_trap_mask.
1138  *					IN is the override modes requested to be enabled.
1139  *					OUT is referenced in Return below.
1140  *     @support_request_mask (IN/OUT) - reference kfd_dbg_trap_mask.
1141  *					IN is the override modes requested for support check.
1142  *					OUT is referenced in Return below.
1143  *
1144  *     Generic errors apply (see kfd_dbg_trap_operations).
1145  *     Return - 0 on SUCCESS.
1146  *		Previous enablement is returned in @enable_mask.
1147  *		Actual override support is returned in @support_request_mask.
1148  *	      - EINVAL if override mode is not supported.
1149  *	      - EACCES if trap support requested is not actually supported.
1150  *		i.e. enable_mask (IN) is not a subset of support_request_mask (OUT).
1151  *		Otherwise it is considered a generic error (see kfd_dbg_trap_operations).
1152  */
1153 struct kfd_ioctl_dbg_trap_set_wave_launch_override_args {
1154 	__u32 override_mode;
1155 	__u32 enable_mask;
1156 	__u32 support_request_mask;
1157 	__u32 pad;
1158 };
1159 
1160 /**
1161  * kfd_ioctl_dbg_trap_set_wave_launch_mode_args
1162  *
1163  *     Arguments for KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE
1164  *     Set wave launch mode.
1165  *
1166  *     @mode (IN) - see kfd_dbg_trap_wave_launch_mode
1167  *
1168  *     Generic errors apply (see kfd_dbg_trap_operations).
1169  *     Return - 0 on SUCCESS.
1170  */
1171 struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args {
1172 	__u32 launch_mode;
1173 	__u32 pad;
1174 };
1175 
1176 /**
1177  * kfd_ioctl_dbg_trap_suspend_queues_ags
1178  *
1179  *     Arguments for KFD_IOC_DBG_TRAP_SUSPEND_QUEUES
1180  *     Suspend queues.
1181  *
1182  *     @exception_mask	(IN) - raised exceptions to clear
1183  *     @queue_array_ptr (IN) - pointer to array of queue ids (u32 per queue id)
1184  *			       to suspend
1185  *     @num_queues	(IN) - number of queues to suspend in @queue_array_ptr
1186  *     @grace_period	(IN) - wave time allowance before preemption
1187  *			       per 1K GPU clock cycle unit
1188  *
1189  *     Generic errors apply (see kfd_dbg_trap_operations).
1190  *     Destruction of a suspended queue is blocked until the queue is
1191  *     resumed.  This allows the debugger to access queue information and
1192  *     the its context save area without running into a race condition on
1193  *     queue destruction.
1194  *     Automatically copies per queue context save area header information
1195  *     into the save area base
1196  *     (see kfd_queue_snapshot_entry and kfd_context_save_area_header).
1197  *
1198  *     Return - Number of queues suspended on SUCCESS.
1199  *	.	KFD_DBG_QUEUE_ERROR_MASK and KFD_DBG_QUEUE_INVALID_MASK masked
1200  *		for each queue id in @queue_array_ptr array reports unsuccessful
1201  *		suspend reason.
1202  *		KFD_DBG_QUEUE_ERROR_MASK = HW failure.
1203  *		KFD_DBG_QUEUE_INVALID_MASK = queue does not exist, is new or
1204  *		is being destroyed.
1205  */
1206 struct kfd_ioctl_dbg_trap_suspend_queues_args {
1207 	__u64 exception_mask;
1208 	__u64 queue_array_ptr;
1209 	__u32 num_queues;
1210 	__u32 grace_period;
1211 };
1212 
1213 /**
1214  * kfd_ioctl_dbg_trap_resume_queues_args
1215  *
1216  *     Arguments for KFD_IOC_DBG_TRAP_RESUME_QUEUES
1217  *     Resume queues.
1218  *
1219  *     @queue_array_ptr (IN) - pointer to array of queue ids (u32 per queue id)
1220  *			       to resume
1221  *     @num_queues	(IN) - number of queues to resume in @queue_array_ptr
1222  *
1223  *     Generic errors apply (see kfd_dbg_trap_operations).
1224  *     Return - Number of queues resumed on SUCCESS.
1225  *		KFD_DBG_QUEUE_ERROR_MASK and KFD_DBG_QUEUE_INVALID_MASK mask
1226  *		for each queue id in @queue_array_ptr array reports unsuccessful
1227  *		resume reason.
1228  *		KFD_DBG_QUEUE_ERROR_MASK = HW failure.
1229  *		KFD_DBG_QUEUE_INVALID_MASK = queue does not exist.
1230  */
1231 struct kfd_ioctl_dbg_trap_resume_queues_args {
1232 	__u64 queue_array_ptr;
1233 	__u32 num_queues;
1234 	__u32 pad;
1235 };
1236 
1237 /**
1238  * kfd_ioctl_dbg_trap_set_node_address_watch_args
1239  *
1240  *     Arguments for KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH
1241  *     Sets address watch for device.
1242  *
1243  *     @address	(IN)  - watch address to set
1244  *     @mode    (IN)  - see kfd_dbg_trap_address_watch_mode
1245  *     @mask    (IN)  - watch address mask
1246  *     @gpu_id  (IN)  - target gpu to set watch point
1247  *     @id      (OUT) - watch id allocated
1248  *
1249  *     Generic errors apply (see kfd_dbg_trap_operations).
1250  *     Return - 0 on SUCCESS.
1251  *		Allocated watch ID returned to @id.
1252  *	      - ENODEV if gpu_id not found.
1253  *	      - ENOMEM if watch IDs can be allocated
1254  */
1255 struct kfd_ioctl_dbg_trap_set_node_address_watch_args {
1256 	__u64 address;
1257 	__u32 mode;
1258 	__u32 mask;
1259 	__u32 gpu_id;
1260 	__u32 id;
1261 };
1262 
1263 /**
1264  * kfd_ioctl_dbg_trap_clear_node_address_watch_args
1265  *
1266  *     Arguments for KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH
1267  *     Clear address watch for device.
1268  *
1269  *     @gpu_id  (IN)  - target device to clear watch point
1270  *     @id      (IN) - allocated watch id to clear
1271  *
1272  *     Generic errors apply (see kfd_dbg_trap_operations).
1273  *     Return - 0 on SUCCESS.
1274  *	      - ENODEV if gpu_id not found.
1275  *	      - EINVAL if watch ID has not been allocated.
1276  */
1277 struct kfd_ioctl_dbg_trap_clear_node_address_watch_args {
1278 	__u32 gpu_id;
1279 	__u32 id;
1280 };
1281 
1282 /**
1283  * kfd_ioctl_dbg_trap_set_flags_args
1284  *
1285  *     Arguments for KFD_IOC_DBG_TRAP_SET_FLAGS
1286  *     Sets flags for wave behaviour.
1287  *
1288  *     @flags (IN/OUT) - IN = flags to enable, OUT = flags previously enabled
1289  *
1290  *     Generic errors apply (see kfd_dbg_trap_operations).
1291  *     Return - 0 on SUCCESS.
1292  *	      - EACCESS if any debug device does not allow flag options.
1293  */
1294 struct kfd_ioctl_dbg_trap_set_flags_args {
1295 	__u32 flags;
1296 	__u32 pad;
1297 };
1298 
1299 /**
1300  * kfd_ioctl_dbg_trap_query_debug_event_args
1301  *
1302  *     Arguments for KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT
1303  *
1304  *     Find one or more raised exceptions. This function can return multiple
1305  *     exceptions from a single queue or a single device with one call. To find
1306  *     all raised exceptions, this function must be called repeatedly until it
1307  *     returns -EAGAIN. Returned exceptions can optionally be cleared by
1308  *     setting the corresponding bit in the @exception_mask input parameter.
1309  *     However, clearing an exception prevents retrieving further information
1310  *     about it with KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO.
1311  *
1312  *     @exception_mask (IN/OUT) - exception to clear (IN) and raised (OUT)
1313  *     @gpu_id	       (OUT)    - gpu id of exceptions raised
1314  *     @queue_id       (OUT)    - queue id of exceptions raised
1315  *
1316  *     Generic errors apply (see kfd_dbg_trap_operations).
1317  *     Return - 0 on raised exception found
1318  *              Raised exceptions found are returned in @exception mask
1319  *              with reported source id returned in @gpu_id or @queue_id.
1320  *            - EAGAIN if no raised exception has been found
1321  */
1322 struct kfd_ioctl_dbg_trap_query_debug_event_args {
1323 	__u64 exception_mask;
1324 	__u32 gpu_id;
1325 	__u32 queue_id;
1326 };
1327 
1328 /**
1329  * kfd_ioctl_dbg_trap_query_exception_info_args
1330  *
1331  *     Arguments KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO
1332  *     Get additional info on raised exception.
1333  *
1334  *     @info_ptr	(IN)	 - pointer to exception info buffer to copy to
1335  *     @info_size	(IN/OUT) - exception info buffer size (bytes)
1336  *     @source_id	(IN)     - target gpu or queue id
1337  *     @exception_code	(IN)     - target exception
1338  *     @clear_exception	(IN)     - clear raised @exception_code exception
1339  *				   (0 = false, 1 = true)
1340  *
1341  *     Generic errors apply (see kfd_dbg_trap_operations).
1342  *     Return - 0 on SUCCESS.
1343  *              If @exception_code is EC_DEVICE_MEMORY_VIOLATION, copy @info_size(OUT)
1344  *		bytes of memory exception data to @info_ptr.
1345  *              If @exception_code is EC_PROCESS_RUNTIME, copy saved
1346  *              kfd_runtime_info to @info_ptr.
1347  *              Actual required @info_ptr size (bytes) is returned in @info_size.
1348  */
1349 struct kfd_ioctl_dbg_trap_query_exception_info_args {
1350 	__u64 info_ptr;
1351 	__u32 info_size;
1352 	__u32 source_id;
1353 	__u32 exception_code;
1354 	__u32 clear_exception;
1355 };
1356 
1357 /**
1358  * kfd_ioctl_dbg_trap_get_queue_snapshot_args
1359  *
1360  *     Arguments KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT
1361  *     Get queue information.
1362  *
1363  *     @exception_mask	 (IN)	  - exceptions raised to clear
1364  *     @snapshot_buf_ptr (IN)	  - queue snapshot entry buffer (see kfd_queue_snapshot_entry)
1365  *     @num_queues	 (IN/OUT) - number of queue snapshot entries
1366  *         The debugger specifies the size of the array allocated in @num_queues.
1367  *         KFD returns the number of queues that actually existed. If this is
1368  *         larger than the size specified by the debugger, KFD will not overflow
1369  *         the array allocated by the debugger.
1370  *
1371  *     @entry_size	 (IN/OUT) - size per entry in bytes
1372  *         The debugger specifies sizeof(struct kfd_queue_snapshot_entry) in
1373  *         @entry_size. KFD returns the number of bytes actually populated per
1374  *         entry. The debugger should use the KFD_IOCTL_MINOR_VERSION to determine,
1375  *         which fields in struct kfd_queue_snapshot_entry are valid. This allows
1376  *         growing the ABI in a backwards compatible manner.
1377  *         Note that entry_size(IN) should still be used to stride the snapshot buffer in the
1378  *         event that it's larger than actual kfd_queue_snapshot_entry.
1379  *
1380  *     Generic errors apply (see kfd_dbg_trap_operations).
1381  *     Return - 0 on SUCCESS.
1382  *              Copies @num_queues(IN) queue snapshot entries of size @entry_size(IN)
1383  *              into @snapshot_buf_ptr if @num_queues(IN) > 0.
1384  *              Otherwise return @num_queues(OUT) queue snapshot entries that exist.
1385  */
1386 struct kfd_ioctl_dbg_trap_queue_snapshot_args {
1387 	__u64 exception_mask;
1388 	__u64 snapshot_buf_ptr;
1389 	__u32 num_queues;
1390 	__u32 entry_size;
1391 };
1392 
1393 /**
1394  * kfd_ioctl_dbg_trap_get_device_snapshot_args
1395  *
1396  *     Arguments for KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT
1397  *     Get device information.
1398  *
1399  *     @exception_mask	 (IN)	  - exceptions raised to clear
1400  *     @snapshot_buf_ptr (IN)	  - pointer to snapshot buffer (see kfd_dbg_device_info_entry)
1401  *     @num_devices	 (IN/OUT) - number of debug devices to snapshot
1402  *         The debugger specifies the size of the array allocated in @num_devices.
1403  *         KFD returns the number of devices that actually existed. If this is
1404  *         larger than the size specified by the debugger, KFD will not overflow
1405  *         the array allocated by the debugger.
1406  *
1407  *     @entry_size	 (IN/OUT) - size per entry in bytes
1408  *         The debugger specifies sizeof(struct kfd_dbg_device_info_entry) in
1409  *         @entry_size. KFD returns the number of bytes actually populated. The
1410  *         debugger should use KFD_IOCTL_MINOR_VERSION to determine, which fields
1411  *         in struct kfd_dbg_device_info_entry are valid. This allows growing the
1412  *         ABI in a backwards compatible manner.
1413  *         Note that entry_size(IN) should still be used to stride the snapshot buffer in the
1414  *         event that it's larger than actual kfd_dbg_device_info_entry.
1415  *
1416  *     Generic errors apply (see kfd_dbg_trap_operations).
1417  *     Return - 0 on SUCCESS.
1418  *              Copies @num_devices(IN) device snapshot entries of size @entry_size(IN)
1419  *              into @snapshot_buf_ptr if @num_devices(IN) > 0.
1420  *              Otherwise return @num_devices(OUT) queue snapshot entries that exist.
1421  */
1422 struct kfd_ioctl_dbg_trap_device_snapshot_args {
1423 	__u64 exception_mask;
1424 	__u64 snapshot_buf_ptr;
1425 	__u32 num_devices;
1426 	__u32 entry_size;
1427 };
1428 
1429 /**
1430  * kfd_ioctl_dbg_trap_args
1431  *
1432  * Arguments to debug target process.
1433  *
1434  *     @pid - target process to debug
1435  *     @op  - debug operation (see kfd_dbg_trap_operations)
1436  *
1437  *     @op determines which union struct args to use.
1438  *     Refer to kern docs for each kfd_ioctl_dbg_trap_*_args struct.
1439  */
1440 struct kfd_ioctl_dbg_trap_args {
1441 	__u32 pid;
1442 	__u32 op;
1443 
1444 	union {
1445 		struct kfd_ioctl_dbg_trap_enable_args enable;
1446 		struct kfd_ioctl_dbg_trap_send_runtime_event_args send_runtime_event;
1447 		struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args set_exceptions_enabled;
1448 		struct kfd_ioctl_dbg_trap_set_wave_launch_override_args launch_override;
1449 		struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args launch_mode;
1450 		struct kfd_ioctl_dbg_trap_suspend_queues_args suspend_queues;
1451 		struct kfd_ioctl_dbg_trap_resume_queues_args resume_queues;
1452 		struct kfd_ioctl_dbg_trap_set_node_address_watch_args set_node_address_watch;
1453 		struct kfd_ioctl_dbg_trap_clear_node_address_watch_args clear_node_address_watch;
1454 		struct kfd_ioctl_dbg_trap_set_flags_args set_flags;
1455 		struct kfd_ioctl_dbg_trap_query_debug_event_args query_debug_event;
1456 		struct kfd_ioctl_dbg_trap_query_exception_info_args query_exception_info;
1457 		struct kfd_ioctl_dbg_trap_queue_snapshot_args queue_snapshot;
1458 		struct kfd_ioctl_dbg_trap_device_snapshot_args device_snapshot;
1459 	};
1460 };
1461 
1462 #define AMDKFD_IOCTL_BASE 'K'
1463 #define AMDKFD_IO(nr)			_IO(AMDKFD_IOCTL_BASE, nr)
1464 #define AMDKFD_IOR(nr, type)		_IOR(AMDKFD_IOCTL_BASE, nr, type)
1465 #define AMDKFD_IOW(nr, type)		_IOW(AMDKFD_IOCTL_BASE, nr, type)
1466 #define AMDKFD_IOWR(nr, type)		_IOWR(AMDKFD_IOCTL_BASE, nr, type)
1467 
1468 #define AMDKFD_IOC_GET_VERSION			\
1469 		AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
1470 
1471 #define AMDKFD_IOC_CREATE_QUEUE			\
1472 		AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
1473 
1474 #define AMDKFD_IOC_DESTROY_QUEUE		\
1475 		AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
1476 
1477 #define AMDKFD_IOC_SET_MEMORY_POLICY		\
1478 		AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
1479 
1480 #define AMDKFD_IOC_GET_CLOCK_COUNTERS		\
1481 		AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
1482 
1483 #define AMDKFD_IOC_GET_PROCESS_APERTURES	\
1484 		AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
1485 
1486 #define AMDKFD_IOC_UPDATE_QUEUE			\
1487 		AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
1488 
1489 #define AMDKFD_IOC_CREATE_EVENT			\
1490 		AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
1491 
1492 #define AMDKFD_IOC_DESTROY_EVENT		\
1493 		AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
1494 
1495 #define AMDKFD_IOC_SET_EVENT			\
1496 		AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
1497 
1498 #define AMDKFD_IOC_RESET_EVENT			\
1499 		AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
1500 
1501 #define AMDKFD_IOC_WAIT_EVENTS			\
1502 		AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
1503 
1504 #define AMDKFD_IOC_DBG_REGISTER_DEPRECATED	\
1505 		AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
1506 
1507 #define AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED	\
1508 		AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
1509 
1510 #define AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED	\
1511 		AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
1512 
1513 #define AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED	\
1514 		AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
1515 
1516 #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA	\
1517 		AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
1518 
1519 #define AMDKFD_IOC_GET_TILE_CONFIG                                      \
1520 		AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
1521 
1522 #define AMDKFD_IOC_SET_TRAP_HANDLER		\
1523 		AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args)
1524 
1525 #define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW	\
1526 		AMDKFD_IOWR(0x14,		\
1527 			struct kfd_ioctl_get_process_apertures_new_args)
1528 
1529 #define AMDKFD_IOC_ACQUIRE_VM			\
1530 		AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args)
1531 
1532 #define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU		\
1533 		AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args)
1534 
1535 #define AMDKFD_IOC_FREE_MEMORY_OF_GPU		\
1536 		AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args)
1537 
1538 #define AMDKFD_IOC_MAP_MEMORY_TO_GPU		\
1539 		AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args)
1540 
1541 #define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU	\
1542 		AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args)
1543 
1544 #define AMDKFD_IOC_SET_CU_MASK		\
1545 		AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args)
1546 
1547 #define AMDKFD_IOC_GET_QUEUE_WAVE_STATE		\
1548 		AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args)
1549 
1550 #define AMDKFD_IOC_GET_DMABUF_INFO		\
1551 		AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args)
1552 
1553 #define AMDKFD_IOC_IMPORT_DMABUF		\
1554 		AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args)
1555 
1556 #define AMDKFD_IOC_ALLOC_QUEUE_GWS		\
1557 		AMDKFD_IOWR(0x1E, struct kfd_ioctl_alloc_queue_gws_args)
1558 
1559 #define AMDKFD_IOC_SMI_EVENTS			\
1560 		AMDKFD_IOWR(0x1F, struct kfd_ioctl_smi_events_args)
1561 
1562 #define AMDKFD_IOC_SVM	AMDKFD_IOWR(0x20, struct kfd_ioctl_svm_args)
1563 
1564 #define AMDKFD_IOC_SET_XNACK_MODE		\
1565 		AMDKFD_IOWR(0x21, struct kfd_ioctl_set_xnack_mode_args)
1566 
1567 #define AMDKFD_IOC_CRIU_OP			\
1568 		AMDKFD_IOWR(0x22, struct kfd_ioctl_criu_args)
1569 
1570 #define AMDKFD_IOC_AVAILABLE_MEMORY		\
1571 		AMDKFD_IOWR(0x23, struct kfd_ioctl_get_available_memory_args)
1572 
1573 #define AMDKFD_IOC_EXPORT_DMABUF		\
1574 		AMDKFD_IOWR(0x24, struct kfd_ioctl_export_dmabuf_args)
1575 
1576 #define AMDKFD_IOC_RUNTIME_ENABLE		\
1577 		AMDKFD_IOWR(0x25, struct kfd_ioctl_runtime_enable_args)
1578 
1579 #define AMDKFD_IOC_DBG_TRAP			\
1580 		AMDKFD_IOWR(0x26, struct kfd_ioctl_dbg_trap_args)
1581 
1582 #define AMDKFD_COMMAND_START		0x01
1583 #define AMDKFD_COMMAND_END		0x27
1584 
1585 #endif
1586