1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef KFD_IOCTL_H_INCLUDED 24 #define KFD_IOCTL_H_INCLUDED 25 26 #include <drm/drm.h> 27 #include <linux/ioctl.h> 28 29 #define KFD_IOCTL_MAJOR_VERSION 1 30 #define KFD_IOCTL_MINOR_VERSION 1 31 32 struct kfd_ioctl_get_version_args { 33 __u32 major_version; /* from KFD */ 34 __u32 minor_version; /* from KFD */ 35 }; 36 37 /* For kfd_ioctl_create_queue_args.queue_type. */ 38 #define KFD_IOC_QUEUE_TYPE_COMPUTE 0 39 #define KFD_IOC_QUEUE_TYPE_SDMA 1 40 #define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 2 41 42 #define KFD_MAX_QUEUE_PERCENTAGE 100 43 #define KFD_MAX_QUEUE_PRIORITY 15 44 45 struct kfd_ioctl_create_queue_args { 46 __u64 ring_base_address; /* to KFD */ 47 __u64 write_pointer_address; /* from KFD */ 48 __u64 read_pointer_address; /* from KFD */ 49 __u64 doorbell_offset; /* from KFD */ 50 51 __u32 ring_size; /* to KFD */ 52 __u32 gpu_id; /* to KFD */ 53 __u32 queue_type; /* to KFD */ 54 __u32 queue_percentage; /* to KFD */ 55 __u32 queue_priority; /* to KFD */ 56 __u32 queue_id; /* from KFD */ 57 58 __u64 eop_buffer_address; /* to KFD */ 59 __u64 eop_buffer_size; /* to KFD */ 60 __u64 ctx_save_restore_address; /* to KFD */ 61 __u32 ctx_save_restore_size; /* to KFD */ 62 __u32 ctl_stack_size; /* to KFD */ 63 }; 64 65 struct kfd_ioctl_destroy_queue_args { 66 __u32 queue_id; /* to KFD */ 67 __u32 pad; 68 }; 69 70 struct kfd_ioctl_update_queue_args { 71 __u64 ring_base_address; /* to KFD */ 72 73 __u32 queue_id; /* to KFD */ 74 __u32 ring_size; /* to KFD */ 75 __u32 queue_percentage; /* to KFD */ 76 __u32 queue_priority; /* to KFD */ 77 }; 78 79 /* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */ 80 #define KFD_IOC_CACHE_POLICY_COHERENT 0 81 #define KFD_IOC_CACHE_POLICY_NONCOHERENT 1 82 83 struct kfd_ioctl_set_memory_policy_args { 84 __u64 alternate_aperture_base; /* to KFD */ 85 __u64 alternate_aperture_size; /* to KFD */ 86 87 __u32 gpu_id; /* to KFD */ 88 __u32 default_policy; /* to KFD */ 89 __u32 alternate_policy; /* to KFD */ 90 __u32 pad; 91 }; 92 93 /* 94 * All counters are monotonic. They are used for profiling of compute jobs. 95 * The profiling is done by userspace. 96 * 97 * In case of GPU reset, the counter should not be affected. 98 */ 99 100 struct kfd_ioctl_get_clock_counters_args { 101 __u64 gpu_clock_counter; /* from KFD */ 102 __u64 cpu_clock_counter; /* from KFD */ 103 __u64 system_clock_counter; /* from KFD */ 104 __u64 system_clock_freq; /* from KFD */ 105 106 __u32 gpu_id; /* to KFD */ 107 __u32 pad; 108 }; 109 110 struct kfd_process_device_apertures { 111 __u64 lds_base; /* from KFD */ 112 __u64 lds_limit; /* from KFD */ 113 __u64 scratch_base; /* from KFD */ 114 __u64 scratch_limit; /* from KFD */ 115 __u64 gpuvm_base; /* from KFD */ 116 __u64 gpuvm_limit; /* from KFD */ 117 __u32 gpu_id; /* from KFD */ 118 __u32 pad; 119 }; 120 121 /* 122 * AMDKFD_IOC_GET_PROCESS_APERTURES is deprecated. Use 123 * AMDKFD_IOC_GET_PROCESS_APERTURES_NEW instead, which supports an 124 * unlimited number of GPUs. 125 */ 126 #define NUM_OF_SUPPORTED_GPUS 7 127 struct kfd_ioctl_get_process_apertures_args { 128 struct kfd_process_device_apertures 129 process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */ 130 131 /* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */ 132 __u32 num_of_nodes; 133 __u32 pad; 134 }; 135 136 struct kfd_ioctl_get_process_apertures_new_args { 137 /* User allocated. Pointer to struct kfd_process_device_apertures 138 * filled in by Kernel 139 */ 140 __u64 kfd_process_device_apertures_ptr; 141 /* to KFD - indicates amount of memory present in 142 * kfd_process_device_apertures_ptr 143 * from KFD - Number of entries filled by KFD. 144 */ 145 __u32 num_of_nodes; 146 __u32 pad; 147 }; 148 149 #define MAX_ALLOWED_NUM_POINTS 100 150 #define MAX_ALLOWED_AW_BUFF_SIZE 4096 151 #define MAX_ALLOWED_WAC_BUFF_SIZE 128 152 153 struct kfd_ioctl_dbg_register_args { 154 __u32 gpu_id; /* to KFD */ 155 __u32 pad; 156 }; 157 158 struct kfd_ioctl_dbg_unregister_args { 159 __u32 gpu_id; /* to KFD */ 160 __u32 pad; 161 }; 162 163 struct kfd_ioctl_dbg_address_watch_args { 164 __u64 content_ptr; /* a pointer to the actual content */ 165 __u32 gpu_id; /* to KFD */ 166 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */ 167 }; 168 169 struct kfd_ioctl_dbg_wave_control_args { 170 __u64 content_ptr; /* a pointer to the actual content */ 171 __u32 gpu_id; /* to KFD */ 172 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */ 173 }; 174 175 /* Matching HSA_EVENTTYPE */ 176 #define KFD_IOC_EVENT_SIGNAL 0 177 #define KFD_IOC_EVENT_NODECHANGE 1 178 #define KFD_IOC_EVENT_DEVICESTATECHANGE 2 179 #define KFD_IOC_EVENT_HW_EXCEPTION 3 180 #define KFD_IOC_EVENT_SYSTEM_EVENT 4 181 #define KFD_IOC_EVENT_DEBUG_EVENT 5 182 #define KFD_IOC_EVENT_PROFILE_EVENT 6 183 #define KFD_IOC_EVENT_QUEUE_EVENT 7 184 #define KFD_IOC_EVENT_MEMORY 8 185 186 #define KFD_IOC_WAIT_RESULT_COMPLETE 0 187 #define KFD_IOC_WAIT_RESULT_TIMEOUT 1 188 #define KFD_IOC_WAIT_RESULT_FAIL 2 189 190 #define KFD_SIGNAL_EVENT_LIMIT 4096 191 192 struct kfd_ioctl_create_event_args { 193 __u64 event_page_offset; /* from KFD */ 194 __u32 event_trigger_data; /* from KFD - signal events only */ 195 __u32 event_type; /* to KFD */ 196 __u32 auto_reset; /* to KFD */ 197 __u32 node_id; /* to KFD - only valid for certain 198 event types */ 199 __u32 event_id; /* from KFD */ 200 __u32 event_slot_index; /* from KFD */ 201 }; 202 203 struct kfd_ioctl_destroy_event_args { 204 __u32 event_id; /* to KFD */ 205 __u32 pad; 206 }; 207 208 struct kfd_ioctl_set_event_args { 209 __u32 event_id; /* to KFD */ 210 __u32 pad; 211 }; 212 213 struct kfd_ioctl_reset_event_args { 214 __u32 event_id; /* to KFD */ 215 __u32 pad; 216 }; 217 218 struct kfd_memory_exception_failure { 219 __u32 NotPresent; /* Page not present or supervisor privilege */ 220 __u32 ReadOnly; /* Write access to a read-only page */ 221 __u32 NoExecute; /* Execute access to a page marked NX */ 222 __u32 pad; 223 }; 224 225 /* memory exception data*/ 226 struct kfd_hsa_memory_exception_data { 227 struct kfd_memory_exception_failure failure; 228 __u64 va; 229 __u32 gpu_id; 230 __u32 pad; 231 }; 232 233 /* Event data*/ 234 struct kfd_event_data { 235 union { 236 struct kfd_hsa_memory_exception_data memory_exception_data; 237 }; /* From KFD */ 238 __u64 kfd_event_data_ext; /* pointer to an extension structure 239 for future exception types */ 240 __u32 event_id; /* to KFD */ 241 __u32 pad; 242 }; 243 244 struct kfd_ioctl_wait_events_args { 245 __u64 events_ptr; /* pointed to struct 246 kfd_event_data array, to KFD */ 247 __u32 num_events; /* to KFD */ 248 __u32 wait_for_all; /* to KFD */ 249 __u32 timeout; /* to KFD */ 250 __u32 wait_result; /* from KFD */ 251 }; 252 253 struct kfd_ioctl_set_scratch_backing_va_args { 254 __u64 va_addr; /* to KFD */ 255 __u32 gpu_id; /* to KFD */ 256 __u32 pad; 257 }; 258 259 struct kfd_ioctl_get_tile_config_args { 260 /* to KFD: pointer to tile array */ 261 __u64 tile_config_ptr; 262 /* to KFD: pointer to macro tile array */ 263 __u64 macro_tile_config_ptr; 264 /* to KFD: array size allocated by user mode 265 * from KFD: array size filled by kernel 266 */ 267 __u32 num_tile_configs; 268 /* to KFD: array size allocated by user mode 269 * from KFD: array size filled by kernel 270 */ 271 __u32 num_macro_tile_configs; 272 273 __u32 gpu_id; /* to KFD */ 274 __u32 gb_addr_config; /* from KFD */ 275 __u32 num_banks; /* from KFD */ 276 __u32 num_ranks; /* from KFD */ 277 /* struct size can be extended later if needed 278 * without breaking ABI compatibility 279 */ 280 }; 281 282 struct kfd_ioctl_set_trap_handler_args { 283 __u64 tba_addr; /* to KFD */ 284 __u64 tma_addr; /* to KFD */ 285 __u32 gpu_id; /* to KFD */ 286 __u32 pad; 287 }; 288 289 struct kfd_ioctl_acquire_vm_args { 290 __u32 drm_fd; /* to KFD */ 291 __u32 gpu_id; /* to KFD */ 292 }; 293 294 /* Allocation flags: memory types */ 295 #define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0) 296 #define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1) 297 #define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2) 298 #define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3) 299 /* Allocation flags: attributes/access options */ 300 #define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31) 301 #define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30) 302 #define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29) 303 #define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28) 304 #define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27) 305 #define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26) 306 307 /* Allocate memory for later SVM (shared virtual memory) mapping. 308 * 309 * @va_addr: virtual address of the memory to be allocated 310 * all later mappings on all GPUs will use this address 311 * @size: size in bytes 312 * @handle: buffer handle returned to user mode, used to refer to 313 * this allocation for mapping, unmapping and freeing 314 * @mmap_offset: for CPU-mapping the allocation by mmapping a render node 315 * for userptrs this is overloaded to specify the CPU address 316 * @gpu_id: device identifier 317 * @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above 318 */ 319 struct kfd_ioctl_alloc_memory_of_gpu_args { 320 __u64 va_addr; /* to KFD */ 321 __u64 size; /* to KFD */ 322 __u64 handle; /* from KFD */ 323 __u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */ 324 __u32 gpu_id; /* to KFD */ 325 __u32 flags; 326 }; 327 328 /* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu 329 * 330 * @handle: memory handle returned by alloc 331 */ 332 struct kfd_ioctl_free_memory_of_gpu_args { 333 __u64 handle; /* to KFD */ 334 }; 335 336 /* Map memory to one or more GPUs 337 * 338 * @handle: memory handle returned by alloc 339 * @device_ids_array_ptr: array of gpu_ids (__u32 per device) 340 * @n_devices: number of devices in the array 341 * @n_success: number of devices mapped successfully 342 * 343 * @n_success returns information to the caller how many devices from 344 * the start of the array have mapped the buffer successfully. It can 345 * be passed into a subsequent retry call to skip those devices. For 346 * the first call the caller should initialize it to 0. 347 * 348 * If the ioctl completes with return code 0 (success), n_success == 349 * n_devices. 350 */ 351 struct kfd_ioctl_map_memory_to_gpu_args { 352 __u64 handle; /* to KFD */ 353 __u64 device_ids_array_ptr; /* to KFD */ 354 __u32 n_devices; /* to KFD */ 355 __u32 n_success; /* to/from KFD */ 356 }; 357 358 /* Unmap memory from one or more GPUs 359 * 360 * same arguments as for mapping 361 */ 362 struct kfd_ioctl_unmap_memory_from_gpu_args { 363 __u64 handle; /* to KFD */ 364 __u64 device_ids_array_ptr; /* to KFD */ 365 __u32 n_devices; /* to KFD */ 366 __u32 n_success; /* to/from KFD */ 367 }; 368 369 #define AMDKFD_IOCTL_BASE 'K' 370 #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr) 371 #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type) 372 #define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type) 373 #define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type) 374 375 #define AMDKFD_IOC_GET_VERSION \ 376 AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args) 377 378 #define AMDKFD_IOC_CREATE_QUEUE \ 379 AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args) 380 381 #define AMDKFD_IOC_DESTROY_QUEUE \ 382 AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args) 383 384 #define AMDKFD_IOC_SET_MEMORY_POLICY \ 385 AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args) 386 387 #define AMDKFD_IOC_GET_CLOCK_COUNTERS \ 388 AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args) 389 390 #define AMDKFD_IOC_GET_PROCESS_APERTURES \ 391 AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args) 392 393 #define AMDKFD_IOC_UPDATE_QUEUE \ 394 AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args) 395 396 #define AMDKFD_IOC_CREATE_EVENT \ 397 AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args) 398 399 #define AMDKFD_IOC_DESTROY_EVENT \ 400 AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args) 401 402 #define AMDKFD_IOC_SET_EVENT \ 403 AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args) 404 405 #define AMDKFD_IOC_RESET_EVENT \ 406 AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args) 407 408 #define AMDKFD_IOC_WAIT_EVENTS \ 409 AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args) 410 411 #define AMDKFD_IOC_DBG_REGISTER \ 412 AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args) 413 414 #define AMDKFD_IOC_DBG_UNREGISTER \ 415 AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args) 416 417 #define AMDKFD_IOC_DBG_ADDRESS_WATCH \ 418 AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args) 419 420 #define AMDKFD_IOC_DBG_WAVE_CONTROL \ 421 AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args) 422 423 #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \ 424 AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args) 425 426 #define AMDKFD_IOC_GET_TILE_CONFIG \ 427 AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args) 428 429 #define AMDKFD_IOC_SET_TRAP_HANDLER \ 430 AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args) 431 432 #define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \ 433 AMDKFD_IOWR(0x14, \ 434 struct kfd_ioctl_get_process_apertures_new_args) 435 436 #define AMDKFD_IOC_ACQUIRE_VM \ 437 AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args) 438 439 #define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \ 440 AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args) 441 442 #define AMDKFD_IOC_FREE_MEMORY_OF_GPU \ 443 AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args) 444 445 #define AMDKFD_IOC_MAP_MEMORY_TO_GPU \ 446 AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args) 447 448 #define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \ 449 AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args) 450 451 #define AMDKFD_COMMAND_START 0x01 452 #define AMDKFD_COMMAND_END 0x1A 453 454 #endif 455