1 /* 2 * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 #ifndef _UAPI_TEGRA_DRM_H_ 18 #define _UAPI_TEGRA_DRM_H_ 19 20 #include <drm/drm.h> 21 22 #define DRM_TEGRA_GEM_CREATE_TILED (1 << 0) 23 #define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1) 24 25 struct drm_tegra_gem_create { 26 __u64 size; 27 __u32 flags; 28 __u32 handle; 29 }; 30 31 struct drm_tegra_gem_mmap { 32 __u32 handle; 33 __u32 offset; 34 }; 35 36 struct drm_tegra_syncpt_read { 37 __u32 id; 38 __u32 value; 39 }; 40 41 struct drm_tegra_syncpt_incr { 42 __u32 id; 43 __u32 pad; 44 }; 45 46 struct drm_tegra_syncpt_wait { 47 __u32 id; 48 __u32 thresh; 49 __u32 timeout; 50 __u32 value; 51 }; 52 53 #define DRM_TEGRA_NO_TIMEOUT (0xffffffff) 54 55 struct drm_tegra_open_channel { 56 __u32 client; 57 __u32 pad; 58 __u64 context; 59 }; 60 61 struct drm_tegra_close_channel { 62 __u64 context; 63 }; 64 65 struct drm_tegra_get_syncpt { 66 __u64 context; 67 __u32 index; 68 __u32 id; 69 }; 70 71 struct drm_tegra_syncpt { 72 __u32 id; 73 __u32 incrs; 74 }; 75 76 struct drm_tegra_cmdbuf { 77 __u32 handle; 78 __u32 offset; 79 __u32 words; 80 __u32 pad; 81 }; 82 83 struct drm_tegra_reloc { 84 struct { 85 __u32 handle; 86 __u32 offset; 87 } cmdbuf; 88 struct { 89 __u32 handle; 90 __u32 offset; 91 } target; 92 __u32 shift; 93 __u32 pad; 94 }; 95 96 struct drm_tegra_waitchk { 97 __u32 handle; 98 __u32 offset; 99 __u32 syncpt; 100 __u32 thresh; 101 }; 102 103 struct drm_tegra_submit { 104 __u64 context; 105 __u32 num_syncpts; 106 __u32 num_cmdbufs; 107 __u32 num_relocs; 108 __u32 num_waitchks; 109 __u32 waitchk_mask; 110 __u32 timeout; 111 __u32 pad; 112 __u64 syncpts; 113 __u64 cmdbufs; 114 __u64 relocs; 115 __u64 waitchks; 116 __u32 fence; /* Return value */ 117 118 __u32 reserved[5]; /* future expansion */ 119 }; 120 121 #define DRM_TEGRA_GEM_CREATE 0x00 122 #define DRM_TEGRA_GEM_MMAP 0x01 123 #define DRM_TEGRA_SYNCPT_READ 0x02 124 #define DRM_TEGRA_SYNCPT_INCR 0x03 125 #define DRM_TEGRA_SYNCPT_WAIT 0x04 126 #define DRM_TEGRA_OPEN_CHANNEL 0x05 127 #define DRM_TEGRA_CLOSE_CHANNEL 0x06 128 #define DRM_TEGRA_GET_SYNCPT 0x07 129 #define DRM_TEGRA_SUBMIT 0x08 130 131 #define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create) 132 #define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap) 133 #define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read) 134 #define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr) 135 #define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait) 136 #define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel) 137 #define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel) 138 #define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt) 139 #define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit) 140 141 #endif 142