1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 /* 3 * Copyright (C) 2020-2023 Intel Corporation 4 */ 5 6 #ifndef __UAPI_IVPU_DRM_H__ 7 #define __UAPI_IVPU_DRM_H__ 8 9 #include "drm.h" 10 11 #if defined(__cplusplus) 12 extern "C" { 13 #endif 14 15 #define DRM_IVPU_DRIVER_MAJOR 1 16 #define DRM_IVPU_DRIVER_MINOR 0 17 18 #define DRM_IVPU_GET_PARAM 0x00 19 #define DRM_IVPU_SET_PARAM 0x01 20 21 #define DRM_IOCTL_IVPU_GET_PARAM \ 22 DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param) 23 24 #define DRM_IOCTL_IVPU_SET_PARAM \ 25 DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SET_PARAM, struct drm_ivpu_param) 26 27 /** 28 * DOC: contexts 29 * 30 * VPU contexts have private virtual address space, job queues and priority. 31 * Each context is identified by an unique ID. Context is created on open(). 32 */ 33 34 #define DRM_IVPU_PARAM_DEVICE_ID 0 35 #define DRM_IVPU_PARAM_DEVICE_REVISION 1 36 #define DRM_IVPU_PARAM_PLATFORM_TYPE 2 37 #define DRM_IVPU_PARAM_CORE_CLOCK_RATE 3 38 #define DRM_IVPU_PARAM_NUM_CONTEXTS 4 39 #define DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS 5 40 #define DRM_IVPU_PARAM_CONTEXT_PRIORITY 6 41 #define DRM_IVPU_PARAM_CONTEXT_ID 7 42 43 #define DRM_IVPU_PLATFORM_TYPE_SILICON 0 44 45 #define DRM_IVPU_CONTEXT_PRIORITY_IDLE 0 46 #define DRM_IVPU_CONTEXT_PRIORITY_NORMAL 1 47 #define DRM_IVPU_CONTEXT_PRIORITY_FOCUS 2 48 #define DRM_IVPU_CONTEXT_PRIORITY_REALTIME 3 49 50 /** 51 * struct drm_ivpu_param - Get/Set VPU parameters 52 */ 53 struct drm_ivpu_param { 54 /** 55 * @param: 56 * 57 * Supported params: 58 * 59 * %DRM_IVPU_PARAM_DEVICE_ID: 60 * PCI Device ID of the VPU device (read-only) 61 * 62 * %DRM_IVPU_PARAM_DEVICE_REVISION: 63 * VPU device revision (read-only) 64 * 65 * %DRM_IVPU_PARAM_PLATFORM_TYPE: 66 * Returns %DRM_IVPU_PLATFORM_TYPE_SILICON on real hardware or device specific 67 * platform type when executing on a simulator or emulator (read-only) 68 * 69 * %DRM_IVPU_PARAM_CORE_CLOCK_RATE: 70 * Current PLL frequency (read-only) 71 * 72 * %DRM_IVPU_PARAM_NUM_CONTEXTS: 73 * Maximum number of simultaneously existing contexts (read-only) 74 * 75 * %DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS: 76 * Lowest VPU virtual address available in the current context (read-only) 77 * 78 * %DRM_IVPU_PARAM_CONTEXT_PRIORITY: 79 * Value of current context scheduling priority (read-write). 80 * See DRM_IVPU_CONTEXT_PRIORITY_* for possible values. 81 * 82 * %DRM_IVPU_PARAM_CONTEXT_ID: 83 * Current context ID, always greater than 0 (read-only) 84 * 85 */ 86 __u32 param; 87 88 /** @index: Index for params that have multiple instances */ 89 __u32 index; 90 91 /** @value: Param value */ 92 __u64 value; 93 }; 94 95 #if defined(__cplusplus) 96 } 97 #endif 98 99 #endif /* __UAPI_IVPU_DRM_H__ */ 100