1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2a9d43091SLothar Wassmann /* 3a9d43091SLothar Wassmann * board initialization code should put one of these into dev->platform_data 4a9d43091SLothar Wassmann * and place the isp1362 onto platform_bus. 5a9d43091SLothar Wassmann */ 6a9d43091SLothar Wassmann 7a9d43091SLothar Wassmann #ifndef __LINUX_USB_ISP1362_H__ 8a9d43091SLothar Wassmann #define __LINUX_USB_ISP1362_H__ 9a9d43091SLothar Wassmann 10a9d43091SLothar Wassmann struct isp1362_platform_data { 11a9d43091SLothar Wassmann /* Enable internal pulldown resistors on downstream ports */ 12a9d43091SLothar Wassmann unsigned sel15Kres:1; 13a9d43091SLothar Wassmann /* Clock cannot be stopped */ 14a9d43091SLothar Wassmann unsigned clknotstop:1; 15a9d43091SLothar Wassmann /* On-chip overcurrent protection */ 16a9d43091SLothar Wassmann unsigned oc_enable:1; 17a9d43091SLothar Wassmann /* INT output polarity */ 18a9d43091SLothar Wassmann unsigned int_act_high:1; 19a9d43091SLothar Wassmann /* INT edge or level triggered */ 20a9d43091SLothar Wassmann unsigned int_edge_triggered:1; 21a9d43091SLothar Wassmann /* DREQ output polarity */ 22a9d43091SLothar Wassmann unsigned dreq_act_high:1; 23a9d43091SLothar Wassmann /* DACK input polarity */ 24a9d43091SLothar Wassmann unsigned dack_act_high:1; 25a9d43091SLothar Wassmann /* chip can be resumed via H_WAKEUP pin */ 26a9d43091SLothar Wassmann unsigned remote_wakeup_connected:1; 27a9d43091SLothar Wassmann /* Switch or not to switch (keep always powered) */ 28a9d43091SLothar Wassmann unsigned no_power_switching:1; 29a9d43091SLothar Wassmann /* Ganged port power switching (0) or individual port power switching (1) */ 30a9d43091SLothar Wassmann unsigned power_switching_mode:1; 31a9d43091SLothar Wassmann /* Given port_power, msec/2 after power on till power good */ 32a9d43091SLothar Wassmann u8 potpg; 33a9d43091SLothar Wassmann /* Hardware reset set/clear */ 34a9d43091SLothar Wassmann void (*reset) (struct device *dev, int set); 35a9d43091SLothar Wassmann /* Clock start/stop */ 36a9d43091SLothar Wassmann void (*clock) (struct device *dev, int start); 37a9d43091SLothar Wassmann /* Inter-io delay (ns). The chip is picky about access timings; it 38a9d43091SLothar Wassmann * expects at least: 39a9d43091SLothar Wassmann * 110ns delay between consecutive accesses to DATA_REG, 40a9d43091SLothar Wassmann * 300ns delay between access to ADDR_REG and DATA_REG (registers) 41a9d43091SLothar Wassmann * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory) 42a9d43091SLothar Wassmann * WE MUST NOT be activated during these intervals (even without CS!) 43a9d43091SLothar Wassmann */ 44a9d43091SLothar Wassmann void (*delay) (struct device *dev, unsigned int delay); 45a9d43091SLothar Wassmann }; 46a9d43091SLothar Wassmann 47a9d43091SLothar Wassmann #endif 48