1 #ifndef LINUX_SSB_H_ 2 #define LINUX_SSB_H_ 3 4 #include <linux/device.h> 5 #include <linux/list.h> 6 #include <linux/types.h> 7 #include <linux/spinlock.h> 8 #include <linux/pci.h> 9 #include <linux/mod_devicetable.h> 10 #include <linux/dma-mapping.h> 11 12 #include <linux/ssb/ssb_regs.h> 13 14 15 struct pcmcia_device; 16 struct ssb_bus; 17 struct ssb_driver; 18 19 struct ssb_sprom { 20 u8 revision; 21 u8 il0mac[6]; /* MAC address for 802.11b/g */ 22 u8 et0mac[6]; /* MAC address for Ethernet */ 23 u8 et1mac[6]; /* MAC address for 802.11a */ 24 u8 et0phyaddr; /* MII address for enet0 */ 25 u8 et1phyaddr; /* MII address for enet1 */ 26 u8 et0mdcport; /* MDIO for enet0 */ 27 u8 et1mdcport; /* MDIO for enet1 */ 28 u16 board_rev; /* Board revision number from SPROM. */ 29 u8 country_code; /* Country Code */ 30 u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */ 31 u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */ 32 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ 33 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ 34 u16 pa0b0; 35 u16 pa0b1; 36 u16 pa0b2; 37 u16 pa1b0; 38 u16 pa1b1; 39 u16 pa1b2; 40 u16 pa1lob0; 41 u16 pa1lob1; 42 u16 pa1lob2; 43 u16 pa1hib0; 44 u16 pa1hib1; 45 u16 pa1hib2; 46 u8 gpio0; /* GPIO pin 0 */ 47 u8 gpio1; /* GPIO pin 1 */ 48 u8 gpio2; /* GPIO pin 2 */ 49 u8 gpio3; /* GPIO pin 3 */ 50 u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */ 51 u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */ 52 u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */ 53 u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */ 54 u8 itssi_a; /* Idle TSSI Target for A-PHY */ 55 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ 56 u8 tri2g; /* 2.4GHz TX isolation */ 57 u8 tri5gl; /* 5.2GHz TX isolation */ 58 u8 tri5g; /* 5.3GHz TX isolation */ 59 u8 tri5gh; /* 5.8GHz TX isolation */ 60 u8 txpid2g[4]; /* 2GHz TX power index */ 61 u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */ 62 u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */ 63 u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */ 64 u8 rxpo2g; /* 2GHz RX power offset */ 65 u8 rxpo5g; /* 5GHz RX power offset */ 66 u8 rssisav2g; /* 2GHz RSSI params */ 67 u8 rssismc2g; 68 u8 rssismf2g; 69 u8 bxa2g; /* 2GHz BX arch */ 70 u8 rssisav5g; /* 5GHz RSSI params */ 71 u8 rssismc5g; 72 u8 rssismf5g; 73 u8 bxa5g; /* 5GHz BX arch */ 74 u16 cck2gpo; /* CCK power offset */ 75 u32 ofdm2gpo; /* 2.4GHz OFDM power offset */ 76 u32 ofdm5glpo; /* 5.2GHz OFDM power offset */ 77 u32 ofdm5gpo; /* 5.3GHz OFDM power offset */ 78 u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */ 79 u16 boardflags_lo; /* Board flags (bits 0-15) */ 80 u16 boardflags_hi; /* Board flags (bits 16-31) */ 81 u16 boardflags2_lo; /* Board flags (bits 32-47) */ 82 u16 boardflags2_hi; /* Board flags (bits 48-63) */ 83 /* TODO store board flags in a single u64 */ 84 85 /* Antenna gain values for up to 4 antennas 86 * on each band. Values in dBm/4 (Q5.2). Negative gain means the 87 * loss in the connectors is bigger than the gain. */ 88 struct { 89 struct { 90 s8 a0, a1, a2, a3; 91 } ghz24; /* 2.4GHz band */ 92 struct { 93 s8 a0, a1, a2, a3; 94 } ghz5; /* 5GHz band */ 95 } antenna_gain; 96 97 /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */ 98 }; 99 100 /* Information about the PCB the circuitry is soldered on. */ 101 struct ssb_boardinfo { 102 u16 vendor; 103 u16 type; 104 u8 rev; 105 }; 106 107 108 struct ssb_device; 109 /* Lowlevel read/write operations on the device MMIO. 110 * Internal, don't use that outside of ssb. */ 111 struct ssb_bus_ops { 112 u8 (*read8)(struct ssb_device *dev, u16 offset); 113 u16 (*read16)(struct ssb_device *dev, u16 offset); 114 u32 (*read32)(struct ssb_device *dev, u16 offset); 115 void (*write8)(struct ssb_device *dev, u16 offset, u8 value); 116 void (*write16)(struct ssb_device *dev, u16 offset, u16 value); 117 void (*write32)(struct ssb_device *dev, u16 offset, u32 value); 118 #ifdef CONFIG_SSB_BLOCKIO 119 void (*block_read)(struct ssb_device *dev, void *buffer, 120 size_t count, u16 offset, u8 reg_width); 121 void (*block_write)(struct ssb_device *dev, const void *buffer, 122 size_t count, u16 offset, u8 reg_width); 123 #endif 124 }; 125 126 127 /* Core-ID values. */ 128 #define SSB_DEV_CHIPCOMMON 0x800 129 #define SSB_DEV_ILINE20 0x801 130 #define SSB_DEV_SDRAM 0x803 131 #define SSB_DEV_PCI 0x804 132 #define SSB_DEV_MIPS 0x805 133 #define SSB_DEV_ETHERNET 0x806 134 #define SSB_DEV_V90 0x807 135 #define SSB_DEV_USB11_HOSTDEV 0x808 136 #define SSB_DEV_ADSL 0x809 137 #define SSB_DEV_ILINE100 0x80A 138 #define SSB_DEV_IPSEC 0x80B 139 #define SSB_DEV_PCMCIA 0x80D 140 #define SSB_DEV_INTERNAL_MEM 0x80E 141 #define SSB_DEV_MEMC_SDRAM 0x80F 142 #define SSB_DEV_EXTIF 0x811 143 #define SSB_DEV_80211 0x812 144 #define SSB_DEV_MIPS_3302 0x816 145 #define SSB_DEV_USB11_HOST 0x817 146 #define SSB_DEV_USB11_DEV 0x818 147 #define SSB_DEV_USB20_HOST 0x819 148 #define SSB_DEV_USB20_DEV 0x81A 149 #define SSB_DEV_SDIO_HOST 0x81B 150 #define SSB_DEV_ROBOSWITCH 0x81C 151 #define SSB_DEV_PARA_ATA 0x81D 152 #define SSB_DEV_SATA_XORDMA 0x81E 153 #define SSB_DEV_ETHERNET_GBIT 0x81F 154 #define SSB_DEV_PCIE 0x820 155 #define SSB_DEV_MIMO_PHY 0x821 156 #define SSB_DEV_SRAM_CTRLR 0x822 157 #define SSB_DEV_MINI_MACPHY 0x823 158 #define SSB_DEV_ARM_1176 0x824 159 #define SSB_DEV_ARM_7TDMI 0x825 160 161 /* Vendor-ID values */ 162 #define SSB_VENDOR_BROADCOM 0x4243 163 164 /* Some kernel subsystems poke with dev->drvdata, so we must use the 165 * following ugly workaround to get from struct device to struct ssb_device */ 166 struct __ssb_dev_wrapper { 167 struct device dev; 168 struct ssb_device *sdev; 169 }; 170 171 struct ssb_device { 172 /* Having a copy of the ops pointer in each dev struct 173 * is an optimization. */ 174 const struct ssb_bus_ops *ops; 175 176 struct device *dev, *dma_dev; 177 178 struct ssb_bus *bus; 179 struct ssb_device_id id; 180 181 u8 core_index; 182 unsigned int irq; 183 184 /* Internal-only stuff follows. */ 185 void *drvdata; /* Per-device data */ 186 void *devtypedata; /* Per-devicetype (eg 802.11) data */ 187 }; 188 189 /* Go from struct device to struct ssb_device. */ 190 static inline 191 struct ssb_device * dev_to_ssb_dev(struct device *dev) 192 { 193 struct __ssb_dev_wrapper *wrap; 194 wrap = container_of(dev, struct __ssb_dev_wrapper, dev); 195 return wrap->sdev; 196 } 197 198 /* Device specific user data */ 199 static inline 200 void ssb_set_drvdata(struct ssb_device *dev, void *data) 201 { 202 dev->drvdata = data; 203 } 204 static inline 205 void * ssb_get_drvdata(struct ssb_device *dev) 206 { 207 return dev->drvdata; 208 } 209 210 /* Devicetype specific user data. This is per device-type (not per device) */ 211 void ssb_set_devtypedata(struct ssb_device *dev, void *data); 212 static inline 213 void * ssb_get_devtypedata(struct ssb_device *dev) 214 { 215 return dev->devtypedata; 216 } 217 218 219 struct ssb_driver { 220 const char *name; 221 const struct ssb_device_id *id_table; 222 223 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id); 224 void (*remove)(struct ssb_device *dev); 225 int (*suspend)(struct ssb_device *dev, pm_message_t state); 226 int (*resume)(struct ssb_device *dev); 227 void (*shutdown)(struct ssb_device *dev); 228 229 struct device_driver drv; 230 }; 231 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) 232 233 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); 234 static inline int ssb_driver_register(struct ssb_driver *drv) 235 { 236 return __ssb_driver_register(drv, THIS_MODULE); 237 } 238 extern void ssb_driver_unregister(struct ssb_driver *drv); 239 240 241 242 243 enum ssb_bustype { 244 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */ 245 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */ 246 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */ 247 SSB_BUSTYPE_SDIO, /* SSB is connected to SDIO bus */ 248 }; 249 250 /* board_vendor */ 251 #define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */ 252 #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ 253 #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ 254 /* board_type */ 255 #define SSB_BOARD_BCM94306MP 0x0418 256 #define SSB_BOARD_BCM4309G 0x0421 257 #define SSB_BOARD_BCM4306CB 0x0417 258 #define SSB_BOARD_BCM4309MP 0x040C 259 #define SSB_BOARD_MP4318 0x044A 260 #define SSB_BOARD_BU4306 0x0416 261 #define SSB_BOARD_BU4309 0x040A 262 /* chip_package */ 263 #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ 264 #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ 265 #define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */ 266 267 #include <linux/ssb/ssb_driver_chipcommon.h> 268 #include <linux/ssb/ssb_driver_mips.h> 269 #include <linux/ssb/ssb_driver_extif.h> 270 #include <linux/ssb/ssb_driver_pci.h> 271 272 struct ssb_bus { 273 /* The MMIO area. */ 274 void __iomem *mmio; 275 276 const struct ssb_bus_ops *ops; 277 278 /* The core currently mapped into the MMIO window. 279 * Not valid on all host-buses. So don't use outside of SSB. */ 280 struct ssb_device *mapped_device; 281 union { 282 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */ 283 u8 mapped_pcmcia_seg; 284 /* Current SSB base address window for SDIO. */ 285 u32 sdio_sbaddr; 286 }; 287 /* Lock for core and segment switching. 288 * On PCMCIA-host busses this is used to protect the whole MMIO access. */ 289 spinlock_t bar_lock; 290 291 /* The host-bus this backplane is running on. */ 292 enum ssb_bustype bustype; 293 /* Pointers to the host-bus. Check bustype before using any of these pointers. */ 294 union { 295 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */ 296 struct pci_dev *host_pci; 297 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */ 298 struct pcmcia_device *host_pcmcia; 299 /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */ 300 struct sdio_func *host_sdio; 301 }; 302 303 /* See enum ssb_quirks */ 304 unsigned int quirks; 305 306 #ifdef CONFIG_SSB_SPROM 307 /* Mutex to protect the SPROM writing. */ 308 struct mutex sprom_mutex; 309 #endif 310 311 /* ID information about the Chip. */ 312 u16 chip_id; 313 u8 chip_rev; 314 u16 sprom_offset; 315 u16 sprom_size; /* number of words in sprom */ 316 u8 chip_package; 317 318 /* List of devices (cores) on the backplane. */ 319 struct ssb_device devices[SSB_MAX_NR_CORES]; 320 u8 nr_devices; 321 322 /* Software ID number for this bus. */ 323 unsigned int busnumber; 324 325 /* The ChipCommon device (if available). */ 326 struct ssb_chipcommon chipco; 327 /* The PCI-core device (if available). */ 328 struct ssb_pcicore pcicore; 329 /* The MIPS-core device (if available). */ 330 struct ssb_mipscore mipscore; 331 /* The EXTif-core device (if available). */ 332 struct ssb_extif extif; 333 334 /* The following structure elements are not available in early 335 * SSB initialization. Though, they are available for regular 336 * registered drivers at any stage. So be careful when 337 * using them in the ssb core code. */ 338 339 /* ID information about the PCB. */ 340 struct ssb_boardinfo boardinfo; 341 /* Contents of the SPROM. */ 342 struct ssb_sprom sprom; 343 /* If the board has a cardbus slot, this is set to true. */ 344 bool has_cardbus_slot; 345 346 #ifdef CONFIG_SSB_EMBEDDED 347 /* Lock for GPIO register access. */ 348 spinlock_t gpio_lock; 349 #endif /* EMBEDDED */ 350 351 /* Internal-only stuff follows. Do not touch. */ 352 struct list_head list; 353 #ifdef CONFIG_SSB_DEBUG 354 /* Is the bus already powered up? */ 355 bool powered_up; 356 int power_warn_count; 357 #endif /* DEBUG */ 358 }; 359 360 enum ssb_quirks { 361 /* SDIO connected card requires performing a read after writing a 32-bit value */ 362 SSB_QUIRK_SDIO_READ_AFTER_WRITE32 = (1 << 0), 363 }; 364 365 /* The initialization-invariants. */ 366 struct ssb_init_invariants { 367 /* Versioning information about the PCB. */ 368 struct ssb_boardinfo boardinfo; 369 /* The SPROM information. That's either stored in an 370 * EEPROM or NVRAM on the board. */ 371 struct ssb_sprom sprom; 372 /* If the board has a cardbus slot, this is set to true. */ 373 bool has_cardbus_slot; 374 }; 375 /* Type of function to fetch the invariants. */ 376 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus, 377 struct ssb_init_invariants *iv); 378 379 /* Register a SSB system bus. get_invariants() is called after the 380 * basic system devices are initialized. 381 * The invariants are usually fetched from some NVRAM. 382 * Put the invariants into the struct pointed to by iv. */ 383 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus, 384 unsigned long baseaddr, 385 ssb_invariants_func_t get_invariants); 386 #ifdef CONFIG_SSB_PCIHOST 387 extern int ssb_bus_pcibus_register(struct ssb_bus *bus, 388 struct pci_dev *host_pci); 389 #endif /* CONFIG_SSB_PCIHOST */ 390 #ifdef CONFIG_SSB_PCMCIAHOST 391 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus, 392 struct pcmcia_device *pcmcia_dev, 393 unsigned long baseaddr); 394 #endif /* CONFIG_SSB_PCMCIAHOST */ 395 #ifdef CONFIG_SSB_SDIOHOST 396 extern int ssb_bus_sdiobus_register(struct ssb_bus *bus, 397 struct sdio_func *sdio_func, 398 unsigned int quirks); 399 #endif /* CONFIG_SSB_SDIOHOST */ 400 401 402 extern void ssb_bus_unregister(struct ssb_bus *bus); 403 404 /* Does the device have an SPROM? */ 405 extern bool ssb_is_sprom_available(struct ssb_bus *bus); 406 407 /* Set a fallback SPROM. 408 * See kdoc at the function definition for complete documentation. */ 409 extern int ssb_arch_register_fallback_sprom( 410 int (*sprom_callback)(struct ssb_bus *bus, 411 struct ssb_sprom *out)); 412 413 /* Suspend a SSB bus. 414 * Call this from the parent bus suspend routine. */ 415 extern int ssb_bus_suspend(struct ssb_bus *bus); 416 /* Resume a SSB bus. 417 * Call this from the parent bus resume routine. */ 418 extern int ssb_bus_resume(struct ssb_bus *bus); 419 420 extern u32 ssb_clockspeed(struct ssb_bus *bus); 421 422 /* Is the device enabled in hardware? */ 423 int ssb_device_is_enabled(struct ssb_device *dev); 424 /* Enable a device and pass device-specific SSB_TMSLOW flags. 425 * If no device-specific flags are available, use 0. */ 426 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags); 427 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */ 428 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags); 429 430 431 /* Device MMIO register read/write functions. */ 432 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset) 433 { 434 return dev->ops->read8(dev, offset); 435 } 436 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset) 437 { 438 return dev->ops->read16(dev, offset); 439 } 440 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset) 441 { 442 return dev->ops->read32(dev, offset); 443 } 444 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value) 445 { 446 dev->ops->write8(dev, offset, value); 447 } 448 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value) 449 { 450 dev->ops->write16(dev, offset, value); 451 } 452 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value) 453 { 454 dev->ops->write32(dev, offset, value); 455 } 456 #ifdef CONFIG_SSB_BLOCKIO 457 static inline void ssb_block_read(struct ssb_device *dev, void *buffer, 458 size_t count, u16 offset, u8 reg_width) 459 { 460 dev->ops->block_read(dev, buffer, count, offset, reg_width); 461 } 462 463 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer, 464 size_t count, u16 offset, u8 reg_width) 465 { 466 dev->ops->block_write(dev, buffer, count, offset, reg_width); 467 } 468 #endif /* CONFIG_SSB_BLOCKIO */ 469 470 471 /* The SSB DMA API. Use this API for any DMA operation on the device. 472 * This API basically is a wrapper that calls the correct DMA API for 473 * the host device type the SSB device is attached to. */ 474 475 /* Translation (routing) bits that need to be ORed to DMA 476 * addresses before they are given to a device. */ 477 extern u32 ssb_dma_translation(struct ssb_device *dev); 478 #define SSB_DMA_TRANSLATION_MASK 0xC0000000 479 #define SSB_DMA_TRANSLATION_SHIFT 30 480 481 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev) 482 { 483 #ifdef CONFIG_SSB_DEBUG 484 printk(KERN_ERR "SSB: BUG! Calling DMA API for " 485 "unsupported bustype %d\n", dev->bus->bustype); 486 #endif /* DEBUG */ 487 } 488 489 #ifdef CONFIG_SSB_PCIHOST 490 /* PCI-host wrapper driver */ 491 extern int ssb_pcihost_register(struct pci_driver *driver); 492 static inline void ssb_pcihost_unregister(struct pci_driver *driver) 493 { 494 pci_unregister_driver(driver); 495 } 496 497 static inline 498 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) 499 { 500 if (sdev->bus->bustype == SSB_BUSTYPE_PCI) 501 pci_set_power_state(sdev->bus->host_pci, state); 502 } 503 #else 504 static inline void ssb_pcihost_unregister(struct pci_driver *driver) 505 { 506 } 507 508 static inline 509 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) 510 { 511 } 512 #endif /* CONFIG_SSB_PCIHOST */ 513 514 515 /* If a driver is shutdown or suspended, call this to signal 516 * that the bus may be completely powered down. SSB will decide, 517 * if it's really time to power down the bus, based on if there 518 * are other devices that want to run. */ 519 extern int ssb_bus_may_powerdown(struct ssb_bus *bus); 520 /* Before initializing and enabling a device, call this to power-up the bus. 521 * If you want to allow use of dynamic-power-control, pass the flag. 522 * Otherwise static always-on powercontrol will be used. */ 523 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl); 524 525 extern void ssb_commit_settings(struct ssb_bus *bus); 526 527 /* Various helper functions */ 528 extern u32 ssb_admatch_base(u32 adm); 529 extern u32 ssb_admatch_size(u32 adm); 530 531 /* PCI device mapping and fixup routines. 532 * Called from the architecture pcibios init code. 533 * These are only available on SSB_EMBEDDED configurations. */ 534 #ifdef CONFIG_SSB_EMBEDDED 535 int ssb_pcibios_plat_dev_init(struct pci_dev *dev); 536 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 537 #endif /* CONFIG_SSB_EMBEDDED */ 538 539 #endif /* LINUX_SSB_H_ */ 540