1 /* 2 * Dmaengine driver base library for DMA controllers, found on SH-based SoCs 3 * 4 * extracted from shdma.c and headers 5 * 6 * Copyright (C) 2011-2012 Guennadi Liakhovetski <[email protected]> 7 * Copyright (C) 2009 Nobuhiro Iwamatsu <[email protected]> 8 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved. 9 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. 10 * 11 * This is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 */ 15 16 #ifndef SHDMA_BASE_H 17 #define SHDMA_BASE_H 18 19 #include <linux/dmaengine.h> 20 #include <linux/interrupt.h> 21 #include <linux/list.h> 22 #include <linux/types.h> 23 24 /** 25 * shdma_pm_state - DMA channel PM state 26 * SHDMA_PM_ESTABLISHED: either idle or during data transfer 27 * SHDMA_PM_BUSY: during the transfer preparation, when we have to 28 * drop the lock temporarily 29 * SHDMA_PM_PENDING: transfers pending 30 */ 31 enum shdma_pm_state { 32 SHDMA_PM_ESTABLISHED, 33 SHDMA_PM_BUSY, 34 SHDMA_PM_PENDING, 35 }; 36 37 struct device; 38 39 /* 40 * Drivers, using this library are expected to embed struct shdma_dev, 41 * struct shdma_chan, struct shdma_desc, and struct shdma_slave 42 * in their respective device, channel, descriptor and slave objects. 43 */ 44 45 struct shdma_slave { 46 int slave_id; 47 }; 48 49 struct shdma_desc { 50 struct list_head node; 51 struct dma_async_tx_descriptor async_tx; 52 enum dma_transfer_direction direction; 53 size_t partial; 54 dma_cookie_t cookie; 55 int chunks; 56 int mark; 57 }; 58 59 struct shdma_chan { 60 spinlock_t chan_lock; /* Channel operation lock */ 61 struct list_head ld_queue; /* Link descriptors queue */ 62 struct list_head ld_free; /* Free link descriptors */ 63 struct dma_chan dma_chan; /* DMA channel */ 64 struct device *dev; /* Channel device */ 65 void *desc; /* buffer for descriptor array */ 66 int desc_num; /* desc count */ 67 size_t max_xfer_len; /* max transfer length */ 68 int id; /* Raw id of this channel */ 69 int irq; /* Channel IRQ */ 70 int slave_id; /* Client ID for slave DMA */ 71 int hw_req; /* DMA request line for slave DMA - same 72 * as MID/RID, used with DT */ 73 enum shdma_pm_state pm_state; 74 }; 75 76 /** 77 * struct shdma_ops - simple DMA driver operations 78 * desc_completed: return true, if this is the descriptor, that just has 79 * completed (atomic) 80 * halt_channel: stop DMA channel operation (atomic) 81 * channel_busy: return true, if the channel is busy (atomic) 82 * slave_addr: return slave DMA address 83 * desc_setup: set up the hardware specific descriptor portion (atomic) 84 * set_slave: bind channel to a slave 85 * setup_xfer: configure channel hardware for operation (atomic) 86 * start_xfer: start the DMA transfer (atomic) 87 * embedded_desc: return Nth struct shdma_desc pointer from the 88 * descriptor array 89 * chan_irq: process channel IRQ, return true if a transfer has 90 * completed (atomic) 91 */ 92 struct shdma_ops { 93 bool (*desc_completed)(struct shdma_chan *, struct shdma_desc *); 94 void (*halt_channel)(struct shdma_chan *); 95 bool (*channel_busy)(struct shdma_chan *); 96 dma_addr_t (*slave_addr)(struct shdma_chan *); 97 int (*desc_setup)(struct shdma_chan *, struct shdma_desc *, 98 dma_addr_t, dma_addr_t, size_t *); 99 int (*set_slave)(struct shdma_chan *, int, dma_addr_t, bool); 100 void (*setup_xfer)(struct shdma_chan *, int); 101 void (*start_xfer)(struct shdma_chan *, struct shdma_desc *); 102 struct shdma_desc *(*embedded_desc)(void *, int); 103 bool (*chan_irq)(struct shdma_chan *, int); 104 size_t (*get_partial)(struct shdma_chan *, struct shdma_desc *); 105 }; 106 107 struct shdma_dev { 108 struct dma_device dma_dev; 109 struct shdma_chan **schan; 110 const struct shdma_ops *ops; 111 size_t desc_size; 112 }; 113 114 #define shdma_for_each_chan(c, d, i) for (i = 0, c = (d)->schan[0]; \ 115 i < (d)->dma_dev.chancnt; c = (d)->schan[++i]) 116 117 int shdma_request_irq(struct shdma_chan *, int, 118 unsigned long, const char *); 119 bool shdma_reset(struct shdma_dev *sdev); 120 void shdma_chan_probe(struct shdma_dev *sdev, 121 struct shdma_chan *schan, int id); 122 void shdma_chan_remove(struct shdma_chan *schan); 123 int shdma_init(struct device *dev, struct shdma_dev *sdev, 124 int chan_num); 125 void shdma_cleanup(struct shdma_dev *sdev); 126 #if IS_ENABLED(CONFIG_SH_DMAE_BASE) 127 bool shdma_chan_filter(struct dma_chan *chan, void *arg); 128 #else 129 #define shdma_chan_filter NULL 130 #endif 131 132 #endif 133