1 #ifndef __SH_INTC_H 2 #define __SH_INTC_H 3 4 typedef unsigned char intc_enum; 5 6 struct intc_vect { 7 intc_enum enum_id; 8 unsigned short vect; 9 }; 10 11 #define INTC_VECT(enum_id, vect) { enum_id, vect } 12 #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq)) 13 14 struct intc_group { 15 intc_enum enum_id; 16 intc_enum enum_ids[32]; 17 }; 18 19 #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } } 20 21 struct intc_mask_reg { 22 unsigned long set_reg, clr_reg, reg_width; 23 intc_enum enum_ids[32]; 24 #ifdef CONFIG_SMP 25 unsigned long smp; 26 #endif 27 }; 28 29 struct intc_prio_reg { 30 unsigned long set_reg, clr_reg, reg_width, field_width; 31 intc_enum enum_ids[16]; 32 #ifdef CONFIG_SMP 33 unsigned long smp; 34 #endif 35 }; 36 37 struct intc_sense_reg { 38 unsigned long reg, reg_width, field_width; 39 intc_enum enum_ids[16]; 40 }; 41 42 #ifdef CONFIG_SMP 43 #define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8) 44 #else 45 #define INTC_SMP(stride, nr) 46 #endif 47 48 struct intc_hw_desc { 49 struct intc_vect *vectors; 50 unsigned int nr_vectors; 51 struct intc_group *groups; 52 unsigned int nr_groups; 53 struct intc_mask_reg *mask_regs; 54 unsigned int nr_mask_regs; 55 struct intc_prio_reg *prio_regs; 56 unsigned int nr_prio_regs; 57 struct intc_sense_reg *sense_regs; 58 unsigned int nr_sense_regs; 59 struct intc_mask_reg *ack_regs; 60 unsigned int nr_ack_regs; 61 }; 62 63 #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) 64 #define INTC_HW_DESC(vectors, groups, mask_regs, \ 65 prio_regs, sense_regs, ack_regs) \ 66 { \ 67 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ 68 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ 69 _INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \ 70 } 71 72 struct intc_desc { 73 char *name; 74 struct intc_hw_desc hw; 75 }; 76 77 #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ 78 mask_regs, prio_regs, sense_regs) \ 79 struct intc_desc symbol __initdata = { \ 80 .name = chipname, \ 81 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \ 82 prio_regs, sense_regs, NULL), \ 83 } 84 85 #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ 86 mask_regs, prio_regs, sense_regs, ack_regs) \ 87 struct intc_desc symbol __initdata = { \ 88 .name = chipname, \ 89 .hw = INTC_HW_DESC(vectors, groups, mask_regs, \ 90 prio_regs, sense_regs, ack_regs), \ 91 } 92 93 void __init register_intc_controller(struct intc_desc *desc); 94 int intc_set_priority(unsigned int irq, unsigned int prio); 95 96 int reserve_irq_vector(unsigned int irq); 97 void reserve_irq_legacy(void); 98 99 #endif /* __SH_INTC_H */ 100