1 #ifndef __SH_CLOCK_H 2 #define __SH_CLOCK_H 3 4 #include <linux/list.h> 5 #include <linux/seq_file.h> 6 #include <linux/cpufreq.h> 7 #include <linux/clk.h> 8 #include <linux/err.h> 9 10 struct clk; 11 12 struct clk_ops { 13 void (*init)(struct clk *clk); 14 int (*enable)(struct clk *clk); 15 void (*disable)(struct clk *clk); 16 unsigned long (*recalc)(struct clk *clk); 17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); 18 int (*set_parent)(struct clk *clk, struct clk *parent); 19 long (*round_rate)(struct clk *clk, unsigned long rate); 20 }; 21 22 struct clk { 23 struct list_head node; 24 const char *name; 25 int id; 26 27 struct clk *parent; 28 struct clk_ops *ops; 29 30 struct list_head children; 31 struct list_head sibling; /* node for children */ 32 33 int usecount; 34 35 unsigned long rate; 36 unsigned long flags; 37 38 void __iomem *enable_reg; 39 unsigned int enable_bit; 40 41 unsigned long arch_flags; 42 void *priv; 43 struct dentry *dentry; 44 struct cpufreq_frequency_table *freq_table; 45 }; 46 47 #define CLK_ENABLE_ON_INIT (1 << 0) 48 49 /* drivers/sh/clk.c */ 50 unsigned long followparent_recalc(struct clk *); 51 void recalculate_root_clocks(void); 52 void propagate_rate(struct clk *); 53 int clk_reparent(struct clk *child, struct clk *parent); 54 int clk_register(struct clk *); 55 void clk_unregister(struct clk *); 56 void clk_enable_init_clocks(void); 57 58 /** 59 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter 60 * @clk: clock source 61 * @rate: desired clock rate in Hz 62 * @algo_id: algorithm id to be passed down to ops->set_rate 63 * 64 * Returns success (0) or negative errno. 65 */ 66 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); 67 68 enum clk_sh_algo_id { 69 NO_CHANGE = 0, 70 71 IUS_N1_N1, 72 IUS_322, 73 IUS_522, 74 IUS_N11, 75 76 SB_N1, 77 78 SB3_N1, 79 SB3_32, 80 SB3_43, 81 SB3_54, 82 83 BP_N1, 84 85 IP_N1, 86 }; 87 88 struct clk_div_mult_table { 89 unsigned int *divisors; 90 unsigned int nr_divisors; 91 unsigned int *multipliers; 92 unsigned int nr_multipliers; 93 }; 94 95 struct cpufreq_frequency_table; 96 void clk_rate_table_build(struct clk *clk, 97 struct cpufreq_frequency_table *freq_table, 98 int nr_freqs, 99 struct clk_div_mult_table *src_table, 100 unsigned long *bitmap); 101 102 long clk_rate_table_round(struct clk *clk, 103 struct cpufreq_frequency_table *freq_table, 104 unsigned long rate); 105 106 int clk_rate_table_find(struct clk *clk, 107 struct cpufreq_frequency_table *freq_table, 108 unsigned long rate); 109 110 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \ 111 { \ 112 .parent = _parent, \ 113 .enable_reg = (void __iomem *)_enable_reg, \ 114 .enable_bit = _enable_bit, \ 115 .flags = _flags, \ 116 } 117 118 int sh_clk_mstp32_register(struct clk *clks, int nr); 119 120 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ 121 { \ 122 .parent = _parent, \ 123 .enable_reg = (void __iomem *)_reg, \ 124 .enable_bit = _shift, \ 125 .arch_flags = _div_bitmap, \ 126 .flags = _flags, \ 127 } 128 129 struct clk_div4_table { 130 struct clk_div_mult_table *div_mult_table; 131 void (*kick)(struct clk *clk); 132 }; 133 134 int sh_clk_div4_register(struct clk *clks, int nr, 135 struct clk_div4_table *table); 136 int sh_clk_div4_enable_register(struct clk *clks, int nr, 137 struct clk_div4_table *table); 138 int sh_clk_div4_reparent_register(struct clk *clks, int nr, 139 struct clk_div4_table *table); 140 141 #define SH_CLK_DIV6(_parent, _reg, _flags) \ 142 { \ 143 .parent = _parent, \ 144 .enable_reg = (void __iomem *)_reg, \ 145 .flags = _flags, \ 146 } 147 148 int sh_clk_div6_register(struct clk *clks, int nr); 149 150 #endif /* __SH_CLOCK_H */ 151