1 #ifndef __SH_CLOCK_H 2 #define __SH_CLOCK_H 3 4 #include <linux/list.h> 5 #include <linux/seq_file.h> 6 #include <linux/cpufreq.h> 7 #include <linux/clk.h> 8 #include <linux/err.h> 9 10 struct clk; 11 12 struct clk_ops { 13 void (*init)(struct clk *clk); 14 int (*enable)(struct clk *clk); 15 void (*disable)(struct clk *clk); 16 unsigned long (*recalc)(struct clk *clk); 17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); 18 int (*set_parent)(struct clk *clk, struct clk *parent); 19 long (*round_rate)(struct clk *clk, unsigned long rate); 20 }; 21 22 struct clk { 23 struct list_head node; 24 const char *name; 25 int id; 26 27 struct clk *parent; 28 struct clk **parent_table; /* list of parents to */ 29 unsigned short parent_num; /* choose between */ 30 unsigned char src_shift; /* source clock field in the */ 31 unsigned char src_width; /* configuration register */ 32 struct clk_ops *ops; 33 34 struct list_head children; 35 struct list_head sibling; /* node for children */ 36 37 int usecount; 38 39 unsigned long rate; 40 unsigned long flags; 41 42 void __iomem *enable_reg; 43 unsigned int enable_bit; 44 45 unsigned long arch_flags; 46 void *priv; 47 struct dentry *dentry; 48 struct cpufreq_frequency_table *freq_table; 49 }; 50 51 #define CLK_ENABLE_ON_INIT (1 << 0) 52 53 /* drivers/sh/clk.c */ 54 unsigned long followparent_recalc(struct clk *); 55 void recalculate_root_clocks(void); 56 void propagate_rate(struct clk *); 57 int clk_reparent(struct clk *child, struct clk *parent); 58 int clk_register(struct clk *); 59 void clk_unregister(struct clk *); 60 void clk_enable_init_clocks(void); 61 62 /** 63 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter 64 * @clk: clock source 65 * @rate: desired clock rate in Hz 66 * @algo_id: algorithm id to be passed down to ops->set_rate 67 * 68 * Returns success (0) or negative errno. 69 */ 70 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); 71 72 enum clk_sh_algo_id { 73 NO_CHANGE = 0, 74 75 IUS_N1_N1, 76 IUS_322, 77 IUS_522, 78 IUS_N11, 79 80 SB_N1, 81 82 SB3_N1, 83 SB3_32, 84 SB3_43, 85 SB3_54, 86 87 BP_N1, 88 89 IP_N1, 90 }; 91 92 struct clk_div_mult_table { 93 unsigned int *divisors; 94 unsigned int nr_divisors; 95 unsigned int *multipliers; 96 unsigned int nr_multipliers; 97 }; 98 99 struct cpufreq_frequency_table; 100 void clk_rate_table_build(struct clk *clk, 101 struct cpufreq_frequency_table *freq_table, 102 int nr_freqs, 103 struct clk_div_mult_table *src_table, 104 unsigned long *bitmap); 105 106 long clk_rate_table_round(struct clk *clk, 107 struct cpufreq_frequency_table *freq_table, 108 unsigned long rate); 109 110 int clk_rate_table_find(struct clk *clk, 111 struct cpufreq_frequency_table *freq_table, 112 unsigned long rate); 113 114 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \ 115 { \ 116 .parent = _parent, \ 117 .enable_reg = (void __iomem *)_enable_reg, \ 118 .enable_bit = _enable_bit, \ 119 .flags = _flags, \ 120 } 121 122 int sh_clk_mstp32_register(struct clk *clks, int nr); 123 124 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ 125 { \ 126 .parent = _parent, \ 127 .enable_reg = (void __iomem *)_reg, \ 128 .enable_bit = _shift, \ 129 .arch_flags = _div_bitmap, \ 130 .flags = _flags, \ 131 } 132 133 struct clk_div4_table { 134 struct clk_div_mult_table *div_mult_table; 135 void (*kick)(struct clk *clk); 136 }; 137 138 int sh_clk_div4_register(struct clk *clks, int nr, 139 struct clk_div4_table *table); 140 int sh_clk_div4_enable_register(struct clk *clks, int nr, 141 struct clk_div4_table *table); 142 int sh_clk_div4_reparent_register(struct clk *clks, int nr, 143 struct clk_div4_table *table); 144 145 #define SH_CLK_DIV6_EXT(_parent, _reg, _flags, _parents, \ 146 _num_parents, _src_shift, _src_width) \ 147 { \ 148 .parent = _parent, \ 149 .enable_reg = (void __iomem *)_reg, \ 150 .flags = _flags, \ 151 .parent_table = _parents, \ 152 .parent_num = _num_parents, \ 153 .src_shift = _src_shift, \ 154 .src_width = _src_width, \ 155 } 156 157 #define SH_CLK_DIV6(_parent, _reg, _flags) \ 158 SH_CLK_DIV6_EXT(_parent, _reg, _flags, NULL, 0, 0, 0) 159 160 int sh_clk_div6_register(struct clk *clks, int nr); 161 int sh_clk_div6_reparent_register(struct clk *clks, int nr); 162 163 #endif /* __SH_CLOCK_H */ 164