1 #ifndef __LINUX_SERIAL_SCI_H 2 #define __LINUX_SERIAL_SCI_H 3 4 #include <linux/serial_core.h> 5 #include <linux/sh_dma.h> 6 7 /* 8 * Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts) 9 */ 10 11 #define SCIx_NOT_SUPPORTED (-1) 12 13 enum { 14 SCBRR_ALGO_NONE, /* Compute sampling rate in the driver */ 15 SCBRR_ALGO_1, /* clk / (16 * bps) */ 16 SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */ 17 SCBRR_ALGO_3, /* clk / (8 * bps) */ 18 SCBRR_ALGO_4, /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */ 19 SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */ 20 }; 21 22 #define SCSCR_TIE (1 << 7) 23 #define SCSCR_RIE (1 << 6) 24 #define SCSCR_TE (1 << 5) 25 #define SCSCR_RE (1 << 4) 26 #define SCSCR_REIE (1 << 3) /* not supported by all parts */ 27 #define SCSCR_TOIE (1 << 2) /* not supported by all parts */ 28 #define SCSCR_CKE1 (1 << 1) 29 #define SCSCR_CKE0 (1 << 0) 30 31 /* SCxSR SCI */ 32 #define SCI_TDRE 0x80 33 #define SCI_RDRF 0x40 34 #define SCI_ORER 0x20 35 #define SCI_FER 0x10 36 #define SCI_PER 0x08 37 #define SCI_TEND 0x04 38 39 #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) 40 41 /* SCxSR SCIF, HSCIF */ 42 #define SCIF_ER 0x0080 43 #define SCIF_TEND 0x0040 44 #define SCIF_TDFE 0x0020 45 #define SCIF_BRK 0x0010 46 #define SCIF_FER 0x0008 47 #define SCIF_PER 0x0004 48 #define SCIF_RDF 0x0002 49 #define SCIF_DR 0x0001 50 51 #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) 52 53 /* SCSPTR, optional */ 54 #define SCSPTR_RTSIO (1 << 7) 55 #define SCSPTR_CTSIO (1 << 5) 56 #define SCSPTR_SPB2IO (1 << 1) 57 #define SCSPTR_SPB2DT (1 << 0) 58 59 /* HSSRR HSCIF */ 60 #define HSCIF_SRE 0x8000 61 62 /* Offsets into the sci_port->irqs array */ 63 enum { 64 SCIx_ERI_IRQ, 65 SCIx_RXI_IRQ, 66 SCIx_TXI_IRQ, 67 SCIx_BRI_IRQ, 68 SCIx_NR_IRQS, 69 70 SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */ 71 }; 72 73 enum { 74 SCIx_PROBE_REGTYPE, 75 76 SCIx_SCI_REGTYPE, 77 SCIx_IRDA_REGTYPE, 78 SCIx_SCIFA_REGTYPE, 79 SCIx_SCIFB_REGTYPE, 80 SCIx_SH2_SCIF_FIFODATA_REGTYPE, 81 SCIx_SH3_SCIF_REGTYPE, 82 SCIx_SH4_SCIF_REGTYPE, 83 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, 84 SCIx_SH4_SCIF_FIFODATA_REGTYPE, 85 SCIx_SH7705_SCIF_REGTYPE, 86 SCIx_HSCIF_REGTYPE, 87 88 SCIx_NR_REGTYPES, 89 }; 90 91 #define SCIx_IRQ_MUXED(irq) \ 92 { \ 93 [SCIx_ERI_IRQ] = (irq), \ 94 [SCIx_RXI_IRQ] = (irq), \ 95 [SCIx_TXI_IRQ] = (irq), \ 96 [SCIx_BRI_IRQ] = (irq), \ 97 } 98 99 #define SCIx_IRQ_IS_MUXED(port) \ 100 ((port)->irqs[SCIx_ERI_IRQ] == \ 101 (port)->irqs[SCIx_RXI_IRQ]) || \ 102 ((port)->irqs[SCIx_ERI_IRQ] && \ 103 ((port)->irqs[SCIx_RXI_IRQ] < 0)) 104 /* 105 * SCI register subset common for all port types. 106 * Not all registers will exist on all parts. 107 */ 108 enum { 109 SCSMR, SCBRR, SCSCR, SCxSR, 110 SCFCR, SCFDR, SCxTDR, SCxRDR, 111 SCLSR, SCTFDR, SCRFDR, SCSPTR, 112 HSSRR, 113 114 SCIx_NR_REGS, 115 }; 116 117 struct device; 118 119 struct plat_sci_port_ops { 120 void (*init_pins)(struct uart_port *, unsigned int cflag); 121 }; 122 123 /* 124 * Port-specific capabilities 125 */ 126 #define SCIx_HAVE_RTSCTS (1 << 0) 127 128 /* 129 * Platform device specific platform_data struct 130 */ 131 struct plat_sci_port { 132 unsigned long mapbase; /* resource base */ 133 unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ 134 unsigned int type; /* SCI / SCIF / IRDA / HSCIF */ 135 upf_t flags; /* UPF_* flags */ 136 unsigned long capabilities; /* Port features/capabilities */ 137 138 unsigned int sampling_rate; 139 unsigned int scbrr_algo_id; /* SCBRR calculation algo */ 140 unsigned int scscr; /* SCSCR initialization */ 141 142 /* 143 * Platform overrides if necessary, defaults otherwise. 144 */ 145 int port_reg; 146 unsigned char regshift; 147 unsigned char regtype; 148 149 struct plat_sci_port_ops *ops; 150 151 unsigned int dma_slave_tx; 152 unsigned int dma_slave_rx; 153 }; 154 155 #endif /* __LINUX_SERIAL_SCI_H */ 156