1 #ifndef __LINUX_SERIAL_SCI_H 2 #define __LINUX_SERIAL_SCI_H 3 4 #include <linux/serial_core.h> 5 #include <linux/sh_dma.h> 6 7 /* 8 * Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts) 9 */ 10 11 #define SCIx_NOT_SUPPORTED (-1) 12 13 /* Serial Control Register (@ = not supported by all parts) */ 14 #define SCSCR_TIE (1 << 7) /* Transmit Interrupt Enable */ 15 #define SCSCR_RIE (1 << 6) /* Receive Interrupt Enable */ 16 #define SCSCR_TE (1 << 5) /* Transmit Enable */ 17 #define SCSCR_RE (1 << 4) /* Receive Enable */ 18 #define SCSCR_REIE (1 << 3) /* Receive Error Interrupt Enable @ */ 19 #define SCSCR_TOIE (1 << 2) /* Timeout Interrupt Enable @ */ 20 #define SCSCR_CKE1 (1 << 1) /* Clock Enable 1 */ 21 #define SCSCR_CKE0 (1 << 0) /* Clock Enable 0 */ 22 23 24 enum { 25 SCIx_PROBE_REGTYPE, 26 27 SCIx_SCI_REGTYPE, 28 SCIx_IRDA_REGTYPE, 29 SCIx_SCIFA_REGTYPE, 30 SCIx_SCIFB_REGTYPE, 31 SCIx_SH2_SCIF_FIFODATA_REGTYPE, 32 SCIx_SH3_SCIF_REGTYPE, 33 SCIx_SH4_SCIF_REGTYPE, 34 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, 35 SCIx_SH4_SCIF_FIFODATA_REGTYPE, 36 SCIx_SH7705_SCIF_REGTYPE, 37 SCIx_HSCIF_REGTYPE, 38 39 SCIx_NR_REGTYPES, 40 }; 41 42 struct device; 43 44 struct plat_sci_port_ops { 45 void (*init_pins)(struct uart_port *, unsigned int cflag); 46 }; 47 48 /* 49 * Port-specific capabilities 50 */ 51 #define SCIx_HAVE_RTSCTS (1 << 0) 52 53 /* 54 * Platform device specific platform_data struct 55 */ 56 struct plat_sci_port { 57 unsigned int type; /* SCI / SCIF / IRDA / HSCIF */ 58 upf_t flags; /* UPF_* flags */ 59 unsigned long capabilities; /* Port features/capabilities */ 60 61 unsigned int sampling_rate; 62 unsigned int scscr; /* SCSCR initialization */ 63 64 /* 65 * Platform overrides if necessary, defaults otherwise. 66 */ 67 int port_reg; 68 unsigned char regshift; 69 unsigned char regtype; 70 71 struct plat_sci_port_ops *ops; 72 73 unsigned int dma_slave_tx; 74 unsigned int dma_slave_rx; 75 }; 76 77 #endif /* __LINUX_SERIAL_SCI_H */ 78