1 #ifndef __LINUX_SERIAL_SCI_H 2 #define __LINUX_SERIAL_SCI_H 3 4 #include <linux/serial_core.h> 5 #include <linux/sh_dma.h> 6 7 /* 8 * Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts) 9 */ 10 11 #define SCIx_NOT_SUPPORTED (-1) 12 13 enum { 14 SCBRR_ALGO_1, /* clk / (16 * bps) */ 15 SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */ 16 SCBRR_ALGO_3, /* clk / (8 * bps) */ 17 SCBRR_ALGO_4, /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */ 18 SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */ 19 }; 20 21 #define SCSCR_TIE (1 << 7) 22 #define SCSCR_RIE (1 << 6) 23 #define SCSCR_TE (1 << 5) 24 #define SCSCR_RE (1 << 4) 25 #define SCSCR_REIE (1 << 3) /* not supported by all parts */ 26 #define SCSCR_TOIE (1 << 2) /* not supported by all parts */ 27 #define SCSCR_CKE1 (1 << 1) 28 #define SCSCR_CKE0 (1 << 0) 29 30 /* SCxSR SCI */ 31 #define SCI_TDRE 0x80 32 #define SCI_RDRF 0x40 33 #define SCI_ORER 0x20 34 #define SCI_FER 0x10 35 #define SCI_PER 0x08 36 #define SCI_TEND 0x04 37 38 #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) 39 40 /* SCxSR SCIF, HSCIF */ 41 #define SCIF_ER 0x0080 42 #define SCIF_TEND 0x0040 43 #define SCIF_TDFE 0x0020 44 #define SCIF_BRK 0x0010 45 #define SCIF_FER 0x0008 46 #define SCIF_PER 0x0004 47 #define SCIF_RDF 0x0002 48 #define SCIF_DR 0x0001 49 50 #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) 51 52 /* SCSPTR, optional */ 53 #define SCSPTR_RTSIO (1 << 7) 54 #define SCSPTR_CTSIO (1 << 5) 55 #define SCSPTR_SPB2IO (1 << 1) 56 #define SCSPTR_SPB2DT (1 << 0) 57 58 /* HSSRR HSCIF */ 59 #define HSCIF_SRE 0x8000 60 61 /* Offsets into the sci_port->irqs array */ 62 enum { 63 SCIx_ERI_IRQ, 64 SCIx_RXI_IRQ, 65 SCIx_TXI_IRQ, 66 SCIx_BRI_IRQ, 67 SCIx_NR_IRQS, 68 69 SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */ 70 }; 71 72 enum { 73 SCIx_PROBE_REGTYPE, 74 75 SCIx_SCI_REGTYPE, 76 SCIx_IRDA_REGTYPE, 77 SCIx_SCIFA_REGTYPE, 78 SCIx_SCIFB_REGTYPE, 79 SCIx_SH2_SCIF_FIFODATA_REGTYPE, 80 SCIx_SH3_SCIF_REGTYPE, 81 SCIx_SH4_SCIF_REGTYPE, 82 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, 83 SCIx_SH4_SCIF_FIFODATA_REGTYPE, 84 SCIx_SH7705_SCIF_REGTYPE, 85 SCIx_HSCIF_REGTYPE, 86 87 SCIx_NR_REGTYPES, 88 }; 89 90 #define SCIx_IRQ_MUXED(irq) \ 91 { \ 92 [SCIx_ERI_IRQ] = (irq), \ 93 [SCIx_RXI_IRQ] = (irq), \ 94 [SCIx_TXI_IRQ] = (irq), \ 95 [SCIx_BRI_IRQ] = (irq), \ 96 } 97 98 #define SCIx_IRQ_IS_MUXED(port) \ 99 ((port)->irqs[SCIx_ERI_IRQ] == \ 100 (port)->irqs[SCIx_RXI_IRQ]) || \ 101 ((port)->irqs[SCIx_ERI_IRQ] && \ 102 ((port)->irqs[SCIx_RXI_IRQ] < 0)) 103 /* 104 * SCI register subset common for all port types. 105 * Not all registers will exist on all parts. 106 */ 107 enum { 108 SCSMR, SCBRR, SCSCR, SCxSR, 109 SCFCR, SCFDR, SCxTDR, SCxRDR, 110 SCLSR, SCTFDR, SCRFDR, SCSPTR, 111 HSSRR, 112 113 SCIx_NR_REGS, 114 }; 115 116 struct device; 117 118 struct plat_sci_port_ops { 119 void (*init_pins)(struct uart_port *, unsigned int cflag); 120 }; 121 122 /* 123 * Port-specific capabilities 124 */ 125 #define SCIx_HAVE_RTSCTS (1 << 0) 126 127 /* 128 * Platform device specific platform_data struct 129 */ 130 struct plat_sci_port { 131 unsigned long mapbase; /* resource base */ 132 unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ 133 unsigned int type; /* SCI / SCIF / IRDA / HSCIF */ 134 upf_t flags; /* UPF_* flags */ 135 unsigned long capabilities; /* Port features/capabilities */ 136 137 unsigned int scbrr_algo_id; /* SCBRR calculation algo */ 138 unsigned int scscr; /* SCSCR initialization */ 139 140 /* 141 * Platform overrides if necessary, defaults otherwise. 142 */ 143 int port_reg; 144 unsigned char regshift; 145 unsigned char regtype; 146 147 struct plat_sci_port_ops *ops; 148 149 unsigned int dma_slave_tx; 150 unsigned int dma_slave_rx; 151 }; 152 153 #endif /* __LINUX_SERIAL_SCI_H */ 154