1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef LINUX_SERIAL_CORE_H 21 #define LINUX_SERIAL_CORE_H 22 23 #include <linux/serial.h> 24 25 /* 26 * The type definitions. These are from Ted Ts'o's serial.h 27 */ 28 #define PORT_UNKNOWN 0 29 #define PORT_8250 1 30 #define PORT_16450 2 31 #define PORT_16550 3 32 #define PORT_16550A 4 33 #define PORT_CIRRUS 5 34 #define PORT_16650 6 35 #define PORT_16650V2 7 36 #define PORT_16750 8 37 #define PORT_STARTECH 9 38 #define PORT_16C950 10 39 #define PORT_16654 11 40 #define PORT_16850 12 41 #define PORT_RSA 13 42 #define PORT_NS16550A 14 43 #define PORT_XSCALE 15 44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 48 #define PORT_MAX_8250 19 /* max port ID */ 49 50 /* 51 * ARM specific type numbers. These are not currently guaranteed 52 * to be implemented, and will change in the future. These are 53 * separate so any additions to the old serial.c that occur before 54 * we are merged can be easily merged here. 55 */ 56 #define PORT_PXA 31 57 #define PORT_AMBA 32 58 #define PORT_CLPS711X 33 59 #define PORT_SA1100 34 60 #define PORT_UART00 35 61 #define PORT_21285 37 62 63 /* Sparc type numbers. */ 64 #define PORT_SUNZILOG 38 65 #define PORT_SUNSAB 39 66 67 /* DEC */ 68 #define PORT_DZ 46 69 #define PORT_ZS 47 70 71 /* Parisc type numbers. */ 72 #define PORT_MUX 48 73 74 /* Atmel AT91 / AT32 SoC */ 75 #define PORT_ATMEL 49 76 77 /* Macintosh Zilog type numbers */ 78 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 79 #define PORT_PMAC_ZILOG 51 80 81 /* SH-SCI */ 82 #define PORT_SCI 52 83 #define PORT_SCIF 53 84 #define PORT_IRDA 54 85 86 /* Samsung S3C2410 SoC and derivatives thereof */ 87 #define PORT_S3C2410 55 88 89 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 90 #define PORT_IP22ZILOG 56 91 92 /* Sharp LH7a40x -- an ARM9 SoC series */ 93 #define PORT_LH7A40X 57 94 95 /* PPC CPM type number */ 96 #define PORT_CPM 58 97 98 /* MPC52xx (and MPC512x) type numbers */ 99 #define PORT_MPC52xx 59 100 101 /* IBM icom */ 102 #define PORT_ICOM 60 103 104 /* Samsung S3C2440 SoC */ 105 #define PORT_S3C2440 61 106 107 /* Motorola i.MX SoC */ 108 #define PORT_IMX 62 109 110 /* Marvell MPSC */ 111 #define PORT_MPSC 63 112 113 /* TXX9 type number */ 114 #define PORT_TXX9 64 115 116 /* NEC VR4100 series SIU/DSIU */ 117 #define PORT_VR41XX_SIU 65 118 #define PORT_VR41XX_DSIU 66 119 120 /* Samsung S3C2400 SoC */ 121 #define PORT_S3C2400 67 122 123 /* M32R SIO */ 124 #define PORT_M32R_SIO 68 125 126 /*Digi jsm */ 127 #define PORT_JSM 69 128 129 #define PORT_PNX8XXX 70 130 131 /* Hilscher netx */ 132 #define PORT_NETX 71 133 134 /* SUN4V Hypervisor Console */ 135 #define PORT_SUNHV 72 136 137 #define PORT_S3C2412 73 138 139 /* Xilinx uartlite */ 140 #define PORT_UARTLITE 74 141 142 /* Blackfin bf5xx */ 143 #define PORT_BFIN 75 144 145 /* Micrel KS8695 */ 146 #define PORT_KS8695 76 147 148 /* Broadcom SB1250, etc. SOC */ 149 #define PORT_SB1250_DUART 77 150 151 /* Freescale ColdFire */ 152 #define PORT_MCF 78 153 154 /* Blackfin SPORT */ 155 #define PORT_BFIN_SPORT 79 156 157 /* MN10300 on-chip UART numbers */ 158 #define PORT_MN10300 80 159 #define PORT_MN10300_CTS 81 160 161 #define PORT_SC26XX 82 162 163 /* SH-SCI */ 164 #define PORT_SCIFA 83 165 166 #define PORT_S3C6400 84 167 168 /* NWPSERIAL */ 169 #define PORT_NWPSERIAL 85 170 171 /* MAX3100 */ 172 #define PORT_MAX3100 86 173 174 /* Timberdale UART */ 175 #define PORT_TIMBUART 87 176 177 /* Qualcomm MSM SoCs */ 178 #define PORT_MSM 88 179 180 /* BCM63xx family SoCs */ 181 #define PORT_BCM63XX 89 182 183 /* Aeroflex Gaisler GRLIB APBUART */ 184 #define PORT_APBUART 90 185 186 /* Altera UARTs */ 187 #define PORT_ALTERA_JTAGUART 91 188 #define PORT_ALTERA_UART 92 189 190 /* SH-SCI */ 191 #define PORT_SCIFB 93 192 193 /* MAX3107 */ 194 #define PORT_MAX3107 94 195 196 /* High Speed UART for Medfield */ 197 #define PORT_MFD 95 198 199 /* TI OMAP-UART */ 200 #define PORT_OMAP 96 201 202 /* VIA VT8500 SoC */ 203 #define PORT_VT8500 97 204 205 #ifdef __KERNEL__ 206 207 #include <linux/compiler.h> 208 #include <linux/interrupt.h> 209 #include <linux/circ_buf.h> 210 #include <linux/spinlock.h> 211 #include <linux/sched.h> 212 #include <linux/tty.h> 213 #include <linux/mutex.h> 214 #include <linux/sysrq.h> 215 216 struct uart_port; 217 struct serial_struct; 218 struct device; 219 220 /* 221 * This structure describes all the operations that can be 222 * done on the physical hardware. 223 */ 224 struct uart_ops { 225 unsigned int (*tx_empty)(struct uart_port *); 226 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 227 unsigned int (*get_mctrl)(struct uart_port *); 228 void (*stop_tx)(struct uart_port *); 229 void (*start_tx)(struct uart_port *); 230 void (*send_xchar)(struct uart_port *, char ch); 231 void (*stop_rx)(struct uart_port *); 232 void (*enable_ms)(struct uart_port *); 233 void (*break_ctl)(struct uart_port *, int ctl); 234 int (*startup)(struct uart_port *); 235 void (*shutdown)(struct uart_port *); 236 void (*flush_buffer)(struct uart_port *); 237 void (*set_termios)(struct uart_port *, struct ktermios *new, 238 struct ktermios *old); 239 void (*set_ldisc)(struct uart_port *, int new); 240 void (*pm)(struct uart_port *, unsigned int state, 241 unsigned int oldstate); 242 int (*set_wake)(struct uart_port *, unsigned int state); 243 244 /* 245 * Return a string describing the type of the port 246 */ 247 const char *(*type)(struct uart_port *); 248 249 /* 250 * Release IO and memory resources used by the port. 251 * This includes iounmap if necessary. 252 */ 253 void (*release_port)(struct uart_port *); 254 255 /* 256 * Request IO and memory resources used by the port. 257 * This includes iomapping the port if necessary. 258 */ 259 int (*request_port)(struct uart_port *); 260 void (*config_port)(struct uart_port *, int); 261 int (*verify_port)(struct uart_port *, struct serial_struct *); 262 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 263 #ifdef CONFIG_CONSOLE_POLL 264 void (*poll_put_char)(struct uart_port *, unsigned char); 265 int (*poll_get_char)(struct uart_port *); 266 #endif 267 }; 268 269 #define NO_POLL_CHAR 0x00ff0000 270 #define UART_CONFIG_TYPE (1 << 0) 271 #define UART_CONFIG_IRQ (1 << 1) 272 273 struct uart_icount { 274 __u32 cts; 275 __u32 dsr; 276 __u32 rng; 277 __u32 dcd; 278 __u32 rx; 279 __u32 tx; 280 __u32 frame; 281 __u32 overrun; 282 __u32 parity; 283 __u32 brk; 284 __u32 buf_overrun; 285 }; 286 287 typedef unsigned int __bitwise__ upf_t; 288 289 struct uart_port { 290 spinlock_t lock; /* port lock */ 291 unsigned long iobase; /* in/out[bwl] */ 292 unsigned char __iomem *membase; /* read/write[bwl] */ 293 unsigned int (*serial_in)(struct uart_port *, int); 294 void (*serial_out)(struct uart_port *, int, int); 295 void (*set_termios)(struct uart_port *, 296 struct ktermios *new, 297 struct ktermios *old); 298 void (*pm)(struct uart_port *, unsigned int state, 299 unsigned int old); 300 unsigned int irq; /* irq number */ 301 unsigned long irqflags; /* irq flags */ 302 unsigned int uartclk; /* base uart clock */ 303 unsigned int fifosize; /* tx fifo size */ 304 unsigned char x_char; /* xon/xoff char */ 305 unsigned char regshift; /* reg offset shift */ 306 unsigned char iotype; /* io access style */ 307 unsigned char unused1; 308 309 #define UPIO_PORT (0) 310 #define UPIO_HUB6 (1) 311 #define UPIO_MEM (2) 312 #define UPIO_MEM32 (3) 313 #define UPIO_AU (4) /* Au1x00 type IO */ 314 #define UPIO_TSI (5) /* Tsi108/109 type IO */ 315 #define UPIO_DWAPB (6) /* DesignWare APB UART */ 316 #define UPIO_RM9000 (7) /* RM9000 type IO */ 317 #define UPIO_DWAPB32 (8) /* DesignWare APB UART (32 bit accesses) */ 318 319 unsigned int read_status_mask; /* driver specific */ 320 unsigned int ignore_status_mask; /* driver specific */ 321 struct uart_state *state; /* pointer to parent state */ 322 struct uart_icount icount; /* statistics */ 323 324 struct console *cons; /* struct console, if any */ 325 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ) 326 unsigned long sysrq; /* sysrq timeout */ 327 #endif 328 329 upf_t flags; 330 331 #define UPF_FOURPORT ((__force upf_t) (1 << 1)) 332 #define UPF_SAK ((__force upf_t) (1 << 2)) 333 #define UPF_SPD_MASK ((__force upf_t) (0x1030)) 334 #define UPF_SPD_HI ((__force upf_t) (0x0010)) 335 #define UPF_SPD_VHI ((__force upf_t) (0x0020)) 336 #define UPF_SPD_CUST ((__force upf_t) (0x0030)) 337 #define UPF_SPD_SHI ((__force upf_t) (0x1000)) 338 #define UPF_SPD_WARP ((__force upf_t) (0x1010)) 339 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 340 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 341 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 342 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 343 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 344 #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15)) 345 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 346 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 347 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 348 /* The exact UART type is known and should not be probed. */ 349 #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) 350 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 351 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 352 #define UPF_DEAD ((__force upf_t) (1 << 30)) 353 #define UPF_IOREMAP ((__force upf_t) (1 << 31)) 354 355 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 356 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 357 358 unsigned int mctrl; /* current modem ctrl settings */ 359 unsigned int timeout; /* character-based timeout */ 360 unsigned int type; /* port type */ 361 const struct uart_ops *ops; 362 unsigned int custom_divisor; 363 unsigned int line; /* port index */ 364 resource_size_t mapbase; /* for ioremap */ 365 struct device *dev; /* parent device */ 366 unsigned char hub6; /* this should be in the 8250 driver */ 367 unsigned char suspended; 368 unsigned char irq_wake; 369 unsigned char unused[2]; 370 void *private_data; /* generic platform data pointer */ 371 }; 372 373 /* 374 * This is the state information which is persistent across opens. 375 */ 376 struct uart_state { 377 struct tty_port port; 378 379 int pm_state; 380 struct circ_buf xmit; 381 382 struct tasklet_struct tlet; 383 struct uart_port *uart_port; 384 }; 385 386 #define UART_XMIT_SIZE PAGE_SIZE 387 388 389 /* number of characters left in xmit buffer before we ask for more */ 390 #define WAKEUP_CHARS 256 391 392 struct module; 393 struct tty_driver; 394 395 struct uart_driver { 396 struct module *owner; 397 const char *driver_name; 398 const char *dev_name; 399 int major; 400 int minor; 401 int nr; 402 struct console *cons; 403 404 /* 405 * these are private; the low level driver should not 406 * touch these; they should be initialised to NULL 407 */ 408 struct uart_state *state; 409 struct tty_driver *tty_driver; 410 }; 411 412 void uart_write_wakeup(struct uart_port *port); 413 414 /* 415 * Baud rate helpers. 416 */ 417 void uart_update_timeout(struct uart_port *port, unsigned int cflag, 418 unsigned int baud); 419 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 420 struct ktermios *old, unsigned int min, 421 unsigned int max); 422 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 423 424 /* Base timer interval for polling */ 425 static inline int uart_poll_timeout(struct uart_port *port) 426 { 427 int timeout = port->timeout; 428 429 return timeout > 6 ? (timeout / 2 - 2) : 1; 430 } 431 432 /* 433 * Console helpers. 434 */ 435 struct uart_port *uart_get_console(struct uart_port *ports, int nr, 436 struct console *c); 437 void uart_parse_options(char *options, int *baud, int *parity, int *bits, 438 int *flow); 439 int uart_set_options(struct uart_port *port, struct console *co, int baud, 440 int parity, int bits, int flow); 441 struct tty_driver *uart_console_device(struct console *co, int *index); 442 void uart_console_write(struct uart_port *port, const char *s, 443 unsigned int count, 444 void (*putchar)(struct uart_port *, int)); 445 446 /* 447 * Port/driver registration/removal 448 */ 449 int uart_register_driver(struct uart_driver *uart); 450 void uart_unregister_driver(struct uart_driver *uart); 451 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 452 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 453 int uart_match_port(struct uart_port *port1, struct uart_port *port2); 454 455 /* 456 * Power Management 457 */ 458 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 459 int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 460 461 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 462 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 463 464 #define uart_circ_chars_pending(circ) \ 465 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 466 467 #define uart_circ_chars_free(circ) \ 468 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 469 470 static inline int uart_tx_stopped(struct uart_port *port) 471 { 472 struct tty_struct *tty = port->state->port.tty; 473 if(tty->stopped || tty->hw_stopped) 474 return 1; 475 return 0; 476 } 477 478 /* 479 * The following are helper functions for the low level drivers. 480 */ 481 static inline int 482 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 483 { 484 #ifdef SUPPORT_SYSRQ 485 if (port->sysrq) { 486 if (ch && time_before(jiffies, port->sysrq)) { 487 handle_sysrq(ch); 488 port->sysrq = 0; 489 return 1; 490 } 491 port->sysrq = 0; 492 } 493 #endif 494 return 0; 495 } 496 #ifndef SUPPORT_SYSRQ 497 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 498 #endif 499 500 /* 501 * We do the SysRQ and SAK checking like this... 502 */ 503 static inline int uart_handle_break(struct uart_port *port) 504 { 505 struct uart_state *state = port->state; 506 #ifdef SUPPORT_SYSRQ 507 if (port->cons && port->cons->index == port->line) { 508 if (!port->sysrq) { 509 port->sysrq = jiffies + HZ*5; 510 return 1; 511 } 512 port->sysrq = 0; 513 } 514 #endif 515 if (port->flags & UPF_SAK) 516 do_SAK(state->port.tty); 517 return 0; 518 } 519 520 /** 521 * uart_handle_dcd_change - handle a change of carrier detect state 522 * @uport: uart_port structure for the open port 523 * @status: new carrier detect status, nonzero if active 524 */ 525 static inline void 526 uart_handle_dcd_change(struct uart_port *uport, unsigned int status) 527 { 528 struct uart_state *state = uport->state; 529 struct tty_port *port = &state->port; 530 struct tty_ldisc *ld = tty_ldisc_ref(port->tty); 531 struct timespec ts; 532 533 if (ld && ld->ops->dcd_change) 534 getnstimeofday(&ts); 535 536 uport->icount.dcd++; 537 #ifdef CONFIG_HARD_PPS 538 if ((uport->flags & UPF_HARDPPS_CD) && status) 539 hardpps(); 540 #endif 541 542 if (port->flags & ASYNC_CHECK_CD) { 543 if (status) 544 wake_up_interruptible(&port->open_wait); 545 else if (port->tty) 546 tty_hangup(port->tty); 547 } 548 549 if (ld && ld->ops->dcd_change) 550 ld->ops->dcd_change(port->tty, status, &ts); 551 if (ld) 552 tty_ldisc_deref(ld); 553 } 554 555 /** 556 * uart_handle_cts_change - handle a change of clear-to-send state 557 * @uport: uart_port structure for the open port 558 * @status: new clear to send status, nonzero if active 559 */ 560 static inline void 561 uart_handle_cts_change(struct uart_port *uport, unsigned int status) 562 { 563 struct tty_port *port = &uport->state->port; 564 struct tty_struct *tty = port->tty; 565 566 uport->icount.cts++; 567 568 if (port->flags & ASYNC_CTS_FLOW) { 569 if (tty->hw_stopped) { 570 if (status) { 571 tty->hw_stopped = 0; 572 uport->ops->start_tx(uport); 573 uart_write_wakeup(uport); 574 } 575 } else { 576 if (!status) { 577 tty->hw_stopped = 1; 578 uport->ops->stop_tx(uport); 579 } 580 } 581 } 582 } 583 584 #include <linux/tty_flip.h> 585 586 static inline void 587 uart_insert_char(struct uart_port *port, unsigned int status, 588 unsigned int overrun, unsigned int ch, unsigned int flag) 589 { 590 struct tty_struct *tty = port->state->port.tty; 591 592 if ((status & port->ignore_status_mask & ~overrun) == 0) 593 tty_insert_flip_char(tty, ch, flag); 594 595 /* 596 * Overrun is special. Since it's reported immediately, 597 * it doesn't affect the current character. 598 */ 599 if (status & ~port->ignore_status_mask & overrun) 600 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 601 } 602 603 /* 604 * UART_ENABLE_MS - determine if port should enable modem status irqs 605 */ 606 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 607 (cflag) & CRTSCTS || \ 608 !((cflag) & CLOCAL)) 609 610 #endif 611 612 #endif /* LINUX_SERIAL_CORE_H */ 613