1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef LINUX_SERIAL_CORE_H 21 #define LINUX_SERIAL_CORE_H 22 23 #include <linux/serial.h> 24 25 /* 26 * The type definitions. These are from Ted Ts'o's serial.h 27 */ 28 #define PORT_UNKNOWN 0 29 #define PORT_8250 1 30 #define PORT_16450 2 31 #define PORT_16550 3 32 #define PORT_16550A 4 33 #define PORT_CIRRUS 5 34 #define PORT_16650 6 35 #define PORT_16650V2 7 36 #define PORT_16750 8 37 #define PORT_STARTECH 9 38 #define PORT_16C950 10 39 #define PORT_16654 11 40 #define PORT_16850 12 41 #define PORT_RSA 13 42 #define PORT_NS16550A 14 43 #define PORT_XSCALE 15 44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 48 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 49 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */ 50 #define PORT_MAX_8250 21 /* max port ID */ 51 52 /* 53 * ARM specific type numbers. These are not currently guaranteed 54 * to be implemented, and will change in the future. These are 55 * separate so any additions to the old serial.c that occur before 56 * we are merged can be easily merged here. 57 */ 58 #define PORT_PXA 31 59 #define PORT_AMBA 32 60 #define PORT_CLPS711X 33 61 #define PORT_SA1100 34 62 #define PORT_UART00 35 63 #define PORT_21285 37 64 65 /* Sparc type numbers. */ 66 #define PORT_SUNZILOG 38 67 #define PORT_SUNSAB 39 68 69 /* DEC */ 70 #define PORT_DZ 46 71 #define PORT_ZS 47 72 73 /* Parisc type numbers. */ 74 #define PORT_MUX 48 75 76 /* Atmel AT91 / AT32 SoC */ 77 #define PORT_ATMEL 49 78 79 /* Macintosh Zilog type numbers */ 80 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 81 #define PORT_PMAC_ZILOG 51 82 83 /* SH-SCI */ 84 #define PORT_SCI 52 85 #define PORT_SCIF 53 86 #define PORT_IRDA 54 87 88 /* Samsung S3C2410 SoC and derivatives thereof */ 89 #define PORT_S3C2410 55 90 91 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 92 #define PORT_IP22ZILOG 56 93 94 /* Sharp LH7a40x -- an ARM9 SoC series */ 95 #define PORT_LH7A40X 57 96 97 /* PPC CPM type number */ 98 #define PORT_CPM 58 99 100 /* MPC52xx (and MPC512x) type numbers */ 101 #define PORT_MPC52xx 59 102 103 /* IBM icom */ 104 #define PORT_ICOM 60 105 106 /* Samsung S3C2440 SoC */ 107 #define PORT_S3C2440 61 108 109 /* Motorola i.MX SoC */ 110 #define PORT_IMX 62 111 112 /* Marvell MPSC */ 113 #define PORT_MPSC 63 114 115 /* TXX9 type number */ 116 #define PORT_TXX9 64 117 118 /* NEC VR4100 series SIU/DSIU */ 119 #define PORT_VR41XX_SIU 65 120 #define PORT_VR41XX_DSIU 66 121 122 /* Samsung S3C2400 SoC */ 123 #define PORT_S3C2400 67 124 125 /* M32R SIO */ 126 #define PORT_M32R_SIO 68 127 128 /*Digi jsm */ 129 #define PORT_JSM 69 130 131 #define PORT_PNX8XXX 70 132 133 /* Hilscher netx */ 134 #define PORT_NETX 71 135 136 /* SUN4V Hypervisor Console */ 137 #define PORT_SUNHV 72 138 139 #define PORT_S3C2412 73 140 141 /* Xilinx uartlite */ 142 #define PORT_UARTLITE 74 143 144 /* Blackfin bf5xx */ 145 #define PORT_BFIN 75 146 147 /* Micrel KS8695 */ 148 #define PORT_KS8695 76 149 150 /* Broadcom SB1250, etc. SOC */ 151 #define PORT_SB1250_DUART 77 152 153 /* Freescale ColdFire */ 154 #define PORT_MCF 78 155 156 /* Blackfin SPORT */ 157 #define PORT_BFIN_SPORT 79 158 159 /* MN10300 on-chip UART numbers */ 160 #define PORT_MN10300 80 161 #define PORT_MN10300_CTS 81 162 163 #define PORT_SC26XX 82 164 165 /* SH-SCI */ 166 #define PORT_SCIFA 83 167 168 #define PORT_S3C6400 84 169 170 /* NWPSERIAL */ 171 #define PORT_NWPSERIAL 85 172 173 /* MAX3100 */ 174 #define PORT_MAX3100 86 175 176 /* Timberdale UART */ 177 #define PORT_TIMBUART 87 178 179 /* Qualcomm MSM SoCs */ 180 #define PORT_MSM 88 181 182 /* BCM63xx family SoCs */ 183 #define PORT_BCM63XX 89 184 185 /* Aeroflex Gaisler GRLIB APBUART */ 186 #define PORT_APBUART 90 187 188 /* Altera UARTs */ 189 #define PORT_ALTERA_JTAGUART 91 190 #define PORT_ALTERA_UART 92 191 192 /* SH-SCI */ 193 #define PORT_SCIFB 93 194 195 /* MAX3107 */ 196 #define PORT_MAX3107 94 197 198 /* High Speed UART for Medfield */ 199 #define PORT_MFD 95 200 201 /* TI OMAP-UART */ 202 #define PORT_OMAP 96 203 204 /* VIA VT8500 SoC */ 205 #define PORT_VT8500 97 206 207 /* Xilinx PSS UART */ 208 #define PORT_XUARTPS 98 209 210 #ifdef __KERNEL__ 211 212 #include <linux/compiler.h> 213 #include <linux/interrupt.h> 214 #include <linux/circ_buf.h> 215 #include <linux/spinlock.h> 216 #include <linux/sched.h> 217 #include <linux/tty.h> 218 #include <linux/mutex.h> 219 #include <linux/sysrq.h> 220 #include <linux/pps_kernel.h> 221 222 struct uart_port; 223 struct serial_struct; 224 struct device; 225 226 /* 227 * This structure describes all the operations that can be 228 * done on the physical hardware. 229 */ 230 struct uart_ops { 231 unsigned int (*tx_empty)(struct uart_port *); 232 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 233 unsigned int (*get_mctrl)(struct uart_port *); 234 void (*stop_tx)(struct uart_port *); 235 void (*start_tx)(struct uart_port *); 236 void (*send_xchar)(struct uart_port *, char ch); 237 void (*stop_rx)(struct uart_port *); 238 void (*enable_ms)(struct uart_port *); 239 void (*break_ctl)(struct uart_port *, int ctl); 240 int (*startup)(struct uart_port *); 241 void (*shutdown)(struct uart_port *); 242 void (*flush_buffer)(struct uart_port *); 243 void (*set_termios)(struct uart_port *, struct ktermios *new, 244 struct ktermios *old); 245 void (*set_ldisc)(struct uart_port *, int new); 246 void (*pm)(struct uart_port *, unsigned int state, 247 unsigned int oldstate); 248 int (*set_wake)(struct uart_port *, unsigned int state); 249 250 /* 251 * Return a string describing the type of the port 252 */ 253 const char *(*type)(struct uart_port *); 254 255 /* 256 * Release IO and memory resources used by the port. 257 * This includes iounmap if necessary. 258 */ 259 void (*release_port)(struct uart_port *); 260 261 /* 262 * Request IO and memory resources used by the port. 263 * This includes iomapping the port if necessary. 264 */ 265 int (*request_port)(struct uart_port *); 266 void (*config_port)(struct uart_port *, int); 267 int (*verify_port)(struct uart_port *, struct serial_struct *); 268 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 269 #ifdef CONFIG_CONSOLE_POLL 270 void (*poll_put_char)(struct uart_port *, unsigned char); 271 int (*poll_get_char)(struct uart_port *); 272 #endif 273 }; 274 275 #define NO_POLL_CHAR 0x00ff0000 276 #define UART_CONFIG_TYPE (1 << 0) 277 #define UART_CONFIG_IRQ (1 << 1) 278 279 struct uart_icount { 280 __u32 cts; 281 __u32 dsr; 282 __u32 rng; 283 __u32 dcd; 284 __u32 rx; 285 __u32 tx; 286 __u32 frame; 287 __u32 overrun; 288 __u32 parity; 289 __u32 brk; 290 __u32 buf_overrun; 291 }; 292 293 typedef unsigned int __bitwise__ upf_t; 294 295 struct uart_port { 296 spinlock_t lock; /* port lock */ 297 unsigned long iobase; /* in/out[bwl] */ 298 unsigned char __iomem *membase; /* read/write[bwl] */ 299 unsigned int (*serial_in)(struct uart_port *, int); 300 void (*serial_out)(struct uart_port *, int, int); 301 void (*set_termios)(struct uart_port *, 302 struct ktermios *new, 303 struct ktermios *old); 304 int (*handle_irq)(struct uart_port *); 305 void (*pm)(struct uart_port *, unsigned int state, 306 unsigned int old); 307 unsigned int irq; /* irq number */ 308 unsigned long irqflags; /* irq flags */ 309 unsigned int uartclk; /* base uart clock */ 310 unsigned int fifosize; /* tx fifo size */ 311 unsigned char x_char; /* xon/xoff char */ 312 unsigned char regshift; /* reg offset shift */ 313 unsigned char iotype; /* io access style */ 314 unsigned char unused1; 315 316 #define UPIO_PORT (0) 317 #define UPIO_HUB6 (1) 318 #define UPIO_MEM (2) 319 #define UPIO_MEM32 (3) 320 #define UPIO_AU (4) /* Au1x00 type IO */ 321 #define UPIO_TSI (5) /* Tsi108/109 type IO */ 322 #define UPIO_RM9000 (6) /* RM9000 type IO */ 323 324 unsigned int read_status_mask; /* driver specific */ 325 unsigned int ignore_status_mask; /* driver specific */ 326 struct uart_state *state; /* pointer to parent state */ 327 struct uart_icount icount; /* statistics */ 328 329 struct console *cons; /* struct console, if any */ 330 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ) 331 unsigned long sysrq; /* sysrq timeout */ 332 #endif 333 334 upf_t flags; 335 336 #define UPF_FOURPORT ((__force upf_t) (1 << 1)) 337 #define UPF_SAK ((__force upf_t) (1 << 2)) 338 #define UPF_SPD_MASK ((__force upf_t) (0x1030)) 339 #define UPF_SPD_HI ((__force upf_t) (0x0010)) 340 #define UPF_SPD_VHI ((__force upf_t) (0x0020)) 341 #define UPF_SPD_CUST ((__force upf_t) (0x0030)) 342 #define UPF_SPD_SHI ((__force upf_t) (0x1000)) 343 #define UPF_SPD_WARP ((__force upf_t) (0x1010)) 344 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 345 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 346 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 347 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 348 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 349 #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15)) 350 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 351 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 352 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 353 #define UPF_EXAR_EFR ((__force upf_t) (1 << 25)) 354 #define UPF_IIR_ONCE ((__force upf_t) (1 << 26)) 355 /* The exact UART type is known and should not be probed. */ 356 #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) 357 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 358 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 359 #define UPF_DEAD ((__force upf_t) (1 << 30)) 360 #define UPF_IOREMAP ((__force upf_t) (1 << 31)) 361 362 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 363 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 364 365 unsigned int mctrl; /* current modem ctrl settings */ 366 unsigned int timeout; /* character-based timeout */ 367 unsigned int type; /* port type */ 368 const struct uart_ops *ops; 369 unsigned int custom_divisor; 370 unsigned int line; /* port index */ 371 resource_size_t mapbase; /* for ioremap */ 372 struct device *dev; /* parent device */ 373 unsigned char hub6; /* this should be in the 8250 driver */ 374 unsigned char suspended; 375 unsigned char irq_wake; 376 unsigned char unused[2]; 377 void *private_data; /* generic platform data pointer */ 378 }; 379 380 /* 381 * This is the state information which is persistent across opens. 382 */ 383 struct uart_state { 384 struct tty_port port; 385 386 int pm_state; 387 struct circ_buf xmit; 388 389 struct uart_port *uart_port; 390 }; 391 392 #define UART_XMIT_SIZE PAGE_SIZE 393 394 395 /* number of characters left in xmit buffer before we ask for more */ 396 #define WAKEUP_CHARS 256 397 398 struct module; 399 struct tty_driver; 400 401 struct uart_driver { 402 struct module *owner; 403 const char *driver_name; 404 const char *dev_name; 405 int major; 406 int minor; 407 int nr; 408 struct console *cons; 409 410 /* 411 * these are private; the low level driver should not 412 * touch these; they should be initialised to NULL 413 */ 414 struct uart_state *state; 415 struct tty_driver *tty_driver; 416 }; 417 418 void uart_write_wakeup(struct uart_port *port); 419 420 /* 421 * Baud rate helpers. 422 */ 423 void uart_update_timeout(struct uart_port *port, unsigned int cflag, 424 unsigned int baud); 425 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 426 struct ktermios *old, unsigned int min, 427 unsigned int max); 428 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 429 430 /* Base timer interval for polling */ 431 static inline int uart_poll_timeout(struct uart_port *port) 432 { 433 int timeout = port->timeout; 434 435 return timeout > 6 ? (timeout / 2 - 2) : 1; 436 } 437 438 /* 439 * Console helpers. 440 */ 441 struct uart_port *uart_get_console(struct uart_port *ports, int nr, 442 struct console *c); 443 void uart_parse_options(char *options, int *baud, int *parity, int *bits, 444 int *flow); 445 int uart_set_options(struct uart_port *port, struct console *co, int baud, 446 int parity, int bits, int flow); 447 struct tty_driver *uart_console_device(struct console *co, int *index); 448 void uart_console_write(struct uart_port *port, const char *s, 449 unsigned int count, 450 void (*putchar)(struct uart_port *, int)); 451 452 /* 453 * Port/driver registration/removal 454 */ 455 int uart_register_driver(struct uart_driver *uart); 456 void uart_unregister_driver(struct uart_driver *uart); 457 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 458 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 459 int uart_match_port(struct uart_port *port1, struct uart_port *port2); 460 461 /* 462 * Power Management 463 */ 464 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 465 int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 466 467 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 468 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 469 470 #define uart_circ_chars_pending(circ) \ 471 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 472 473 #define uart_circ_chars_free(circ) \ 474 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 475 476 static inline int uart_tx_stopped(struct uart_port *port) 477 { 478 struct tty_struct *tty = port->state->port.tty; 479 if(tty->stopped || tty->hw_stopped) 480 return 1; 481 return 0; 482 } 483 484 /* 485 * The following are helper functions for the low level drivers. 486 */ 487 488 extern void uart_handle_dcd_change(struct uart_port *uport, 489 unsigned int status); 490 extern void uart_handle_cts_change(struct uart_port *uport, 491 unsigned int status); 492 493 extern void uart_insert_char(struct uart_port *port, unsigned int status, 494 unsigned int overrun, unsigned int ch, unsigned int flag); 495 496 #ifdef SUPPORT_SYSRQ 497 static inline int 498 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 499 { 500 if (port->sysrq) { 501 if (ch && time_before(jiffies, port->sysrq)) { 502 handle_sysrq(ch); 503 port->sysrq = 0; 504 return 1; 505 } 506 port->sysrq = 0; 507 } 508 return 0; 509 } 510 #else 511 #define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; }) 512 #endif 513 514 /* 515 * We do the SysRQ and SAK checking like this... 516 */ 517 static inline int uart_handle_break(struct uart_port *port) 518 { 519 struct uart_state *state = port->state; 520 #ifdef SUPPORT_SYSRQ 521 if (port->cons && port->cons->index == port->line) { 522 if (!port->sysrq) { 523 port->sysrq = jiffies + HZ*5; 524 return 1; 525 } 526 port->sysrq = 0; 527 } 528 #endif 529 if (port->flags & UPF_SAK) 530 do_SAK(state->port.tty); 531 return 0; 532 } 533 534 /* 535 * UART_ENABLE_MS - determine if port should enable modem status irqs 536 */ 537 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 538 (cflag) & CRTSCTS || \ 539 !((cflag) & CLOCAL)) 540 541 #endif 542 543 #endif /* LINUX_SERIAL_CORE_H */ 544