xref: /linux-6.15/include/linux/serial_core.h (revision e8fa600e)
1 /*
2  *  linux/drivers/char/serial_core.h
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22 
23 #include <linux/serial.h>
24 
25 /*
26  * The type definitions.  These are from Ted Ts'o's serial.h
27  */
28 #define PORT_UNKNOWN	0
29 #define PORT_8250	1
30 #define PORT_16450	2
31 #define PORT_16550	3
32 #define PORT_16550A	4
33 #define PORT_CIRRUS	5
34 #define PORT_16650	6
35 #define PORT_16650V2	7
36 #define PORT_16750	8
37 #define PORT_STARTECH	9
38 #define PORT_16C950	10
39 #define PORT_16654	11
40 #define PORT_16850	12
41 #define PORT_RSA	13
42 #define PORT_NS16550A	14
43 #define PORT_XSCALE	15
44 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
45 #define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
46 #define PORT_AR7	18	/* Texas Instruments AR7 internal UART */
47 #define PORT_U6_16550A	19	/* ST-Ericsson U6xxx internal UART */
48 #define PORT_TEGRA	20	/* NVIDIA Tegra internal UART */
49 #define PORT_XR17D15X	21	/* Exar XR17D15x UART */
50 #define PORT_LPC3220	22	/* NXP LPC32xx SoC "Standard" UART */
51 #define PORT_MAX_8250	22	/* max port ID */
52 
53 /*
54  * ARM specific type numbers.  These are not currently guaranteed
55  * to be implemented, and will change in the future.  These are
56  * separate so any additions to the old serial.c that occur before
57  * we are merged can be easily merged here.
58  */
59 #define PORT_PXA	31
60 #define PORT_AMBA	32
61 #define PORT_CLPS711X	33
62 #define PORT_SA1100	34
63 #define PORT_UART00	35
64 #define PORT_21285	37
65 
66 /* Sparc type numbers.  */
67 #define PORT_SUNZILOG	38
68 #define PORT_SUNSAB	39
69 
70 /* DEC */
71 #define PORT_DZ		46
72 #define PORT_ZS		47
73 
74 /* Parisc type numbers. */
75 #define PORT_MUX	48
76 
77 /* Atmel AT91 / AT32 SoC */
78 #define PORT_ATMEL	49
79 
80 /* Macintosh Zilog type numbers */
81 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
82 #define PORT_PMAC_ZILOG	51
83 
84 /* SH-SCI */
85 #define PORT_SCI	52
86 #define PORT_SCIF	53
87 #define PORT_IRDA	54
88 
89 /* Samsung S3C2410 SoC and derivatives thereof */
90 #define PORT_S3C2410    55
91 
92 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
93 #define PORT_IP22ZILOG	56
94 
95 /* Sharp LH7a40x -- an ARM9 SoC series */
96 #define PORT_LH7A40X	57
97 
98 /* PPC CPM type number */
99 #define PORT_CPM        58
100 
101 /* MPC52xx (and MPC512x) type numbers */
102 #define PORT_MPC52xx	59
103 
104 /* IBM icom */
105 #define PORT_ICOM	60
106 
107 /* Samsung S3C2440 SoC */
108 #define PORT_S3C2440	61
109 
110 /* Motorola i.MX SoC */
111 #define PORT_IMX	62
112 
113 /* Marvell MPSC */
114 #define PORT_MPSC	63
115 
116 /* TXX9 type number */
117 #define PORT_TXX9	64
118 
119 /* NEC VR4100 series SIU/DSIU */
120 #define PORT_VR41XX_SIU		65
121 #define PORT_VR41XX_DSIU	66
122 
123 /* Samsung S3C2400 SoC */
124 #define PORT_S3C2400	67
125 
126 /* M32R SIO */
127 #define PORT_M32R_SIO	68
128 
129 /*Digi jsm */
130 #define PORT_JSM        69
131 
132 #define PORT_PNX8XXX	70
133 
134 /* Hilscher netx */
135 #define PORT_NETX	71
136 
137 /* SUN4V Hypervisor Console */
138 #define PORT_SUNHV	72
139 
140 #define PORT_S3C2412	73
141 
142 /* Xilinx uartlite */
143 #define PORT_UARTLITE	74
144 
145 /* Blackfin bf5xx */
146 #define PORT_BFIN	75
147 
148 /* Micrel KS8695 */
149 #define PORT_KS8695	76
150 
151 /* Broadcom SB1250, etc. SOC */
152 #define PORT_SB1250_DUART	77
153 
154 /* Freescale ColdFire */
155 #define PORT_MCF	78
156 
157 /* Blackfin SPORT */
158 #define PORT_BFIN_SPORT		79
159 
160 /* MN10300 on-chip UART numbers */
161 #define PORT_MN10300		80
162 #define PORT_MN10300_CTS	81
163 
164 #define PORT_SC26XX	82
165 
166 /* SH-SCI */
167 #define PORT_SCIFA	83
168 
169 #define PORT_S3C6400	84
170 
171 /* NWPSERIAL */
172 #define PORT_NWPSERIAL	85
173 
174 /* MAX3100 */
175 #define PORT_MAX3100    86
176 
177 /* Timberdale UART */
178 #define PORT_TIMBUART	87
179 
180 /* Qualcomm MSM SoCs */
181 #define PORT_MSM	88
182 
183 /* BCM63xx family SoCs */
184 #define PORT_BCM63XX	89
185 
186 /* Aeroflex Gaisler GRLIB APBUART */
187 #define PORT_APBUART    90
188 
189 /* Altera UARTs */
190 #define PORT_ALTERA_JTAGUART	91
191 #define PORT_ALTERA_UART	92
192 
193 /* SH-SCI */
194 #define PORT_SCIFB	93
195 
196 /* MAX3107 */
197 #define PORT_MAX3107	94
198 
199 /* High Speed UART for Medfield */
200 #define PORT_MFD	95
201 
202 /* TI OMAP-UART */
203 #define PORT_OMAP	96
204 
205 /* VIA VT8500 SoC */
206 #define PORT_VT8500	97
207 
208 /* Xilinx PSS UART */
209 #define PORT_XUARTPS	98
210 
211 /* Atheros AR933X SoC */
212 #define PORT_AR933X	99
213 
214 /* Energy Micro efm32 SoC */
215 #define PORT_EFMUART   100
216 
217 #ifdef __KERNEL__
218 
219 #include <linux/compiler.h>
220 #include <linux/interrupt.h>
221 #include <linux/circ_buf.h>
222 #include <linux/spinlock.h>
223 #include <linux/sched.h>
224 #include <linux/tty.h>
225 #include <linux/mutex.h>
226 #include <linux/sysrq.h>
227 #include <linux/pps_kernel.h>
228 
229 struct uart_port;
230 struct serial_struct;
231 struct device;
232 
233 /*
234  * This structure describes all the operations that can be
235  * done on the physical hardware.
236  */
237 struct uart_ops {
238 	unsigned int	(*tx_empty)(struct uart_port *);
239 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
240 	unsigned int	(*get_mctrl)(struct uart_port *);
241 	void		(*stop_tx)(struct uart_port *);
242 	void		(*start_tx)(struct uart_port *);
243 	void		(*send_xchar)(struct uart_port *, char ch);
244 	void		(*stop_rx)(struct uart_port *);
245 	void		(*enable_ms)(struct uart_port *);
246 	void		(*break_ctl)(struct uart_port *, int ctl);
247 	int		(*startup)(struct uart_port *);
248 	void		(*shutdown)(struct uart_port *);
249 	void		(*flush_buffer)(struct uart_port *);
250 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
251 				       struct ktermios *old);
252 	void		(*set_ldisc)(struct uart_port *, int new);
253 	void		(*pm)(struct uart_port *, unsigned int state,
254 			      unsigned int oldstate);
255 	int		(*set_wake)(struct uart_port *, unsigned int state);
256 
257 	/*
258 	 * Return a string describing the type of the port
259 	 */
260 	const char *(*type)(struct uart_port *);
261 
262 	/*
263 	 * Release IO and memory resources used by the port.
264 	 * This includes iounmap if necessary.
265 	 */
266 	void		(*release_port)(struct uart_port *);
267 
268 	/*
269 	 * Request IO and memory resources used by the port.
270 	 * This includes iomapping the port if necessary.
271 	 */
272 	int		(*request_port)(struct uart_port *);
273 	void		(*config_port)(struct uart_port *, int);
274 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
275 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
276 #ifdef CONFIG_CONSOLE_POLL
277 	void	(*poll_put_char)(struct uart_port *, unsigned char);
278 	int		(*poll_get_char)(struct uart_port *);
279 #endif
280 };
281 
282 #define NO_POLL_CHAR		0x00ff0000
283 #define UART_CONFIG_TYPE	(1 << 0)
284 #define UART_CONFIG_IRQ		(1 << 1)
285 
286 struct uart_icount {
287 	__u32	cts;
288 	__u32	dsr;
289 	__u32	rng;
290 	__u32	dcd;
291 	__u32	rx;
292 	__u32	tx;
293 	__u32	frame;
294 	__u32	overrun;
295 	__u32	parity;
296 	__u32	brk;
297 	__u32	buf_overrun;
298 };
299 
300 typedef unsigned int __bitwise__ upf_t;
301 
302 struct uart_port {
303 	spinlock_t		lock;			/* port lock */
304 	unsigned long		iobase;			/* in/out[bwl] */
305 	unsigned char __iomem	*membase;		/* read/write[bwl] */
306 	unsigned int		(*serial_in)(struct uart_port *, int);
307 	void			(*serial_out)(struct uart_port *, int, int);
308 	void			(*set_termios)(struct uart_port *,
309 				               struct ktermios *new,
310 				               struct ktermios *old);
311 	int			(*handle_irq)(struct uart_port *);
312 	void			(*pm)(struct uart_port *, unsigned int state,
313 				      unsigned int old);
314 	void			(*handle_break)(struct uart_port *);
315 	unsigned int		irq;			/* irq number */
316 	unsigned long		irqflags;		/* irq flags  */
317 	unsigned int		uartclk;		/* base uart clock */
318 	unsigned int		fifosize;		/* tx fifo size */
319 	unsigned char		x_char;			/* xon/xoff char */
320 	unsigned char		regshift;		/* reg offset shift */
321 	unsigned char		iotype;			/* io access style */
322 	unsigned char		unused1;
323 
324 #define UPIO_PORT		(0)
325 #define UPIO_HUB6		(1)
326 #define UPIO_MEM		(2)
327 #define UPIO_MEM32		(3)
328 #define UPIO_AU			(4)			/* Au1x00 type IO */
329 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
330 #define UPIO_RM9000		(6)			/* RM9000 type IO */
331 
332 	unsigned int		read_status_mask;	/* driver specific */
333 	unsigned int		ignore_status_mask;	/* driver specific */
334 	struct uart_state	*state;			/* pointer to parent state */
335 	struct uart_icount	icount;			/* statistics */
336 
337 	struct console		*cons;			/* struct console, if any */
338 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
339 	unsigned long		sysrq;			/* sysrq timeout */
340 #endif
341 
342 	upf_t			flags;
343 
344 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
345 #define UPF_SAK			((__force upf_t) (1 << 2))
346 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
347 #define UPF_SPD_HI		((__force upf_t) (0x0010))
348 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
349 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
350 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
351 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
352 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
353 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
354 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
355 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
356 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
357 #define UPF_NO_TXEN_TEST	((__force upf_t) (1 << 15))
358 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
359 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
360 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
361 #define UPF_EXAR_EFR		((__force upf_t) (1 << 25))
362 #define UPF_BUG_THRE		((__force upf_t) (1 << 26))
363 /* The exact UART type is known and should not be probed.  */
364 #define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
365 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
366 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
367 #define UPF_DEAD		((__force upf_t) (1 << 30))
368 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
369 
370 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
371 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
372 
373 	unsigned int		mctrl;			/* current modem ctrl settings */
374 	unsigned int		timeout;		/* character-based timeout */
375 	unsigned int		type;			/* port type */
376 	const struct uart_ops	*ops;
377 	unsigned int		custom_divisor;
378 	unsigned int		line;			/* port index */
379 	resource_size_t		mapbase;		/* for ioremap */
380 	struct device		*dev;			/* parent device */
381 	unsigned char		hub6;			/* this should be in the 8250 driver */
382 	unsigned char		suspended;
383 	unsigned char		irq_wake;
384 	unsigned char		unused[2];
385 	void			*private_data;		/* generic platform data pointer */
386 };
387 
388 static inline int serial_port_in(struct uart_port *up, int offset)
389 {
390 	return up->serial_in(up, offset);
391 }
392 
393 static inline void serial_port_out(struct uart_port *up, int offset, int value)
394 {
395 	up->serial_out(up, offset, value);
396 }
397 
398 /*
399  * This is the state information which is persistent across opens.
400  */
401 struct uart_state {
402 	struct tty_port		port;
403 
404 	int			pm_state;
405 	struct circ_buf		xmit;
406 
407 	struct uart_port	*uart_port;
408 };
409 
410 #define UART_XMIT_SIZE	PAGE_SIZE
411 
412 
413 /* number of characters left in xmit buffer before we ask for more */
414 #define WAKEUP_CHARS		256
415 
416 struct module;
417 struct tty_driver;
418 
419 struct uart_driver {
420 	struct module		*owner;
421 	const char		*driver_name;
422 	const char		*dev_name;
423 	int			 major;
424 	int			 minor;
425 	int			 nr;
426 	struct console		*cons;
427 
428 	/*
429 	 * these are private; the low level driver should not
430 	 * touch these; they should be initialised to NULL
431 	 */
432 	struct uart_state	*state;
433 	struct tty_driver	*tty_driver;
434 };
435 
436 void uart_write_wakeup(struct uart_port *port);
437 
438 /*
439  * Baud rate helpers.
440  */
441 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
442 			 unsigned int baud);
443 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
444 				struct ktermios *old, unsigned int min,
445 				unsigned int max);
446 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
447 
448 /* Base timer interval for polling */
449 static inline int uart_poll_timeout(struct uart_port *port)
450 {
451 	int timeout = port->timeout;
452 
453 	return timeout > 6 ? (timeout / 2 - 2) : 1;
454 }
455 
456 /*
457  * Console helpers.
458  */
459 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
460 				   struct console *c);
461 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
462 			int *flow);
463 int uart_set_options(struct uart_port *port, struct console *co, int baud,
464 		     int parity, int bits, int flow);
465 struct tty_driver *uart_console_device(struct console *co, int *index);
466 void uart_console_write(struct uart_port *port, const char *s,
467 			unsigned int count,
468 			void (*putchar)(struct uart_port *, int));
469 
470 /*
471  * Port/driver registration/removal
472  */
473 int uart_register_driver(struct uart_driver *uart);
474 void uart_unregister_driver(struct uart_driver *uart);
475 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
476 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
477 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
478 
479 /*
480  * Power Management
481  */
482 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
483 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
484 
485 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
486 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
487 
488 #define uart_circ_chars_pending(circ)	\
489 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
490 
491 #define uart_circ_chars_free(circ)	\
492 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
493 
494 static inline int uart_tx_stopped(struct uart_port *port)
495 {
496 	struct tty_struct *tty = port->state->port.tty;
497 	if(tty->stopped || tty->hw_stopped)
498 		return 1;
499 	return 0;
500 }
501 
502 /*
503  * The following are helper functions for the low level drivers.
504  */
505 
506 extern void uart_handle_dcd_change(struct uart_port *uport,
507 		unsigned int status);
508 extern void uart_handle_cts_change(struct uart_port *uport,
509 		unsigned int status);
510 
511 extern void uart_insert_char(struct uart_port *port, unsigned int status,
512 		 unsigned int overrun, unsigned int ch, unsigned int flag);
513 
514 #ifdef SUPPORT_SYSRQ
515 static inline int
516 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
517 {
518 	if (port->sysrq) {
519 		if (ch && time_before(jiffies, port->sysrq)) {
520 			handle_sysrq(ch);
521 			port->sysrq = 0;
522 			return 1;
523 		}
524 		port->sysrq = 0;
525 	}
526 	return 0;
527 }
528 #else
529 #define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; })
530 #endif
531 
532 /*
533  * We do the SysRQ and SAK checking like this...
534  */
535 static inline int uart_handle_break(struct uart_port *port)
536 {
537 	struct uart_state *state = port->state;
538 
539 	if (port->handle_break)
540 		port->handle_break(port);
541 
542 #ifdef SUPPORT_SYSRQ
543 	if (port->cons && port->cons->index == port->line) {
544 		if (!port->sysrq) {
545 			port->sysrq = jiffies + HZ*5;
546 			return 1;
547 		}
548 		port->sysrq = 0;
549 	}
550 #endif
551 	if (port->flags & UPF_SAK)
552 		do_SAK(state->port.tty);
553 	return 0;
554 }
555 
556 /*
557  *	UART_ENABLE_MS - determine if port should enable modem status irqs
558  */
559 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
560 					 (cflag) & CRTSCTS || \
561 					 !((cflag) & CLOCAL))
562 
563 #endif
564 
565 #endif /* LINUX_SERIAL_CORE_H */
566