1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef LINUX_SERIAL_CORE_H 21 #define LINUX_SERIAL_CORE_H 22 23 #include <linux/serial.h> 24 25 /* 26 * The type definitions. These are from Ted Ts'o's serial.h 27 */ 28 #define PORT_UNKNOWN 0 29 #define PORT_8250 1 30 #define PORT_16450 2 31 #define PORT_16550 3 32 #define PORT_16550A 4 33 #define PORT_CIRRUS 5 34 #define PORT_16650 6 35 #define PORT_16650V2 7 36 #define PORT_16750 8 37 #define PORT_STARTECH 9 38 #define PORT_16C950 10 39 #define PORT_16654 11 40 #define PORT_16850 12 41 #define PORT_RSA 13 42 #define PORT_NS16550A 14 43 #define PORT_XSCALE 15 44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 48 #define PORT_MAX_8250 19 /* max port ID */ 49 50 /* 51 * ARM specific type numbers. These are not currently guaranteed 52 * to be implemented, and will change in the future. These are 53 * separate so any additions to the old serial.c that occur before 54 * we are merged can be easily merged here. 55 */ 56 #define PORT_PXA 31 57 #define PORT_AMBA 32 58 #define PORT_CLPS711X 33 59 #define PORT_SA1100 34 60 #define PORT_UART00 35 61 #define PORT_21285 37 62 63 /* Sparc type numbers. */ 64 #define PORT_SUNZILOG 38 65 #define PORT_SUNSAB 39 66 67 /* DEC */ 68 #define PORT_DZ 46 69 #define PORT_ZS 47 70 71 /* Parisc type numbers. */ 72 #define PORT_MUX 48 73 74 /* Atmel AT91 / AT32 SoC */ 75 #define PORT_ATMEL 49 76 77 /* Macintosh Zilog type numbers */ 78 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 79 #define PORT_PMAC_ZILOG 51 80 81 /* SH-SCI */ 82 #define PORT_SCI 52 83 #define PORT_SCIF 53 84 #define PORT_IRDA 54 85 86 /* Samsung S3C2410 SoC and derivatives thereof */ 87 #define PORT_S3C2410 55 88 89 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 90 #define PORT_IP22ZILOG 56 91 92 /* Sharp LH7a40x -- an ARM9 SoC series */ 93 #define PORT_LH7A40X 57 94 95 /* PPC CPM type number */ 96 #define PORT_CPM 58 97 98 /* MPC52xx type numbers */ 99 #define PORT_MPC52xx 59 100 101 /* IBM icom */ 102 #define PORT_ICOM 60 103 104 /* Samsung S3C2440 SoC */ 105 #define PORT_S3C2440 61 106 107 /* Motorola i.MX SoC */ 108 #define PORT_IMX 62 109 110 /* Marvell MPSC */ 111 #define PORT_MPSC 63 112 113 /* TXX9 type number */ 114 #define PORT_TXX9 64 115 116 /* NEC VR4100 series SIU/DSIU */ 117 #define PORT_VR41XX_SIU 65 118 #define PORT_VR41XX_DSIU 66 119 120 /* Samsung S3C2400 SoC */ 121 #define PORT_S3C2400 67 122 123 /* M32R SIO */ 124 #define PORT_M32R_SIO 68 125 126 /*Digi jsm */ 127 #define PORT_JSM 69 128 129 #define PORT_PNX8XXX 70 130 131 /* Hilscher netx */ 132 #define PORT_NETX 71 133 134 /* SUN4V Hypervisor Console */ 135 #define PORT_SUNHV 72 136 137 #define PORT_S3C2412 73 138 139 /* Xilinx uartlite */ 140 #define PORT_UARTLITE 74 141 142 /* Blackfin bf5xx */ 143 #define PORT_BFIN 75 144 145 /* Micrel KS8695 */ 146 #define PORT_KS8695 76 147 148 /* Broadcom SB1250, etc. SOC */ 149 #define PORT_SB1250_DUART 77 150 151 /* Freescale ColdFire */ 152 #define PORT_MCF 78 153 154 /* Blackfin SPORT */ 155 #define PORT_BFIN_SPORT 79 156 157 /* MN10300 on-chip UART numbers */ 158 #define PORT_MN10300 80 159 #define PORT_MN10300_CTS 81 160 161 #define PORT_SC26XX 82 162 163 /* SH-SCI */ 164 #define PORT_SCIFA 83 165 166 #define PORT_S3C6400 84 167 168 /* NWPSERIAL */ 169 #define PORT_NWPSERIAL 85 170 171 /* MAX3100 */ 172 #define PORT_MAX3100 86 173 174 /* Timberdale UART */ 175 #define PORT_TIMBUART 87 176 177 /* Qualcomm MSM SoCs */ 178 #define PORT_MSM 88 179 180 /* BCM63xx family SoCs */ 181 #define PORT_BCM63XX 89 182 183 /* Aeroflex Gaisler GRLIB APBUART */ 184 #define PORT_APBUART 90 185 186 /* Altera UARTs */ 187 #define PORT_ALTERA_JTAGUART 91 188 #define PORT_ALTERA_UART 92 189 190 /* SH-SCI */ 191 #define PORT_SCIFB 93 192 193 /* MAX3107 */ 194 #define PORT_MAX3107 94 195 196 /* High Speed UART for Medfield */ 197 #define PORT_MFD 95 198 199 /* TI OMAP-UART */ 200 #define PORT_OMAP 96 201 202 #ifdef __KERNEL__ 203 204 #include <linux/compiler.h> 205 #include <linux/interrupt.h> 206 #include <linux/circ_buf.h> 207 #include <linux/spinlock.h> 208 #include <linux/sched.h> 209 #include <linux/tty.h> 210 #include <linux/mutex.h> 211 #include <linux/sysrq.h> 212 213 struct uart_port; 214 struct serial_struct; 215 struct device; 216 217 /* 218 * This structure describes all the operations that can be 219 * done on the physical hardware. 220 */ 221 struct uart_ops { 222 unsigned int (*tx_empty)(struct uart_port *); 223 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 224 unsigned int (*get_mctrl)(struct uart_port *); 225 void (*stop_tx)(struct uart_port *); 226 void (*start_tx)(struct uart_port *); 227 void (*send_xchar)(struct uart_port *, char ch); 228 void (*stop_rx)(struct uart_port *); 229 void (*enable_ms)(struct uart_port *); 230 void (*break_ctl)(struct uart_port *, int ctl); 231 int (*startup)(struct uart_port *); 232 void (*shutdown)(struct uart_port *); 233 void (*flush_buffer)(struct uart_port *); 234 void (*set_termios)(struct uart_port *, struct ktermios *new, 235 struct ktermios *old); 236 void (*set_ldisc)(struct uart_port *, int new); 237 void (*pm)(struct uart_port *, unsigned int state, 238 unsigned int oldstate); 239 int (*set_wake)(struct uart_port *, unsigned int state); 240 241 /* 242 * Return a string describing the type of the port 243 */ 244 const char *(*type)(struct uart_port *); 245 246 /* 247 * Release IO and memory resources used by the port. 248 * This includes iounmap if necessary. 249 */ 250 void (*release_port)(struct uart_port *); 251 252 /* 253 * Request IO and memory resources used by the port. 254 * This includes iomapping the port if necessary. 255 */ 256 int (*request_port)(struct uart_port *); 257 void (*config_port)(struct uart_port *, int); 258 int (*verify_port)(struct uart_port *, struct serial_struct *); 259 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 260 #ifdef CONFIG_CONSOLE_POLL 261 void (*poll_put_char)(struct uart_port *, unsigned char); 262 int (*poll_get_char)(struct uart_port *); 263 #endif 264 }; 265 266 #define NO_POLL_CHAR 0x00ff0000 267 #define UART_CONFIG_TYPE (1 << 0) 268 #define UART_CONFIG_IRQ (1 << 1) 269 270 struct uart_icount { 271 __u32 cts; 272 __u32 dsr; 273 __u32 rng; 274 __u32 dcd; 275 __u32 rx; 276 __u32 tx; 277 __u32 frame; 278 __u32 overrun; 279 __u32 parity; 280 __u32 brk; 281 __u32 buf_overrun; 282 }; 283 284 typedef unsigned int __bitwise__ upf_t; 285 286 struct uart_port { 287 spinlock_t lock; /* port lock */ 288 unsigned long iobase; /* in/out[bwl] */ 289 unsigned char __iomem *membase; /* read/write[bwl] */ 290 unsigned int (*serial_in)(struct uart_port *, int); 291 void (*serial_out)(struct uart_port *, int, int); 292 void (*set_termios)(struct uart_port *, 293 struct ktermios *new, 294 struct ktermios *old); 295 void (*pm)(struct uart_port *, unsigned int state, 296 unsigned int old); 297 unsigned int irq; /* irq number */ 298 unsigned long irqflags; /* irq flags */ 299 unsigned int uartclk; /* base uart clock */ 300 unsigned int fifosize; /* tx fifo size */ 301 unsigned char x_char; /* xon/xoff char */ 302 unsigned char regshift; /* reg offset shift */ 303 unsigned char iotype; /* io access style */ 304 unsigned char unused1; 305 306 #define UPIO_PORT (0) 307 #define UPIO_HUB6 (1) 308 #define UPIO_MEM (2) 309 #define UPIO_MEM32 (3) 310 #define UPIO_AU (4) /* Au1x00 type IO */ 311 #define UPIO_TSI (5) /* Tsi108/109 type IO */ 312 #define UPIO_DWAPB (6) /* DesignWare APB UART */ 313 #define UPIO_RM9000 (7) /* RM9000 type IO */ 314 315 unsigned int read_status_mask; /* driver specific */ 316 unsigned int ignore_status_mask; /* driver specific */ 317 struct uart_state *state; /* pointer to parent state */ 318 struct uart_icount icount; /* statistics */ 319 320 struct console *cons; /* struct console, if any */ 321 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ) 322 unsigned long sysrq; /* sysrq timeout */ 323 #endif 324 325 upf_t flags; 326 327 #define UPF_FOURPORT ((__force upf_t) (1 << 1)) 328 #define UPF_SAK ((__force upf_t) (1 << 2)) 329 #define UPF_SPD_MASK ((__force upf_t) (0x1030)) 330 #define UPF_SPD_HI ((__force upf_t) (0x0010)) 331 #define UPF_SPD_VHI ((__force upf_t) (0x0020)) 332 #define UPF_SPD_CUST ((__force upf_t) (0x0030)) 333 #define UPF_SPD_SHI ((__force upf_t) (0x1000)) 334 #define UPF_SPD_WARP ((__force upf_t) (0x1010)) 335 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 336 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 337 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 338 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 339 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 340 #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15)) 341 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 342 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 343 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 344 /* The exact UART type is known and should not be probed. */ 345 #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) 346 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 347 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 348 #define UPF_DEAD ((__force upf_t) (1 << 30)) 349 #define UPF_IOREMAP ((__force upf_t) (1 << 31)) 350 351 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 352 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 353 354 unsigned int mctrl; /* current modem ctrl settings */ 355 unsigned int timeout; /* character-based timeout */ 356 unsigned int type; /* port type */ 357 const struct uart_ops *ops; 358 unsigned int custom_divisor; 359 unsigned int line; /* port index */ 360 resource_size_t mapbase; /* for ioremap */ 361 struct device *dev; /* parent device */ 362 unsigned char hub6; /* this should be in the 8250 driver */ 363 unsigned char suspended; 364 unsigned char unused[2]; 365 void *private_data; /* generic platform data pointer */ 366 }; 367 368 /* 369 * This is the state information which is persistent across opens. 370 */ 371 struct uart_state { 372 struct tty_port port; 373 374 int pm_state; 375 struct circ_buf xmit; 376 377 struct tasklet_struct tlet; 378 struct uart_port *uart_port; 379 }; 380 381 #define UART_XMIT_SIZE PAGE_SIZE 382 383 384 /* number of characters left in xmit buffer before we ask for more */ 385 #define WAKEUP_CHARS 256 386 387 struct module; 388 struct tty_driver; 389 390 struct uart_driver { 391 struct module *owner; 392 const char *driver_name; 393 const char *dev_name; 394 int major; 395 int minor; 396 int nr; 397 struct console *cons; 398 399 /* 400 * these are private; the low level driver should not 401 * touch these; they should be initialised to NULL 402 */ 403 struct uart_state *state; 404 struct tty_driver *tty_driver; 405 }; 406 407 void uart_write_wakeup(struct uart_port *port); 408 409 /* 410 * Baud rate helpers. 411 */ 412 void uart_update_timeout(struct uart_port *port, unsigned int cflag, 413 unsigned int baud); 414 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 415 struct ktermios *old, unsigned int min, 416 unsigned int max); 417 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 418 419 /* Base timer interval for polling */ 420 static inline int uart_poll_timeout(struct uart_port *port) 421 { 422 int timeout = port->timeout; 423 424 return timeout > 6 ? (timeout / 2 - 2) : 1; 425 } 426 427 /* 428 * Console helpers. 429 */ 430 struct uart_port *uart_get_console(struct uart_port *ports, int nr, 431 struct console *c); 432 void uart_parse_options(char *options, int *baud, int *parity, int *bits, 433 int *flow); 434 int uart_set_options(struct uart_port *port, struct console *co, int baud, 435 int parity, int bits, int flow); 436 struct tty_driver *uart_console_device(struct console *co, int *index); 437 void uart_console_write(struct uart_port *port, const char *s, 438 unsigned int count, 439 void (*putchar)(struct uart_port *, int)); 440 441 /* 442 * Port/driver registration/removal 443 */ 444 int uart_register_driver(struct uart_driver *uart); 445 void uart_unregister_driver(struct uart_driver *uart); 446 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 447 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 448 int uart_match_port(struct uart_port *port1, struct uart_port *port2); 449 450 /* 451 * Power Management 452 */ 453 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 454 int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 455 456 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 457 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 458 459 #define uart_circ_chars_pending(circ) \ 460 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 461 462 #define uart_circ_chars_free(circ) \ 463 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 464 465 static inline int uart_tx_stopped(struct uart_port *port) 466 { 467 struct tty_struct *tty = port->state->port.tty; 468 if(tty->stopped || tty->hw_stopped) 469 return 1; 470 return 0; 471 } 472 473 /* 474 * The following are helper functions for the low level drivers. 475 */ 476 static inline int 477 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 478 { 479 #ifdef SUPPORT_SYSRQ 480 if (port->sysrq) { 481 if (ch && time_before(jiffies, port->sysrq)) { 482 handle_sysrq(ch); 483 port->sysrq = 0; 484 return 1; 485 } 486 port->sysrq = 0; 487 } 488 #endif 489 return 0; 490 } 491 #ifndef SUPPORT_SYSRQ 492 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 493 #endif 494 495 /* 496 * We do the SysRQ and SAK checking like this... 497 */ 498 static inline int uart_handle_break(struct uart_port *port) 499 { 500 struct uart_state *state = port->state; 501 #ifdef SUPPORT_SYSRQ 502 if (port->cons && port->cons->index == port->line) { 503 if (!port->sysrq) { 504 port->sysrq = jiffies + HZ*5; 505 return 1; 506 } 507 port->sysrq = 0; 508 } 509 #endif 510 if (port->flags & UPF_SAK) 511 do_SAK(state->port.tty); 512 return 0; 513 } 514 515 /** 516 * uart_handle_dcd_change - handle a change of carrier detect state 517 * @uport: uart_port structure for the open port 518 * @status: new carrier detect status, nonzero if active 519 */ 520 static inline void 521 uart_handle_dcd_change(struct uart_port *uport, unsigned int status) 522 { 523 struct uart_state *state = uport->state; 524 struct tty_port *port = &state->port; 525 struct tty_ldisc *ld = tty_ldisc_ref(port->tty); 526 struct timespec ts; 527 528 if (ld && ld->ops->dcd_change) 529 getnstimeofday(&ts); 530 531 uport->icount.dcd++; 532 #ifdef CONFIG_HARD_PPS 533 if ((uport->flags & UPF_HARDPPS_CD) && status) 534 hardpps(); 535 #endif 536 537 if (port->flags & ASYNC_CHECK_CD) { 538 if (status) 539 wake_up_interruptible(&port->open_wait); 540 else if (port->tty) 541 tty_hangup(port->tty); 542 } 543 544 if (ld && ld->ops->dcd_change) 545 ld->ops->dcd_change(port->tty, status, &ts); 546 if (ld) 547 tty_ldisc_deref(ld); 548 } 549 550 /** 551 * uart_handle_cts_change - handle a change of clear-to-send state 552 * @uport: uart_port structure for the open port 553 * @status: new clear to send status, nonzero if active 554 */ 555 static inline void 556 uart_handle_cts_change(struct uart_port *uport, unsigned int status) 557 { 558 struct tty_port *port = &uport->state->port; 559 struct tty_struct *tty = port->tty; 560 561 uport->icount.cts++; 562 563 if (port->flags & ASYNC_CTS_FLOW) { 564 if (tty->hw_stopped) { 565 if (status) { 566 tty->hw_stopped = 0; 567 uport->ops->start_tx(uport); 568 uart_write_wakeup(uport); 569 } 570 } else { 571 if (!status) { 572 tty->hw_stopped = 1; 573 uport->ops->stop_tx(uport); 574 } 575 } 576 } 577 } 578 579 #include <linux/tty_flip.h> 580 581 static inline void 582 uart_insert_char(struct uart_port *port, unsigned int status, 583 unsigned int overrun, unsigned int ch, unsigned int flag) 584 { 585 struct tty_struct *tty = port->state->port.tty; 586 587 if ((status & port->ignore_status_mask & ~overrun) == 0) 588 tty_insert_flip_char(tty, ch, flag); 589 590 /* 591 * Overrun is special. Since it's reported immediately, 592 * it doesn't affect the current character. 593 */ 594 if (status & ~port->ignore_status_mask & overrun) 595 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 596 } 597 598 /* 599 * UART_ENABLE_MS - determine if port should enable modem status irqs 600 */ 601 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 602 (cflag) & CRTSCTS || \ 603 !((cflag) & CLOCAL)) 604 605 #endif 606 607 #endif /* LINUX_SERIAL_CORE_H */ 608