1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef LINUX_SERIAL_CORE_H 21 #define LINUX_SERIAL_CORE_H 22 23 #include <linux/serial.h> 24 25 /* 26 * The type definitions. These are from Ted Ts'o's serial.h 27 */ 28 #define PORT_UNKNOWN 0 29 #define PORT_8250 1 30 #define PORT_16450 2 31 #define PORT_16550 3 32 #define PORT_16550A 4 33 #define PORT_CIRRUS 5 34 #define PORT_16650 6 35 #define PORT_16650V2 7 36 #define PORT_16750 8 37 #define PORT_STARTECH 9 38 #define PORT_16C950 10 39 #define PORT_16654 11 40 #define PORT_16850 12 41 #define PORT_RSA 13 42 #define PORT_NS16550A 14 43 #define PORT_XSCALE 15 44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 48 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 49 #define PORT_MAX_8250 20 /* max port ID */ 50 51 /* 52 * ARM specific type numbers. These are not currently guaranteed 53 * to be implemented, and will change in the future. These are 54 * separate so any additions to the old serial.c that occur before 55 * we are merged can be easily merged here. 56 */ 57 #define PORT_PXA 31 58 #define PORT_AMBA 32 59 #define PORT_CLPS711X 33 60 #define PORT_SA1100 34 61 #define PORT_UART00 35 62 #define PORT_21285 37 63 64 /* Sparc type numbers. */ 65 #define PORT_SUNZILOG 38 66 #define PORT_SUNSAB 39 67 68 /* DEC */ 69 #define PORT_DZ 46 70 #define PORT_ZS 47 71 72 /* Parisc type numbers. */ 73 #define PORT_MUX 48 74 75 /* Atmel AT91 / AT32 SoC */ 76 #define PORT_ATMEL 49 77 78 /* Macintosh Zilog type numbers */ 79 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 80 #define PORT_PMAC_ZILOG 51 81 82 /* SH-SCI */ 83 #define PORT_SCI 52 84 #define PORT_SCIF 53 85 #define PORT_IRDA 54 86 87 /* Samsung S3C2410 SoC and derivatives thereof */ 88 #define PORT_S3C2410 55 89 90 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 91 #define PORT_IP22ZILOG 56 92 93 /* Sharp LH7a40x -- an ARM9 SoC series */ 94 #define PORT_LH7A40X 57 95 96 /* PPC CPM type number */ 97 #define PORT_CPM 58 98 99 /* MPC52xx (and MPC512x) type numbers */ 100 #define PORT_MPC52xx 59 101 102 /* IBM icom */ 103 #define PORT_ICOM 60 104 105 /* Samsung S3C2440 SoC */ 106 #define PORT_S3C2440 61 107 108 /* Motorola i.MX SoC */ 109 #define PORT_IMX 62 110 111 /* Marvell MPSC */ 112 #define PORT_MPSC 63 113 114 /* TXX9 type number */ 115 #define PORT_TXX9 64 116 117 /* NEC VR4100 series SIU/DSIU */ 118 #define PORT_VR41XX_SIU 65 119 #define PORT_VR41XX_DSIU 66 120 121 /* Samsung S3C2400 SoC */ 122 #define PORT_S3C2400 67 123 124 /* M32R SIO */ 125 #define PORT_M32R_SIO 68 126 127 /*Digi jsm */ 128 #define PORT_JSM 69 129 130 #define PORT_PNX8XXX 70 131 132 /* Hilscher netx */ 133 #define PORT_NETX 71 134 135 /* SUN4V Hypervisor Console */ 136 #define PORT_SUNHV 72 137 138 #define PORT_S3C2412 73 139 140 /* Xilinx uartlite */ 141 #define PORT_UARTLITE 74 142 143 /* Blackfin bf5xx */ 144 #define PORT_BFIN 75 145 146 /* Micrel KS8695 */ 147 #define PORT_KS8695 76 148 149 /* Broadcom SB1250, etc. SOC */ 150 #define PORT_SB1250_DUART 77 151 152 /* Freescale ColdFire */ 153 #define PORT_MCF 78 154 155 /* Blackfin SPORT */ 156 #define PORT_BFIN_SPORT 79 157 158 /* MN10300 on-chip UART numbers */ 159 #define PORT_MN10300 80 160 #define PORT_MN10300_CTS 81 161 162 #define PORT_SC26XX 82 163 164 /* SH-SCI */ 165 #define PORT_SCIFA 83 166 167 #define PORT_S3C6400 84 168 169 /* NWPSERIAL */ 170 #define PORT_NWPSERIAL 85 171 172 /* MAX3100 */ 173 #define PORT_MAX3100 86 174 175 /* Timberdale UART */ 176 #define PORT_TIMBUART 87 177 178 /* Qualcomm MSM SoCs */ 179 #define PORT_MSM 88 180 181 /* BCM63xx family SoCs */ 182 #define PORT_BCM63XX 89 183 184 /* Aeroflex Gaisler GRLIB APBUART */ 185 #define PORT_APBUART 90 186 187 /* Altera UARTs */ 188 #define PORT_ALTERA_JTAGUART 91 189 #define PORT_ALTERA_UART 92 190 191 /* SH-SCI */ 192 #define PORT_SCIFB 93 193 194 /* MAX3107 */ 195 #define PORT_MAX3107 94 196 197 /* High Speed UART for Medfield */ 198 #define PORT_MFD 95 199 200 /* TI OMAP-UART */ 201 #define PORT_OMAP 96 202 203 /* VIA VT8500 SoC */ 204 #define PORT_VT8500 97 205 206 /* Xilinx PSS UART */ 207 #define PORT_XUARTPS 98 208 209 #ifdef __KERNEL__ 210 211 #include <linux/compiler.h> 212 #include <linux/interrupt.h> 213 #include <linux/circ_buf.h> 214 #include <linux/spinlock.h> 215 #include <linux/sched.h> 216 #include <linux/tty.h> 217 #include <linux/mutex.h> 218 #include <linux/sysrq.h> 219 #include <linux/pps_kernel.h> 220 221 struct uart_port; 222 struct serial_struct; 223 struct device; 224 225 /* 226 * This structure describes all the operations that can be 227 * done on the physical hardware. 228 */ 229 struct uart_ops { 230 unsigned int (*tx_empty)(struct uart_port *); 231 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 232 unsigned int (*get_mctrl)(struct uart_port *); 233 void (*stop_tx)(struct uart_port *); 234 void (*start_tx)(struct uart_port *); 235 void (*send_xchar)(struct uart_port *, char ch); 236 void (*stop_rx)(struct uart_port *); 237 void (*enable_ms)(struct uart_port *); 238 void (*break_ctl)(struct uart_port *, int ctl); 239 int (*startup)(struct uart_port *); 240 void (*shutdown)(struct uart_port *); 241 void (*flush_buffer)(struct uart_port *); 242 void (*set_termios)(struct uart_port *, struct ktermios *new, 243 struct ktermios *old); 244 void (*set_ldisc)(struct uart_port *, int new); 245 void (*pm)(struct uart_port *, unsigned int state, 246 unsigned int oldstate); 247 int (*set_wake)(struct uart_port *, unsigned int state); 248 249 /* 250 * Return a string describing the type of the port 251 */ 252 const char *(*type)(struct uart_port *); 253 254 /* 255 * Release IO and memory resources used by the port. 256 * This includes iounmap if necessary. 257 */ 258 void (*release_port)(struct uart_port *); 259 260 /* 261 * Request IO and memory resources used by the port. 262 * This includes iomapping the port if necessary. 263 */ 264 int (*request_port)(struct uart_port *); 265 void (*config_port)(struct uart_port *, int); 266 int (*verify_port)(struct uart_port *, struct serial_struct *); 267 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 268 #ifdef CONFIG_CONSOLE_POLL 269 void (*poll_put_char)(struct uart_port *, unsigned char); 270 int (*poll_get_char)(struct uart_port *); 271 #endif 272 }; 273 274 #define NO_POLL_CHAR 0x00ff0000 275 #define UART_CONFIG_TYPE (1 << 0) 276 #define UART_CONFIG_IRQ (1 << 1) 277 278 struct uart_icount { 279 __u32 cts; 280 __u32 dsr; 281 __u32 rng; 282 __u32 dcd; 283 __u32 rx; 284 __u32 tx; 285 __u32 frame; 286 __u32 overrun; 287 __u32 parity; 288 __u32 brk; 289 __u32 buf_overrun; 290 }; 291 292 typedef unsigned int __bitwise__ upf_t; 293 294 struct uart_port { 295 spinlock_t lock; /* port lock */ 296 unsigned long iobase; /* in/out[bwl] */ 297 unsigned char __iomem *membase; /* read/write[bwl] */ 298 unsigned int (*serial_in)(struct uart_port *, int); 299 void (*serial_out)(struct uart_port *, int, int); 300 void (*set_termios)(struct uart_port *, 301 struct ktermios *new, 302 struct ktermios *old); 303 void (*pm)(struct uart_port *, unsigned int state, 304 unsigned int old); 305 unsigned int irq; /* irq number */ 306 unsigned long irqflags; /* irq flags */ 307 unsigned int uartclk; /* base uart clock */ 308 unsigned int fifosize; /* tx fifo size */ 309 unsigned char x_char; /* xon/xoff char */ 310 unsigned char regshift; /* reg offset shift */ 311 unsigned char iotype; /* io access style */ 312 unsigned char unused1; 313 314 #define UPIO_PORT (0) 315 #define UPIO_HUB6 (1) 316 #define UPIO_MEM (2) 317 #define UPIO_MEM32 (3) 318 #define UPIO_AU (4) /* Au1x00 type IO */ 319 #define UPIO_TSI (5) /* Tsi108/109 type IO */ 320 #define UPIO_DWAPB (6) /* DesignWare APB UART */ 321 #define UPIO_RM9000 (7) /* RM9000 type IO */ 322 #define UPIO_DWAPB32 (8) /* DesignWare APB UART (32 bit accesses) */ 323 324 unsigned int read_status_mask; /* driver specific */ 325 unsigned int ignore_status_mask; /* driver specific */ 326 struct uart_state *state; /* pointer to parent state */ 327 struct uart_icount icount; /* statistics */ 328 329 struct console *cons; /* struct console, if any */ 330 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ) 331 unsigned long sysrq; /* sysrq timeout */ 332 #endif 333 334 upf_t flags; 335 336 #define UPF_FOURPORT ((__force upf_t) (1 << 1)) 337 #define UPF_SAK ((__force upf_t) (1 << 2)) 338 #define UPF_SPD_MASK ((__force upf_t) (0x1030)) 339 #define UPF_SPD_HI ((__force upf_t) (0x0010)) 340 #define UPF_SPD_VHI ((__force upf_t) (0x0020)) 341 #define UPF_SPD_CUST ((__force upf_t) (0x0030)) 342 #define UPF_SPD_SHI ((__force upf_t) (0x1000)) 343 #define UPF_SPD_WARP ((__force upf_t) (0x1010)) 344 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 345 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 346 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 347 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 348 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 349 #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15)) 350 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 351 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 352 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 353 /* The exact UART type is known and should not be probed. */ 354 #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) 355 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 356 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 357 #define UPF_DEAD ((__force upf_t) (1 << 30)) 358 #define UPF_IOREMAP ((__force upf_t) (1 << 31)) 359 360 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 361 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 362 363 unsigned int mctrl; /* current modem ctrl settings */ 364 unsigned int timeout; /* character-based timeout */ 365 unsigned int type; /* port type */ 366 const struct uart_ops *ops; 367 unsigned int custom_divisor; 368 unsigned int line; /* port index */ 369 resource_size_t mapbase; /* for ioremap */ 370 struct device *dev; /* parent device */ 371 unsigned char hub6; /* this should be in the 8250 driver */ 372 unsigned char suspended; 373 unsigned char irq_wake; 374 unsigned char unused[2]; 375 void *private_data; /* generic platform data pointer */ 376 }; 377 378 /* 379 * This is the state information which is persistent across opens. 380 */ 381 struct uart_state { 382 struct tty_port port; 383 384 int pm_state; 385 struct circ_buf xmit; 386 387 struct tasklet_struct tlet; 388 struct uart_port *uart_port; 389 }; 390 391 #define UART_XMIT_SIZE PAGE_SIZE 392 393 394 /* number of characters left in xmit buffer before we ask for more */ 395 #define WAKEUP_CHARS 256 396 397 struct module; 398 struct tty_driver; 399 400 struct uart_driver { 401 struct module *owner; 402 const char *driver_name; 403 const char *dev_name; 404 int major; 405 int minor; 406 int nr; 407 struct console *cons; 408 409 /* 410 * these are private; the low level driver should not 411 * touch these; they should be initialised to NULL 412 */ 413 struct uart_state *state; 414 struct tty_driver *tty_driver; 415 }; 416 417 void uart_write_wakeup(struct uart_port *port); 418 419 /* 420 * Baud rate helpers. 421 */ 422 void uart_update_timeout(struct uart_port *port, unsigned int cflag, 423 unsigned int baud); 424 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 425 struct ktermios *old, unsigned int min, 426 unsigned int max); 427 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 428 429 /* Base timer interval for polling */ 430 static inline int uart_poll_timeout(struct uart_port *port) 431 { 432 int timeout = port->timeout; 433 434 return timeout > 6 ? (timeout / 2 - 2) : 1; 435 } 436 437 /* 438 * Console helpers. 439 */ 440 struct uart_port *uart_get_console(struct uart_port *ports, int nr, 441 struct console *c); 442 void uart_parse_options(char *options, int *baud, int *parity, int *bits, 443 int *flow); 444 int uart_set_options(struct uart_port *port, struct console *co, int baud, 445 int parity, int bits, int flow); 446 struct tty_driver *uart_console_device(struct console *co, int *index); 447 void uart_console_write(struct uart_port *port, const char *s, 448 unsigned int count, 449 void (*putchar)(struct uart_port *, int)); 450 451 /* 452 * Port/driver registration/removal 453 */ 454 int uart_register_driver(struct uart_driver *uart); 455 void uart_unregister_driver(struct uart_driver *uart); 456 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 457 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 458 int uart_match_port(struct uart_port *port1, struct uart_port *port2); 459 460 /* 461 * Power Management 462 */ 463 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 464 int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 465 466 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 467 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 468 469 #define uart_circ_chars_pending(circ) \ 470 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 471 472 #define uart_circ_chars_free(circ) \ 473 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 474 475 static inline int uart_tx_stopped(struct uart_port *port) 476 { 477 struct tty_struct *tty = port->state->port.tty; 478 if(tty->stopped || tty->hw_stopped) 479 return 1; 480 return 0; 481 } 482 483 /* 484 * The following are helper functions for the low level drivers. 485 */ 486 static inline int 487 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 488 { 489 #ifdef SUPPORT_SYSRQ 490 if (port->sysrq) { 491 if (ch && time_before(jiffies, port->sysrq)) { 492 handle_sysrq(ch); 493 port->sysrq = 0; 494 return 1; 495 } 496 port->sysrq = 0; 497 } 498 #endif 499 return 0; 500 } 501 #ifndef SUPPORT_SYSRQ 502 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 503 #endif 504 505 /* 506 * We do the SysRQ and SAK checking like this... 507 */ 508 static inline int uart_handle_break(struct uart_port *port) 509 { 510 struct uart_state *state = port->state; 511 #ifdef SUPPORT_SYSRQ 512 if (port->cons && port->cons->index == port->line) { 513 if (!port->sysrq) { 514 port->sysrq = jiffies + HZ*5; 515 return 1; 516 } 517 port->sysrq = 0; 518 } 519 #endif 520 if (port->flags & UPF_SAK) 521 do_SAK(state->port.tty); 522 return 0; 523 } 524 525 /** 526 * uart_handle_dcd_change - handle a change of carrier detect state 527 * @uport: uart_port structure for the open port 528 * @status: new carrier detect status, nonzero if active 529 */ 530 static inline void 531 uart_handle_dcd_change(struct uart_port *uport, unsigned int status) 532 { 533 struct uart_state *state = uport->state; 534 struct tty_port *port = &state->port; 535 struct tty_ldisc *ld = tty_ldisc_ref(port->tty); 536 struct pps_event_time ts; 537 538 if (ld && ld->ops->dcd_change) 539 pps_get_ts(&ts); 540 541 uport->icount.dcd++; 542 #ifdef CONFIG_HARD_PPS 543 if ((uport->flags & UPF_HARDPPS_CD) && status) 544 hardpps(); 545 #endif 546 547 if (port->flags & ASYNC_CHECK_CD) { 548 if (status) 549 wake_up_interruptible(&port->open_wait); 550 else if (port->tty) 551 tty_hangup(port->tty); 552 } 553 554 if (ld && ld->ops->dcd_change) 555 ld->ops->dcd_change(port->tty, status, &ts); 556 if (ld) 557 tty_ldisc_deref(ld); 558 } 559 560 /** 561 * uart_handle_cts_change - handle a change of clear-to-send state 562 * @uport: uart_port structure for the open port 563 * @status: new clear to send status, nonzero if active 564 */ 565 static inline void 566 uart_handle_cts_change(struct uart_port *uport, unsigned int status) 567 { 568 struct tty_port *port = &uport->state->port; 569 struct tty_struct *tty = port->tty; 570 571 uport->icount.cts++; 572 573 if (port->flags & ASYNC_CTS_FLOW) { 574 if (tty->hw_stopped) { 575 if (status) { 576 tty->hw_stopped = 0; 577 uport->ops->start_tx(uport); 578 uart_write_wakeup(uport); 579 } 580 } else { 581 if (!status) { 582 tty->hw_stopped = 1; 583 uport->ops->stop_tx(uport); 584 } 585 } 586 } 587 } 588 589 #include <linux/tty_flip.h> 590 591 static inline void 592 uart_insert_char(struct uart_port *port, unsigned int status, 593 unsigned int overrun, unsigned int ch, unsigned int flag) 594 { 595 struct tty_struct *tty = port->state->port.tty; 596 597 if ((status & port->ignore_status_mask & ~overrun) == 0) 598 tty_insert_flip_char(tty, ch, flag); 599 600 /* 601 * Overrun is special. Since it's reported immediately, 602 * it doesn't affect the current character. 603 */ 604 if (status & ~port->ignore_status_mask & overrun) 605 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 606 } 607 608 /* 609 * UART_ENABLE_MS - determine if port should enable modem status irqs 610 */ 611 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 612 (cflag) & CRTSCTS || \ 613 !((cflag) & CLOCAL)) 614 615 #endif 616 617 #endif /* LINUX_SERIAL_CORE_H */ 618