xref: /linux-6.15/include/linux/serial_core.h (revision a234ca0f)
1 /*
2  *  linux/drivers/char/serial_core.h
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22 
23 #include <linux/serial.h>
24 
25 /*
26  * The type definitions.  These are from Ted Ts'o's serial.h
27  */
28 #define PORT_UNKNOWN	0
29 #define PORT_8250	1
30 #define PORT_16450	2
31 #define PORT_16550	3
32 #define PORT_16550A	4
33 #define PORT_CIRRUS	5
34 #define PORT_16650	6
35 #define PORT_16650V2	7
36 #define PORT_16750	8
37 #define PORT_STARTECH	9
38 #define PORT_16C950	10
39 #define PORT_16654	11
40 #define PORT_16850	12
41 #define PORT_RSA	13
42 #define PORT_NS16550A	14
43 #define PORT_XSCALE	15
44 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
45 #define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
46 #define PORT_AR7	18	/* Texas Instruments AR7 internal UART */
47 #define PORT_MAX_8250	18	/* max port ID */
48 
49 /*
50  * ARM specific type numbers.  These are not currently guaranteed
51  * to be implemented, and will change in the future.  These are
52  * separate so any additions to the old serial.c that occur before
53  * we are merged can be easily merged here.
54  */
55 #define PORT_PXA	31
56 #define PORT_AMBA	32
57 #define PORT_CLPS711X	33
58 #define PORT_SA1100	34
59 #define PORT_UART00	35
60 #define PORT_21285	37
61 
62 /* Sparc type numbers.  */
63 #define PORT_SUNZILOG	38
64 #define PORT_SUNSAB	39
65 
66 /* DEC */
67 #define PORT_DZ		46
68 #define PORT_ZS		47
69 
70 /* Parisc type numbers. */
71 #define PORT_MUX	48
72 
73 /* Atmel AT91 / AT32 SoC */
74 #define PORT_ATMEL	49
75 
76 /* Macintosh Zilog type numbers */
77 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
78 #define PORT_PMAC_ZILOG	51
79 
80 /* SH-SCI */
81 #define PORT_SCI	52
82 #define PORT_SCIF	53
83 #define PORT_IRDA	54
84 
85 /* Samsung S3C2410 SoC and derivatives thereof */
86 #define PORT_S3C2410    55
87 
88 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
89 #define PORT_IP22ZILOG	56
90 
91 /* Sharp LH7a40x -- an ARM9 SoC series */
92 #define PORT_LH7A40X	57
93 
94 /* PPC CPM type number */
95 #define PORT_CPM        58
96 
97 /* MPC52xx type numbers */
98 #define PORT_MPC52xx	59
99 
100 /* IBM icom */
101 #define PORT_ICOM	60
102 
103 /* Samsung S3C2440 SoC */
104 #define PORT_S3C2440	61
105 
106 /* Motorola i.MX SoC */
107 #define PORT_IMX	62
108 
109 /* Marvell MPSC */
110 #define PORT_MPSC	63
111 
112 /* TXX9 type number */
113 #define PORT_TXX9	64
114 
115 /* NEC VR4100 series SIU/DSIU */
116 #define PORT_VR41XX_SIU		65
117 #define PORT_VR41XX_DSIU	66
118 
119 /* Samsung S3C2400 SoC */
120 #define PORT_S3C2400	67
121 
122 /* M32R SIO */
123 #define PORT_M32R_SIO	68
124 
125 /*Digi jsm */
126 #define PORT_JSM        69
127 
128 #define PORT_PNX8XXX	70
129 
130 /* Hilscher netx */
131 #define PORT_NETX	71
132 
133 /* SUN4V Hypervisor Console */
134 #define PORT_SUNHV	72
135 
136 #define PORT_S3C2412	73
137 
138 /* Xilinx uartlite */
139 #define PORT_UARTLITE	74
140 
141 /* Blackfin bf5xx */
142 #define PORT_BFIN	75
143 
144 /* Micrel KS8695 */
145 #define PORT_KS8695	76
146 
147 /* Broadcom SB1250, etc. SOC */
148 #define PORT_SB1250_DUART	77
149 
150 /* Freescale ColdFire */
151 #define PORT_MCF	78
152 
153 /* Blackfin SPORT */
154 #define PORT_BFIN_SPORT		79
155 
156 /* MN10300 on-chip UART numbers */
157 #define PORT_MN10300		80
158 #define PORT_MN10300_CTS	81
159 
160 #define PORT_SC26XX	82
161 
162 /* SH-SCI */
163 #define PORT_SCIFA	83
164 
165 #define PORT_S3C6400	84
166 
167 /* NWPSERIAL */
168 #define PORT_NWPSERIAL	85
169 
170 /* MAX3100 */
171 #define PORT_MAX3100    86
172 
173 /* Timberdale UART */
174 #define PORT_TIMBUART	87
175 
176 /* Qualcomm MSM SoCs */
177 #define PORT_MSM	88
178 
179 /* BCM63xx family SoCs */
180 #define PORT_BCM63XX	89
181 
182 /* Aeroflex Gaisler GRLIB APBUART */
183 #define PORT_APBUART    90
184 
185 /* Altera UARTs */
186 #define PORT_ALTERA_JTAGUART	91
187 #define PORT_ALTERA_UART	92
188 
189 /* SH-SCI */
190 #define PORT_SCIFB	93
191 
192 /* MAX3107 */
193 #define PORT_MAX3107	94
194 
195 /* High Speed UART for Medfield */
196 #define PORT_MFD	95
197 
198 #ifdef __KERNEL__
199 
200 #include <linux/compiler.h>
201 #include <linux/interrupt.h>
202 #include <linux/circ_buf.h>
203 #include <linux/spinlock.h>
204 #include <linux/sched.h>
205 #include <linux/tty.h>
206 #include <linux/mutex.h>
207 #include <linux/sysrq.h>
208 
209 struct uart_port;
210 struct serial_struct;
211 struct device;
212 
213 /*
214  * This structure describes all the operations that can be
215  * done on the physical hardware.
216  */
217 struct uart_ops {
218 	unsigned int	(*tx_empty)(struct uart_port *);
219 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
220 	unsigned int	(*get_mctrl)(struct uart_port *);
221 	void		(*stop_tx)(struct uart_port *);
222 	void		(*start_tx)(struct uart_port *);
223 	void		(*send_xchar)(struct uart_port *, char ch);
224 	void		(*stop_rx)(struct uart_port *);
225 	void		(*enable_ms)(struct uart_port *);
226 	void		(*break_ctl)(struct uart_port *, int ctl);
227 	int		(*startup)(struct uart_port *);
228 	void		(*shutdown)(struct uart_port *);
229 	void		(*flush_buffer)(struct uart_port *);
230 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
231 				       struct ktermios *old);
232 	void		(*set_ldisc)(struct uart_port *, int new);
233 	void		(*pm)(struct uart_port *, unsigned int state,
234 			      unsigned int oldstate);
235 	int		(*set_wake)(struct uart_port *, unsigned int state);
236 
237 	/*
238 	 * Return a string describing the type of the port
239 	 */
240 	const char *(*type)(struct uart_port *);
241 
242 	/*
243 	 * Release IO and memory resources used by the port.
244 	 * This includes iounmap if necessary.
245 	 */
246 	void		(*release_port)(struct uart_port *);
247 
248 	/*
249 	 * Request IO and memory resources used by the port.
250 	 * This includes iomapping the port if necessary.
251 	 */
252 	int		(*request_port)(struct uart_port *);
253 	void		(*config_port)(struct uart_port *, int);
254 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
255 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
256 #ifdef CONFIG_CONSOLE_POLL
257 	void	(*poll_put_char)(struct uart_port *, unsigned char);
258 	int		(*poll_get_char)(struct uart_port *);
259 #endif
260 };
261 
262 #define NO_POLL_CHAR		0x00ff0000
263 #define UART_CONFIG_TYPE	(1 << 0)
264 #define UART_CONFIG_IRQ		(1 << 1)
265 
266 struct uart_icount {
267 	__u32	cts;
268 	__u32	dsr;
269 	__u32	rng;
270 	__u32	dcd;
271 	__u32	rx;
272 	__u32	tx;
273 	__u32	frame;
274 	__u32	overrun;
275 	__u32	parity;
276 	__u32	brk;
277 	__u32	buf_overrun;
278 };
279 
280 typedef unsigned int __bitwise__ upf_t;
281 
282 struct uart_port {
283 	spinlock_t		lock;			/* port lock */
284 	unsigned long		iobase;			/* in/out[bwl] */
285 	unsigned char __iomem	*membase;		/* read/write[bwl] */
286 	unsigned int		(*serial_in)(struct uart_port *, int);
287 	void			(*serial_out)(struct uart_port *, int, int);
288 	void			(*set_termios)(struct uart_port *,
289 				               struct ktermios *new,
290 				               struct ktermios *old);
291 	unsigned int		irq;			/* irq number */
292 	unsigned long		irqflags;		/* irq flags  */
293 	unsigned int		uartclk;		/* base uart clock */
294 	unsigned int		fifosize;		/* tx fifo size */
295 	unsigned char		x_char;			/* xon/xoff char */
296 	unsigned char		regshift;		/* reg offset shift */
297 	unsigned char		iotype;			/* io access style */
298 	unsigned char		unused1;
299 
300 #define UPIO_PORT		(0)
301 #define UPIO_HUB6		(1)
302 #define UPIO_MEM		(2)
303 #define UPIO_MEM32		(3)
304 #define UPIO_AU			(4)			/* Au1x00 type IO */
305 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
306 #define UPIO_DWAPB		(6)			/* DesignWare APB UART */
307 #define UPIO_RM9000		(7)			/* RM9000 type IO */
308 
309 	unsigned int		read_status_mask;	/* driver specific */
310 	unsigned int		ignore_status_mask;	/* driver specific */
311 	struct uart_state	*state;			/* pointer to parent state */
312 	struct uart_icount	icount;			/* statistics */
313 
314 	struct console		*cons;			/* struct console, if any */
315 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
316 	unsigned long		sysrq;			/* sysrq timeout */
317 #endif
318 
319 	upf_t			flags;
320 
321 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
322 #define UPF_SAK			((__force upf_t) (1 << 2))
323 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
324 #define UPF_SPD_HI		((__force upf_t) (0x0010))
325 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
326 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
327 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
328 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
329 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
330 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
331 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
332 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
333 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
334 #define UPF_NO_TXEN_TEST	((__force upf_t) (1 << 15))
335 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
336 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
337 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
338 /* The exact UART type is known and should not be probed.  */
339 #define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
340 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
341 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
342 #define UPF_DEAD		((__force upf_t) (1 << 30))
343 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
344 
345 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
346 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
347 
348 	unsigned int		mctrl;			/* current modem ctrl settings */
349 	unsigned int		timeout;		/* character-based timeout */
350 	unsigned int		type;			/* port type */
351 	const struct uart_ops	*ops;
352 	unsigned int		custom_divisor;
353 	unsigned int		line;			/* port index */
354 	resource_size_t		mapbase;		/* for ioremap */
355 	struct device		*dev;			/* parent device */
356 	unsigned char		hub6;			/* this should be in the 8250 driver */
357 	unsigned char		suspended;
358 	unsigned char		unused[2];
359 	void			*private_data;		/* generic platform data pointer */
360 };
361 
362 /*
363  * This is the state information which is persistent across opens.
364  */
365 struct uart_state {
366 	struct tty_port		port;
367 
368 	int			pm_state;
369 	struct circ_buf		xmit;
370 
371 	struct tasklet_struct	tlet;
372 	struct uart_port	*uart_port;
373 };
374 
375 #define UART_XMIT_SIZE	PAGE_SIZE
376 
377 
378 /* number of characters left in xmit buffer before we ask for more */
379 #define WAKEUP_CHARS		256
380 
381 struct module;
382 struct tty_driver;
383 
384 struct uart_driver {
385 	struct module		*owner;
386 	const char		*driver_name;
387 	const char		*dev_name;
388 	int			 major;
389 	int			 minor;
390 	int			 nr;
391 	struct console		*cons;
392 
393 	/*
394 	 * these are private; the low level driver should not
395 	 * touch these; they should be initialised to NULL
396 	 */
397 	struct uart_state	*state;
398 	struct tty_driver	*tty_driver;
399 };
400 
401 void uart_write_wakeup(struct uart_port *port);
402 
403 /*
404  * Baud rate helpers.
405  */
406 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
407 			 unsigned int baud);
408 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
409 				struct ktermios *old, unsigned int min,
410 				unsigned int max);
411 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
412 
413 /*
414  * Console helpers.
415  */
416 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
417 				   struct console *c);
418 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
419 			int *flow);
420 int uart_set_options(struct uart_port *port, struct console *co, int baud,
421 		     int parity, int bits, int flow);
422 struct tty_driver *uart_console_device(struct console *co, int *index);
423 void uart_console_write(struct uart_port *port, const char *s,
424 			unsigned int count,
425 			void (*putchar)(struct uart_port *, int));
426 
427 /*
428  * Port/driver registration/removal
429  */
430 int uart_register_driver(struct uart_driver *uart);
431 void uart_unregister_driver(struct uart_driver *uart);
432 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
433 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
434 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
435 
436 /*
437  * Power Management
438  */
439 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
440 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
441 
442 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
443 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
444 
445 #define uart_circ_chars_pending(circ)	\
446 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
447 
448 #define uart_circ_chars_free(circ)	\
449 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
450 
451 static inline int uart_tx_stopped(struct uart_port *port)
452 {
453 	struct tty_struct *tty = port->state->port.tty;
454 	if(tty->stopped || tty->hw_stopped)
455 		return 1;
456 	return 0;
457 }
458 
459 /*
460  * The following are helper functions for the low level drivers.
461  */
462 static inline int
463 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
464 {
465 #ifdef SUPPORT_SYSRQ
466 	if (port->sysrq) {
467 		if (ch && time_before(jiffies, port->sysrq)) {
468 			handle_sysrq(ch, port->state->port.tty);
469 			port->sysrq = 0;
470 			return 1;
471 		}
472 		port->sysrq = 0;
473 	}
474 #endif
475 	return 0;
476 }
477 #ifndef SUPPORT_SYSRQ
478 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
479 #endif
480 
481 /*
482  * We do the SysRQ and SAK checking like this...
483  */
484 static inline int uart_handle_break(struct uart_port *port)
485 {
486 	struct uart_state *state = port->state;
487 #ifdef SUPPORT_SYSRQ
488 	if (port->cons && port->cons->index == port->line) {
489 		if (!port->sysrq) {
490 			port->sysrq = jiffies + HZ*5;
491 			return 1;
492 		}
493 		port->sysrq = 0;
494 	}
495 #endif
496 	if (port->flags & UPF_SAK)
497 		do_SAK(state->port.tty);
498 	return 0;
499 }
500 
501 /**
502  *	uart_handle_dcd_change - handle a change of carrier detect state
503  *	@uport: uart_port structure for the open port
504  *	@status: new carrier detect status, nonzero if active
505  */
506 static inline void
507 uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
508 {
509 	struct uart_state *state = uport->state;
510 	struct tty_port *port = &state->port;
511 	struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
512 	struct timespec ts;
513 
514 	if (ld && ld->ops->dcd_change)
515 		getnstimeofday(&ts);
516 
517 	uport->icount.dcd++;
518 #ifdef CONFIG_HARD_PPS
519 	if ((uport->flags & UPF_HARDPPS_CD) && status)
520 		hardpps();
521 #endif
522 
523 	if (port->flags & ASYNC_CHECK_CD) {
524 		if (status)
525 			wake_up_interruptible(&port->open_wait);
526 		else if (port->tty)
527 			tty_hangup(port->tty);
528 	}
529 
530 	if (ld && ld->ops->dcd_change)
531 		ld->ops->dcd_change(port->tty, status, &ts);
532 	if (ld)
533 		tty_ldisc_deref(ld);
534 }
535 
536 /**
537  *	uart_handle_cts_change - handle a change of clear-to-send state
538  *	@uport: uart_port structure for the open port
539  *	@status: new clear to send status, nonzero if active
540  */
541 static inline void
542 uart_handle_cts_change(struct uart_port *uport, unsigned int status)
543 {
544 	struct tty_port *port = &uport->state->port;
545 	struct tty_struct *tty = port->tty;
546 
547 	uport->icount.cts++;
548 
549 	if (port->flags & ASYNC_CTS_FLOW) {
550 		if (tty->hw_stopped) {
551 			if (status) {
552 				tty->hw_stopped = 0;
553 				uport->ops->start_tx(uport);
554 				uart_write_wakeup(uport);
555 			}
556 		} else {
557 			if (!status) {
558 				tty->hw_stopped = 1;
559 				uport->ops->stop_tx(uport);
560 			}
561 		}
562 	}
563 }
564 
565 #include <linux/tty_flip.h>
566 
567 static inline void
568 uart_insert_char(struct uart_port *port, unsigned int status,
569 		 unsigned int overrun, unsigned int ch, unsigned int flag)
570 {
571 	struct tty_struct *tty = port->state->port.tty;
572 
573 	if ((status & port->ignore_status_mask & ~overrun) == 0)
574 		tty_insert_flip_char(tty, ch, flag);
575 
576 	/*
577 	 * Overrun is special.  Since it's reported immediately,
578 	 * it doesn't affect the current character.
579 	 */
580 	if (status & ~port->ignore_status_mask & overrun)
581 		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
582 }
583 
584 /*
585  *	UART_ENABLE_MS - determine if port should enable modem status irqs
586  */
587 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
588 					 (cflag) & CRTSCTS || \
589 					 !((cflag) & CLOCAL))
590 
591 #endif
592 
593 #endif /* LINUX_SERIAL_CORE_H */
594