xref: /linux-6.15/include/linux/serial_core.h (revision 7fcab099)
1 /*
2  *  linux/drivers/char/serial_core.h
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22 
23 /*
24  * The type definitions.  These are from Ted Ts'o's serial.h
25  */
26 #define PORT_UNKNOWN	0
27 #define PORT_8250	1
28 #define PORT_16450	2
29 #define PORT_16550	3
30 #define PORT_16550A	4
31 #define PORT_CIRRUS	5
32 #define PORT_16650	6
33 #define PORT_16650V2	7
34 #define PORT_16750	8
35 #define PORT_STARTECH	9
36 #define PORT_16C950	10
37 #define PORT_16654	11
38 #define PORT_16850	12
39 #define PORT_RSA	13
40 #define PORT_NS16550A	14
41 #define PORT_XSCALE	15
42 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
43 #define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
44 #define PORT_AR7	18	/* Texas Instruments AR7 internal UART */
45 #define PORT_MAX_8250	18	/* max port ID */
46 
47 /*
48  * ARM specific type numbers.  These are not currently guaranteed
49  * to be implemented, and will change in the future.  These are
50  * separate so any additions to the old serial.c that occur before
51  * we are merged can be easily merged here.
52  */
53 #define PORT_PXA	31
54 #define PORT_AMBA	32
55 #define PORT_CLPS711X	33
56 #define PORT_SA1100	34
57 #define PORT_UART00	35
58 #define PORT_21285	37
59 
60 /* Sparc type numbers.  */
61 #define PORT_SUNZILOG	38
62 #define PORT_SUNSAB	39
63 
64 /* DEC */
65 #define PORT_DZ		46
66 #define PORT_ZS		47
67 
68 /* Parisc type numbers. */
69 #define PORT_MUX	48
70 
71 /* Atmel AT91 / AT32 SoC */
72 #define PORT_ATMEL	49
73 
74 /* Macintosh Zilog type numbers */
75 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
76 #define PORT_PMAC_ZILOG	51
77 
78 /* SH-SCI */
79 #define PORT_SCI	52
80 #define PORT_SCIF	53
81 #define PORT_IRDA	54
82 
83 /* Samsung S3C2410 SoC and derivatives thereof */
84 #define PORT_S3C2410    55
85 
86 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
87 #define PORT_IP22ZILOG	56
88 
89 /* Sharp LH7a40x -- an ARM9 SoC series */
90 #define PORT_LH7A40X	57
91 
92 /* PPC CPM type number */
93 #define PORT_CPM        58
94 
95 /* MPC52xx type numbers */
96 #define PORT_MPC52xx	59
97 
98 /* IBM icom */
99 #define PORT_ICOM	60
100 
101 /* Samsung S3C2440 SoC */
102 #define PORT_S3C2440	61
103 
104 /* Motorola i.MX SoC */
105 #define PORT_IMX	62
106 
107 /* Marvell MPSC */
108 #define PORT_MPSC	63
109 
110 /* TXX9 type number */
111 #define PORT_TXX9	64
112 
113 /* NEC VR4100 series SIU/DSIU */
114 #define PORT_VR41XX_SIU		65
115 #define PORT_VR41XX_DSIU	66
116 
117 /* Samsung S3C2400 SoC */
118 #define PORT_S3C2400	67
119 
120 /* M32R SIO */
121 #define PORT_M32R_SIO	68
122 
123 /*Digi jsm */
124 #define PORT_JSM        69
125 
126 #define PORT_PNX8XXX	70
127 
128 /* Hilscher netx */
129 #define PORT_NETX	71
130 
131 /* SUN4V Hypervisor Console */
132 #define PORT_SUNHV	72
133 
134 #define PORT_S3C2412	73
135 
136 /* Xilinx uartlite */
137 #define PORT_UARTLITE	74
138 
139 /* Blackfin bf5xx */
140 #define PORT_BFIN	75
141 
142 /* Micrel KS8695 */
143 #define PORT_KS8695	76
144 
145 /* Broadcom SB1250, etc. SOC */
146 #define PORT_SB1250_DUART	77
147 
148 /* Freescale ColdFire */
149 #define PORT_MCF	78
150 
151 /* Blackfin SPORT */
152 #define PORT_BFIN_SPORT		79
153 
154 /* MN10300 on-chip UART numbers */
155 #define PORT_MN10300		80
156 #define PORT_MN10300_CTS	81
157 
158 #define PORT_SC26XX	82
159 
160 /* SH-SCI */
161 #define PORT_SCIFA	83
162 
163 #define PORT_S3C6400	84
164 
165 /* NWPSERIAL */
166 #define PORT_NWPSERIAL	85
167 
168 /* MAX3100 */
169 #define PORT_MAX3100    86
170 
171 /* Timberdale UART */
172 #define PORT_TIMBUART	87
173 
174 #ifdef __KERNEL__
175 
176 #include <linux/compiler.h>
177 #include <linux/interrupt.h>
178 #include <linux/circ_buf.h>
179 #include <linux/spinlock.h>
180 #include <linux/sched.h>
181 #include <linux/tty.h>
182 #include <linux/mutex.h>
183 #include <linux/sysrq.h>
184 
185 struct uart_port;
186 struct uart_info;
187 struct serial_struct;
188 struct device;
189 
190 /*
191  * This structure describes all the operations that can be
192  * done on the physical hardware.
193  */
194 struct uart_ops {
195 	unsigned int	(*tx_empty)(struct uart_port *);
196 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
197 	unsigned int	(*get_mctrl)(struct uart_port *);
198 	void		(*stop_tx)(struct uart_port *);
199 	void		(*start_tx)(struct uart_port *);
200 	void		(*send_xchar)(struct uart_port *, char ch);
201 	void		(*stop_rx)(struct uart_port *);
202 	void		(*enable_ms)(struct uart_port *);
203 	void		(*break_ctl)(struct uart_port *, int ctl);
204 	int		(*startup)(struct uart_port *);
205 	void		(*shutdown)(struct uart_port *);
206 	void		(*flush_buffer)(struct uart_port *);
207 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
208 				       struct ktermios *old);
209 	void		(*set_ldisc)(struct uart_port *);
210 	void		(*pm)(struct uart_port *, unsigned int state,
211 			      unsigned int oldstate);
212 	int		(*set_wake)(struct uart_port *, unsigned int state);
213 
214 	/*
215 	 * Return a string describing the type of the port
216 	 */
217 	const char *(*type)(struct uart_port *);
218 
219 	/*
220 	 * Release IO and memory resources used by the port.
221 	 * This includes iounmap if necessary.
222 	 */
223 	void		(*release_port)(struct uart_port *);
224 
225 	/*
226 	 * Request IO and memory resources used by the port.
227 	 * This includes iomapping the port if necessary.
228 	 */
229 	int		(*request_port)(struct uart_port *);
230 	void		(*config_port)(struct uart_port *, int);
231 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
232 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
233 #ifdef CONFIG_CONSOLE_POLL
234 	void	(*poll_put_char)(struct uart_port *, unsigned char);
235 	int		(*poll_get_char)(struct uart_port *);
236 #endif
237 };
238 
239 #define UART_CONFIG_TYPE	(1 << 0)
240 #define UART_CONFIG_IRQ		(1 << 1)
241 
242 struct uart_icount {
243 	__u32	cts;
244 	__u32	dsr;
245 	__u32	rng;
246 	__u32	dcd;
247 	__u32	rx;
248 	__u32	tx;
249 	__u32	frame;
250 	__u32	overrun;
251 	__u32	parity;
252 	__u32	brk;
253 	__u32	buf_overrun;
254 };
255 
256 typedef unsigned int __bitwise__ upf_t;
257 
258 struct uart_port {
259 	spinlock_t		lock;			/* port lock */
260 	unsigned long		iobase;			/* in/out[bwl] */
261 	unsigned char __iomem	*membase;		/* read/write[bwl] */
262 	unsigned int		(*serial_in)(struct uart_port *, int);
263 	void			(*serial_out)(struct uart_port *, int, int);
264 	unsigned int		irq;			/* irq number */
265 	unsigned int		uartclk;		/* base uart clock */
266 	unsigned int		fifosize;		/* tx fifo size */
267 	unsigned char		x_char;			/* xon/xoff char */
268 	unsigned char		regshift;		/* reg offset shift */
269 	unsigned char		iotype;			/* io access style */
270 	unsigned char		unused1;
271 
272 #define UPIO_PORT		(0)
273 #define UPIO_HUB6		(1)
274 #define UPIO_MEM		(2)
275 #define UPIO_MEM32		(3)
276 #define UPIO_AU			(4)			/* Au1x00 type IO */
277 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
278 #define UPIO_DWAPB		(6)			/* DesignWare APB UART */
279 #define UPIO_RM9000		(7)			/* RM9000 type IO */
280 
281 	unsigned int		read_status_mask;	/* driver specific */
282 	unsigned int		ignore_status_mask;	/* driver specific */
283 	struct uart_info	*info;			/* pointer to parent info */
284 	struct uart_icount	icount;			/* statistics */
285 
286 	struct console		*cons;			/* struct console, if any */
287 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
288 	unsigned long		sysrq;			/* sysrq timeout */
289 #endif
290 
291 	upf_t			flags;
292 
293 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
294 #define UPF_SAK			((__force upf_t) (1 << 2))
295 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
296 #define UPF_SPD_HI		((__force upf_t) (0x0010))
297 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
298 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
299 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
300 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
301 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
302 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
303 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
304 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
305 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
306 #define UPF_NO_TXEN_TEST	((__force upf_t) (1 << 15))
307 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
308 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
309 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
310 /* The exact UART type is known and should not be probed.  */
311 #define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
312 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
313 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
314 #define UPF_DEAD		((__force upf_t) (1 << 30))
315 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
316 
317 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
318 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
319 
320 	unsigned int		mctrl;			/* current modem ctrl settings */
321 	unsigned int		timeout;		/* character-based timeout */
322 	unsigned int		type;			/* port type */
323 	const struct uart_ops	*ops;
324 	unsigned int		custom_divisor;
325 	unsigned int		line;			/* port index */
326 	resource_size_t		mapbase;		/* for ioremap */
327 	struct device		*dev;			/* parent device */
328 	unsigned char		hub6;			/* this should be in the 8250 driver */
329 	unsigned char		suspended;
330 	unsigned char		unused[2];
331 	void			*private_data;		/* generic platform data pointer */
332 };
333 
334 /*
335  * This is the state information which is only valid when the port
336  * is open; it may be cleared the core driver once the device has
337  * been closed.  Either the low level driver or the core can modify
338  * stuff here.
339  */
340 typedef unsigned int __bitwise__ uif_t;
341 
342 struct uart_info {
343 	struct tty_port		port;
344 	struct circ_buf		xmit;
345 	uif_t			flags;
346 
347 /*
348  * Definitions for info->flags.  These are _private_ to serial_core, and
349  * are specific to this structure.  They may be queried by low level drivers.
350  *
351  * FIXME: use the ASY_ definitions
352  */
353 #define UIF_CHECK_CD		((__force uif_t) (1 << 25))
354 #define UIF_CTS_FLOW		((__force uif_t) (1 << 26))
355 #define UIF_NORMAL_ACTIVE	((__force uif_t) (1 << 29))
356 #define UIF_INITIALIZED		((__force uif_t) (1 << 31))
357 #define UIF_SUSPENDED		((__force uif_t) (1 << 30))
358 
359 	struct tasklet_struct	tlet;
360 	wait_queue_head_t	delta_msr_wait;
361 };
362 
363 /*
364  * This is the state information which is persistent across opens.
365  * The low level driver must not to touch any elements contained
366  * within.
367  */
368 struct uart_state {
369 	unsigned int		close_delay;		/* msec */
370 	unsigned int		closing_wait;		/* msec */
371 
372 #define USF_CLOSING_WAIT_INF	(0)
373 #define USF_CLOSING_WAIT_NONE	(~0U)
374 
375 	int			count;
376 	int			pm_state;
377 	struct uart_info	info;
378 	struct uart_port	*port;
379 
380 	struct mutex		mutex;
381 };
382 
383 #define UART_XMIT_SIZE	PAGE_SIZE
384 
385 
386 /* number of characters left in xmit buffer before we ask for more */
387 #define WAKEUP_CHARS		256
388 
389 struct module;
390 struct tty_driver;
391 
392 struct uart_driver {
393 	struct module		*owner;
394 	const char		*driver_name;
395 	const char		*dev_name;
396 	int			 major;
397 	int			 minor;
398 	int			 nr;
399 	struct console		*cons;
400 
401 	/*
402 	 * these are private; the low level driver should not
403 	 * touch these; they should be initialised to NULL
404 	 */
405 	struct uart_state	*state;
406 	struct tty_driver	*tty_driver;
407 };
408 
409 void uart_write_wakeup(struct uart_port *port);
410 
411 /*
412  * Baud rate helpers.
413  */
414 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
415 			 unsigned int baud);
416 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
417 				struct ktermios *old, unsigned int min,
418 				unsigned int max);
419 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
420 
421 /*
422  * Console helpers.
423  */
424 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
425 				   struct console *c);
426 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
427 			int *flow);
428 int uart_set_options(struct uart_port *port, struct console *co, int baud,
429 		     int parity, int bits, int flow);
430 struct tty_driver *uart_console_device(struct console *co, int *index);
431 void uart_console_write(struct uart_port *port, const char *s,
432 			unsigned int count,
433 			void (*putchar)(struct uart_port *, int));
434 
435 /*
436  * Port/driver registration/removal
437  */
438 int uart_register_driver(struct uart_driver *uart);
439 void uart_unregister_driver(struct uart_driver *uart);
440 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
441 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
442 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
443 
444 /*
445  * Power Management
446  */
447 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
448 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
449 
450 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
451 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
452 
453 #define uart_circ_chars_pending(circ)	\
454 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
455 
456 #define uart_circ_chars_free(circ)	\
457 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
458 
459 static inline int uart_tx_stopped(struct uart_port *port)
460 {
461 	struct tty_struct *tty = port->info->port.tty;
462 	if(tty->stopped || tty->hw_stopped)
463 		return 1;
464 	return 0;
465 }
466 
467 /*
468  * The following are helper functions for the low level drivers.
469  */
470 static inline int
471 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
472 {
473 #ifdef SUPPORT_SYSRQ
474 	if (port->sysrq) {
475 		if (ch && time_before(jiffies, port->sysrq)) {
476 			handle_sysrq(ch, port->info->port.tty);
477 			port->sysrq = 0;
478 			return 1;
479 		}
480 		port->sysrq = 0;
481 	}
482 #endif
483 	return 0;
484 }
485 #ifndef SUPPORT_SYSRQ
486 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
487 #endif
488 
489 /*
490  * We do the SysRQ and SAK checking like this...
491  */
492 static inline int uart_handle_break(struct uart_port *port)
493 {
494 	struct uart_info *info = port->info;
495 #ifdef SUPPORT_SYSRQ
496 	if (port->cons && port->cons->index == port->line) {
497 		if (!port->sysrq) {
498 			port->sysrq = jiffies + HZ*5;
499 			return 1;
500 		}
501 		port->sysrq = 0;
502 	}
503 #endif
504 	if (port->flags & UPF_SAK)
505 		do_SAK(info->port.tty);
506 	return 0;
507 }
508 
509 /**
510  *	uart_handle_dcd_change - handle a change of carrier detect state
511  *	@port: uart_port structure for the open port
512  *	@status: new carrier detect status, nonzero if active
513  */
514 static inline void
515 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
516 {
517 	struct uart_info *info = port->info;
518 
519 	port->icount.dcd++;
520 
521 #ifdef CONFIG_HARD_PPS
522 	if ((port->flags & UPF_HARDPPS_CD) && status)
523 		hardpps();
524 #endif
525 
526 	if (info->flags & UIF_CHECK_CD) {
527 		if (status)
528 			wake_up_interruptible(&info->port.open_wait);
529 		else if (info->port.tty)
530 			tty_hangup(info->port.tty);
531 	}
532 }
533 
534 /**
535  *	uart_handle_cts_change - handle a change of clear-to-send state
536  *	@port: uart_port structure for the open port
537  *	@status: new clear to send status, nonzero if active
538  */
539 static inline void
540 uart_handle_cts_change(struct uart_port *port, unsigned int status)
541 {
542 	struct uart_info *info = port->info;
543 	struct tty_struct *tty = info->port.tty;
544 
545 	port->icount.cts++;
546 
547 	if (info->flags & UIF_CTS_FLOW) {
548 		if (tty->hw_stopped) {
549 			if (status) {
550 				tty->hw_stopped = 0;
551 				port->ops->start_tx(port);
552 				uart_write_wakeup(port);
553 			}
554 		} else {
555 			if (!status) {
556 				tty->hw_stopped = 1;
557 				port->ops->stop_tx(port);
558 			}
559 		}
560 	}
561 }
562 
563 #include <linux/tty_flip.h>
564 
565 static inline void
566 uart_insert_char(struct uart_port *port, unsigned int status,
567 		 unsigned int overrun, unsigned int ch, unsigned int flag)
568 {
569 	struct tty_struct *tty = port->info->port.tty;
570 
571 	if ((status & port->ignore_status_mask & ~overrun) == 0)
572 		tty_insert_flip_char(tty, ch, flag);
573 
574 	/*
575 	 * Overrun is special.  Since it's reported immediately,
576 	 * it doesn't affect the current character.
577 	 */
578 	if (status & ~port->ignore_status_mask & overrun)
579 		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
580 }
581 
582 /*
583  *	UART_ENABLE_MS - determine if port should enable modem status irqs
584  */
585 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
586 					 (cflag) & CRTSCTS || \
587 					 !((cflag) & CLOCAL))
588 
589 #endif
590 
591 #endif /* LINUX_SERIAL_CORE_H */
592