xref: /linux-6.15/include/linux/serial_core.h (revision 6482f554)
1 /*
2  *  linux/drivers/char/serial_core.h
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22 
23 #include <linux/serial.h>
24 
25 /*
26  * The type definitions.  These are from Ted Ts'o's serial.h
27  */
28 #define PORT_UNKNOWN	0
29 #define PORT_8250	1
30 #define PORT_16450	2
31 #define PORT_16550	3
32 #define PORT_16550A	4
33 #define PORT_CIRRUS	5
34 #define PORT_16650	6
35 #define PORT_16650V2	7
36 #define PORT_16750	8
37 #define PORT_STARTECH	9
38 #define PORT_16C950	10
39 #define PORT_16654	11
40 #define PORT_16850	12
41 #define PORT_RSA	13
42 #define PORT_NS16550A	14
43 #define PORT_XSCALE	15
44 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
45 #define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
46 #define PORT_AR7	18	/* Texas Instruments AR7 internal UART */
47 #define PORT_U6_16550A	19	/* ST-Ericsson U6xxx internal UART */
48 #define PORT_MAX_8250	19	/* max port ID */
49 
50 /*
51  * ARM specific type numbers.  These are not currently guaranteed
52  * to be implemented, and will change in the future.  These are
53  * separate so any additions to the old serial.c that occur before
54  * we are merged can be easily merged here.
55  */
56 #define PORT_PXA	31
57 #define PORT_AMBA	32
58 #define PORT_CLPS711X	33
59 #define PORT_SA1100	34
60 #define PORT_UART00	35
61 #define PORT_21285	37
62 
63 /* Sparc type numbers.  */
64 #define PORT_SUNZILOG	38
65 #define PORT_SUNSAB	39
66 
67 /* DEC */
68 #define PORT_DZ		46
69 #define PORT_ZS		47
70 
71 /* Parisc type numbers. */
72 #define PORT_MUX	48
73 
74 /* Atmel AT91 / AT32 SoC */
75 #define PORT_ATMEL	49
76 
77 /* Macintosh Zilog type numbers */
78 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
79 #define PORT_PMAC_ZILOG	51
80 
81 /* SH-SCI */
82 #define PORT_SCI	52
83 #define PORT_SCIF	53
84 #define PORT_IRDA	54
85 
86 /* Samsung S3C2410 SoC and derivatives thereof */
87 #define PORT_S3C2410    55
88 
89 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
90 #define PORT_IP22ZILOG	56
91 
92 /* Sharp LH7a40x -- an ARM9 SoC series */
93 #define PORT_LH7A40X	57
94 
95 /* PPC CPM type number */
96 #define PORT_CPM        58
97 
98 /* MPC52xx type numbers */
99 #define PORT_MPC52xx	59
100 
101 /* IBM icom */
102 #define PORT_ICOM	60
103 
104 /* Samsung S3C2440 SoC */
105 #define PORT_S3C2440	61
106 
107 /* Motorola i.MX SoC */
108 #define PORT_IMX	62
109 
110 /* Marvell MPSC */
111 #define PORT_MPSC	63
112 
113 /* TXX9 type number */
114 #define PORT_TXX9	64
115 
116 /* NEC VR4100 series SIU/DSIU */
117 #define PORT_VR41XX_SIU		65
118 #define PORT_VR41XX_DSIU	66
119 
120 /* Samsung S3C2400 SoC */
121 #define PORT_S3C2400	67
122 
123 /* M32R SIO */
124 #define PORT_M32R_SIO	68
125 
126 /*Digi jsm */
127 #define PORT_JSM        69
128 
129 #define PORT_PNX8XXX	70
130 
131 /* Hilscher netx */
132 #define PORT_NETX	71
133 
134 /* SUN4V Hypervisor Console */
135 #define PORT_SUNHV	72
136 
137 #define PORT_S3C2412	73
138 
139 /* Xilinx uartlite */
140 #define PORT_UARTLITE	74
141 
142 /* Blackfin bf5xx */
143 #define PORT_BFIN	75
144 
145 /* Micrel KS8695 */
146 #define PORT_KS8695	76
147 
148 /* Broadcom SB1250, etc. SOC */
149 #define PORT_SB1250_DUART	77
150 
151 /* Freescale ColdFire */
152 #define PORT_MCF	78
153 
154 /* Blackfin SPORT */
155 #define PORT_BFIN_SPORT		79
156 
157 /* MN10300 on-chip UART numbers */
158 #define PORT_MN10300		80
159 #define PORT_MN10300_CTS	81
160 
161 #define PORT_SC26XX	82
162 
163 /* SH-SCI */
164 #define PORT_SCIFA	83
165 
166 #define PORT_S3C6400	84
167 
168 /* NWPSERIAL */
169 #define PORT_NWPSERIAL	85
170 
171 /* MAX3100 */
172 #define PORT_MAX3100    86
173 
174 /* Timberdale UART */
175 #define PORT_TIMBUART	87
176 
177 /* Qualcomm MSM SoCs */
178 #define PORT_MSM	88
179 
180 /* BCM63xx family SoCs */
181 #define PORT_BCM63XX	89
182 
183 /* Aeroflex Gaisler GRLIB APBUART */
184 #define PORT_APBUART    90
185 
186 /* Altera UARTs */
187 #define PORT_ALTERA_JTAGUART	91
188 #define PORT_ALTERA_UART	92
189 
190 /* SH-SCI */
191 #define PORT_SCIFB	93
192 
193 /* MAX3107 */
194 #define PORT_MAX3107	94
195 
196 /* High Speed UART for Medfield */
197 #define PORT_MFD	95
198 
199 #ifdef __KERNEL__
200 
201 #include <linux/compiler.h>
202 #include <linux/interrupt.h>
203 #include <linux/circ_buf.h>
204 #include <linux/spinlock.h>
205 #include <linux/sched.h>
206 #include <linux/tty.h>
207 #include <linux/mutex.h>
208 #include <linux/sysrq.h>
209 
210 struct uart_port;
211 struct serial_struct;
212 struct device;
213 
214 /*
215  * This structure describes all the operations that can be
216  * done on the physical hardware.
217  */
218 struct uart_ops {
219 	unsigned int	(*tx_empty)(struct uart_port *);
220 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
221 	unsigned int	(*get_mctrl)(struct uart_port *);
222 	void		(*stop_tx)(struct uart_port *);
223 	void		(*start_tx)(struct uart_port *);
224 	void		(*send_xchar)(struct uart_port *, char ch);
225 	void		(*stop_rx)(struct uart_port *);
226 	void		(*enable_ms)(struct uart_port *);
227 	void		(*break_ctl)(struct uart_port *, int ctl);
228 	int		(*startup)(struct uart_port *);
229 	void		(*shutdown)(struct uart_port *);
230 	void		(*flush_buffer)(struct uart_port *);
231 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
232 				       struct ktermios *old);
233 	void		(*set_ldisc)(struct uart_port *, int new);
234 	void		(*pm)(struct uart_port *, unsigned int state,
235 			      unsigned int oldstate);
236 	int		(*set_wake)(struct uart_port *, unsigned int state);
237 
238 	/*
239 	 * Return a string describing the type of the port
240 	 */
241 	const char *(*type)(struct uart_port *);
242 
243 	/*
244 	 * Release IO and memory resources used by the port.
245 	 * This includes iounmap if necessary.
246 	 */
247 	void		(*release_port)(struct uart_port *);
248 
249 	/*
250 	 * Request IO and memory resources used by the port.
251 	 * This includes iomapping the port if necessary.
252 	 */
253 	int		(*request_port)(struct uart_port *);
254 	void		(*config_port)(struct uart_port *, int);
255 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
256 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
257 #ifdef CONFIG_CONSOLE_POLL
258 	void	(*poll_put_char)(struct uart_port *, unsigned char);
259 	int		(*poll_get_char)(struct uart_port *);
260 #endif
261 };
262 
263 #define NO_POLL_CHAR		0x00ff0000
264 #define UART_CONFIG_TYPE	(1 << 0)
265 #define UART_CONFIG_IRQ		(1 << 1)
266 
267 struct uart_icount {
268 	__u32	cts;
269 	__u32	dsr;
270 	__u32	rng;
271 	__u32	dcd;
272 	__u32	rx;
273 	__u32	tx;
274 	__u32	frame;
275 	__u32	overrun;
276 	__u32	parity;
277 	__u32	brk;
278 	__u32	buf_overrun;
279 };
280 
281 typedef unsigned int __bitwise__ upf_t;
282 
283 struct uart_port {
284 	spinlock_t		lock;			/* port lock */
285 	unsigned long		iobase;			/* in/out[bwl] */
286 	unsigned char __iomem	*membase;		/* read/write[bwl] */
287 	unsigned int		(*serial_in)(struct uart_port *, int);
288 	void			(*serial_out)(struct uart_port *, int, int);
289 	void			(*set_termios)(struct uart_port *,
290 				               struct ktermios *new,
291 				               struct ktermios *old);
292 	unsigned int		irq;			/* irq number */
293 	unsigned long		irqflags;		/* irq flags  */
294 	unsigned int		uartclk;		/* base uart clock */
295 	unsigned int		fifosize;		/* tx fifo size */
296 	unsigned char		x_char;			/* xon/xoff char */
297 	unsigned char		regshift;		/* reg offset shift */
298 	unsigned char		iotype;			/* io access style */
299 	unsigned char		unused1;
300 
301 #define UPIO_PORT		(0)
302 #define UPIO_HUB6		(1)
303 #define UPIO_MEM		(2)
304 #define UPIO_MEM32		(3)
305 #define UPIO_AU			(4)			/* Au1x00 type IO */
306 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
307 #define UPIO_DWAPB		(6)			/* DesignWare APB UART */
308 #define UPIO_RM9000		(7)			/* RM9000 type IO */
309 
310 	unsigned int		read_status_mask;	/* driver specific */
311 	unsigned int		ignore_status_mask;	/* driver specific */
312 	struct uart_state	*state;			/* pointer to parent state */
313 	struct uart_icount	icount;			/* statistics */
314 
315 	struct console		*cons;			/* struct console, if any */
316 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
317 	unsigned long		sysrq;			/* sysrq timeout */
318 #endif
319 
320 	upf_t			flags;
321 
322 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
323 #define UPF_SAK			((__force upf_t) (1 << 2))
324 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
325 #define UPF_SPD_HI		((__force upf_t) (0x0010))
326 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
327 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
328 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
329 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
330 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
331 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
332 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
333 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
334 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
335 #define UPF_NO_TXEN_TEST	((__force upf_t) (1 << 15))
336 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
337 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
338 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
339 /* The exact UART type is known and should not be probed.  */
340 #define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
341 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
342 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
343 #define UPF_DEAD		((__force upf_t) (1 << 30))
344 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
345 
346 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
347 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
348 
349 	unsigned int		mctrl;			/* current modem ctrl settings */
350 	unsigned int		timeout;		/* character-based timeout */
351 	unsigned int		type;			/* port type */
352 	const struct uart_ops	*ops;
353 	unsigned int		custom_divisor;
354 	unsigned int		line;			/* port index */
355 	resource_size_t		mapbase;		/* for ioremap */
356 	struct device		*dev;			/* parent device */
357 	unsigned char		hub6;			/* this should be in the 8250 driver */
358 	unsigned char		suspended;
359 	unsigned char		unused[2];
360 	void			*private_data;		/* generic platform data pointer */
361 };
362 
363 /*
364  * This is the state information which is persistent across opens.
365  */
366 struct uart_state {
367 	struct tty_port		port;
368 
369 	int			pm_state;
370 	struct circ_buf		xmit;
371 
372 	struct tasklet_struct	tlet;
373 	struct uart_port	*uart_port;
374 };
375 
376 #define UART_XMIT_SIZE	PAGE_SIZE
377 
378 
379 /* number of characters left in xmit buffer before we ask for more */
380 #define WAKEUP_CHARS		256
381 
382 struct module;
383 struct tty_driver;
384 
385 struct uart_driver {
386 	struct module		*owner;
387 	const char		*driver_name;
388 	const char		*dev_name;
389 	int			 major;
390 	int			 minor;
391 	int			 nr;
392 	struct console		*cons;
393 
394 	/*
395 	 * these are private; the low level driver should not
396 	 * touch these; they should be initialised to NULL
397 	 */
398 	struct uart_state	*state;
399 	struct tty_driver	*tty_driver;
400 };
401 
402 void uart_write_wakeup(struct uart_port *port);
403 
404 /*
405  * Baud rate helpers.
406  */
407 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
408 			 unsigned int baud);
409 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
410 				struct ktermios *old, unsigned int min,
411 				unsigned int max);
412 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
413 
414 /*
415  * Console helpers.
416  */
417 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
418 				   struct console *c);
419 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
420 			int *flow);
421 int uart_set_options(struct uart_port *port, struct console *co, int baud,
422 		     int parity, int bits, int flow);
423 struct tty_driver *uart_console_device(struct console *co, int *index);
424 void uart_console_write(struct uart_port *port, const char *s,
425 			unsigned int count,
426 			void (*putchar)(struct uart_port *, int));
427 
428 /*
429  * Port/driver registration/removal
430  */
431 int uart_register_driver(struct uart_driver *uart);
432 void uart_unregister_driver(struct uart_driver *uart);
433 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
434 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
435 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
436 
437 /*
438  * Power Management
439  */
440 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
441 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
442 
443 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
444 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
445 
446 #define uart_circ_chars_pending(circ)	\
447 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
448 
449 #define uart_circ_chars_free(circ)	\
450 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
451 
452 static inline int uart_tx_stopped(struct uart_port *port)
453 {
454 	struct tty_struct *tty = port->state->port.tty;
455 	if(tty->stopped || tty->hw_stopped)
456 		return 1;
457 	return 0;
458 }
459 
460 /*
461  * The following are helper functions for the low level drivers.
462  */
463 static inline int
464 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
465 {
466 #ifdef SUPPORT_SYSRQ
467 	if (port->sysrq) {
468 		if (ch && time_before(jiffies, port->sysrq)) {
469 			handle_sysrq(ch);
470 			port->sysrq = 0;
471 			return 1;
472 		}
473 		port->sysrq = 0;
474 	}
475 #endif
476 	return 0;
477 }
478 #ifndef SUPPORT_SYSRQ
479 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
480 #endif
481 
482 /*
483  * We do the SysRQ and SAK checking like this...
484  */
485 static inline int uart_handle_break(struct uart_port *port)
486 {
487 	struct uart_state *state = port->state;
488 #ifdef SUPPORT_SYSRQ
489 	if (port->cons && port->cons->index == port->line) {
490 		if (!port->sysrq) {
491 			port->sysrq = jiffies + HZ*5;
492 			return 1;
493 		}
494 		port->sysrq = 0;
495 	}
496 #endif
497 	if (port->flags & UPF_SAK)
498 		do_SAK(state->port.tty);
499 	return 0;
500 }
501 
502 /**
503  *	uart_handle_dcd_change - handle a change of carrier detect state
504  *	@uport: uart_port structure for the open port
505  *	@status: new carrier detect status, nonzero if active
506  */
507 static inline void
508 uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
509 {
510 	struct uart_state *state = uport->state;
511 	struct tty_port *port = &state->port;
512 	struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
513 	struct timespec ts;
514 
515 	if (ld && ld->ops->dcd_change)
516 		getnstimeofday(&ts);
517 
518 	uport->icount.dcd++;
519 #ifdef CONFIG_HARD_PPS
520 	if ((uport->flags & UPF_HARDPPS_CD) && status)
521 		hardpps();
522 #endif
523 
524 	if (port->flags & ASYNC_CHECK_CD) {
525 		if (status)
526 			wake_up_interruptible(&port->open_wait);
527 		else if (port->tty)
528 			tty_hangup(port->tty);
529 	}
530 
531 	if (ld && ld->ops->dcd_change)
532 		ld->ops->dcd_change(port->tty, status, &ts);
533 	if (ld)
534 		tty_ldisc_deref(ld);
535 }
536 
537 /**
538  *	uart_handle_cts_change - handle a change of clear-to-send state
539  *	@uport: uart_port structure for the open port
540  *	@status: new clear to send status, nonzero if active
541  */
542 static inline void
543 uart_handle_cts_change(struct uart_port *uport, unsigned int status)
544 {
545 	struct tty_port *port = &uport->state->port;
546 	struct tty_struct *tty = port->tty;
547 
548 	uport->icount.cts++;
549 
550 	if (port->flags & ASYNC_CTS_FLOW) {
551 		if (tty->hw_stopped) {
552 			if (status) {
553 				tty->hw_stopped = 0;
554 				uport->ops->start_tx(uport);
555 				uart_write_wakeup(uport);
556 			}
557 		} else {
558 			if (!status) {
559 				tty->hw_stopped = 1;
560 				uport->ops->stop_tx(uport);
561 			}
562 		}
563 	}
564 }
565 
566 #include <linux/tty_flip.h>
567 
568 static inline void
569 uart_insert_char(struct uart_port *port, unsigned int status,
570 		 unsigned int overrun, unsigned int ch, unsigned int flag)
571 {
572 	struct tty_struct *tty = port->state->port.tty;
573 
574 	if ((status & port->ignore_status_mask & ~overrun) == 0)
575 		tty_insert_flip_char(tty, ch, flag);
576 
577 	/*
578 	 * Overrun is special.  Since it's reported immediately,
579 	 * it doesn't affect the current character.
580 	 */
581 	if (status & ~port->ignore_status_mask & overrun)
582 		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
583 }
584 
585 /*
586  *	UART_ENABLE_MS - determine if port should enable modem status irqs
587  */
588 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
589 					 (cflag) & CRTSCTS || \
590 					 !((cflag) & CLOCAL))
591 
592 #endif
593 
594 #endif /* LINUX_SERIAL_CORE_H */
595