xref: /linux-6.15/include/linux/serial_core.h (revision 5d4a2e29)
1 /*
2  *  linux/drivers/char/serial_core.h
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22 
23 #include <linux/serial.h>
24 
25 /*
26  * The type definitions.  These are from Ted Ts'o's serial.h
27  */
28 #define PORT_UNKNOWN	0
29 #define PORT_8250	1
30 #define PORT_16450	2
31 #define PORT_16550	3
32 #define PORT_16550A	4
33 #define PORT_CIRRUS	5
34 #define PORT_16650	6
35 #define PORT_16650V2	7
36 #define PORT_16750	8
37 #define PORT_STARTECH	9
38 #define PORT_16C950	10
39 #define PORT_16654	11
40 #define PORT_16850	12
41 #define PORT_RSA	13
42 #define PORT_NS16550A	14
43 #define PORT_XSCALE	15
44 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
45 #define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
46 #define PORT_AR7	18	/* Texas Instruments AR7 internal UART */
47 #define PORT_MAX_8250	18	/* max port ID */
48 
49 /*
50  * ARM specific type numbers.  These are not currently guaranteed
51  * to be implemented, and will change in the future.  These are
52  * separate so any additions to the old serial.c that occur before
53  * we are merged can be easily merged here.
54  */
55 #define PORT_PXA	31
56 #define PORT_AMBA	32
57 #define PORT_CLPS711X	33
58 #define PORT_SA1100	34
59 #define PORT_UART00	35
60 #define PORT_21285	37
61 
62 /* Sparc type numbers.  */
63 #define PORT_SUNZILOG	38
64 #define PORT_SUNSAB	39
65 
66 /* DEC */
67 #define PORT_DZ		46
68 #define PORT_ZS		47
69 
70 /* Parisc type numbers. */
71 #define PORT_MUX	48
72 
73 /* Atmel AT91 / AT32 SoC */
74 #define PORT_ATMEL	49
75 
76 /* Macintosh Zilog type numbers */
77 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
78 #define PORT_PMAC_ZILOG	51
79 
80 /* SH-SCI */
81 #define PORT_SCI	52
82 #define PORT_SCIF	53
83 #define PORT_IRDA	54
84 
85 /* Samsung S3C2410 SoC and derivatives thereof */
86 #define PORT_S3C2410    55
87 
88 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
89 #define PORT_IP22ZILOG	56
90 
91 /* Sharp LH7a40x -- an ARM9 SoC series */
92 #define PORT_LH7A40X	57
93 
94 /* PPC CPM type number */
95 #define PORT_CPM        58
96 
97 /* MPC52xx type numbers */
98 #define PORT_MPC52xx	59
99 
100 /* IBM icom */
101 #define PORT_ICOM	60
102 
103 /* Samsung S3C2440 SoC */
104 #define PORT_S3C2440	61
105 
106 /* Motorola i.MX SoC */
107 #define PORT_IMX	62
108 
109 /* Marvell MPSC */
110 #define PORT_MPSC	63
111 
112 /* TXX9 type number */
113 #define PORT_TXX9	64
114 
115 /* NEC VR4100 series SIU/DSIU */
116 #define PORT_VR41XX_SIU		65
117 #define PORT_VR41XX_DSIU	66
118 
119 /* Samsung S3C2400 SoC */
120 #define PORT_S3C2400	67
121 
122 /* M32R SIO */
123 #define PORT_M32R_SIO	68
124 
125 /*Digi jsm */
126 #define PORT_JSM        69
127 
128 #define PORT_PNX8XXX	70
129 
130 /* Hilscher netx */
131 #define PORT_NETX	71
132 
133 /* SUN4V Hypervisor Console */
134 #define PORT_SUNHV	72
135 
136 #define PORT_S3C2412	73
137 
138 /* Xilinx uartlite */
139 #define PORT_UARTLITE	74
140 
141 /* Blackfin bf5xx */
142 #define PORT_BFIN	75
143 
144 /* Micrel KS8695 */
145 #define PORT_KS8695	76
146 
147 /* Broadcom SB1250, etc. SOC */
148 #define PORT_SB1250_DUART	77
149 
150 /* Freescale ColdFire */
151 #define PORT_MCF	78
152 
153 /* Blackfin SPORT */
154 #define PORT_BFIN_SPORT		79
155 
156 /* MN10300 on-chip UART numbers */
157 #define PORT_MN10300		80
158 #define PORT_MN10300_CTS	81
159 
160 #define PORT_SC26XX	82
161 
162 /* SH-SCI */
163 #define PORT_SCIFA	83
164 
165 #define PORT_S3C6400	84
166 
167 /* NWPSERIAL */
168 #define PORT_NWPSERIAL	85
169 
170 /* MAX3100 */
171 #define PORT_MAX3100    86
172 
173 /* Timberdale UART */
174 #define PORT_TIMBUART	87
175 
176 /* Qualcomm MSM SoCs */
177 #define PORT_MSM	88
178 
179 /* BCM63xx family SoCs */
180 #define PORT_BCM63XX	89
181 
182 /* Aeroflex Gaisler GRLIB APBUART */
183 #define PORT_APBUART    90
184 
185 /* Altera UARTs */
186 #define PORT_ALTERA_JTAGUART	91
187 #define PORT_ALTERA_UART	92
188 
189 #ifdef __KERNEL__
190 
191 #include <linux/compiler.h>
192 #include <linux/interrupt.h>
193 #include <linux/circ_buf.h>
194 #include <linux/spinlock.h>
195 #include <linux/sched.h>
196 #include <linux/tty.h>
197 #include <linux/mutex.h>
198 #include <linux/sysrq.h>
199 
200 struct uart_port;
201 struct serial_struct;
202 struct device;
203 
204 /*
205  * This structure describes all the operations that can be
206  * done on the physical hardware.
207  */
208 struct uart_ops {
209 	unsigned int	(*tx_empty)(struct uart_port *);
210 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
211 	unsigned int	(*get_mctrl)(struct uart_port *);
212 	void		(*stop_tx)(struct uart_port *);
213 	void		(*start_tx)(struct uart_port *);
214 	void		(*send_xchar)(struct uart_port *, char ch);
215 	void		(*stop_rx)(struct uart_port *);
216 	void		(*enable_ms)(struct uart_port *);
217 	void		(*break_ctl)(struct uart_port *, int ctl);
218 	int		(*startup)(struct uart_port *);
219 	void		(*shutdown)(struct uart_port *);
220 	void		(*flush_buffer)(struct uart_port *);
221 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
222 				       struct ktermios *old);
223 	void		(*set_ldisc)(struct uart_port *);
224 	void		(*pm)(struct uart_port *, unsigned int state,
225 			      unsigned int oldstate);
226 	int		(*set_wake)(struct uart_port *, unsigned int state);
227 
228 	/*
229 	 * Return a string describing the type of the port
230 	 */
231 	const char *(*type)(struct uart_port *);
232 
233 	/*
234 	 * Release IO and memory resources used by the port.
235 	 * This includes iounmap if necessary.
236 	 */
237 	void		(*release_port)(struct uart_port *);
238 
239 	/*
240 	 * Request IO and memory resources used by the port.
241 	 * This includes iomapping the port if necessary.
242 	 */
243 	int		(*request_port)(struct uart_port *);
244 	void		(*config_port)(struct uart_port *, int);
245 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
246 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
247 #ifdef CONFIG_CONSOLE_POLL
248 	void	(*poll_put_char)(struct uart_port *, unsigned char);
249 	int		(*poll_get_char)(struct uart_port *);
250 #endif
251 };
252 
253 #define NO_POLL_CHAR		0x00ff0000
254 #define UART_CONFIG_TYPE	(1 << 0)
255 #define UART_CONFIG_IRQ		(1 << 1)
256 
257 struct uart_icount {
258 	__u32	cts;
259 	__u32	dsr;
260 	__u32	rng;
261 	__u32	dcd;
262 	__u32	rx;
263 	__u32	tx;
264 	__u32	frame;
265 	__u32	overrun;
266 	__u32	parity;
267 	__u32	brk;
268 	__u32	buf_overrun;
269 };
270 
271 typedef unsigned int __bitwise__ upf_t;
272 
273 struct uart_port {
274 	spinlock_t		lock;			/* port lock */
275 	unsigned long		iobase;			/* in/out[bwl] */
276 	unsigned char __iomem	*membase;		/* read/write[bwl] */
277 	unsigned int		(*serial_in)(struct uart_port *, int);
278 	void			(*serial_out)(struct uart_port *, int, int);
279 	unsigned int		irq;			/* irq number */
280 	unsigned long		irqflags;		/* irq flags  */
281 	unsigned int		uartclk;		/* base uart clock */
282 	unsigned int		fifosize;		/* tx fifo size */
283 	unsigned char		x_char;			/* xon/xoff char */
284 	unsigned char		regshift;		/* reg offset shift */
285 	unsigned char		iotype;			/* io access style */
286 	unsigned char		unused1;
287 
288 #define UPIO_PORT		(0)
289 #define UPIO_HUB6		(1)
290 #define UPIO_MEM		(2)
291 #define UPIO_MEM32		(3)
292 #define UPIO_AU			(4)			/* Au1x00 type IO */
293 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
294 #define UPIO_DWAPB		(6)			/* DesignWare APB UART */
295 #define UPIO_RM9000		(7)			/* RM9000 type IO */
296 
297 	unsigned int		read_status_mask;	/* driver specific */
298 	unsigned int		ignore_status_mask;	/* driver specific */
299 	struct uart_state	*state;			/* pointer to parent state */
300 	struct uart_icount	icount;			/* statistics */
301 
302 	struct console		*cons;			/* struct console, if any */
303 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
304 	unsigned long		sysrq;			/* sysrq timeout */
305 #endif
306 
307 	upf_t			flags;
308 
309 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
310 #define UPF_SAK			((__force upf_t) (1 << 2))
311 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
312 #define UPF_SPD_HI		((__force upf_t) (0x0010))
313 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
314 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
315 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
316 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
317 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
318 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
319 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
320 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
321 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
322 #define UPF_NO_TXEN_TEST	((__force upf_t) (1 << 15))
323 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
324 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
325 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
326 /* The exact UART type is known and should not be probed.  */
327 #define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
328 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
329 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
330 #define UPF_DEAD		((__force upf_t) (1 << 30))
331 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
332 
333 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
334 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
335 
336 	unsigned int		mctrl;			/* current modem ctrl settings */
337 	unsigned int		timeout;		/* character-based timeout */
338 	unsigned int		type;			/* port type */
339 	const struct uart_ops	*ops;
340 	unsigned int		custom_divisor;
341 	unsigned int		line;			/* port index */
342 	resource_size_t		mapbase;		/* for ioremap */
343 	struct device		*dev;			/* parent device */
344 	unsigned char		hub6;			/* this should be in the 8250 driver */
345 	unsigned char		suspended;
346 	unsigned char		unused[2];
347 	void			*private_data;		/* generic platform data pointer */
348 };
349 
350 /*
351  * This is the state information which is persistent across opens.
352  */
353 struct uart_state {
354 	struct tty_port		port;
355 
356 	int			pm_state;
357 	struct circ_buf		xmit;
358 
359 	struct tasklet_struct	tlet;
360 	struct uart_port	*uart_port;
361 };
362 
363 #define UART_XMIT_SIZE	PAGE_SIZE
364 
365 
366 /* number of characters left in xmit buffer before we ask for more */
367 #define WAKEUP_CHARS		256
368 
369 struct module;
370 struct tty_driver;
371 
372 struct uart_driver {
373 	struct module		*owner;
374 	const char		*driver_name;
375 	const char		*dev_name;
376 	int			 major;
377 	int			 minor;
378 	int			 nr;
379 	struct console		*cons;
380 
381 	/*
382 	 * these are private; the low level driver should not
383 	 * touch these; they should be initialised to NULL
384 	 */
385 	struct uart_state	*state;
386 	struct tty_driver	*tty_driver;
387 };
388 
389 void uart_write_wakeup(struct uart_port *port);
390 
391 /*
392  * Baud rate helpers.
393  */
394 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
395 			 unsigned int baud);
396 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
397 				struct ktermios *old, unsigned int min,
398 				unsigned int max);
399 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
400 
401 /*
402  * Console helpers.
403  */
404 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
405 				   struct console *c);
406 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
407 			int *flow);
408 int uart_set_options(struct uart_port *port, struct console *co, int baud,
409 		     int parity, int bits, int flow);
410 struct tty_driver *uart_console_device(struct console *co, int *index);
411 void uart_console_write(struct uart_port *port, const char *s,
412 			unsigned int count,
413 			void (*putchar)(struct uart_port *, int));
414 
415 /*
416  * Port/driver registration/removal
417  */
418 int uart_register_driver(struct uart_driver *uart);
419 void uart_unregister_driver(struct uart_driver *uart);
420 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
421 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
422 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
423 
424 /*
425  * Power Management
426  */
427 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
428 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
429 
430 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
431 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
432 
433 #define uart_circ_chars_pending(circ)	\
434 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
435 
436 #define uart_circ_chars_free(circ)	\
437 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
438 
439 static inline int uart_tx_stopped(struct uart_port *port)
440 {
441 	struct tty_struct *tty = port->state->port.tty;
442 	if(tty->stopped || tty->hw_stopped)
443 		return 1;
444 	return 0;
445 }
446 
447 /*
448  * The following are helper functions for the low level drivers.
449  */
450 static inline int
451 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
452 {
453 #ifdef SUPPORT_SYSRQ
454 	if (port->sysrq) {
455 		if (ch && time_before(jiffies, port->sysrq)) {
456 			handle_sysrq(ch, port->state->port.tty);
457 			port->sysrq = 0;
458 			return 1;
459 		}
460 		port->sysrq = 0;
461 	}
462 #endif
463 	return 0;
464 }
465 #ifndef SUPPORT_SYSRQ
466 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
467 #endif
468 
469 /*
470  * We do the SysRQ and SAK checking like this...
471  */
472 static inline int uart_handle_break(struct uart_port *port)
473 {
474 	struct uart_state *state = port->state;
475 #ifdef SUPPORT_SYSRQ
476 	if (port->cons && port->cons->index == port->line) {
477 		if (!port->sysrq) {
478 			port->sysrq = jiffies + HZ*5;
479 			return 1;
480 		}
481 		port->sysrq = 0;
482 	}
483 #endif
484 	if (port->flags & UPF_SAK)
485 		do_SAK(state->port.tty);
486 	return 0;
487 }
488 
489 /**
490  *	uart_handle_dcd_change - handle a change of carrier detect state
491  *	@uport: uart_port structure for the open port
492  *	@status: new carrier detect status, nonzero if active
493  */
494 static inline void
495 uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
496 {
497 	struct uart_state *state = uport->state;
498 	struct tty_port *port = &state->port;
499 	struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
500 	struct timespec ts;
501 
502 	if (ld && ld->ops->dcd_change)
503 		getnstimeofday(&ts);
504 
505 	uport->icount.dcd++;
506 #ifdef CONFIG_HARD_PPS
507 	if ((uport->flags & UPF_HARDPPS_CD) && status)
508 		hardpps();
509 #endif
510 
511 	if (port->flags & ASYNC_CHECK_CD) {
512 		if (status)
513 			wake_up_interruptible(&port->open_wait);
514 		else if (port->tty)
515 			tty_hangup(port->tty);
516 	}
517 
518 	if (ld && ld->ops->dcd_change)
519 		ld->ops->dcd_change(port->tty, status, &ts);
520 	if (ld)
521 		tty_ldisc_deref(ld);
522 }
523 
524 /**
525  *	uart_handle_cts_change - handle a change of clear-to-send state
526  *	@uport: uart_port structure for the open port
527  *	@status: new clear to send status, nonzero if active
528  */
529 static inline void
530 uart_handle_cts_change(struct uart_port *uport, unsigned int status)
531 {
532 	struct tty_port *port = &uport->state->port;
533 	struct tty_struct *tty = port->tty;
534 
535 	uport->icount.cts++;
536 
537 	if (port->flags & ASYNC_CTS_FLOW) {
538 		if (tty->hw_stopped) {
539 			if (status) {
540 				tty->hw_stopped = 0;
541 				uport->ops->start_tx(uport);
542 				uart_write_wakeup(uport);
543 			}
544 		} else {
545 			if (!status) {
546 				tty->hw_stopped = 1;
547 				uport->ops->stop_tx(uport);
548 			}
549 		}
550 	}
551 }
552 
553 #include <linux/tty_flip.h>
554 
555 static inline void
556 uart_insert_char(struct uart_port *port, unsigned int status,
557 		 unsigned int overrun, unsigned int ch, unsigned int flag)
558 {
559 	struct tty_struct *tty = port->state->port.tty;
560 
561 	if ((status & port->ignore_status_mask & ~overrun) == 0)
562 		tty_insert_flip_char(tty, ch, flag);
563 
564 	/*
565 	 * Overrun is special.  Since it's reported immediately,
566 	 * it doesn't affect the current character.
567 	 */
568 	if (status & ~port->ignore_status_mask & overrun)
569 		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
570 }
571 
572 /*
573  *	UART_ENABLE_MS - determine if port should enable modem status irqs
574  */
575 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
576 					 (cflag) & CRTSCTS || \
577 					 !((cflag) & CLOCAL))
578 
579 #endif
580 
581 #endif /* LINUX_SERIAL_CORE_H */
582