1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef LINUX_SERIAL_CORE_H 21 #define LINUX_SERIAL_CORE_H 22 23 /* 24 * The type definitions. These are from Ted Ts'o's serial.h 25 */ 26 #define PORT_UNKNOWN 0 27 #define PORT_8250 1 28 #define PORT_16450 2 29 #define PORT_16550 3 30 #define PORT_16550A 4 31 #define PORT_CIRRUS 5 32 #define PORT_16650 6 33 #define PORT_16650V2 7 34 #define PORT_16750 8 35 #define PORT_STARTECH 9 36 #define PORT_16C950 10 37 #define PORT_16654 11 38 #define PORT_16850 12 39 #define PORT_RSA 13 40 #define PORT_NS16550A 14 41 #define PORT_XSCALE 15 42 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 43 #define PORT_MAX_8250 16 /* max port ID */ 44 45 /* 46 * ARM specific type numbers. These are not currently guaranteed 47 * to be implemented, and will change in the future. These are 48 * separate so any additions to the old serial.c that occur before 49 * we are merged can be easily merged here. 50 */ 51 #define PORT_PXA 31 52 #define PORT_AMBA 32 53 #define PORT_CLPS711X 33 54 #define PORT_SA1100 34 55 #define PORT_UART00 35 56 #define PORT_21285 37 57 58 /* Sparc type numbers. */ 59 #define PORT_SUNZILOG 38 60 #define PORT_SUNSAB 39 61 62 /* NEC v850. */ 63 #define PORT_V850E_UART 40 64 65 /* DEC */ 66 #define PORT_DZ 46 67 #define PORT_ZS 47 68 69 /* Parisc type numbers. */ 70 #define PORT_MUX 48 71 72 /* Atmel AT91 / AT32 SoC */ 73 #define PORT_ATMEL 49 74 75 /* Macintosh Zilog type numbers */ 76 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 77 #define PORT_PMAC_ZILOG 51 78 79 /* SH-SCI */ 80 #define PORT_SCI 52 81 #define PORT_SCIF 53 82 #define PORT_IRDA 54 83 84 /* Samsung S3C2410 SoC and derivatives thereof */ 85 #define PORT_S3C2410 55 86 87 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 88 #define PORT_IP22ZILOG 56 89 90 /* Sharp LH7a40x -- an ARM9 SoC series */ 91 #define PORT_LH7A40X 57 92 93 /* PPC CPM type number */ 94 #define PORT_CPM 58 95 96 /* MPC52xx type numbers */ 97 #define PORT_MPC52xx 59 98 99 /* IBM icom */ 100 #define PORT_ICOM 60 101 102 /* Samsung S3C2440 SoC */ 103 #define PORT_S3C2440 61 104 105 /* Motorola i.MX SoC */ 106 #define PORT_IMX 62 107 108 /* Marvell MPSC */ 109 #define PORT_MPSC 63 110 111 /* TXX9 type number */ 112 #define PORT_TXX9 64 113 114 /* NEC VR4100 series SIU/DSIU */ 115 #define PORT_VR41XX_SIU 65 116 #define PORT_VR41XX_DSIU 66 117 118 /* Samsung S3C2400 SoC */ 119 #define PORT_S3C2400 67 120 121 /* M32R SIO */ 122 #define PORT_M32R_SIO 68 123 124 /*Digi jsm */ 125 #define PORT_JSM 69 126 127 #define PORT_PNX8XXX 70 128 129 /* Hilscher netx */ 130 #define PORT_NETX 71 131 132 /* SUN4V Hypervisor Console */ 133 #define PORT_SUNHV 72 134 135 #define PORT_S3C2412 73 136 137 /* Xilinx uartlite */ 138 #define PORT_UARTLITE 74 139 140 /* Blackfin bf5xx */ 141 #define PORT_BFIN 75 142 143 /* Micrel KS8695 */ 144 #define PORT_KS8695 76 145 146 /* Broadcom SB1250, etc. SOC */ 147 #define PORT_SB1250_DUART 77 148 149 /* Freescale ColdFire */ 150 #define PORT_MCF 78 151 152 153 /* MN10300 on-chip UART numbers */ 154 #define PORT_MN10300 80 155 #define PORT_MN10300_CTS 81 156 157 #ifdef __KERNEL__ 158 159 #include <linux/compiler.h> 160 #include <linux/interrupt.h> 161 #include <linux/circ_buf.h> 162 #include <linux/spinlock.h> 163 #include <linux/sched.h> 164 #include <linux/tty.h> 165 #include <linux/mutex.h> 166 #include <linux/sysrq.h> 167 168 struct uart_port; 169 struct uart_info; 170 struct serial_struct; 171 struct device; 172 173 /* 174 * This structure describes all the operations that can be 175 * done on the physical hardware. 176 */ 177 struct uart_ops { 178 unsigned int (*tx_empty)(struct uart_port *); 179 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 180 unsigned int (*get_mctrl)(struct uart_port *); 181 void (*stop_tx)(struct uart_port *); 182 void (*start_tx)(struct uart_port *); 183 void (*send_xchar)(struct uart_port *, char ch); 184 void (*stop_rx)(struct uart_port *); 185 void (*enable_ms)(struct uart_port *); 186 void (*break_ctl)(struct uart_port *, int ctl); 187 int (*startup)(struct uart_port *); 188 void (*shutdown)(struct uart_port *); 189 void (*set_termios)(struct uart_port *, struct ktermios *new, 190 struct ktermios *old); 191 void (*pm)(struct uart_port *, unsigned int state, 192 unsigned int oldstate); 193 int (*set_wake)(struct uart_port *, unsigned int state); 194 195 /* 196 * Return a string describing the type of the port 197 */ 198 const char *(*type)(struct uart_port *); 199 200 /* 201 * Release IO and memory resources used by the port. 202 * This includes iounmap if necessary. 203 */ 204 void (*release_port)(struct uart_port *); 205 206 /* 207 * Request IO and memory resources used by the port. 208 * This includes iomapping the port if necessary. 209 */ 210 int (*request_port)(struct uart_port *); 211 void (*config_port)(struct uart_port *, int); 212 int (*verify_port)(struct uart_port *, struct serial_struct *); 213 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 214 }; 215 216 #define UART_CONFIG_TYPE (1 << 0) 217 #define UART_CONFIG_IRQ (1 << 1) 218 219 struct uart_icount { 220 __u32 cts; 221 __u32 dsr; 222 __u32 rng; 223 __u32 dcd; 224 __u32 rx; 225 __u32 tx; 226 __u32 frame; 227 __u32 overrun; 228 __u32 parity; 229 __u32 brk; 230 __u32 buf_overrun; 231 }; 232 233 typedef unsigned int __bitwise__ upf_t; 234 235 struct uart_port { 236 spinlock_t lock; /* port lock */ 237 unsigned int iobase; /* in/out[bwl] */ 238 unsigned char __iomem *membase; /* read/write[bwl] */ 239 unsigned int irq; /* irq number */ 240 unsigned int uartclk; /* base uart clock */ 241 unsigned int fifosize; /* tx fifo size */ 242 unsigned char x_char; /* xon/xoff char */ 243 unsigned char regshift; /* reg offset shift */ 244 unsigned char iotype; /* io access style */ 245 unsigned char unused1; 246 247 #define UPIO_PORT (0) 248 #define UPIO_HUB6 (1) 249 #define UPIO_MEM (2) 250 #define UPIO_MEM32 (3) 251 #define UPIO_AU (4) /* Au1x00 type IO */ 252 #define UPIO_TSI (5) /* Tsi108/109 type IO */ 253 #define UPIO_DWAPB (6) /* DesignWare APB UART */ 254 #define UPIO_RM9000 (7) /* RM9000 type IO */ 255 256 unsigned int read_status_mask; /* driver specific */ 257 unsigned int ignore_status_mask; /* driver specific */ 258 struct uart_info *info; /* pointer to parent info */ 259 struct uart_icount icount; /* statistics */ 260 261 struct console *cons; /* struct console, if any */ 262 #ifdef CONFIG_SERIAL_CORE_CONSOLE 263 unsigned long sysrq; /* sysrq timeout */ 264 #endif 265 266 upf_t flags; 267 268 #define UPF_FOURPORT ((__force upf_t) (1 << 1)) 269 #define UPF_SAK ((__force upf_t) (1 << 2)) 270 #define UPF_SPD_MASK ((__force upf_t) (0x1030)) 271 #define UPF_SPD_HI ((__force upf_t) (0x0010)) 272 #define UPF_SPD_VHI ((__force upf_t) (0x0020)) 273 #define UPF_SPD_CUST ((__force upf_t) (0x0030)) 274 #define UPF_SPD_SHI ((__force upf_t) (0x1000)) 275 #define UPF_SPD_WARP ((__force upf_t) (0x1010)) 276 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 277 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 278 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 279 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 280 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 281 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 282 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 283 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 284 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 285 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 286 #define UPF_DEAD ((__force upf_t) (1 << 30)) 287 #define UPF_IOREMAP ((__force upf_t) (1 << 31)) 288 289 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 290 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 291 292 unsigned int mctrl; /* current modem ctrl settings */ 293 unsigned int timeout; /* character-based timeout */ 294 unsigned int type; /* port type */ 295 const struct uart_ops *ops; 296 unsigned int custom_divisor; 297 unsigned int line; /* port index */ 298 resource_size_t mapbase; /* for ioremap */ 299 struct device *dev; /* parent device */ 300 unsigned char hub6; /* this should be in the 8250 driver */ 301 unsigned char suspended; 302 unsigned char unused[2]; 303 void *private_data; /* generic platform data pointer */ 304 }; 305 306 /* 307 * This is the state information which is persistent across opens. 308 * The low level driver must not to touch any elements contained 309 * within. 310 */ 311 struct uart_state { 312 unsigned int close_delay; /* msec */ 313 unsigned int closing_wait; /* msec */ 314 315 #define USF_CLOSING_WAIT_INF (0) 316 #define USF_CLOSING_WAIT_NONE (~0U) 317 318 int count; 319 int pm_state; 320 struct uart_info *info; 321 struct uart_port *port; 322 323 struct mutex mutex; 324 }; 325 326 #define UART_XMIT_SIZE PAGE_SIZE 327 328 typedef unsigned int __bitwise__ uif_t; 329 330 /* 331 * This is the state information which is only valid when the port 332 * is open; it may be freed by the core driver once the device has 333 * been closed. Either the low level driver or the core can modify 334 * stuff here. 335 */ 336 struct uart_info { 337 struct tty_struct *tty; 338 struct circ_buf xmit; 339 uif_t flags; 340 341 /* 342 * Definitions for info->flags. These are _private_ to serial_core, and 343 * are specific to this structure. They may be queried by low level drivers. 344 */ 345 #define UIF_CHECK_CD ((__force uif_t) (1 << 25)) 346 #define UIF_CTS_FLOW ((__force uif_t) (1 << 26)) 347 #define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29)) 348 #define UIF_INITIALIZED ((__force uif_t) (1 << 31)) 349 #define UIF_SUSPENDED ((__force uif_t) (1 << 30)) 350 351 int blocked_open; 352 353 struct tasklet_struct tlet; 354 355 wait_queue_head_t open_wait; 356 wait_queue_head_t delta_msr_wait; 357 }; 358 359 /* number of characters left in xmit buffer before we ask for more */ 360 #define WAKEUP_CHARS 256 361 362 struct module; 363 struct tty_driver; 364 365 struct uart_driver { 366 struct module *owner; 367 const char *driver_name; 368 const char *dev_name; 369 int major; 370 int minor; 371 int nr; 372 struct console *cons; 373 374 /* 375 * these are private; the low level driver should not 376 * touch these; they should be initialised to NULL 377 */ 378 struct uart_state *state; 379 struct tty_driver *tty_driver; 380 }; 381 382 void uart_write_wakeup(struct uart_port *port); 383 384 /* 385 * Baud rate helpers. 386 */ 387 void uart_update_timeout(struct uart_port *port, unsigned int cflag, 388 unsigned int baud); 389 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 390 struct ktermios *old, unsigned int min, 391 unsigned int max); 392 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 393 394 /* 395 * Console helpers. 396 */ 397 struct uart_port *uart_get_console(struct uart_port *ports, int nr, 398 struct console *c); 399 void uart_parse_options(char *options, int *baud, int *parity, int *bits, 400 int *flow); 401 int uart_set_options(struct uart_port *port, struct console *co, int baud, 402 int parity, int bits, int flow); 403 struct tty_driver *uart_console_device(struct console *co, int *index); 404 void uart_console_write(struct uart_port *port, const char *s, 405 unsigned int count, 406 void (*putchar)(struct uart_port *, int)); 407 408 /* 409 * Port/driver registration/removal 410 */ 411 int uart_register_driver(struct uart_driver *uart); 412 void uart_unregister_driver(struct uart_driver *uart); 413 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 414 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 415 int uart_match_port(struct uart_port *port1, struct uart_port *port2); 416 417 /* 418 * Power Management 419 */ 420 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 421 int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 422 423 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 424 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 425 426 #define uart_circ_chars_pending(circ) \ 427 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 428 429 #define uart_circ_chars_free(circ) \ 430 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 431 432 #define uart_tx_stopped(port) \ 433 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped) 434 435 /* 436 * The following are helper functions for the low level drivers. 437 */ 438 static inline int 439 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 440 { 441 #ifdef SUPPORT_SYSRQ 442 if (port->sysrq) { 443 if (ch && time_before(jiffies, port->sysrq)) { 444 handle_sysrq(ch, port->info ? port->info->tty : NULL); 445 port->sysrq = 0; 446 return 1; 447 } 448 port->sysrq = 0; 449 } 450 #endif 451 return 0; 452 } 453 #ifndef SUPPORT_SYSRQ 454 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 455 #endif 456 457 /* 458 * We do the SysRQ and SAK checking like this... 459 */ 460 static inline int uart_handle_break(struct uart_port *port) 461 { 462 struct uart_info *info = port->info; 463 #ifdef SUPPORT_SYSRQ 464 if (port->cons && port->cons->index == port->line) { 465 if (!port->sysrq) { 466 port->sysrq = jiffies + HZ*5; 467 return 1; 468 } 469 port->sysrq = 0; 470 } 471 #endif 472 if (port->flags & UPF_SAK) 473 do_SAK(info->tty); 474 return 0; 475 } 476 477 /** 478 * uart_handle_dcd_change - handle a change of carrier detect state 479 * @port: uart_port structure for the open port 480 * @status: new carrier detect status, nonzero if active 481 */ 482 static inline void 483 uart_handle_dcd_change(struct uart_port *port, unsigned int status) 484 { 485 struct uart_info *info = port->info; 486 487 port->icount.dcd++; 488 489 #ifdef CONFIG_HARD_PPS 490 if ((port->flags & UPF_HARDPPS_CD) && status) 491 hardpps(); 492 #endif 493 494 if (info->flags & UIF_CHECK_CD) { 495 if (status) 496 wake_up_interruptible(&info->open_wait); 497 else if (info->tty) 498 tty_hangup(info->tty); 499 } 500 } 501 502 /** 503 * uart_handle_cts_change - handle a change of clear-to-send state 504 * @port: uart_port structure for the open port 505 * @status: new clear to send status, nonzero if active 506 */ 507 static inline void 508 uart_handle_cts_change(struct uart_port *port, unsigned int status) 509 { 510 struct uart_info *info = port->info; 511 struct tty_struct *tty = info->tty; 512 513 port->icount.cts++; 514 515 if (info->flags & UIF_CTS_FLOW) { 516 if (tty->hw_stopped) { 517 if (status) { 518 tty->hw_stopped = 0; 519 port->ops->start_tx(port); 520 uart_write_wakeup(port); 521 } 522 } else { 523 if (!status) { 524 tty->hw_stopped = 1; 525 port->ops->stop_tx(port); 526 } 527 } 528 } 529 } 530 531 #include <linux/tty_flip.h> 532 533 static inline void 534 uart_insert_char(struct uart_port *port, unsigned int status, 535 unsigned int overrun, unsigned int ch, unsigned int flag) 536 { 537 struct tty_struct *tty = port->info->tty; 538 539 if ((status & port->ignore_status_mask & ~overrun) == 0) 540 tty_insert_flip_char(tty, ch, flag); 541 542 /* 543 * Overrun is special. Since it's reported immediately, 544 * it doesn't affect the current character. 545 */ 546 if (status & ~port->ignore_status_mask & overrun) 547 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 548 } 549 550 /* 551 * UART_ENABLE_MS - determine if port should enable modem status irqs 552 */ 553 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 554 (cflag) & CRTSCTS || \ 555 !((cflag) & CLOCAL)) 556 557 #endif 558 559 #endif /* LINUX_SERIAL_CORE_H */ 560