xref: /linux-6.15/include/linux/serial_core.h (revision 43203993)
1 /*
2  *  linux/drivers/char/serial_core.h
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22 
23 /*
24  * The type definitions.  These are from Ted Ts'o's serial.h
25  */
26 #define PORT_UNKNOWN	0
27 #define PORT_8250	1
28 #define PORT_16450	2
29 #define PORT_16550	3
30 #define PORT_16550A	4
31 #define PORT_CIRRUS	5
32 #define PORT_16650	6
33 #define PORT_16650V2	7
34 #define PORT_16750	8
35 #define PORT_STARTECH	9
36 #define PORT_16C950	10
37 #define PORT_16654	11
38 #define PORT_16850	12
39 #define PORT_RSA	13
40 #define PORT_NS16550A	14
41 #define PORT_XSCALE	15
42 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
43 #define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
44 #define PORT_MAX_8250	17	/* max port ID */
45 
46 /*
47  * ARM specific type numbers.  These are not currently guaranteed
48  * to be implemented, and will change in the future.  These are
49  * separate so any additions to the old serial.c that occur before
50  * we are merged can be easily merged here.
51  */
52 #define PORT_PXA	31
53 #define PORT_AMBA	32
54 #define PORT_CLPS711X	33
55 #define PORT_SA1100	34
56 #define PORT_UART00	35
57 #define PORT_21285	37
58 
59 /* Sparc type numbers.  */
60 #define PORT_SUNZILOG	38
61 #define PORT_SUNSAB	39
62 
63 /* DEC */
64 #define PORT_DZ		46
65 #define PORT_ZS		47
66 
67 /* Parisc type numbers. */
68 #define PORT_MUX	48
69 
70 /* Atmel AT91 / AT32 SoC */
71 #define PORT_ATMEL	49
72 
73 /* Macintosh Zilog type numbers */
74 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
75 #define PORT_PMAC_ZILOG	51
76 
77 /* SH-SCI */
78 #define PORT_SCI	52
79 #define PORT_SCIF	53
80 #define PORT_IRDA	54
81 
82 /* Samsung S3C2410 SoC and derivatives thereof */
83 #define PORT_S3C2410    55
84 
85 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
86 #define PORT_IP22ZILOG	56
87 
88 /* Sharp LH7a40x -- an ARM9 SoC series */
89 #define PORT_LH7A40X	57
90 
91 /* PPC CPM type number */
92 #define PORT_CPM        58
93 
94 /* MPC52xx type numbers */
95 #define PORT_MPC52xx	59
96 
97 /* IBM icom */
98 #define PORT_ICOM	60
99 
100 /* Samsung S3C2440 SoC */
101 #define PORT_S3C2440	61
102 
103 /* Motorola i.MX SoC */
104 #define PORT_IMX	62
105 
106 /* Marvell MPSC */
107 #define PORT_MPSC	63
108 
109 /* TXX9 type number */
110 #define PORT_TXX9	64
111 
112 /* NEC VR4100 series SIU/DSIU */
113 #define PORT_VR41XX_SIU		65
114 #define PORT_VR41XX_DSIU	66
115 
116 /* Samsung S3C2400 SoC */
117 #define PORT_S3C2400	67
118 
119 /* M32R SIO */
120 #define PORT_M32R_SIO	68
121 
122 /*Digi jsm */
123 #define PORT_JSM        69
124 
125 #define PORT_PNX8XXX	70
126 
127 /* Hilscher netx */
128 #define PORT_NETX	71
129 
130 /* SUN4V Hypervisor Console */
131 #define PORT_SUNHV	72
132 
133 #define PORT_S3C2412	73
134 
135 /* Xilinx uartlite */
136 #define PORT_UARTLITE	74
137 
138 /* Blackfin bf5xx */
139 #define PORT_BFIN	75
140 
141 /* Micrel KS8695 */
142 #define PORT_KS8695	76
143 
144 /* Broadcom SB1250, etc. SOC */
145 #define PORT_SB1250_DUART	77
146 
147 /* Freescale ColdFire */
148 #define PORT_MCF	78
149 
150 /* Blackfin SPORT */
151 #define PORT_BFIN_SPORT		79
152 
153 /* MN10300 on-chip UART numbers */
154 #define PORT_MN10300		80
155 #define PORT_MN10300_CTS	81
156 
157 #define PORT_SC26XX	82
158 
159 /* SH-SCI */
160 #define PORT_SCIFA	83
161 
162 #define PORT_S3C6400	84
163 
164 /* NWPSERIAL */
165 #define PORT_NWPSERIAL	85
166 
167 /* MAX3100 */
168 #define PORT_MAX3100    86
169 
170 #ifdef __KERNEL__
171 
172 #include <linux/compiler.h>
173 #include <linux/interrupt.h>
174 #include <linux/circ_buf.h>
175 #include <linux/spinlock.h>
176 #include <linux/sched.h>
177 #include <linux/tty.h>
178 #include <linux/mutex.h>
179 #include <linux/sysrq.h>
180 
181 struct uart_port;
182 struct uart_info;
183 struct serial_struct;
184 struct device;
185 
186 /*
187  * This structure describes all the operations that can be
188  * done on the physical hardware.
189  */
190 struct uart_ops {
191 	unsigned int	(*tx_empty)(struct uart_port *);
192 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
193 	unsigned int	(*get_mctrl)(struct uart_port *);
194 	void		(*stop_tx)(struct uart_port *);
195 	void		(*start_tx)(struct uart_port *);
196 	void		(*send_xchar)(struct uart_port *, char ch);
197 	void		(*stop_rx)(struct uart_port *);
198 	void		(*enable_ms)(struct uart_port *);
199 	void		(*break_ctl)(struct uart_port *, int ctl);
200 	int		(*startup)(struct uart_port *);
201 	void		(*shutdown)(struct uart_port *);
202 	void		(*flush_buffer)(struct uart_port *);
203 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
204 				       struct ktermios *old);
205 	void		(*set_ldisc)(struct uart_port *);
206 	void		(*pm)(struct uart_port *, unsigned int state,
207 			      unsigned int oldstate);
208 	int		(*set_wake)(struct uart_port *, unsigned int state);
209 
210 	/*
211 	 * Return a string describing the type of the port
212 	 */
213 	const char *(*type)(struct uart_port *);
214 
215 	/*
216 	 * Release IO and memory resources used by the port.
217 	 * This includes iounmap if necessary.
218 	 */
219 	void		(*release_port)(struct uart_port *);
220 
221 	/*
222 	 * Request IO and memory resources used by the port.
223 	 * This includes iomapping the port if necessary.
224 	 */
225 	int		(*request_port)(struct uart_port *);
226 	void		(*config_port)(struct uart_port *, int);
227 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
228 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
229 #ifdef CONFIG_CONSOLE_POLL
230 	void	(*poll_put_char)(struct uart_port *, unsigned char);
231 	int		(*poll_get_char)(struct uart_port *);
232 #endif
233 };
234 
235 #define UART_CONFIG_TYPE	(1 << 0)
236 #define UART_CONFIG_IRQ		(1 << 1)
237 
238 struct uart_icount {
239 	__u32	cts;
240 	__u32	dsr;
241 	__u32	rng;
242 	__u32	dcd;
243 	__u32	rx;
244 	__u32	tx;
245 	__u32	frame;
246 	__u32	overrun;
247 	__u32	parity;
248 	__u32	brk;
249 	__u32	buf_overrun;
250 };
251 
252 typedef unsigned int __bitwise__ upf_t;
253 
254 struct uart_port {
255 	spinlock_t		lock;			/* port lock */
256 	unsigned long		iobase;			/* in/out[bwl] */
257 	unsigned char __iomem	*membase;		/* read/write[bwl] */
258 	unsigned int		(*serial_in)(struct uart_port *, int);
259 	void			(*serial_out)(struct uart_port *, int, int);
260 	unsigned int		irq;			/* irq number */
261 	unsigned int		uartclk;		/* base uart clock */
262 	unsigned int		fifosize;		/* tx fifo size */
263 	unsigned char		x_char;			/* xon/xoff char */
264 	unsigned char		regshift;		/* reg offset shift */
265 	unsigned char		iotype;			/* io access style */
266 	unsigned char		unused1;
267 
268 #define UPIO_PORT		(0)
269 #define UPIO_HUB6		(1)
270 #define UPIO_MEM		(2)
271 #define UPIO_MEM32		(3)
272 #define UPIO_AU			(4)			/* Au1x00 type IO */
273 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
274 #define UPIO_DWAPB		(6)			/* DesignWare APB UART */
275 #define UPIO_RM9000		(7)			/* RM9000 type IO */
276 
277 	unsigned int		read_status_mask;	/* driver specific */
278 	unsigned int		ignore_status_mask;	/* driver specific */
279 	struct uart_info	*info;			/* pointer to parent info */
280 	struct uart_icount	icount;			/* statistics */
281 
282 	struct console		*cons;			/* struct console, if any */
283 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
284 	unsigned long		sysrq;			/* sysrq timeout */
285 #endif
286 
287 	upf_t			flags;
288 
289 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
290 #define UPF_SAK			((__force upf_t) (1 << 2))
291 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
292 #define UPF_SPD_HI		((__force upf_t) (0x0010))
293 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
294 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
295 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
296 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
297 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
298 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
299 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
300 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
301 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
302 #define UPF_NO_TXEN_TEST	((__force upf_t) (1 << 15))
303 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
304 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
305 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
306 /* The exact UART type is known and should not be probed.  */
307 #define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
308 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
309 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
310 #define UPF_DEAD		((__force upf_t) (1 << 30))
311 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
312 
313 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
314 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
315 
316 	unsigned int		mctrl;			/* current modem ctrl settings */
317 	unsigned int		timeout;		/* character-based timeout */
318 	unsigned int		type;			/* port type */
319 	const struct uart_ops	*ops;
320 	unsigned int		custom_divisor;
321 	unsigned int		line;			/* port index */
322 	resource_size_t		mapbase;		/* for ioremap */
323 	struct device		*dev;			/* parent device */
324 	unsigned char		hub6;			/* this should be in the 8250 driver */
325 	unsigned char		suspended;
326 	unsigned char		unused[2];
327 	void			*private_data;		/* generic platform data pointer */
328 };
329 
330 /*
331  * This is the state information which is only valid when the port
332  * is open; it may be cleared the core driver once the device has
333  * been closed.  Either the low level driver or the core can modify
334  * stuff here.
335  */
336 typedef unsigned int __bitwise__ uif_t;
337 
338 struct uart_info {
339 	struct tty_port		port;
340 	struct circ_buf		xmit;
341 	uif_t			flags;
342 
343 /*
344  * Definitions for info->flags.  These are _private_ to serial_core, and
345  * are specific to this structure.  They may be queried by low level drivers.
346  *
347  * FIXME: use the ASY_ definitions
348  */
349 #define UIF_CHECK_CD		((__force uif_t) (1 << 25))
350 #define UIF_CTS_FLOW		((__force uif_t) (1 << 26))
351 #define UIF_NORMAL_ACTIVE	((__force uif_t) (1 << 29))
352 #define UIF_INITIALIZED		((__force uif_t) (1 << 31))
353 #define UIF_SUSPENDED		((__force uif_t) (1 << 30))
354 
355 	struct tasklet_struct	tlet;
356 	wait_queue_head_t	delta_msr_wait;
357 };
358 
359 /*
360  * This is the state information which is persistent across opens.
361  * The low level driver must not to touch any elements contained
362  * within.
363  */
364 struct uart_state {
365 	unsigned int		close_delay;		/* msec */
366 	unsigned int		closing_wait;		/* msec */
367 
368 #define USF_CLOSING_WAIT_INF	(0)
369 #define USF_CLOSING_WAIT_NONE	(~0U)
370 
371 	int			count;
372 	int			pm_state;
373 	struct uart_info	info;
374 	struct uart_port	*port;
375 
376 	struct mutex		mutex;
377 };
378 
379 #define UART_XMIT_SIZE	PAGE_SIZE
380 
381 
382 /* number of characters left in xmit buffer before we ask for more */
383 #define WAKEUP_CHARS		256
384 
385 struct module;
386 struct tty_driver;
387 
388 struct uart_driver {
389 	struct module		*owner;
390 	const char		*driver_name;
391 	const char		*dev_name;
392 	int			 major;
393 	int			 minor;
394 	int			 nr;
395 	struct console		*cons;
396 
397 	/*
398 	 * these are private; the low level driver should not
399 	 * touch these; they should be initialised to NULL
400 	 */
401 	struct uart_state	*state;
402 	struct tty_driver	*tty_driver;
403 };
404 
405 void uart_write_wakeup(struct uart_port *port);
406 
407 /*
408  * Baud rate helpers.
409  */
410 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
411 			 unsigned int baud);
412 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
413 				struct ktermios *old, unsigned int min,
414 				unsigned int max);
415 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
416 
417 /*
418  * Console helpers.
419  */
420 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
421 				   struct console *c);
422 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
423 			int *flow);
424 int uart_set_options(struct uart_port *port, struct console *co, int baud,
425 		     int parity, int bits, int flow);
426 struct tty_driver *uart_console_device(struct console *co, int *index);
427 void uart_console_write(struct uart_port *port, const char *s,
428 			unsigned int count,
429 			void (*putchar)(struct uart_port *, int));
430 
431 /*
432  * Port/driver registration/removal
433  */
434 int uart_register_driver(struct uart_driver *uart);
435 void uart_unregister_driver(struct uart_driver *uart);
436 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
437 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
438 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
439 
440 /*
441  * Power Management
442  */
443 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
444 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
445 
446 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
447 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
448 
449 #define uart_circ_chars_pending(circ)	\
450 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
451 
452 #define uart_circ_chars_free(circ)	\
453 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
454 
455 static inline int uart_tx_stopped(struct uart_port *port)
456 {
457 	struct tty_struct *tty = port->info->port.tty;
458 	if(tty->stopped || tty->hw_stopped)
459 		return 1;
460 	return 0;
461 }
462 
463 /*
464  * The following are helper functions for the low level drivers.
465  */
466 static inline int
467 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
468 {
469 #ifdef SUPPORT_SYSRQ
470 	if (port->sysrq) {
471 		if (ch && time_before(jiffies, port->sysrq)) {
472 			handle_sysrq(ch, port->info->port.tty);
473 			port->sysrq = 0;
474 			return 1;
475 		}
476 		port->sysrq = 0;
477 	}
478 #endif
479 	return 0;
480 }
481 #ifndef SUPPORT_SYSRQ
482 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
483 #endif
484 
485 /*
486  * We do the SysRQ and SAK checking like this...
487  */
488 static inline int uart_handle_break(struct uart_port *port)
489 {
490 	struct uart_info *info = port->info;
491 #ifdef SUPPORT_SYSRQ
492 	if (port->cons && port->cons->index == port->line) {
493 		if (!port->sysrq) {
494 			port->sysrq = jiffies + HZ*5;
495 			return 1;
496 		}
497 		port->sysrq = 0;
498 	}
499 #endif
500 	if (port->flags & UPF_SAK)
501 		do_SAK(info->port.tty);
502 	return 0;
503 }
504 
505 /**
506  *	uart_handle_dcd_change - handle a change of carrier detect state
507  *	@port: uart_port structure for the open port
508  *	@status: new carrier detect status, nonzero if active
509  */
510 static inline void
511 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
512 {
513 	struct uart_info *info = port->info;
514 
515 	port->icount.dcd++;
516 
517 #ifdef CONFIG_HARD_PPS
518 	if ((port->flags & UPF_HARDPPS_CD) && status)
519 		hardpps();
520 #endif
521 
522 	if (info->flags & UIF_CHECK_CD) {
523 		if (status)
524 			wake_up_interruptible(&info->port.open_wait);
525 		else if (info->port.tty)
526 			tty_hangup(info->port.tty);
527 	}
528 }
529 
530 /**
531  *	uart_handle_cts_change - handle a change of clear-to-send state
532  *	@port: uart_port structure for the open port
533  *	@status: new clear to send status, nonzero if active
534  */
535 static inline void
536 uart_handle_cts_change(struct uart_port *port, unsigned int status)
537 {
538 	struct uart_info *info = port->info;
539 	struct tty_struct *tty = info->port.tty;
540 
541 	port->icount.cts++;
542 
543 	if (info->flags & UIF_CTS_FLOW) {
544 		if (tty->hw_stopped) {
545 			if (status) {
546 				tty->hw_stopped = 0;
547 				port->ops->start_tx(port);
548 				uart_write_wakeup(port);
549 			}
550 		} else {
551 			if (!status) {
552 				tty->hw_stopped = 1;
553 				port->ops->stop_tx(port);
554 			}
555 		}
556 	}
557 }
558 
559 #include <linux/tty_flip.h>
560 
561 static inline void
562 uart_insert_char(struct uart_port *port, unsigned int status,
563 		 unsigned int overrun, unsigned int ch, unsigned int flag)
564 {
565 	struct tty_struct *tty = port->info->port.tty;
566 
567 	if ((status & port->ignore_status_mask & ~overrun) == 0)
568 		tty_insert_flip_char(tty, ch, flag);
569 
570 	/*
571 	 * Overrun is special.  Since it's reported immediately,
572 	 * it doesn't affect the current character.
573 	 */
574 	if (status & ~port->ignore_status_mask & overrun)
575 		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
576 }
577 
578 /*
579  *	UART_ENABLE_MS - determine if port should enable modem status irqs
580  */
581 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
582 					 (cflag) & CRTSCTS || \
583 					 !((cflag) & CLOCAL))
584 
585 #endif
586 
587 #endif /* LINUX_SERIAL_CORE_H */
588