1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef LINUX_SERIAL_CORE_H 21 #define LINUX_SERIAL_CORE_H 22 23 /* 24 * The type definitions. These are from Ted Ts'o's serial.h 25 */ 26 #define PORT_UNKNOWN 0 27 #define PORT_8250 1 28 #define PORT_16450 2 29 #define PORT_16550 3 30 #define PORT_16550A 4 31 #define PORT_CIRRUS 5 32 #define PORT_16650 6 33 #define PORT_16650V2 7 34 #define PORT_16750 8 35 #define PORT_STARTECH 9 36 #define PORT_16C950 10 37 #define PORT_16654 11 38 #define PORT_16850 12 39 #define PORT_RSA 13 40 #define PORT_NS16550A 14 41 #define PORT_XSCALE 15 42 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 43 #define PORT_MAX_8250 16 /* max port ID */ 44 45 /* 46 * ARM specific type numbers. These are not currently guaranteed 47 * to be implemented, and will change in the future. These are 48 * separate so any additions to the old serial.c that occur before 49 * we are merged can be easily merged here. 50 */ 51 #define PORT_PXA 31 52 #define PORT_AMBA 32 53 #define PORT_CLPS711X 33 54 #define PORT_SA1100 34 55 #define PORT_UART00 35 56 #define PORT_21285 37 57 58 /* Sparc type numbers. */ 59 #define PORT_SUNZILOG 38 60 #define PORT_SUNSAB 39 61 62 /* NEC v850. */ 63 #define PORT_V850E_UART 40 64 65 /* DEC */ 66 #define PORT_DZ 46 67 #define PORT_ZS 47 68 69 /* Parisc type numbers. */ 70 #define PORT_MUX 48 71 72 /* Atmel AT91 / AT32 SoC */ 73 #define PORT_ATMEL 49 74 75 /* Macintosh Zilog type numbers */ 76 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 77 #define PORT_PMAC_ZILOG 51 78 79 /* SH-SCI */ 80 #define PORT_SCI 52 81 #define PORT_SCIF 53 82 #define PORT_IRDA 54 83 84 /* Samsung S3C2410 SoC and derivatives thereof */ 85 #define PORT_S3C2410 55 86 87 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 88 #define PORT_IP22ZILOG 56 89 90 /* Sharp LH7a40x -- an ARM9 SoC series */ 91 #define PORT_LH7A40X 57 92 93 /* PPC CPM type number */ 94 #define PORT_CPM 58 95 96 /* MPC52xx type numbers */ 97 #define PORT_MPC52xx 59 98 99 /* IBM icom */ 100 #define PORT_ICOM 60 101 102 /* Samsung S3C2440 SoC */ 103 #define PORT_S3C2440 61 104 105 /* Motorola i.MX SoC */ 106 #define PORT_IMX 62 107 108 /* Marvell MPSC */ 109 #define PORT_MPSC 63 110 111 /* TXX9 type number */ 112 #define PORT_TXX9 64 113 114 /* NEC VR4100 series SIU/DSIU */ 115 #define PORT_VR41XX_SIU 65 116 #define PORT_VR41XX_DSIU 66 117 118 /* Samsung S3C2400 SoC */ 119 #define PORT_S3C2400 67 120 121 /* M32R SIO */ 122 #define PORT_M32R_SIO 68 123 124 /*Digi jsm */ 125 #define PORT_JSM 69 126 127 #define PORT_PNX8XXX 70 128 129 /* Hilscher netx */ 130 #define PORT_NETX 71 131 132 /* SUN4V Hypervisor Console */ 133 #define PORT_SUNHV 72 134 135 #define PORT_S3C2412 73 136 137 /* Xilinx uartlite */ 138 #define PORT_UARTLITE 74 139 140 /* Blackfin bf5xx */ 141 #define PORT_BFIN 75 142 143 /* Micrel KS8695 */ 144 #define PORT_KS8695 76 145 146 /* Broadcom SB1250, etc. SOC */ 147 #define PORT_SB1250_DUART 77 148 149 150 #ifdef __KERNEL__ 151 152 #include <linux/compiler.h> 153 #include <linux/interrupt.h> 154 #include <linux/circ_buf.h> 155 #include <linux/spinlock.h> 156 #include <linux/sched.h> 157 #include <linux/tty.h> 158 #include <linux/mutex.h> 159 #include <linux/sysrq.h> 160 161 struct uart_port; 162 struct uart_info; 163 struct serial_struct; 164 struct device; 165 166 /* 167 * This structure describes all the operations that can be 168 * done on the physical hardware. 169 */ 170 struct uart_ops { 171 unsigned int (*tx_empty)(struct uart_port *); 172 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 173 unsigned int (*get_mctrl)(struct uart_port *); 174 void (*stop_tx)(struct uart_port *); 175 void (*start_tx)(struct uart_port *); 176 void (*send_xchar)(struct uart_port *, char ch); 177 void (*stop_rx)(struct uart_port *); 178 void (*enable_ms)(struct uart_port *); 179 void (*break_ctl)(struct uart_port *, int ctl); 180 int (*startup)(struct uart_port *); 181 void (*shutdown)(struct uart_port *); 182 void (*set_termios)(struct uart_port *, struct ktermios *new, 183 struct ktermios *old); 184 void (*pm)(struct uart_port *, unsigned int state, 185 unsigned int oldstate); 186 int (*set_wake)(struct uart_port *, unsigned int state); 187 188 /* 189 * Return a string describing the type of the port 190 */ 191 const char *(*type)(struct uart_port *); 192 193 /* 194 * Release IO and memory resources used by the port. 195 * This includes iounmap if necessary. 196 */ 197 void (*release_port)(struct uart_port *); 198 199 /* 200 * Request IO and memory resources used by the port. 201 * This includes iomapping the port if necessary. 202 */ 203 int (*request_port)(struct uart_port *); 204 void (*config_port)(struct uart_port *, int); 205 int (*verify_port)(struct uart_port *, struct serial_struct *); 206 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 207 }; 208 209 #define UART_CONFIG_TYPE (1 << 0) 210 #define UART_CONFIG_IRQ (1 << 1) 211 212 struct uart_icount { 213 __u32 cts; 214 __u32 dsr; 215 __u32 rng; 216 __u32 dcd; 217 __u32 rx; 218 __u32 tx; 219 __u32 frame; 220 __u32 overrun; 221 __u32 parity; 222 __u32 brk; 223 __u32 buf_overrun; 224 }; 225 226 typedef unsigned int __bitwise__ upf_t; 227 228 struct uart_port { 229 spinlock_t lock; /* port lock */ 230 unsigned int iobase; /* in/out[bwl] */ 231 unsigned char __iomem *membase; /* read/write[bwl] */ 232 unsigned int irq; /* irq number */ 233 unsigned int uartclk; /* base uart clock */ 234 unsigned int fifosize; /* tx fifo size */ 235 unsigned char x_char; /* xon/xoff char */ 236 unsigned char regshift; /* reg offset shift */ 237 unsigned char iotype; /* io access style */ 238 unsigned char unused1; 239 240 #define UPIO_PORT (0) 241 #define UPIO_HUB6 (1) 242 #define UPIO_MEM (2) 243 #define UPIO_MEM32 (3) 244 #define UPIO_AU (4) /* Au1x00 type IO */ 245 #define UPIO_TSI (5) /* Tsi108/109 type IO */ 246 #define UPIO_DWAPB (6) /* DesignWare APB UART */ 247 #define UPIO_RM9000 (7) /* RM9000 type IO */ 248 249 unsigned int read_status_mask; /* driver specific */ 250 unsigned int ignore_status_mask; /* driver specific */ 251 struct uart_info *info; /* pointer to parent info */ 252 struct uart_icount icount; /* statistics */ 253 254 struct console *cons; /* struct console, if any */ 255 #ifdef CONFIG_SERIAL_CORE_CONSOLE 256 unsigned long sysrq; /* sysrq timeout */ 257 #endif 258 259 upf_t flags; 260 261 #define UPF_FOURPORT ((__force upf_t) (1 << 1)) 262 #define UPF_SAK ((__force upf_t) (1 << 2)) 263 #define UPF_SPD_MASK ((__force upf_t) (0x1030)) 264 #define UPF_SPD_HI ((__force upf_t) (0x0010)) 265 #define UPF_SPD_VHI ((__force upf_t) (0x0020)) 266 #define UPF_SPD_CUST ((__force upf_t) (0x0030)) 267 #define UPF_SPD_SHI ((__force upf_t) (0x1000)) 268 #define UPF_SPD_WARP ((__force upf_t) (0x1010)) 269 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 270 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 271 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 272 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 273 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 274 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 275 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 276 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 277 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 278 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 279 #define UPF_DEAD ((__force upf_t) (1 << 30)) 280 #define UPF_IOREMAP ((__force upf_t) (1 << 31)) 281 282 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 283 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 284 285 unsigned int mctrl; /* current modem ctrl settings */ 286 unsigned int timeout; /* character-based timeout */ 287 unsigned int type; /* port type */ 288 const struct uart_ops *ops; 289 unsigned int custom_divisor; 290 unsigned int line; /* port index */ 291 resource_size_t mapbase; /* for ioremap */ 292 struct device *dev; /* parent device */ 293 unsigned char hub6; /* this should be in the 8250 driver */ 294 unsigned char suspended; 295 unsigned char unused[2]; 296 void *private_data; /* generic platform data pointer */ 297 }; 298 299 /* 300 * This is the state information which is persistent across opens. 301 * The low level driver must not to touch any elements contained 302 * within. 303 */ 304 struct uart_state { 305 unsigned int close_delay; /* msec */ 306 unsigned int closing_wait; /* msec */ 307 308 #define USF_CLOSING_WAIT_INF (0) 309 #define USF_CLOSING_WAIT_NONE (~0U) 310 311 int count; 312 int pm_state; 313 struct uart_info *info; 314 struct uart_port *port; 315 316 struct mutex mutex; 317 }; 318 319 #define UART_XMIT_SIZE PAGE_SIZE 320 321 typedef unsigned int __bitwise__ uif_t; 322 323 /* 324 * This is the state information which is only valid when the port 325 * is open; it may be freed by the core driver once the device has 326 * been closed. Either the low level driver or the core can modify 327 * stuff here. 328 */ 329 struct uart_info { 330 struct tty_struct *tty; 331 struct circ_buf xmit; 332 uif_t flags; 333 334 /* 335 * Definitions for info->flags. These are _private_ to serial_core, and 336 * are specific to this structure. They may be queried by low level drivers. 337 */ 338 #define UIF_CHECK_CD ((__force uif_t) (1 << 25)) 339 #define UIF_CTS_FLOW ((__force uif_t) (1 << 26)) 340 #define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29)) 341 #define UIF_INITIALIZED ((__force uif_t) (1 << 31)) 342 #define UIF_SUSPENDED ((__force uif_t) (1 << 30)) 343 344 int blocked_open; 345 346 struct tasklet_struct tlet; 347 348 wait_queue_head_t open_wait; 349 wait_queue_head_t delta_msr_wait; 350 }; 351 352 /* number of characters left in xmit buffer before we ask for more */ 353 #define WAKEUP_CHARS 256 354 355 struct module; 356 struct tty_driver; 357 358 struct uart_driver { 359 struct module *owner; 360 const char *driver_name; 361 const char *dev_name; 362 int major; 363 int minor; 364 int nr; 365 struct console *cons; 366 367 /* 368 * these are private; the low level driver should not 369 * touch these; they should be initialised to NULL 370 */ 371 struct uart_state *state; 372 struct tty_driver *tty_driver; 373 }; 374 375 void uart_write_wakeup(struct uart_port *port); 376 377 /* 378 * Baud rate helpers. 379 */ 380 void uart_update_timeout(struct uart_port *port, unsigned int cflag, 381 unsigned int baud); 382 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 383 struct ktermios *old, unsigned int min, 384 unsigned int max); 385 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 386 387 /* 388 * Console helpers. 389 */ 390 struct uart_port *uart_get_console(struct uart_port *ports, int nr, 391 struct console *c); 392 void uart_parse_options(char *options, int *baud, int *parity, int *bits, 393 int *flow); 394 int uart_set_options(struct uart_port *port, struct console *co, int baud, 395 int parity, int bits, int flow); 396 struct tty_driver *uart_console_device(struct console *co, int *index); 397 void uart_console_write(struct uart_port *port, const char *s, 398 unsigned int count, 399 void (*putchar)(struct uart_port *, int)); 400 401 /* 402 * Port/driver registration/removal 403 */ 404 int uart_register_driver(struct uart_driver *uart); 405 void uart_unregister_driver(struct uart_driver *uart); 406 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 407 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 408 int uart_match_port(struct uart_port *port1, struct uart_port *port2); 409 410 /* 411 * Power Management 412 */ 413 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 414 int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 415 416 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 417 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 418 419 #define uart_circ_chars_pending(circ) \ 420 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 421 422 #define uart_circ_chars_free(circ) \ 423 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 424 425 #define uart_tx_stopped(port) \ 426 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped) 427 428 /* 429 * The following are helper functions for the low level drivers. 430 */ 431 static inline int 432 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 433 { 434 #ifdef SUPPORT_SYSRQ 435 if (port->sysrq) { 436 if (ch && time_before(jiffies, port->sysrq)) { 437 handle_sysrq(ch, port->info->tty); 438 port->sysrq = 0; 439 return 1; 440 } 441 port->sysrq = 0; 442 } 443 #endif 444 return 0; 445 } 446 #ifndef SUPPORT_SYSRQ 447 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 448 #endif 449 450 /* 451 * We do the SysRQ and SAK checking like this... 452 */ 453 static inline int uart_handle_break(struct uart_port *port) 454 { 455 struct uart_info *info = port->info; 456 #ifdef SUPPORT_SYSRQ 457 if (port->cons && port->cons->index == port->line) { 458 if (!port->sysrq) { 459 port->sysrq = jiffies + HZ*5; 460 return 1; 461 } 462 port->sysrq = 0; 463 } 464 #endif 465 if (port->flags & UPF_SAK) 466 do_SAK(info->tty); 467 return 0; 468 } 469 470 /** 471 * uart_handle_dcd_change - handle a change of carrier detect state 472 * @port: uart_port structure for the open port 473 * @status: new carrier detect status, nonzero if active 474 */ 475 static inline void 476 uart_handle_dcd_change(struct uart_port *port, unsigned int status) 477 { 478 struct uart_info *info = port->info; 479 480 port->icount.dcd++; 481 482 #ifdef CONFIG_HARD_PPS 483 if ((port->flags & UPF_HARDPPS_CD) && status) 484 hardpps(); 485 #endif 486 487 if (info->flags & UIF_CHECK_CD) { 488 if (status) 489 wake_up_interruptible(&info->open_wait); 490 else if (info->tty) 491 tty_hangup(info->tty); 492 } 493 } 494 495 /** 496 * uart_handle_cts_change - handle a change of clear-to-send state 497 * @port: uart_port structure for the open port 498 * @status: new clear to send status, nonzero if active 499 */ 500 static inline void 501 uart_handle_cts_change(struct uart_port *port, unsigned int status) 502 { 503 struct uart_info *info = port->info; 504 struct tty_struct *tty = info->tty; 505 506 port->icount.cts++; 507 508 if (info->flags & UIF_CTS_FLOW) { 509 if (tty->hw_stopped) { 510 if (status) { 511 tty->hw_stopped = 0; 512 port->ops->start_tx(port); 513 uart_write_wakeup(port); 514 } 515 } else { 516 if (!status) { 517 tty->hw_stopped = 1; 518 port->ops->stop_tx(port); 519 } 520 } 521 } 522 } 523 524 #include <linux/tty_flip.h> 525 526 static inline void 527 uart_insert_char(struct uart_port *port, unsigned int status, 528 unsigned int overrun, unsigned int ch, unsigned int flag) 529 { 530 struct tty_struct *tty = port->info->tty; 531 532 if ((status & port->ignore_status_mask & ~overrun) == 0) 533 tty_insert_flip_char(tty, ch, flag); 534 535 /* 536 * Overrun is special. Since it's reported immediately, 537 * it doesn't affect the current character. 538 */ 539 if (status & ~port->ignore_status_mask & overrun) 540 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 541 } 542 543 /* 544 * UART_ENABLE_MS - determine if port should enable modem status irqs 545 */ 546 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 547 (cflag) & CRTSCTS || \ 548 !((cflag) & CLOCAL)) 549 550 #endif 551 552 #endif /* LINUX_SERIAL_CORE_H */ 553