1 /* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 #ifndef LINUX_SERIAL_CORE_H 21 #define LINUX_SERIAL_CORE_H 22 23 /* 24 * The type definitions. These are from Ted Ts'o's serial.h 25 */ 26 #define PORT_UNKNOWN 0 27 #define PORT_8250 1 28 #define PORT_16450 2 29 #define PORT_16550 3 30 #define PORT_16550A 4 31 #define PORT_CIRRUS 5 32 #define PORT_16650 6 33 #define PORT_16650V2 7 34 #define PORT_16750 8 35 #define PORT_STARTECH 9 36 #define PORT_16C950 10 37 #define PORT_16654 11 38 #define PORT_16850 12 39 #define PORT_RSA 13 40 #define PORT_NS16550A 14 41 #define PORT_XSCALE 15 42 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 43 #define PORT_MAX_8250 16 /* max port ID */ 44 45 /* 46 * ARM specific type numbers. These are not currently guaranteed 47 * to be implemented, and will change in the future. These are 48 * separate so any additions to the old serial.c that occur before 49 * we are merged can be easily merged here. 50 */ 51 #define PORT_PXA 31 52 #define PORT_AMBA 32 53 #define PORT_CLPS711X 33 54 #define PORT_SA1100 34 55 #define PORT_UART00 35 56 #define PORT_21285 37 57 58 /* Sparc type numbers. */ 59 #define PORT_SUNZILOG 38 60 #define PORT_SUNSAB 39 61 62 /* NEC v850. */ 63 #define PORT_V850E_UART 40 64 65 /* DEC */ 66 #define PORT_DZ 46 67 #define PORT_ZS 47 68 69 /* Parisc type numbers. */ 70 #define PORT_MUX 48 71 72 /* Atmel AT91 / AT32 SoC */ 73 #define PORT_ATMEL 49 74 75 /* Macintosh Zilog type numbers */ 76 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 77 #define PORT_PMAC_ZILOG 51 78 79 /* SH-SCI */ 80 #define PORT_SCI 52 81 #define PORT_SCIF 53 82 #define PORT_IRDA 54 83 84 /* Samsung S3C2410 SoC and derivatives thereof */ 85 #define PORT_S3C2410 55 86 87 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 88 #define PORT_IP22ZILOG 56 89 90 /* Sharp LH7a40x -- an ARM9 SoC series */ 91 #define PORT_LH7A40X 57 92 93 /* PPC CPM type number */ 94 #define PORT_CPM 58 95 96 /* MPC52xx type numbers */ 97 #define PORT_MPC52xx 59 98 99 /* IBM icom */ 100 #define PORT_ICOM 60 101 102 /* Samsung S3C2440 SoC */ 103 #define PORT_S3C2440 61 104 105 /* Motorola i.MX SoC */ 106 #define PORT_IMX 62 107 108 /* Marvell MPSC */ 109 #define PORT_MPSC 63 110 111 /* TXX9 type number */ 112 #define PORT_TXX9 64 113 114 /* NEC VR4100 series SIU/DSIU */ 115 #define PORT_VR41XX_SIU 65 116 #define PORT_VR41XX_DSIU 66 117 118 /* Samsung S3C2400 SoC */ 119 #define PORT_S3C2400 67 120 121 /* M32R SIO */ 122 #define PORT_M32R_SIO 68 123 124 /*Digi jsm */ 125 #define PORT_JSM 69 126 127 #define PORT_PNX8XXX 70 128 129 /* Hilscher netx */ 130 #define PORT_NETX 71 131 132 /* SUN4V Hypervisor Console */ 133 #define PORT_SUNHV 72 134 135 #define PORT_S3C2412 73 136 137 /* Xilinx uartlite */ 138 #define PORT_UARTLITE 74 139 140 /* Blackfin bf5xx */ 141 #define PORT_BFIN 75 142 143 /* Micrel KS8695 */ 144 #define PORT_KS8695 76 145 146 /* Broadcom SB1250, etc. SOC */ 147 #define PORT_SB1250_DUART 77 148 149 /* Freescale ColdFire */ 150 #define PORT_MCF 78 151 152 153 #ifdef __KERNEL__ 154 155 #include <linux/compiler.h> 156 #include <linux/interrupt.h> 157 #include <linux/circ_buf.h> 158 #include <linux/spinlock.h> 159 #include <linux/sched.h> 160 #include <linux/tty.h> 161 #include <linux/mutex.h> 162 #include <linux/sysrq.h> 163 164 struct uart_port; 165 struct uart_info; 166 struct serial_struct; 167 struct device; 168 169 /* 170 * This structure describes all the operations that can be 171 * done on the physical hardware. 172 */ 173 struct uart_ops { 174 unsigned int (*tx_empty)(struct uart_port *); 175 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 176 unsigned int (*get_mctrl)(struct uart_port *); 177 void (*stop_tx)(struct uart_port *); 178 void (*start_tx)(struct uart_port *); 179 void (*send_xchar)(struct uart_port *, char ch); 180 void (*stop_rx)(struct uart_port *); 181 void (*enable_ms)(struct uart_port *); 182 void (*break_ctl)(struct uart_port *, int ctl); 183 int (*startup)(struct uart_port *); 184 void (*shutdown)(struct uart_port *); 185 void (*set_termios)(struct uart_port *, struct ktermios *new, 186 struct ktermios *old); 187 void (*pm)(struct uart_port *, unsigned int state, 188 unsigned int oldstate); 189 int (*set_wake)(struct uart_port *, unsigned int state); 190 191 /* 192 * Return a string describing the type of the port 193 */ 194 const char *(*type)(struct uart_port *); 195 196 /* 197 * Release IO and memory resources used by the port. 198 * This includes iounmap if necessary. 199 */ 200 void (*release_port)(struct uart_port *); 201 202 /* 203 * Request IO and memory resources used by the port. 204 * This includes iomapping the port if necessary. 205 */ 206 int (*request_port)(struct uart_port *); 207 void (*config_port)(struct uart_port *, int); 208 int (*verify_port)(struct uart_port *, struct serial_struct *); 209 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 210 }; 211 212 #define UART_CONFIG_TYPE (1 << 0) 213 #define UART_CONFIG_IRQ (1 << 1) 214 215 struct uart_icount { 216 __u32 cts; 217 __u32 dsr; 218 __u32 rng; 219 __u32 dcd; 220 __u32 rx; 221 __u32 tx; 222 __u32 frame; 223 __u32 overrun; 224 __u32 parity; 225 __u32 brk; 226 __u32 buf_overrun; 227 }; 228 229 typedef unsigned int __bitwise__ upf_t; 230 231 struct uart_port { 232 spinlock_t lock; /* port lock */ 233 unsigned int iobase; /* in/out[bwl] */ 234 unsigned char __iomem *membase; /* read/write[bwl] */ 235 unsigned int irq; /* irq number */ 236 unsigned int uartclk; /* base uart clock */ 237 unsigned int fifosize; /* tx fifo size */ 238 unsigned char x_char; /* xon/xoff char */ 239 unsigned char regshift; /* reg offset shift */ 240 unsigned char iotype; /* io access style */ 241 unsigned char unused1; 242 243 #define UPIO_PORT (0) 244 #define UPIO_HUB6 (1) 245 #define UPIO_MEM (2) 246 #define UPIO_MEM32 (3) 247 #define UPIO_AU (4) /* Au1x00 type IO */ 248 #define UPIO_TSI (5) /* Tsi108/109 type IO */ 249 #define UPIO_DWAPB (6) /* DesignWare APB UART */ 250 #define UPIO_RM9000 (7) /* RM9000 type IO */ 251 252 unsigned int read_status_mask; /* driver specific */ 253 unsigned int ignore_status_mask; /* driver specific */ 254 struct uart_info *info; /* pointer to parent info */ 255 struct uart_icount icount; /* statistics */ 256 257 struct console *cons; /* struct console, if any */ 258 #ifdef CONFIG_SERIAL_CORE_CONSOLE 259 unsigned long sysrq; /* sysrq timeout */ 260 #endif 261 262 upf_t flags; 263 264 #define UPF_FOURPORT ((__force upf_t) (1 << 1)) 265 #define UPF_SAK ((__force upf_t) (1 << 2)) 266 #define UPF_SPD_MASK ((__force upf_t) (0x1030)) 267 #define UPF_SPD_HI ((__force upf_t) (0x0010)) 268 #define UPF_SPD_VHI ((__force upf_t) (0x0020)) 269 #define UPF_SPD_CUST ((__force upf_t) (0x0030)) 270 #define UPF_SPD_SHI ((__force upf_t) (0x1000)) 271 #define UPF_SPD_WARP ((__force upf_t) (0x1010)) 272 #define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 273 #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 274 #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 275 #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 276 #define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 277 #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 278 #define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 279 #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 280 #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 281 #define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 282 #define UPF_DEAD ((__force upf_t) (1 << 30)) 283 #define UPF_IOREMAP ((__force upf_t) (1 << 31)) 284 285 #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 286 #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 287 288 unsigned int mctrl; /* current modem ctrl settings */ 289 unsigned int timeout; /* character-based timeout */ 290 unsigned int type; /* port type */ 291 const struct uart_ops *ops; 292 unsigned int custom_divisor; 293 unsigned int line; /* port index */ 294 resource_size_t mapbase; /* for ioremap */ 295 struct device *dev; /* parent device */ 296 unsigned char hub6; /* this should be in the 8250 driver */ 297 unsigned char suspended; 298 unsigned char unused[2]; 299 void *private_data; /* generic platform data pointer */ 300 }; 301 302 /* 303 * This is the state information which is persistent across opens. 304 * The low level driver must not to touch any elements contained 305 * within. 306 */ 307 struct uart_state { 308 unsigned int close_delay; /* msec */ 309 unsigned int closing_wait; /* msec */ 310 311 #define USF_CLOSING_WAIT_INF (0) 312 #define USF_CLOSING_WAIT_NONE (~0U) 313 314 int count; 315 int pm_state; 316 struct uart_info *info; 317 struct uart_port *port; 318 319 struct mutex mutex; 320 }; 321 322 #define UART_XMIT_SIZE PAGE_SIZE 323 324 typedef unsigned int __bitwise__ uif_t; 325 326 /* 327 * This is the state information which is only valid when the port 328 * is open; it may be freed by the core driver once the device has 329 * been closed. Either the low level driver or the core can modify 330 * stuff here. 331 */ 332 struct uart_info { 333 struct tty_struct *tty; 334 struct circ_buf xmit; 335 uif_t flags; 336 337 /* 338 * Definitions for info->flags. These are _private_ to serial_core, and 339 * are specific to this structure. They may be queried by low level drivers. 340 */ 341 #define UIF_CHECK_CD ((__force uif_t) (1 << 25)) 342 #define UIF_CTS_FLOW ((__force uif_t) (1 << 26)) 343 #define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29)) 344 #define UIF_INITIALIZED ((__force uif_t) (1 << 31)) 345 #define UIF_SUSPENDED ((__force uif_t) (1 << 30)) 346 347 int blocked_open; 348 349 struct tasklet_struct tlet; 350 351 wait_queue_head_t open_wait; 352 wait_queue_head_t delta_msr_wait; 353 }; 354 355 /* number of characters left in xmit buffer before we ask for more */ 356 #define WAKEUP_CHARS 256 357 358 struct module; 359 struct tty_driver; 360 361 struct uart_driver { 362 struct module *owner; 363 const char *driver_name; 364 const char *dev_name; 365 int major; 366 int minor; 367 int nr; 368 struct console *cons; 369 370 /* 371 * these are private; the low level driver should not 372 * touch these; they should be initialised to NULL 373 */ 374 struct uart_state *state; 375 struct tty_driver *tty_driver; 376 }; 377 378 void uart_write_wakeup(struct uart_port *port); 379 380 /* 381 * Baud rate helpers. 382 */ 383 void uart_update_timeout(struct uart_port *port, unsigned int cflag, 384 unsigned int baud); 385 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 386 struct ktermios *old, unsigned int min, 387 unsigned int max); 388 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 389 390 /* 391 * Console helpers. 392 */ 393 struct uart_port *uart_get_console(struct uart_port *ports, int nr, 394 struct console *c); 395 void uart_parse_options(char *options, int *baud, int *parity, int *bits, 396 int *flow); 397 int uart_set_options(struct uart_port *port, struct console *co, int baud, 398 int parity, int bits, int flow); 399 struct tty_driver *uart_console_device(struct console *co, int *index); 400 void uart_console_write(struct uart_port *port, const char *s, 401 unsigned int count, 402 void (*putchar)(struct uart_port *, int)); 403 404 /* 405 * Port/driver registration/removal 406 */ 407 int uart_register_driver(struct uart_driver *uart); 408 void uart_unregister_driver(struct uart_driver *uart); 409 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 410 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 411 int uart_match_port(struct uart_port *port1, struct uart_port *port2); 412 413 /* 414 * Power Management 415 */ 416 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 417 int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 418 419 #define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 420 #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 421 422 #define uart_circ_chars_pending(circ) \ 423 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 424 425 #define uart_circ_chars_free(circ) \ 426 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 427 428 #define uart_tx_stopped(port) \ 429 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped) 430 431 /* 432 * The following are helper functions for the low level drivers. 433 */ 434 static inline int 435 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 436 { 437 #ifdef SUPPORT_SYSRQ 438 if (port->sysrq) { 439 if (ch && time_before(jiffies, port->sysrq)) { 440 handle_sysrq(ch, port->info ? port->info->tty : NULL); 441 port->sysrq = 0; 442 return 1; 443 } 444 port->sysrq = 0; 445 } 446 #endif 447 return 0; 448 } 449 #ifndef SUPPORT_SYSRQ 450 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 451 #endif 452 453 /* 454 * We do the SysRQ and SAK checking like this... 455 */ 456 static inline int uart_handle_break(struct uart_port *port) 457 { 458 struct uart_info *info = port->info; 459 #ifdef SUPPORT_SYSRQ 460 if (port->cons && port->cons->index == port->line) { 461 if (!port->sysrq) { 462 port->sysrq = jiffies + HZ*5; 463 return 1; 464 } 465 port->sysrq = 0; 466 } 467 #endif 468 if (port->flags & UPF_SAK) 469 do_SAK(info->tty); 470 return 0; 471 } 472 473 /** 474 * uart_handle_dcd_change - handle a change of carrier detect state 475 * @port: uart_port structure for the open port 476 * @status: new carrier detect status, nonzero if active 477 */ 478 static inline void 479 uart_handle_dcd_change(struct uart_port *port, unsigned int status) 480 { 481 struct uart_info *info = port->info; 482 483 port->icount.dcd++; 484 485 #ifdef CONFIG_HARD_PPS 486 if ((port->flags & UPF_HARDPPS_CD) && status) 487 hardpps(); 488 #endif 489 490 if (info->flags & UIF_CHECK_CD) { 491 if (status) 492 wake_up_interruptible(&info->open_wait); 493 else if (info->tty) 494 tty_hangup(info->tty); 495 } 496 } 497 498 /** 499 * uart_handle_cts_change - handle a change of clear-to-send state 500 * @port: uart_port structure for the open port 501 * @status: new clear to send status, nonzero if active 502 */ 503 static inline void 504 uart_handle_cts_change(struct uart_port *port, unsigned int status) 505 { 506 struct uart_info *info = port->info; 507 struct tty_struct *tty = info->tty; 508 509 port->icount.cts++; 510 511 if (info->flags & UIF_CTS_FLOW) { 512 if (tty->hw_stopped) { 513 if (status) { 514 tty->hw_stopped = 0; 515 port->ops->start_tx(port); 516 uart_write_wakeup(port); 517 } 518 } else { 519 if (!status) { 520 tty->hw_stopped = 1; 521 port->ops->stop_tx(port); 522 } 523 } 524 } 525 } 526 527 #include <linux/tty_flip.h> 528 529 static inline void 530 uart_insert_char(struct uart_port *port, unsigned int status, 531 unsigned int overrun, unsigned int ch, unsigned int flag) 532 { 533 struct tty_struct *tty = port->info->tty; 534 535 if ((status & port->ignore_status_mask & ~overrun) == 0) 536 tty_insert_flip_char(tty, ch, flag); 537 538 /* 539 * Overrun is special. Since it's reported immediately, 540 * it doesn't affect the current character. 541 */ 542 if (status & ~port->ignore_status_mask & overrun) 543 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 544 } 545 546 /* 547 * UART_ENABLE_MS - determine if port should enable modem status irqs 548 */ 549 #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 550 (cflag) & CRTSCTS || \ 551 !((cflag) & CLOCAL)) 552 553 #endif 554 555 #endif /* LINUX_SERIAL_CORE_H */ 556