xref: /linux-6.15/include/linux/serial_core.h (revision 2e4c77be)
1 /*
2  *  linux/drivers/char/serial_core.h
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #ifndef LINUX_SERIAL_CORE_H
21 #define LINUX_SERIAL_CORE_H
22 
23 /*
24  * The type definitions.  These are from Ted Ts'o's serial.h
25  */
26 #define PORT_UNKNOWN	0
27 #define PORT_8250	1
28 #define PORT_16450	2
29 #define PORT_16550	3
30 #define PORT_16550A	4
31 #define PORT_CIRRUS	5
32 #define PORT_16650	6
33 #define PORT_16650V2	7
34 #define PORT_16750	8
35 #define PORT_STARTECH	9
36 #define PORT_16C950	10
37 #define PORT_16654	11
38 #define PORT_16850	12
39 #define PORT_RSA	13
40 #define PORT_NS16550A	14
41 #define PORT_XSCALE	15
42 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
43 #define PORT_OCTEON	17	/* Cavium OCTEON internal UART */
44 #define PORT_MAX_8250	17	/* max port ID */
45 
46 /*
47  * ARM specific type numbers.  These are not currently guaranteed
48  * to be implemented, and will change in the future.  These are
49  * separate so any additions to the old serial.c that occur before
50  * we are merged can be easily merged here.
51  */
52 #define PORT_PXA	31
53 #define PORT_AMBA	32
54 #define PORT_CLPS711X	33
55 #define PORT_SA1100	34
56 #define PORT_UART00	35
57 #define PORT_21285	37
58 
59 /* Sparc type numbers.  */
60 #define PORT_SUNZILOG	38
61 #define PORT_SUNSAB	39
62 
63 /* DEC */
64 #define PORT_DZ		46
65 #define PORT_ZS		47
66 
67 /* Parisc type numbers. */
68 #define PORT_MUX	48
69 
70 /* Atmel AT91 / AT32 SoC */
71 #define PORT_ATMEL	49
72 
73 /* Macintosh Zilog type numbers */
74 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
75 #define PORT_PMAC_ZILOG	51
76 
77 /* SH-SCI */
78 #define PORT_SCI	52
79 #define PORT_SCIF	53
80 #define PORT_IRDA	54
81 
82 /* Samsung S3C2410 SoC and derivatives thereof */
83 #define PORT_S3C2410    55
84 
85 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
86 #define PORT_IP22ZILOG	56
87 
88 /* Sharp LH7a40x -- an ARM9 SoC series */
89 #define PORT_LH7A40X	57
90 
91 /* PPC CPM type number */
92 #define PORT_CPM        58
93 
94 /* MPC52xx type numbers */
95 #define PORT_MPC52xx	59
96 
97 /* IBM icom */
98 #define PORT_ICOM	60
99 
100 /* Samsung S3C2440 SoC */
101 #define PORT_S3C2440	61
102 
103 /* Motorola i.MX SoC */
104 #define PORT_IMX	62
105 
106 /* Marvell MPSC */
107 #define PORT_MPSC	63
108 
109 /* TXX9 type number */
110 #define PORT_TXX9	64
111 
112 /* NEC VR4100 series SIU/DSIU */
113 #define PORT_VR41XX_SIU		65
114 #define PORT_VR41XX_DSIU	66
115 
116 /* Samsung S3C2400 SoC */
117 #define PORT_S3C2400	67
118 
119 /* M32R SIO */
120 #define PORT_M32R_SIO	68
121 
122 /*Digi jsm */
123 #define PORT_JSM        69
124 
125 #define PORT_PNX8XXX	70
126 
127 /* Hilscher netx */
128 #define PORT_NETX	71
129 
130 /* SUN4V Hypervisor Console */
131 #define PORT_SUNHV	72
132 
133 #define PORT_S3C2412	73
134 
135 /* Xilinx uartlite */
136 #define PORT_UARTLITE	74
137 
138 /* Blackfin bf5xx */
139 #define PORT_BFIN	75
140 
141 /* Micrel KS8695 */
142 #define PORT_KS8695	76
143 
144 /* Broadcom SB1250, etc. SOC */
145 #define PORT_SB1250_DUART	77
146 
147 /* Freescale ColdFire */
148 #define PORT_MCF	78
149 
150 /* Blackfin SPORT */
151 #define PORT_BFIN_SPORT		79
152 
153 /* MN10300 on-chip UART numbers */
154 #define PORT_MN10300		80
155 #define PORT_MN10300_CTS	81
156 
157 #define PORT_SC26XX	82
158 
159 /* SH-SCI */
160 #define PORT_SCIFA	83
161 
162 #define PORT_S3C6400	84
163 
164 /* NWPSERIAL */
165 #define PORT_NWPSERIAL	85
166 
167 #ifdef __KERNEL__
168 
169 #include <linux/compiler.h>
170 #include <linux/interrupt.h>
171 #include <linux/circ_buf.h>
172 #include <linux/spinlock.h>
173 #include <linux/sched.h>
174 #include <linux/tty.h>
175 #include <linux/mutex.h>
176 #include <linux/sysrq.h>
177 
178 struct uart_port;
179 struct uart_info;
180 struct serial_struct;
181 struct device;
182 
183 /*
184  * This structure describes all the operations that can be
185  * done on the physical hardware.
186  */
187 struct uart_ops {
188 	unsigned int	(*tx_empty)(struct uart_port *);
189 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
190 	unsigned int	(*get_mctrl)(struct uart_port *);
191 	void		(*stop_tx)(struct uart_port *);
192 	void		(*start_tx)(struct uart_port *);
193 	void		(*send_xchar)(struct uart_port *, char ch);
194 	void		(*stop_rx)(struct uart_port *);
195 	void		(*enable_ms)(struct uart_port *);
196 	void		(*break_ctl)(struct uart_port *, int ctl);
197 	int		(*startup)(struct uart_port *);
198 	void		(*shutdown)(struct uart_port *);
199 	void		(*flush_buffer)(struct uart_port *);
200 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
201 				       struct ktermios *old);
202 	void		(*set_ldisc)(struct uart_port *);
203 	void		(*pm)(struct uart_port *, unsigned int state,
204 			      unsigned int oldstate);
205 	int		(*set_wake)(struct uart_port *, unsigned int state);
206 
207 	/*
208 	 * Return a string describing the type of the port
209 	 */
210 	const char *(*type)(struct uart_port *);
211 
212 	/*
213 	 * Release IO and memory resources used by the port.
214 	 * This includes iounmap if necessary.
215 	 */
216 	void		(*release_port)(struct uart_port *);
217 
218 	/*
219 	 * Request IO and memory resources used by the port.
220 	 * This includes iomapping the port if necessary.
221 	 */
222 	int		(*request_port)(struct uart_port *);
223 	void		(*config_port)(struct uart_port *, int);
224 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
225 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
226 #ifdef CONFIG_CONSOLE_POLL
227 	void	(*poll_put_char)(struct uart_port *, unsigned char);
228 	int		(*poll_get_char)(struct uart_port *);
229 #endif
230 };
231 
232 #define UART_CONFIG_TYPE	(1 << 0)
233 #define UART_CONFIG_IRQ		(1 << 1)
234 
235 struct uart_icount {
236 	__u32	cts;
237 	__u32	dsr;
238 	__u32	rng;
239 	__u32	dcd;
240 	__u32	rx;
241 	__u32	tx;
242 	__u32	frame;
243 	__u32	overrun;
244 	__u32	parity;
245 	__u32	brk;
246 	__u32	buf_overrun;
247 };
248 
249 typedef unsigned int __bitwise__ upf_t;
250 
251 struct uart_port {
252 	spinlock_t		lock;			/* port lock */
253 	unsigned long		iobase;			/* in/out[bwl] */
254 	unsigned char __iomem	*membase;		/* read/write[bwl] */
255 	unsigned int		(*serial_in)(struct uart_port *, int);
256 	void			(*serial_out)(struct uart_port *, int, int);
257 	unsigned int		irq;			/* irq number */
258 	unsigned int		uartclk;		/* base uart clock */
259 	unsigned int		fifosize;		/* tx fifo size */
260 	unsigned char		x_char;			/* xon/xoff char */
261 	unsigned char		regshift;		/* reg offset shift */
262 	unsigned char		iotype;			/* io access style */
263 	unsigned char		unused1;
264 
265 #define UPIO_PORT		(0)
266 #define UPIO_HUB6		(1)
267 #define UPIO_MEM		(2)
268 #define UPIO_MEM32		(3)
269 #define UPIO_AU			(4)			/* Au1x00 type IO */
270 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
271 #define UPIO_DWAPB		(6)			/* DesignWare APB UART */
272 #define UPIO_RM9000		(7)			/* RM9000 type IO */
273 
274 	unsigned int		read_status_mask;	/* driver specific */
275 	unsigned int		ignore_status_mask;	/* driver specific */
276 	struct uart_info	*info;			/* pointer to parent info */
277 	struct uart_icount	icount;			/* statistics */
278 
279 	struct console		*cons;			/* struct console, if any */
280 #ifdef CONFIG_SERIAL_CORE_CONSOLE
281 	unsigned long		sysrq;			/* sysrq timeout */
282 #endif
283 
284 	upf_t			flags;
285 
286 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
287 #define UPF_SAK			((__force upf_t) (1 << 2))
288 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
289 #define UPF_SPD_HI		((__force upf_t) (0x0010))
290 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
291 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
292 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
293 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
294 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
295 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
296 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
297 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
298 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
299 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
300 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
301 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
302 /* The exact UART type is known and should not be probed.  */
303 #define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
304 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
305 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
306 #define UPF_DEAD		((__force upf_t) (1 << 30))
307 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
308 
309 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
310 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
311 
312 	unsigned int		mctrl;			/* current modem ctrl settings */
313 	unsigned int		timeout;		/* character-based timeout */
314 	unsigned int		type;			/* port type */
315 	const struct uart_ops	*ops;
316 	unsigned int		custom_divisor;
317 	unsigned int		line;			/* port index */
318 	resource_size_t		mapbase;		/* for ioremap */
319 	struct device		*dev;			/* parent device */
320 	unsigned char		hub6;			/* this should be in the 8250 driver */
321 	unsigned char		suspended;
322 	unsigned char		unused[2];
323 	void			*private_data;		/* generic platform data pointer */
324 };
325 
326 /*
327  * This is the state information which is only valid when the port
328  * is open; it may be cleared the core driver once the device has
329  * been closed.  Either the low level driver or the core can modify
330  * stuff here.
331  */
332 typedef unsigned int __bitwise__ uif_t;
333 
334 struct uart_info {
335 	struct tty_port		port;
336 	struct circ_buf		xmit;
337 	uif_t			flags;
338 
339 /*
340  * Definitions for info->flags.  These are _private_ to serial_core, and
341  * are specific to this structure.  They may be queried by low level drivers.
342  *
343  * FIXME: use the ASY_ definitions
344  */
345 #define UIF_CHECK_CD		((__force uif_t) (1 << 25))
346 #define UIF_CTS_FLOW		((__force uif_t) (1 << 26))
347 #define UIF_NORMAL_ACTIVE	((__force uif_t) (1 << 29))
348 #define UIF_INITIALIZED		((__force uif_t) (1 << 31))
349 #define UIF_SUSPENDED		((__force uif_t) (1 << 30))
350 
351 	struct tasklet_struct	tlet;
352 	wait_queue_head_t	delta_msr_wait;
353 };
354 
355 /*
356  * This is the state information which is persistent across opens.
357  * The low level driver must not to touch any elements contained
358  * within.
359  */
360 struct uart_state {
361 	unsigned int		close_delay;		/* msec */
362 	unsigned int		closing_wait;		/* msec */
363 
364 #define USF_CLOSING_WAIT_INF	(0)
365 #define USF_CLOSING_WAIT_NONE	(~0U)
366 
367 	int			count;
368 	int			pm_state;
369 	struct uart_info	info;
370 	struct uart_port	*port;
371 
372 	struct mutex		mutex;
373 };
374 
375 #define UART_XMIT_SIZE	PAGE_SIZE
376 
377 
378 /* number of characters left in xmit buffer before we ask for more */
379 #define WAKEUP_CHARS		256
380 
381 struct module;
382 struct tty_driver;
383 
384 struct uart_driver {
385 	struct module		*owner;
386 	const char		*driver_name;
387 	const char		*dev_name;
388 	int			 major;
389 	int			 minor;
390 	int			 nr;
391 	struct console		*cons;
392 
393 	/*
394 	 * these are private; the low level driver should not
395 	 * touch these; they should be initialised to NULL
396 	 */
397 	struct uart_state	*state;
398 	struct tty_driver	*tty_driver;
399 };
400 
401 void uart_write_wakeup(struct uart_port *port);
402 
403 /*
404  * Baud rate helpers.
405  */
406 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
407 			 unsigned int baud);
408 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
409 				struct ktermios *old, unsigned int min,
410 				unsigned int max);
411 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
412 
413 /*
414  * Console helpers.
415  */
416 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
417 				   struct console *c);
418 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
419 			int *flow);
420 int uart_set_options(struct uart_port *port, struct console *co, int baud,
421 		     int parity, int bits, int flow);
422 struct tty_driver *uart_console_device(struct console *co, int *index);
423 void uart_console_write(struct uart_port *port, const char *s,
424 			unsigned int count,
425 			void (*putchar)(struct uart_port *, int));
426 
427 /*
428  * Port/driver registration/removal
429  */
430 int uart_register_driver(struct uart_driver *uart);
431 void uart_unregister_driver(struct uart_driver *uart);
432 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
433 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
434 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
435 
436 /*
437  * Power Management
438  */
439 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
440 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
441 
442 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
443 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
444 
445 #define uart_circ_chars_pending(circ)	\
446 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
447 
448 #define uart_circ_chars_free(circ)	\
449 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
450 
451 static inline int uart_tx_stopped(struct uart_port *port)
452 {
453 	struct tty_struct *tty = port->info->port.tty;
454 	if(tty->stopped || tty->hw_stopped)
455 		return 1;
456 	return 0;
457 }
458 
459 /*
460  * The following are helper functions for the low level drivers.
461  */
462 static inline int
463 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
464 {
465 #ifdef SUPPORT_SYSRQ
466 	if (port->sysrq) {
467 		if (ch && time_before(jiffies, port->sysrq)) {
468 			handle_sysrq(ch, port->info->port.tty);
469 			port->sysrq = 0;
470 			return 1;
471 		}
472 		port->sysrq = 0;
473 	}
474 #endif
475 	return 0;
476 }
477 #ifndef SUPPORT_SYSRQ
478 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
479 #endif
480 
481 /*
482  * We do the SysRQ and SAK checking like this...
483  */
484 static inline int uart_handle_break(struct uart_port *port)
485 {
486 	struct uart_info *info = port->info;
487 #ifdef SUPPORT_SYSRQ
488 	if (port->cons && port->cons->index == port->line) {
489 		if (!port->sysrq) {
490 			port->sysrq = jiffies + HZ*5;
491 			return 1;
492 		}
493 		port->sysrq = 0;
494 	}
495 #endif
496 	if (port->flags & UPF_SAK)
497 		do_SAK(info->port.tty);
498 	return 0;
499 }
500 
501 /**
502  *	uart_handle_dcd_change - handle a change of carrier detect state
503  *	@port: uart_port structure for the open port
504  *	@status: new carrier detect status, nonzero if active
505  */
506 static inline void
507 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
508 {
509 	struct uart_info *info = port->info;
510 
511 	port->icount.dcd++;
512 
513 #ifdef CONFIG_HARD_PPS
514 	if ((port->flags & UPF_HARDPPS_CD) && status)
515 		hardpps();
516 #endif
517 
518 	if (info->flags & UIF_CHECK_CD) {
519 		if (status)
520 			wake_up_interruptible(&info->port.open_wait);
521 		else if (info->port.tty)
522 			tty_hangup(info->port.tty);
523 	}
524 }
525 
526 /**
527  *	uart_handle_cts_change - handle a change of clear-to-send state
528  *	@port: uart_port structure for the open port
529  *	@status: new clear to send status, nonzero if active
530  */
531 static inline void
532 uart_handle_cts_change(struct uart_port *port, unsigned int status)
533 {
534 	struct uart_info *info = port->info;
535 	struct tty_struct *tty = info->port.tty;
536 
537 	port->icount.cts++;
538 
539 	if (info->flags & UIF_CTS_FLOW) {
540 		if (tty->hw_stopped) {
541 			if (status) {
542 				tty->hw_stopped = 0;
543 				port->ops->start_tx(port);
544 				uart_write_wakeup(port);
545 			}
546 		} else {
547 			if (!status) {
548 				tty->hw_stopped = 1;
549 				port->ops->stop_tx(port);
550 			}
551 		}
552 	}
553 }
554 
555 #include <linux/tty_flip.h>
556 
557 static inline void
558 uart_insert_char(struct uart_port *port, unsigned int status,
559 		 unsigned int overrun, unsigned int ch, unsigned int flag)
560 {
561 	struct tty_struct *tty = port->info->port.tty;
562 
563 	if ((status & port->ignore_status_mask & ~overrun) == 0)
564 		tty_insert_flip_char(tty, ch, flag);
565 
566 	/*
567 	 * Overrun is special.  Since it's reported immediately,
568 	 * it doesn't affect the current character.
569 	 */
570 	if (status & ~port->ignore_status_mask & overrun)
571 		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
572 }
573 
574 /*
575  *	UART_ENABLE_MS - determine if port should enable modem status irqs
576  */
577 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
578 					 (cflag) & CRTSCTS || \
579 					 !((cflag) & CLOCAL))
580 
581 #endif
582 
583 #endif /* LINUX_SERIAL_CORE_H */
584