xref: /linux-6.15/include/linux/resctrl.h (revision cae2bcb6)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _RESCTRL_H
3 #define _RESCTRL_H
4 
5 #include <linux/kernel.h>
6 #include <linux/list.h>
7 #include <linux/pid.h>
8 
9 /* CLOSID, RMID value used by the default control group */
10 #define RESCTRL_RESERVED_CLOSID		0
11 #define RESCTRL_RESERVED_RMID		0
12 
13 #define RESCTRL_PICK_ANY_CPU		-1
14 
15 #ifdef CONFIG_PROC_CPU_RESCTRL
16 
17 int proc_resctrl_show(struct seq_file *m,
18 		      struct pid_namespace *ns,
19 		      struct pid *pid,
20 		      struct task_struct *tsk);
21 
22 #endif
23 
24 /* max value for struct rdt_domain's mbps_val */
25 #define MBA_MAX_MBPS   U32_MAX
26 
27 /**
28  * enum resctrl_conf_type - The type of configuration.
29  * @CDP_NONE:	No prioritisation, both code and data are controlled or monitored.
30  * @CDP_CODE:	Configuration applies to instruction fetches.
31  * @CDP_DATA:	Configuration applies to reads and writes.
32  */
33 enum resctrl_conf_type {
34 	CDP_NONE,
35 	CDP_CODE,
36 	CDP_DATA,
37 };
38 
39 #define CDP_NUM_TYPES	(CDP_DATA + 1)
40 
41 /*
42  * Event IDs, the values match those used to program IA32_QM_EVTSEL before
43  * reading IA32_QM_CTR on RDT systems.
44  */
45 enum resctrl_event_id {
46 	QOS_L3_OCCUP_EVENT_ID		= 0x01,
47 	QOS_L3_MBM_TOTAL_EVENT_ID	= 0x02,
48 	QOS_L3_MBM_LOCAL_EVENT_ID	= 0x03,
49 };
50 
51 /**
52  * struct resctrl_staged_config - parsed configuration to be applied
53  * @new_ctrl:		new ctrl value to be loaded
54  * @have_new_ctrl:	whether the user provided new_ctrl is valid
55  */
56 struct resctrl_staged_config {
57 	u32			new_ctrl;
58 	bool			have_new_ctrl;
59 };
60 
61 enum resctrl_domain_type {
62 	RESCTRL_CTRL_DOMAIN,
63 	RESCTRL_MON_DOMAIN,
64 };
65 
66 /**
67  * struct rdt_domain_hdr - common header for different domain types
68  * @list:		all instances of this resource
69  * @id:			unique id for this instance
70  * @type:		type of this instance
71  * @cpu_mask:		which CPUs share this resource
72  */
73 struct rdt_domain_hdr {
74 	struct list_head		list;
75 	int				id;
76 	enum resctrl_domain_type	type;
77 	struct cpumask			cpu_mask;
78 };
79 
80 /**
81  * struct rdt_ctrl_domain - group of CPUs sharing a resctrl control resource
82  * @hdr:		common header for different domain types
83  * @plr:		pseudo-locked region (if any) associated with domain
84  * @staged_config:	parsed configuration to be applied
85  * @mbps_val:		When mba_sc is enabled, this holds the array of user
86  *			specified control values for mba_sc in MBps, indexed
87  *			by closid
88  */
89 struct rdt_ctrl_domain {
90 	struct rdt_domain_hdr		hdr;
91 	struct pseudo_lock_region	*plr;
92 	struct resctrl_staged_config	staged_config[CDP_NUM_TYPES];
93 	u32				*mbps_val;
94 };
95 
96 /**
97  * struct rdt_mon_domain - group of CPUs sharing a resctrl monitor resource
98  * @hdr:		common header for different domain types
99  * @rmid_busy_llc:	bitmap of which limbo RMIDs are above threshold
100  * @mbm_total:		saved state for MBM total bandwidth
101  * @mbm_local:		saved state for MBM local bandwidth
102  * @mbm_over:		worker to periodically read MBM h/w counters
103  * @cqm_limbo:		worker to periodically read CQM h/w counters
104  * @mbm_work_cpu:	worker CPU for MBM h/w counters
105  * @cqm_work_cpu:	worker CPU for CQM h/w counters
106  */
107 struct rdt_mon_domain {
108 	struct rdt_domain_hdr		hdr;
109 	unsigned long			*rmid_busy_llc;
110 	struct mbm_state		*mbm_total;
111 	struct mbm_state		*mbm_local;
112 	struct delayed_work		mbm_over;
113 	struct delayed_work		cqm_limbo;
114 	int				mbm_work_cpu;
115 	int				cqm_work_cpu;
116 };
117 
118 /**
119  * struct resctrl_cache - Cache allocation related data
120  * @cbm_len:		Length of the cache bit mask
121  * @min_cbm_bits:	Minimum number of consecutive bits to be set.
122  *			The value 0 means the architecture can support
123  *			zero CBM.
124  * @shareable_bits:	Bitmask of shareable resource with other
125  *			executing entities
126  * @arch_has_sparse_bitmasks:	True if a bitmask like f00f is valid.
127  * @arch_has_per_cpu_cfg:	True if QOS_CFG register for this cache
128  *				level has CPU scope.
129  */
130 struct resctrl_cache {
131 	unsigned int	cbm_len;
132 	unsigned int	min_cbm_bits;
133 	unsigned int	shareable_bits;
134 	bool		arch_has_sparse_bitmasks;
135 	bool		arch_has_per_cpu_cfg;
136 };
137 
138 /**
139  * enum membw_throttle_mode - System's memory bandwidth throttling mode
140  * @THREAD_THROTTLE_UNDEFINED:	Not relevant to the system
141  * @THREAD_THROTTLE_MAX:	Memory bandwidth is throttled at the core
142  *				always using smallest bandwidth percentage
143  *				assigned to threads, aka "max throttling"
144  * @THREAD_THROTTLE_PER_THREAD:	Memory bandwidth is throttled at the thread
145  */
146 enum membw_throttle_mode {
147 	THREAD_THROTTLE_UNDEFINED = 0,
148 	THREAD_THROTTLE_MAX,
149 	THREAD_THROTTLE_PER_THREAD,
150 };
151 
152 /**
153  * struct resctrl_membw - Memory bandwidth allocation related data
154  * @min_bw:		Minimum memory bandwidth percentage user can request
155  * @bw_gran:		Granularity at which the memory bandwidth is allocated
156  * @delay_linear:	True if memory B/W delay is in linear scale
157  * @arch_needs_linear:	True if we can't configure non-linear resources
158  * @throttle_mode:	Bandwidth throttling mode when threads request
159  *			different memory bandwidths
160  * @mba_sc:		True if MBA software controller(mba_sc) is enabled
161  * @mb_map:		Mapping of memory B/W percentage to memory B/W delay
162  */
163 struct resctrl_membw {
164 	u32				min_bw;
165 	u32				bw_gran;
166 	u32				delay_linear;
167 	bool				arch_needs_linear;
168 	enum membw_throttle_mode	throttle_mode;
169 	bool				mba_sc;
170 	u32				*mb_map;
171 };
172 
173 struct rdt_parse_data;
174 struct resctrl_schema;
175 
176 enum resctrl_scope {
177 	RESCTRL_L2_CACHE = 2,
178 	RESCTRL_L3_CACHE = 3,
179 };
180 
181 /**
182  * struct rdt_resource - attributes of a resctrl resource
183  * @rid:		The index of the resource
184  * @alloc_capable:	Is allocation available on this machine
185  * @mon_capable:	Is monitor feature available on this machine
186  * @num_rmid:		Number of RMIDs available
187  * @ctrl_scope:		Scope of this resource for control functions
188  * @mon_scope:		Scope of this resource for monitor functions
189  * @cache:		Cache allocation related data
190  * @membw:		If the component has bandwidth controls, their properties.
191  * @ctrl_domains:	RCU list of all control domains for this resource
192  * @mon_domains:	RCU list of all monitor domains for this resource
193  * @name:		Name to use in "schemata" file.
194  * @data_width:		Character width of data when displaying
195  * @default_ctrl:	Specifies default cache cbm or memory B/W percent.
196  * @format_str:		Per resource format string to show domain value
197  * @parse_ctrlval:	Per resource function pointer to parse control values
198  * @evt_list:		List of monitoring events
199  * @fflags:		flags to choose base and info files
200  * @cdp_capable:	Is the CDP feature available on this resource
201  */
202 struct rdt_resource {
203 	int			rid;
204 	bool			alloc_capable;
205 	bool			mon_capable;
206 	int			num_rmid;
207 	enum resctrl_scope	ctrl_scope;
208 	enum resctrl_scope	mon_scope;
209 	struct resctrl_cache	cache;
210 	struct resctrl_membw	membw;
211 	struct list_head	ctrl_domains;
212 	struct list_head	mon_domains;
213 	char			*name;
214 	int			data_width;
215 	u32			default_ctrl;
216 	const char		*format_str;
217 	int			(*parse_ctrlval)(struct rdt_parse_data *data,
218 						 struct resctrl_schema *s,
219 						 struct rdt_ctrl_domain *d);
220 	struct list_head	evt_list;
221 	unsigned long		fflags;
222 	bool			cdp_capable;
223 };
224 
225 /**
226  * struct resctrl_schema - configuration abilities of a resource presented to
227  *			   user-space
228  * @list:	Member of resctrl_schema_all.
229  * @name:	The name to use in the "schemata" file.
230  * @conf_type:	Whether this schema is specific to code/data.
231  * @res:	The resource structure exported by the architecture to describe
232  *		the hardware that is configured by this schema.
233  * @num_closid:	The number of closid that can be used with this schema. When
234  *		features like CDP are enabled, this will be lower than the
235  *		hardware supports for the resource.
236  */
237 struct resctrl_schema {
238 	struct list_head		list;
239 	char				name[8];
240 	enum resctrl_conf_type		conf_type;
241 	struct rdt_resource		*res;
242 	u32				num_closid;
243 };
244 
245 /* The number of closid supported by this resource regardless of CDP */
246 u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
247 int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid);
248 
249 /*
250  * Update the ctrl_val and apply this config right now.
251  * Must be called on one of the domain's CPUs.
252  */
253 int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d,
254 			    u32 closid, enum resctrl_conf_type t, u32 cfg_val);
255 
256 u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d,
257 			    u32 closid, enum resctrl_conf_type type);
258 int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d);
259 int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_mon_domain *d);
260 void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d);
261 void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_mon_domain *d);
262 void resctrl_online_cpu(unsigned int cpu);
263 void resctrl_offline_cpu(unsigned int cpu);
264 
265 /**
266  * resctrl_arch_rmid_read() - Read the eventid counter corresponding to rmid
267  *			      for this resource and domain.
268  * @r:			resource that the counter should be read from.
269  * @d:			domain that the counter should be read from.
270  * @closid:		closid that matches the rmid. Depending on the architecture, the
271  *			counter may match traffic of both @closid and @rmid, or @rmid
272  *			only.
273  * @rmid:		rmid of the counter to read.
274  * @eventid:		eventid to read, e.g. L3 occupancy.
275  * @val:		result of the counter read in bytes.
276  * @arch_mon_ctx:	An architecture specific value from
277  *			resctrl_arch_mon_ctx_alloc(), for MPAM this identifies
278  *			the hardware monitor allocated for this read request.
279  *
280  * Some architectures need to sleep when first programming some of the counters.
281  * (specifically: arm64's MPAM cache occupancy counters can return 'not ready'
282  *  for a short period of time). Call from a non-migrateable process context on
283  * a CPU that belongs to domain @d. e.g. use smp_call_on_cpu() or
284  * schedule_work_on(). This function can be called with interrupts masked,
285  * e.g. using smp_call_function_any(), but may consistently return an error.
286  *
287  * Return:
288  * 0 on success, or -EIO, -EINVAL etc on error.
289  */
290 int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
291 			   u32 closid, u32 rmid, enum resctrl_event_id eventid,
292 			   u64 *val, void *arch_mon_ctx);
293 
294 /**
295  * resctrl_arch_rmid_read_context_check()  - warn about invalid contexts
296  *
297  * When built with CONFIG_DEBUG_ATOMIC_SLEEP generate a warning when
298  * resctrl_arch_rmid_read() is called with preemption disabled.
299  *
300  * The contract with resctrl_arch_rmid_read() is that if interrupts
301  * are unmasked, it can sleep. This allows NOHZ_FULL systems to use an
302  * IPI, (and fail if the call needed to sleep), while most of the time
303  * the work is scheduled, allowing the call to sleep.
304  */
305 static inline void resctrl_arch_rmid_read_context_check(void)
306 {
307 	if (!irqs_disabled())
308 		might_sleep();
309 }
310 
311 /**
312  * resctrl_arch_reset_rmid() - Reset any private state associated with rmid
313  *			       and eventid.
314  * @r:		The domain's resource.
315  * @d:		The rmid's domain.
316  * @closid:	closid that matches the rmid. Depending on the architecture, the
317  *		counter may match traffic of both @closid and @rmid, or @rmid only.
318  * @rmid:	The rmid whose counter values should be reset.
319  * @eventid:	The eventid whose counter values should be reset.
320  *
321  * This can be called from any CPU.
322  */
323 void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain *d,
324 			     u32 closid, u32 rmid,
325 			     enum resctrl_event_id eventid);
326 
327 /**
328  * resctrl_arch_reset_rmid_all() - Reset all private state associated with
329  *				   all rmids and eventids.
330  * @r:		The resctrl resource.
331  * @d:		The domain for which all architectural counter state will
332  *		be cleared.
333  *
334  * This can be called from any CPU.
335  */
336 void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_mon_domain *d);
337 
338 extern unsigned int resctrl_rmid_realloc_threshold;
339 extern unsigned int resctrl_rmid_realloc_limit;
340 
341 #endif /* _RESCTRL_H */
342