1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _RESCTRL_H 3 #define _RESCTRL_H 4 5 #include <linux/kernel.h> 6 #include <linux/list.h> 7 #include <linux/pid.h> 8 9 /* CLOSID, RMID value used by the default control group */ 10 #define RESCTRL_RESERVED_CLOSID 0 11 #define RESCTRL_RESERVED_RMID 0 12 13 #define RESCTRL_PICK_ANY_CPU -1 14 15 #ifdef CONFIG_PROC_CPU_RESCTRL 16 17 int proc_resctrl_show(struct seq_file *m, 18 struct pid_namespace *ns, 19 struct pid *pid, 20 struct task_struct *tsk); 21 22 #endif 23 24 /* max value for struct rdt_domain's mbps_val */ 25 #define MBA_MAX_MBPS U32_MAX 26 27 /** 28 * enum resctrl_conf_type - The type of configuration. 29 * @CDP_NONE: No prioritisation, both code and data are controlled or monitored. 30 * @CDP_CODE: Configuration applies to instruction fetches. 31 * @CDP_DATA: Configuration applies to reads and writes. 32 */ 33 enum resctrl_conf_type { 34 CDP_NONE, 35 CDP_CODE, 36 CDP_DATA, 37 }; 38 39 #define CDP_NUM_TYPES (CDP_DATA + 1) 40 41 /* 42 * Event IDs, the values match those used to program IA32_QM_EVTSEL before 43 * reading IA32_QM_CTR on RDT systems. 44 */ 45 enum resctrl_event_id { 46 QOS_L3_OCCUP_EVENT_ID = 0x01, 47 QOS_L3_MBM_TOTAL_EVENT_ID = 0x02, 48 QOS_L3_MBM_LOCAL_EVENT_ID = 0x03, 49 }; 50 51 /** 52 * struct resctrl_staged_config - parsed configuration to be applied 53 * @new_ctrl: new ctrl value to be loaded 54 * @have_new_ctrl: whether the user provided new_ctrl is valid 55 */ 56 struct resctrl_staged_config { 57 u32 new_ctrl; 58 bool have_new_ctrl; 59 }; 60 61 /** 62 * struct rdt_domain_hdr - common header for different domain types 63 * @list: all instances of this resource 64 * @id: unique id for this instance 65 * @cpu_mask: which CPUs share this resource 66 */ 67 struct rdt_domain_hdr { 68 struct list_head list; 69 int id; 70 struct cpumask cpu_mask; 71 }; 72 73 /** 74 * struct rdt_domain - group of CPUs sharing a resctrl resource 75 * @hdr: common header for different domain types 76 * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold 77 * @mbm_total: saved state for MBM total bandwidth 78 * @mbm_local: saved state for MBM local bandwidth 79 * @mbm_over: worker to periodically read MBM h/w counters 80 * @cqm_limbo: worker to periodically read CQM h/w counters 81 * @mbm_work_cpu: worker CPU for MBM h/w counters 82 * @cqm_work_cpu: worker CPU for CQM h/w counters 83 * @plr: pseudo-locked region (if any) associated with domain 84 * @staged_config: parsed configuration to be applied 85 * @mbps_val: When mba_sc is enabled, this holds the array of user 86 * specified control values for mba_sc in MBps, indexed 87 * by closid 88 */ 89 struct rdt_domain { 90 struct rdt_domain_hdr hdr; 91 unsigned long *rmid_busy_llc; 92 struct mbm_state *mbm_total; 93 struct mbm_state *mbm_local; 94 struct delayed_work mbm_over; 95 struct delayed_work cqm_limbo; 96 int mbm_work_cpu; 97 int cqm_work_cpu; 98 struct pseudo_lock_region *plr; 99 struct resctrl_staged_config staged_config[CDP_NUM_TYPES]; 100 u32 *mbps_val; 101 }; 102 103 /** 104 * struct resctrl_cache - Cache allocation related data 105 * @cbm_len: Length of the cache bit mask 106 * @min_cbm_bits: Minimum number of consecutive bits to be set. 107 * The value 0 means the architecture can support 108 * zero CBM. 109 * @shareable_bits: Bitmask of shareable resource with other 110 * executing entities 111 * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid. 112 * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache 113 * level has CPU scope. 114 */ 115 struct resctrl_cache { 116 unsigned int cbm_len; 117 unsigned int min_cbm_bits; 118 unsigned int shareable_bits; 119 bool arch_has_sparse_bitmasks; 120 bool arch_has_per_cpu_cfg; 121 }; 122 123 /** 124 * enum membw_throttle_mode - System's memory bandwidth throttling mode 125 * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system 126 * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core 127 * always using smallest bandwidth percentage 128 * assigned to threads, aka "max throttling" 129 * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread 130 */ 131 enum membw_throttle_mode { 132 THREAD_THROTTLE_UNDEFINED = 0, 133 THREAD_THROTTLE_MAX, 134 THREAD_THROTTLE_PER_THREAD, 135 }; 136 137 /** 138 * struct resctrl_membw - Memory bandwidth allocation related data 139 * @min_bw: Minimum memory bandwidth percentage user can request 140 * @bw_gran: Granularity at which the memory bandwidth is allocated 141 * @delay_linear: True if memory B/W delay is in linear scale 142 * @arch_needs_linear: True if we can't configure non-linear resources 143 * @throttle_mode: Bandwidth throttling mode when threads request 144 * different memory bandwidths 145 * @mba_sc: True if MBA software controller(mba_sc) is enabled 146 * @mb_map: Mapping of memory B/W percentage to memory B/W delay 147 */ 148 struct resctrl_membw { 149 u32 min_bw; 150 u32 bw_gran; 151 u32 delay_linear; 152 bool arch_needs_linear; 153 enum membw_throttle_mode throttle_mode; 154 bool mba_sc; 155 u32 *mb_map; 156 }; 157 158 struct rdt_parse_data; 159 struct resctrl_schema; 160 161 enum resctrl_scope { 162 RESCTRL_L2_CACHE = 2, 163 RESCTRL_L3_CACHE = 3, 164 }; 165 166 /** 167 * struct rdt_resource - attributes of a resctrl resource 168 * @rid: The index of the resource 169 * @alloc_capable: Is allocation available on this machine 170 * @mon_capable: Is monitor feature available on this machine 171 * @num_rmid: Number of RMIDs available 172 * @scope: Scope of this resource 173 * @cache: Cache allocation related data 174 * @membw: If the component has bandwidth controls, their properties. 175 * @domains: RCU list of all domains for this resource 176 * @name: Name to use in "schemata" file. 177 * @data_width: Character width of data when displaying 178 * @default_ctrl: Specifies default cache cbm or memory B/W percent. 179 * @format_str: Per resource format string to show domain value 180 * @parse_ctrlval: Per resource function pointer to parse control values 181 * @evt_list: List of monitoring events 182 * @fflags: flags to choose base and info files 183 * @cdp_capable: Is the CDP feature available on this resource 184 */ 185 struct rdt_resource { 186 int rid; 187 bool alloc_capable; 188 bool mon_capable; 189 int num_rmid; 190 enum resctrl_scope scope; 191 struct resctrl_cache cache; 192 struct resctrl_membw membw; 193 struct list_head domains; 194 char *name; 195 int data_width; 196 u32 default_ctrl; 197 const char *format_str; 198 int (*parse_ctrlval)(struct rdt_parse_data *data, 199 struct resctrl_schema *s, 200 struct rdt_domain *d); 201 struct list_head evt_list; 202 unsigned long fflags; 203 bool cdp_capable; 204 }; 205 206 /** 207 * struct resctrl_schema - configuration abilities of a resource presented to 208 * user-space 209 * @list: Member of resctrl_schema_all. 210 * @name: The name to use in the "schemata" file. 211 * @conf_type: Whether this schema is specific to code/data. 212 * @res: The resource structure exported by the architecture to describe 213 * the hardware that is configured by this schema. 214 * @num_closid: The number of closid that can be used with this schema. When 215 * features like CDP are enabled, this will be lower than the 216 * hardware supports for the resource. 217 */ 218 struct resctrl_schema { 219 struct list_head list; 220 char name[8]; 221 enum resctrl_conf_type conf_type; 222 struct rdt_resource *res; 223 u32 num_closid; 224 }; 225 226 /* The number of closid supported by this resource regardless of CDP */ 227 u32 resctrl_arch_get_num_closid(struct rdt_resource *r); 228 int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid); 229 230 /* 231 * Update the ctrl_val and apply this config right now. 232 * Must be called on one of the domain's CPUs. 233 */ 234 int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d, 235 u32 closid, enum resctrl_conf_type t, u32 cfg_val); 236 237 u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, 238 u32 closid, enum resctrl_conf_type type); 239 int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d); 240 void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d); 241 void resctrl_online_cpu(unsigned int cpu); 242 void resctrl_offline_cpu(unsigned int cpu); 243 244 /** 245 * resctrl_arch_rmid_read() - Read the eventid counter corresponding to rmid 246 * for this resource and domain. 247 * @r: resource that the counter should be read from. 248 * @d: domain that the counter should be read from. 249 * @closid: closid that matches the rmid. Depending on the architecture, the 250 * counter may match traffic of both @closid and @rmid, or @rmid 251 * only. 252 * @rmid: rmid of the counter to read. 253 * @eventid: eventid to read, e.g. L3 occupancy. 254 * @val: result of the counter read in bytes. 255 * @arch_mon_ctx: An architecture specific value from 256 * resctrl_arch_mon_ctx_alloc(), for MPAM this identifies 257 * the hardware monitor allocated for this read request. 258 * 259 * Some architectures need to sleep when first programming some of the counters. 260 * (specifically: arm64's MPAM cache occupancy counters can return 'not ready' 261 * for a short period of time). Call from a non-migrateable process context on 262 * a CPU that belongs to domain @d. e.g. use smp_call_on_cpu() or 263 * schedule_work_on(). This function can be called with interrupts masked, 264 * e.g. using smp_call_function_any(), but may consistently return an error. 265 * 266 * Return: 267 * 0 on success, or -EIO, -EINVAL etc on error. 268 */ 269 int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d, 270 u32 closid, u32 rmid, enum resctrl_event_id eventid, 271 u64 *val, void *arch_mon_ctx); 272 273 /** 274 * resctrl_arch_rmid_read_context_check() - warn about invalid contexts 275 * 276 * When built with CONFIG_DEBUG_ATOMIC_SLEEP generate a warning when 277 * resctrl_arch_rmid_read() is called with preemption disabled. 278 * 279 * The contract with resctrl_arch_rmid_read() is that if interrupts 280 * are unmasked, it can sleep. This allows NOHZ_FULL systems to use an 281 * IPI, (and fail if the call needed to sleep), while most of the time 282 * the work is scheduled, allowing the call to sleep. 283 */ 284 static inline void resctrl_arch_rmid_read_context_check(void) 285 { 286 if (!irqs_disabled()) 287 might_sleep(); 288 } 289 290 /** 291 * resctrl_arch_reset_rmid() - Reset any private state associated with rmid 292 * and eventid. 293 * @r: The domain's resource. 294 * @d: The rmid's domain. 295 * @closid: closid that matches the rmid. Depending on the architecture, the 296 * counter may match traffic of both @closid and @rmid, or @rmid only. 297 * @rmid: The rmid whose counter values should be reset. 298 * @eventid: The eventid whose counter values should be reset. 299 * 300 * This can be called from any CPU. 301 */ 302 void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d, 303 u32 closid, u32 rmid, 304 enum resctrl_event_id eventid); 305 306 /** 307 * resctrl_arch_reset_rmid_all() - Reset all private state associated with 308 * all rmids and eventids. 309 * @r: The resctrl resource. 310 * @d: The domain for which all architectural counter state will 311 * be cleared. 312 * 313 * This can be called from any CPU. 314 */ 315 void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_domain *d); 316 317 extern unsigned int resctrl_rmid_realloc_threshold; 318 extern unsigned int resctrl_rmid_realloc_limit; 319 320 #endif /* _RESCTRL_H */ 321