1e79f15a4SChen Yu /* SPDX-License-Identifier: GPL-2.0 */ 2e79f15a4SChen Yu #ifndef _RESCTRL_H 3e79f15a4SChen Yu #define _RESCTRL_H 4e79f15a4SChen Yu 563c8b123SJames Morse #include <linux/kernel.h> 663c8b123SJames Morse #include <linux/list.h> 7a21a4391SJames Morse #include <linux/pid.h> 8a21a4391SJames Morse 9e79f15a4SChen Yu #ifdef CONFIG_PROC_CPU_RESCTRL 10e79f15a4SChen Yu 11e79f15a4SChen Yu int proc_resctrl_show(struct seq_file *m, 12e79f15a4SChen Yu struct pid_namespace *ns, 13e79f15a4SChen Yu struct pid *pid, 14e79f15a4SChen Yu struct task_struct *tsk); 15e79f15a4SChen Yu 16e79f15a4SChen Yu #endif 17e79f15a4SChen Yu 18781096d9SJames Morse /* max value for struct rdt_domain's mbps_val */ 19781096d9SJames Morse #define MBA_MAX_MBPS U32_MAX 20781096d9SJames Morse 21792e0f6fSJames Morse /** 22208ab168SJames Morse * enum resctrl_conf_type - The type of configuration. 23208ab168SJames Morse * @CDP_NONE: No prioritisation, both code and data are controlled or monitored. 24208ab168SJames Morse * @CDP_CODE: Configuration applies to instruction fetches. 25208ab168SJames Morse * @CDP_DATA: Configuration applies to reads and writes. 26208ab168SJames Morse */ 27208ab168SJames Morse enum resctrl_conf_type { 28208ab168SJames Morse CDP_NONE, 29208ab168SJames Morse CDP_CODE, 30208ab168SJames Morse CDP_DATA, 31208ab168SJames Morse }; 32208ab168SJames Morse 3375408e43SJames Morse #define CDP_NUM_TYPES (CDP_DATA + 1) 3475408e43SJames Morse 35208ab168SJames Morse /** 36e8f72825SJames Morse * struct resctrl_staged_config - parsed configuration to be applied 37e8f72825SJames Morse * @new_ctrl: new ctrl value to be loaded 38e8f72825SJames Morse * @have_new_ctrl: whether the user provided new_ctrl is valid 39e8f72825SJames Morse */ 40e8f72825SJames Morse struct resctrl_staged_config { 41e8f72825SJames Morse u32 new_ctrl; 42e8f72825SJames Morse bool have_new_ctrl; 43e8f72825SJames Morse }; 44e8f72825SJames Morse 45e8f72825SJames Morse /** 46792e0f6fSJames Morse * struct rdt_domain - group of CPUs sharing a resctrl resource 47792e0f6fSJames Morse * @list: all instances of this resource 48792e0f6fSJames Morse * @id: unique id for this instance 49792e0f6fSJames Morse * @cpu_mask: which CPUs share this resource 50792e0f6fSJames Morse * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold 51792e0f6fSJames Morse * @mbm_total: saved state for MBM total bandwidth 52792e0f6fSJames Morse * @mbm_local: saved state for MBM local bandwidth 53792e0f6fSJames Morse * @mbm_over: worker to periodically read MBM h/w counters 54792e0f6fSJames Morse * @cqm_limbo: worker to periodically read CQM h/w counters 55792e0f6fSJames Morse * @mbm_work_cpu: worker CPU for MBM h/w counters 56792e0f6fSJames Morse * @cqm_work_cpu: worker CPU for CQM h/w counters 57792e0f6fSJames Morse * @plr: pseudo-locked region (if any) associated with domain 58e8f72825SJames Morse * @staged_config: parsed configuration to be applied 59781096d9SJames Morse * @mbps_val: When mba_sc is enabled, this holds the array of user 60781096d9SJames Morse * specified control values for mba_sc in MBps, indexed 61781096d9SJames Morse * by closid 62792e0f6fSJames Morse */ 63792e0f6fSJames Morse struct rdt_domain { 64792e0f6fSJames Morse struct list_head list; 65792e0f6fSJames Morse int id; 66792e0f6fSJames Morse struct cpumask cpu_mask; 67792e0f6fSJames Morse unsigned long *rmid_busy_llc; 68792e0f6fSJames Morse struct mbm_state *mbm_total; 69792e0f6fSJames Morse struct mbm_state *mbm_local; 70792e0f6fSJames Morse struct delayed_work mbm_over; 71792e0f6fSJames Morse struct delayed_work cqm_limbo; 72792e0f6fSJames Morse int mbm_work_cpu; 73792e0f6fSJames Morse int cqm_work_cpu; 74792e0f6fSJames Morse struct pseudo_lock_region *plr; 7575408e43SJames Morse struct resctrl_staged_config staged_config[CDP_NUM_TYPES]; 76781096d9SJames Morse u32 *mbps_val; 77792e0f6fSJames Morse }; 7863c8b123SJames Morse 7963c8b123SJames Morse /** 8063c8b123SJames Morse * struct resctrl_cache - Cache allocation related data 8163c8b123SJames Morse * @cbm_len: Length of the cache bit mask 8263c8b123SJames Morse * @min_cbm_bits: Minimum number of consecutive bits to be set 8363c8b123SJames Morse * @shareable_bits: Bitmask of shareable resource with other 8463c8b123SJames Morse * executing entities 8563c8b123SJames Morse * @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid. 8663c8b123SJames Morse * @arch_has_empty_bitmaps: True if the '0' bitmap is valid. 8763c8b123SJames Morse * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache 8863c8b123SJames Morse * level has CPU scope. 8963c8b123SJames Morse */ 9063c8b123SJames Morse struct resctrl_cache { 9163c8b123SJames Morse unsigned int cbm_len; 9263c8b123SJames Morse unsigned int min_cbm_bits; 9363c8b123SJames Morse unsigned int shareable_bits; 9463c8b123SJames Morse bool arch_has_sparse_bitmaps; 9563c8b123SJames Morse bool arch_has_empty_bitmaps; 9663c8b123SJames Morse bool arch_has_per_cpu_cfg; 9763c8b123SJames Morse }; 9863c8b123SJames Morse 9963c8b123SJames Morse /** 10063c8b123SJames Morse * enum membw_throttle_mode - System's memory bandwidth throttling mode 10163c8b123SJames Morse * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system 10263c8b123SJames Morse * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core 10363c8b123SJames Morse * always using smallest bandwidth percentage 10463c8b123SJames Morse * assigned to threads, aka "max throttling" 10563c8b123SJames Morse * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread 10663c8b123SJames Morse */ 10763c8b123SJames Morse enum membw_throttle_mode { 10863c8b123SJames Morse THREAD_THROTTLE_UNDEFINED = 0, 10963c8b123SJames Morse THREAD_THROTTLE_MAX, 11063c8b123SJames Morse THREAD_THROTTLE_PER_THREAD, 11163c8b123SJames Morse }; 11263c8b123SJames Morse 11363c8b123SJames Morse /** 11463c8b123SJames Morse * struct resctrl_membw - Memory bandwidth allocation related data 11563c8b123SJames Morse * @min_bw: Minimum memory bandwidth percentage user can request 11663c8b123SJames Morse * @bw_gran: Granularity at which the memory bandwidth is allocated 11763c8b123SJames Morse * @delay_linear: True if memory B/W delay is in linear scale 11863c8b123SJames Morse * @arch_needs_linear: True if we can't configure non-linear resources 11963c8b123SJames Morse * @throttle_mode: Bandwidth throttling mode when threads request 12063c8b123SJames Morse * different memory bandwidths 12163c8b123SJames Morse * @mba_sc: True if MBA software controller(mba_sc) is enabled 12263c8b123SJames Morse * @mb_map: Mapping of memory B/W percentage to memory B/W delay 12363c8b123SJames Morse */ 12463c8b123SJames Morse struct resctrl_membw { 12563c8b123SJames Morse u32 min_bw; 12663c8b123SJames Morse u32 bw_gran; 12763c8b123SJames Morse u32 delay_linear; 12863c8b123SJames Morse bool arch_needs_linear; 12963c8b123SJames Morse enum membw_throttle_mode throttle_mode; 13063c8b123SJames Morse bool mba_sc; 13163c8b123SJames Morse u32 *mb_map; 13263c8b123SJames Morse }; 13363c8b123SJames Morse 13463c8b123SJames Morse struct rdt_parse_data; 1351c290682SJames Morse struct resctrl_schema; 13663c8b123SJames Morse 13763c8b123SJames Morse /** 13863c8b123SJames Morse * struct rdt_resource - attributes of a resctrl resource 13963c8b123SJames Morse * @rid: The index of the resource 14063c8b123SJames Morse * @alloc_capable: Is allocation available on this machine 14163c8b123SJames Morse * @mon_capable: Is monitor feature available on this machine 14263c8b123SJames Morse * @num_rmid: Number of RMIDs available 14363c8b123SJames Morse * @cache_level: Which cache level defines scope of this resource 14463c8b123SJames Morse * @cache: Cache allocation related data 14563c8b123SJames Morse * @membw: If the component has bandwidth controls, their properties. 14663c8b123SJames Morse * @domains: All domains for this resource 14763c8b123SJames Morse * @name: Name to use in "schemata" file. 14863c8b123SJames Morse * @data_width: Character width of data when displaying 14963c8b123SJames Morse * @default_ctrl: Specifies default cache cbm or memory B/W percent. 15063c8b123SJames Morse * @format_str: Per resource format string to show domain value 15163c8b123SJames Morse * @parse_ctrlval: Per resource function pointer to parse control values 15263c8b123SJames Morse * @evt_list: List of monitoring events 15363c8b123SJames Morse * @fflags: flags to choose base and info files 154c091e907SJames Morse * @cdp_capable: Is the CDP feature available on this resource 15563c8b123SJames Morse */ 15663c8b123SJames Morse struct rdt_resource { 15763c8b123SJames Morse int rid; 15863c8b123SJames Morse bool alloc_capable; 15963c8b123SJames Morse bool mon_capable; 16063c8b123SJames Morse int num_rmid; 16163c8b123SJames Morse int cache_level; 16263c8b123SJames Morse struct resctrl_cache cache; 16363c8b123SJames Morse struct resctrl_membw membw; 16463c8b123SJames Morse struct list_head domains; 16563c8b123SJames Morse char *name; 16663c8b123SJames Morse int data_width; 16763c8b123SJames Morse u32 default_ctrl; 16863c8b123SJames Morse const char *format_str; 16963c8b123SJames Morse int (*parse_ctrlval)(struct rdt_parse_data *data, 1701c290682SJames Morse struct resctrl_schema *s, 17163c8b123SJames Morse struct rdt_domain *d); 17263c8b123SJames Morse struct list_head evt_list; 17363c8b123SJames Morse unsigned long fflags; 174c091e907SJames Morse bool cdp_capable; 17563c8b123SJames Morse }; 17663c8b123SJames Morse 177cdb9ebc9SJames Morse /** 178cdb9ebc9SJames Morse * struct resctrl_schema - configuration abilities of a resource presented to 179cdb9ebc9SJames Morse * user-space 180cdb9ebc9SJames Morse * @list: Member of resctrl_schema_all. 181e198fde3SJames Morse * @name: The name to use in the "schemata" file. 182208ab168SJames Morse * @conf_type: Whether this schema is specific to code/data. 183cdb9ebc9SJames Morse * @res: The resource structure exported by the architecture to describe 184cdb9ebc9SJames Morse * the hardware that is configured by this schema. 1853183e87cSJames Morse * @num_closid: The number of closid that can be used with this schema. When 1863183e87cSJames Morse * features like CDP are enabled, this will be lower than the 1873183e87cSJames Morse * hardware supports for the resource. 188cdb9ebc9SJames Morse */ 189cdb9ebc9SJames Morse struct resctrl_schema { 190cdb9ebc9SJames Morse struct list_head list; 191e198fde3SJames Morse char name[8]; 192208ab168SJames Morse enum resctrl_conf_type conf_type; 193cdb9ebc9SJames Morse struct rdt_resource *res; 194eb6f3187SJames Morse u32 num_closid; 195cdb9ebc9SJames Morse }; 196eb6f3187SJames Morse 197eb6f3187SJames Morse /* The number of closid supported by this resource regardless of CDP */ 198eb6f3187SJames Morse u32 resctrl_arch_get_num_closid(struct rdt_resource *r); 1992e667819SJames Morse int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid); 200*ff6357bbSJames Morse 201*ff6357bbSJames Morse /* 202*ff6357bbSJames Morse * Update the ctrl_val and apply this config right now. 203*ff6357bbSJames Morse * Must be called on one of the domain's CPUs. 204*ff6357bbSJames Morse */ 205*ff6357bbSJames Morse int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d, 206*ff6357bbSJames Morse u32 closid, enum resctrl_conf_type t, u32 cfg_val); 207*ff6357bbSJames Morse 208111136e6SJames Morse u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, 209111136e6SJames Morse u32 closid, enum resctrl_conf_type type); 2103a7232cdSJames Morse int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d); 211798fd4b9SJames Morse void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d); 212eb6f3187SJames Morse 213e79f15a4SChen Yu #endif /* _RESCTRL_H */ 214