1 /* 2 * Copyright (C) 2009 Samsung Electronics Ltd. 3 * Jaswinder Singh <[email protected]> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ 9 10 #ifndef __SPI_S3C64XX_H 11 #define __SPI_S3C64XX_H 12 13 #include <linux/dmaengine.h> 14 15 struct platform_device; 16 17 /** 18 * struct s3c64xx_spi_csinfo - ChipSelect description 19 * @fb_delay: Slave specific feedback delay. 20 * Refer to FB_CLK_SEL register definition in SPI chapter. 21 * @line: Custom 'identity' of the CS line. 22 * 23 * This is per SPI-Slave Chipselect information. 24 * Allocate and initialize one in machine init code and make the 25 * spi_board_info.controller_data point to it. 26 */ 27 struct s3c64xx_spi_csinfo { 28 u8 fb_delay; 29 unsigned line; 30 }; 31 32 /** 33 * struct s3c64xx_spi_info - SPI Controller defining structure 34 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. 35 * @num_cs: Number of CS this controller emulates. 36 * @cfg_gpio: Configure pins for this SPI controller. 37 */ 38 struct s3c64xx_spi_info { 39 int src_clk_nr; 40 int num_cs; 41 bool no_cs; 42 int (*cfg_gpio)(void); 43 dma_filter_fn filter; 44 void *dma_tx; 45 void *dma_rx; 46 }; 47 48 /** 49 * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board 50 * initialization code. 51 * @cfg_gpio: Pointer to gpio setup function. 52 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. 53 * @num_cs: Number of elements in the 'cs' array. 54 * 55 * Call this from machine init code for each SPI Controller that 56 * has some chips attached to it. 57 */ 58 extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, 59 int num_cs); 60 extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, 61 int num_cs); 62 extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, 63 int num_cs); 64 65 /* defined by architecture to configure gpio */ 66 extern int s3c64xx_spi0_cfg_gpio(void); 67 extern int s3c64xx_spi1_cfg_gpio(void); 68 extern int s3c64xx_spi2_cfg_gpio(void); 69 70 extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; 71 extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; 72 extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; 73 #endif /*__SPI_S3C64XX_H */ 74