1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * shmob_drm.h -- SH Mobile DRM driver 4 * 5 * Copyright (C) 2012 Renesas Corporation 6 * 7 * Laurent Pinchart ([email protected]) 8 */ 9 10 #ifndef __SHMOB_DRM_H__ 11 #define __SHMOB_DRM_H__ 12 13 #include <drm/drm_mode.h> 14 15 enum shmob_drm_clk_source { 16 SHMOB_DRM_CLK_BUS, 17 SHMOB_DRM_CLK_PERIPHERAL, 18 SHMOB_DRM_CLK_EXTERNAL, 19 }; 20 21 enum shmob_drm_interface { 22 SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */ 23 SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */ 24 SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */ 25 SHMOB_DRM_IFACE_RGB12B, /* 12bpp */ 26 SHMOB_DRM_IFACE_RGB16, /* 16bpp */ 27 SHMOB_DRM_IFACE_RGB18, /* 18bpp */ 28 SHMOB_DRM_IFACE_RGB24, /* 24bpp */ 29 SHMOB_DRM_IFACE_YUV422, /* 16bpp */ 30 SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */ 31 SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */ 32 SHMOB_DRM_IFACE_SYS8C, /* 18bpp, 2:8:8 */ 33 SHMOB_DRM_IFACE_SYS8D, /* 16bpp, 8:8 */ 34 SHMOB_DRM_IFACE_SYS9, /* 18bpp, 9:9 */ 35 SHMOB_DRM_IFACE_SYS12, /* 24bpp, 12:12 */ 36 SHMOB_DRM_IFACE_SYS16A, /* 16bpp */ 37 SHMOB_DRM_IFACE_SYS16B, /* 18bpp, 16:2 */ 38 SHMOB_DRM_IFACE_SYS16C, /* 18bpp, 2:16 */ 39 SHMOB_DRM_IFACE_SYS18, /* 18bpp */ 40 SHMOB_DRM_IFACE_SYS24, /* 24bpp */ 41 }; 42 43 struct shmob_drm_panel_data { 44 unsigned int width_mm; /* Panel width in mm */ 45 unsigned int height_mm; /* Panel height in mm */ 46 struct drm_mode_modeinfo mode; 47 }; 48 49 struct shmob_drm_sys_interface_data { 50 unsigned int read_latch:6; 51 unsigned int read_setup:8; 52 unsigned int read_cycle:8; 53 unsigned int read_strobe:8; 54 unsigned int write_setup:8; 55 unsigned int write_cycle:8; 56 unsigned int write_strobe:8; 57 unsigned int cs_setup:3; 58 unsigned int vsync_active_high:1; 59 unsigned int vsync_dir_input:1; 60 }; 61 62 #define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0) /* Rising edge dot clock data latch */ 63 #define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1) /* Active low display enable */ 64 #define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2) /* Active low display data */ 65 #define SHMOB_DRM_IFACE_FL_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */ 66 #define SHMOB_DRM_IFACE_FL_DWCNT (1 << 4) /* Disable dotclock during blanking */ 67 68 struct shmob_drm_interface_data { 69 enum shmob_drm_interface interface; 70 struct shmob_drm_sys_interface_data sys; 71 unsigned int clk_div; 72 unsigned int flags; 73 }; 74 75 struct shmob_drm_platform_data { 76 enum shmob_drm_clk_source clk_source; 77 struct shmob_drm_interface_data iface; 78 struct shmob_drm_panel_data panel; 79 }; 80 81 #endif /* __SHMOB_DRM_H__ */ 82