1*2aec85b2SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2896f66b7SHebbar, Gururaja /* 3896f66b7SHebbar, Gururaja * TI DaVinci Audio Serial Port support 4896f66b7SHebbar, Gururaja * 57f317d34SAlexander A. Klimov * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 6896f66b7SHebbar, Gururaja */ 7896f66b7SHebbar, Gururaja 8896f66b7SHebbar, Gururaja #ifndef __DAVINCI_ASP_H 9896f66b7SHebbar, Gururaja #define __DAVINCI_ASP_H 10896f66b7SHebbar, Gururaja 11b8ec56d8SMatt Porter #include <linux/genalloc.h> 12b8ec56d8SMatt Porter 13d1debafcSPeter Ujfalusi struct davinci_mcasp_pdata { 14896f66b7SHebbar, Gururaja u32 tx_dma_offset; 15896f66b7SHebbar, Gururaja u32 rx_dma_offset; 16896f66b7SHebbar, Gururaja int asp_chan_q; /* event queue number for ASP channel */ 17896f66b7SHebbar, Gururaja int ram_chan_q; /* event queue number for RAM channel */ 18896f66b7SHebbar, Gururaja /* 19896f66b7SHebbar, Gururaja * Allowing this is more efficient and eliminates left and right swaps 20896f66b7SHebbar, Gururaja * caused by underruns, but will swap the left and right channels 21896f66b7SHebbar, Gururaja * when compared to previous behavior. 22896f66b7SHebbar, Gururaja */ 23896f66b7SHebbar, Gururaja unsigned enable_channel_combine:1; 24896f66b7SHebbar, Gururaja unsigned sram_size_playback; 25896f66b7SHebbar, Gururaja unsigned sram_size_capture; 26b8ec56d8SMatt Porter struct gen_pool *sram_pool; 27896f66b7SHebbar, Gururaja 28896f66b7SHebbar, Gururaja /* 29896f66b7SHebbar, Gururaja * This flag works when both clock and FS are outputs for the cpu 30896f66b7SHebbar, Gururaja * and makes clock more accurate (FS is not symmetrical and the 31896f66b7SHebbar, Gururaja * clock is very fast. 32896f66b7SHebbar, Gururaja * The clock becoming faster is named 33896f66b7SHebbar, Gururaja * i2s continuous serial clock (I2S_SCK) and it is an externally 34896f66b7SHebbar, Gururaja * visible bit clock. 35896f66b7SHebbar, Gururaja * 36896f66b7SHebbar, Gururaja * first line : WordSelect 37896f66b7SHebbar, Gururaja * second line : ContinuousSerialClock 38896f66b7SHebbar, Gururaja * third line: SerialData 39896f66b7SHebbar, Gururaja * 40896f66b7SHebbar, Gururaja * SYMMETRICAL APPROACH: 41896f66b7SHebbar, Gururaja * _______________________ LEFT 42896f66b7SHebbar, Gururaja * _| RIGHT |______________________| 43896f66b7SHebbar, Gururaja * _ _ _ _ _ _ _ _ 44896f66b7SHebbar, Gururaja * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_ 45896f66b7SHebbar, Gururaja * _ _ _ _ _ _ _ _ 46896f66b7SHebbar, Gururaja * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_ 47896f66b7SHebbar, Gururaja * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ 48896f66b7SHebbar, Gururaja * 49896f66b7SHebbar, Gururaja * ACCURATE CLOCK APPROACH: 50896f66b7SHebbar, Gururaja * ______________ LEFT 51896f66b7SHebbar, Gururaja * _| RIGHT |_______________________________| 52896f66b7SHebbar, Gururaja * _ _ _ _ _ _ _ _ _ 53896f66b7SHebbar, Gururaja * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| | 54896f66b7SHebbar, Gururaja * _ _ _ _ dummy cycles 55896f66b7SHebbar, Gururaja * _/ \_ ... _/ \_/ \_ ... _/ \__________________ 56896f66b7SHebbar, Gururaja * \_/ \_/ \_/ \_/ 57896f66b7SHebbar, Gururaja * 58896f66b7SHebbar, Gururaja */ 59896f66b7SHebbar, Gururaja bool i2s_accurate_sck; 60896f66b7SHebbar, Gururaja 61896f66b7SHebbar, Gururaja /* McASP specific fields */ 62896f66b7SHebbar, Gururaja int tdm_slots; 63896f66b7SHebbar, Gururaja u8 op_mode; 64bc184549SPeter Ujfalusi u8 dismod; 65896f66b7SHebbar, Gururaja u8 num_serializer; 66896f66b7SHebbar, Gururaja u8 *serial_dir; 67896f66b7SHebbar, Gururaja u8 version; 68896f66b7SHebbar, Gururaja u8 txnumevt; 69896f66b7SHebbar, Gururaja u8 rxnumevt; 704023fe6fSJyri Sarha int tx_dma_channel; 714023fe6fSJyri Sarha int rx_dma_channel; 72896f66b7SHebbar, Gururaja }; 73d1debafcSPeter Ujfalusi /* TODO: Fix arch/arm/mach-davinci/ users and remove this define */ 74d1debafcSPeter Ujfalusi #define snd_platform_data davinci_mcasp_pdata 75896f66b7SHebbar, Gururaja 76896f66b7SHebbar, Gururaja enum { 77896f66b7SHebbar, Gururaja MCASP_VERSION_1 = 0, /* DM646x */ 78896f66b7SHebbar, Gururaja MCASP_VERSION_2, /* DA8xx/OMAPL1x */ 79e5ec69daSHebbar, Gururaja MCASP_VERSION_3, /* TI81xx/AM33xx */ 80453c4990SPeter Ujfalusi MCASP_VERSION_4, /* DRA7xxx */ 810238bcf8SPeter Ujfalusi MCASP_VERSION_OMAP, /* OMAP4/5 */ 82896f66b7SHebbar, Gururaja }; 83896f66b7SHebbar, Gururaja 84896f66b7SHebbar, Gururaja #define INACTIVE_MODE 0 85896f66b7SHebbar, Gururaja #define TX_MODE 1 86896f66b7SHebbar, Gururaja #define RX_MODE 2 87896f66b7SHebbar, Gururaja 88896f66b7SHebbar, Gururaja #define DAVINCI_MCASP_IIS_MODE 0 89896f66b7SHebbar, Gururaja #define DAVINCI_MCASP_DIT_MODE 1 90896f66b7SHebbar, Gururaja 91896f66b7SHebbar, Gururaja #endif 92