1840d9f13SEnric Balletbo i Serra /* SPDX-License-Identifier: GPL-2.0-only */
2840d9f13SEnric Balletbo i Serra /*
3840d9f13SEnric Balletbo i Serra  * Host communication command constants for ChromeOS EC
4840d9f13SEnric Balletbo i Serra  *
5840d9f13SEnric Balletbo i Serra  * Copyright (C) 2012 Google, Inc
6840d9f13SEnric Balletbo i Serra  *
7840d9f13SEnric Balletbo i Serra  * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
8840d9f13SEnric Balletbo i Serra  * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
9840d9f13SEnric Balletbo i Serra  */
10840d9f13SEnric Balletbo i Serra 
11840d9f13SEnric Balletbo i Serra /* Host communication command constants for Chrome EC */
12840d9f13SEnric Balletbo i Serra 
13840d9f13SEnric Balletbo i Serra #ifndef __CROS_EC_COMMANDS_H
14840d9f13SEnric Balletbo i Serra #define __CROS_EC_COMMANDS_H
15840d9f13SEnric Balletbo i Serra 
16ea7f0f77STzung-Bi Shih #include <linux/bits.h>
17ea7f0f77STzung-Bi Shih #include <linux/types.h>
18840d9f13SEnric Balletbo i Serra 
19840d9f13SEnric Balletbo i Serra #define BUILD_ASSERT(_cond)
20840d9f13SEnric Balletbo i Serra 
21840d9f13SEnric Balletbo i Serra /*
22840d9f13SEnric Balletbo i Serra  * Current version of this protocol
23840d9f13SEnric Balletbo i Serra  *
24840d9f13SEnric Balletbo i Serra  * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
25840d9f13SEnric Balletbo i Serra  * determined in other ways.  Remove this once the kernel code no longer
26840d9f13SEnric Balletbo i Serra  * depends on it.
27840d9f13SEnric Balletbo i Serra  */
28840d9f13SEnric Balletbo i Serra #define EC_PROTO_VERSION          0x00000002
29840d9f13SEnric Balletbo i Serra 
30840d9f13SEnric Balletbo i Serra /* Command version mask */
31840d9f13SEnric Balletbo i Serra #define EC_VER_MASK(version) BIT(version)
32840d9f13SEnric Balletbo i Serra 
33840d9f13SEnric Balletbo i Serra /* I/O addresses for ACPI commands */
34840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_ACPI_DATA  0x62
35840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_ACPI_CMD   0x66
36840d9f13SEnric Balletbo i Serra 
37840d9f13SEnric Balletbo i Serra /* I/O addresses for host command */
38840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_HOST_DATA  0x200
39840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_HOST_CMD   0x204
40840d9f13SEnric Balletbo i Serra 
41840d9f13SEnric Balletbo i Serra /* I/O addresses for host command args and params */
42840d9f13SEnric Balletbo i Serra /* Protocol version 2 */
43840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_HOST_ARGS    0x800  /* And 0x801, 0x802, 0x803 */
44840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_HOST_PARAM   0x804  /* For version 2 params; size is
45840d9f13SEnric Balletbo i Serra 					 * EC_PROTO2_MAX_PARAM_SIZE
46840d9f13SEnric Balletbo i Serra 					 */
47840d9f13SEnric Balletbo i Serra /* Protocol version 3 */
48840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_HOST_PACKET  0x800  /* Offset of version 3 packet */
49840d9f13SEnric Balletbo i Serra #define EC_LPC_HOST_PACKET_SIZE  0x100  /* Max size of version 3 packet */
50840d9f13SEnric Balletbo i Serra 
51840d9f13SEnric Balletbo i Serra /*
52840d9f13SEnric Balletbo i Serra  * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
53840d9f13SEnric Balletbo i Serra  * and they tell the kernel that so we have to think of it as two parts.
54c9bc1a0eSDustin L. Howett  *
55c9bc1a0eSDustin L. Howett  * Other BIOSes report only the I/O port region spanned by the Microchip
56c9bc1a0eSDustin L. Howett  * MEC series EC; an attempt to address a larger region may fail.
57840d9f13SEnric Balletbo i Serra  */
58840d9f13SEnric Balletbo i Serra #define EC_HOST_CMD_REGION0       0x800
59840d9f13SEnric Balletbo i Serra #define EC_HOST_CMD_REGION1       0x880
60840d9f13SEnric Balletbo i Serra #define EC_HOST_CMD_REGION_SIZE    0x80
61c9bc1a0eSDustin L. Howett #define EC_HOST_CMD_MEC_REGION_SIZE 0x8
62840d9f13SEnric Balletbo i Serra 
63840d9f13SEnric Balletbo i Serra /* EC command register bit functions */
64840d9f13SEnric Balletbo i Serra #define EC_LPC_CMDR_DATA	BIT(0)  /* Data ready for host to read */
65840d9f13SEnric Balletbo i Serra #define EC_LPC_CMDR_PENDING	BIT(1)  /* Write pending to EC */
66840d9f13SEnric Balletbo i Serra #define EC_LPC_CMDR_BUSY	BIT(2)  /* EC is busy processing a command */
67840d9f13SEnric Balletbo i Serra #define EC_LPC_CMDR_CMD		BIT(3)  /* Last host write was a command */
68840d9f13SEnric Balletbo i Serra #define EC_LPC_CMDR_ACPI_BRST	BIT(4)  /* Burst mode (not used) */
69840d9f13SEnric Balletbo i Serra #define EC_LPC_CMDR_SCI		BIT(5)  /* SCI event is pending */
70840d9f13SEnric Balletbo i Serra #define EC_LPC_CMDR_SMI		BIT(6)  /* SMI event is pending */
71840d9f13SEnric Balletbo i Serra 
72840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_MEMMAP       0x900
73840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_SIZE         255 /* ACPI IO buffer max is 255 bytes */
74840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_TEXT_MAX     8   /* Size of a string in the memory map */
75840d9f13SEnric Balletbo i Serra 
76840d9f13SEnric Balletbo i Serra /* The offset address of each type of data in mapped memory. */
77840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_TEMP_SENSOR      0x00 /* Temp sensors 0x00 - 0x0f */
78840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_FAN              0x10 /* Fan speeds 0x10 - 0x17 */
79840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_TEMP_SENSOR_B    0x18 /* More temp sensors 0x18 - 0x1f */
80840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ID               0x20 /* 0x20 == 'E', 0x21 == 'C' */
81840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ID_VERSION       0x22 /* Version of data in 0x20 - 0x2f */
82840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_THERMAL_VERSION  0x23 /* Version of data in 0x00 - 0x1f */
83840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATTERY_VERSION  0x24 /* Version of data in 0x40 - 0x7f */
84840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
85840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_EVENTS_VERSION   0x26 /* Version of data in 0x34 - 0x3f */
86840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_HOST_CMD_FLAGS   0x27 /* Host cmd interface flags (8 bits) */
87840d9f13SEnric Balletbo i Serra /* Unused 0x28 - 0x2f */
88840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_SWITCHES         0x30	/* 8 bits */
89840d9f13SEnric Balletbo i Serra /* Unused 0x31 - 0x33 */
90840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_HOST_EVENTS      0x34 /* 64 bits */
91840d9f13SEnric Balletbo i Serra /* Battery values are all 32 bits, unless otherwise noted. */
92840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_VOLT        0x40 /* Battery Present Voltage */
93840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_RATE        0x44 /* Battery Present Rate */
94840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_CAP         0x48 /* Battery Remaining Capacity */
95840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_FLAG        0x4c /* Battery State, see below (8-bit) */
96840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_COUNT       0x4d /* Battery Count (8-bit) */
97840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_INDEX       0x4e /* Current Battery Data Index (8-bit) */
98840d9f13SEnric Balletbo i Serra /* Unused 0x4f */
99840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_DCAP        0x50 /* Battery Design Capacity */
100840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_DVLT        0x54 /* Battery Design Voltage */
101840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_LFCC        0x58 /* Battery Last Full Charge Capacity */
102840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_CCNT        0x5c /* Battery Cycle Count */
103840d9f13SEnric Balletbo i Serra /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
104840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_MFGR        0x60 /* Battery Manufacturer String */
105840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_MODEL       0x68 /* Battery Model Number String */
106840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_SERIAL      0x70 /* Battery Serial Number String */
107840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_BATT_TYPE        0x78 /* Battery Type String */
108840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ALS              0x80 /* ALS readings in lux (2 X 16 bits) */
109840d9f13SEnric Balletbo i Serra /* Unused 0x84 - 0x8f */
110840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ACC_STATUS       0x90 /* Accelerometer status (8 bits )*/
111840d9f13SEnric Balletbo i Serra /* Unused 0x91 */
112840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ACC_DATA         0x92 /* Accelerometers data 0x92 - 0x9f */
113840d9f13SEnric Balletbo i Serra /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
114840d9f13SEnric Balletbo i Serra /* 0x94 - 0x99: 1st Accelerometer */
115840d9f13SEnric Balletbo i Serra /* 0x9a - 0x9f: 2nd Accelerometer */
116840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_GYRO_DATA        0xa0 /* Gyroscope data 0xa0 - 0xa5 */
117840d9f13SEnric Balletbo i Serra /* Unused 0xa6 - 0xdf */
118840d9f13SEnric Balletbo i Serra 
119840d9f13SEnric Balletbo i Serra /*
120840d9f13SEnric Balletbo i Serra  * ACPI is unable to access memory mapped data at or above this offset due to
121840d9f13SEnric Balletbo i Serra  * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
122840d9f13SEnric Balletbo i Serra  * which might be needed by ACPI.
123840d9f13SEnric Balletbo i Serra  */
124840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_NO_ACPI 0xe0
125840d9f13SEnric Balletbo i Serra 
126840d9f13SEnric Balletbo i Serra /* Define the format of the accelerometer mapped memory status byte. */
127840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK  0x0f
128840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ACC_STATUS_BUSY_BIT        BIT(4)
129840d9f13SEnric Balletbo i Serra #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT    BIT(7)
130840d9f13SEnric Balletbo i Serra 
131840d9f13SEnric Balletbo i Serra /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
132840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_ENTRIES     16
133840d9f13SEnric Balletbo i Serra /*
134840d9f13SEnric Balletbo i Serra  * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
135840d9f13SEnric Balletbo i Serra  *
136840d9f13SEnric Balletbo i Serra  * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
137840d9f13SEnric Balletbo i Serra  */
138840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_B_ENTRIES      8
139840d9f13SEnric Balletbo i Serra 
140840d9f13SEnric Balletbo i Serra /* Special values for mapped temperature sensors */
141840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_NOT_PRESENT    0xff
142840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_ERROR          0xfe
143840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_NOT_POWERED    0xfd
144840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
145840d9f13SEnric Balletbo i Serra /*
146840d9f13SEnric Balletbo i Serra  * The offset of temperature value stored in mapped memory.  This allows
147840d9f13SEnric Balletbo i Serra  * reporting a temperature range of 200K to 454K = -73C to 181C.
148840d9f13SEnric Balletbo i Serra  */
149840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_OFFSET      200
150840d9f13SEnric Balletbo i Serra 
151840d9f13SEnric Balletbo i Serra /*
152840d9f13SEnric Balletbo i Serra  * Number of ALS readings at EC_MEMMAP_ALS
153840d9f13SEnric Balletbo i Serra  */
154840d9f13SEnric Balletbo i Serra #define EC_ALS_ENTRIES             2
155840d9f13SEnric Balletbo i Serra 
156840d9f13SEnric Balletbo i Serra /*
157840d9f13SEnric Balletbo i Serra  * The default value a temperature sensor will return when it is present but
158840d9f13SEnric Balletbo i Serra  * has not been read this boot.  This is a reasonable number to avoid
159840d9f13SEnric Balletbo i Serra  * triggering alarms on the host.
160840d9f13SEnric Balletbo i Serra  */
161840d9f13SEnric Balletbo i Serra #define EC_TEMP_SENSOR_DEFAULT     (296 - EC_TEMP_SENSOR_OFFSET)
162840d9f13SEnric Balletbo i Serra 
163840d9f13SEnric Balletbo i Serra #define EC_FAN_SPEED_ENTRIES       4       /* Number of fans at EC_MEMMAP_FAN */
164840d9f13SEnric Balletbo i Serra #define EC_FAN_SPEED_NOT_PRESENT   0xffff  /* Entry not present */
165840d9f13SEnric Balletbo i Serra #define EC_FAN_SPEED_STALLED       0xfffe  /* Fan stalled */
166840d9f13SEnric Balletbo i Serra 
167840d9f13SEnric Balletbo i Serra /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
168840d9f13SEnric Balletbo i Serra #define EC_BATT_FLAG_AC_PRESENT   0x01
169840d9f13SEnric Balletbo i Serra #define EC_BATT_FLAG_BATT_PRESENT 0x02
170840d9f13SEnric Balletbo i Serra #define EC_BATT_FLAG_DISCHARGING  0x04
171840d9f13SEnric Balletbo i Serra #define EC_BATT_FLAG_CHARGING     0x08
172840d9f13SEnric Balletbo i Serra #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
173840d9f13SEnric Balletbo i Serra /* Set if some of the static/dynamic data is invalid (or outdated). */
174840d9f13SEnric Balletbo i Serra #define EC_BATT_FLAG_INVALID_DATA 0x20
175840d9f13SEnric Balletbo i Serra 
176840d9f13SEnric Balletbo i Serra /* Switch flags at EC_MEMMAP_SWITCHES */
177840d9f13SEnric Balletbo i Serra #define EC_SWITCH_LID_OPEN               0x01
178840d9f13SEnric Balletbo i Serra #define EC_SWITCH_POWER_BUTTON_PRESSED   0x02
179840d9f13SEnric Balletbo i Serra #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
180840d9f13SEnric Balletbo i Serra /* Was recovery requested via keyboard; now unused. */
181840d9f13SEnric Balletbo i Serra #define EC_SWITCH_IGNORE1		 0x08
182840d9f13SEnric Balletbo i Serra /* Recovery requested via dedicated signal (from servo board) */
183840d9f13SEnric Balletbo i Serra #define EC_SWITCH_DEDICATED_RECOVERY     0x10
184840d9f13SEnric Balletbo i Serra /* Was fake developer mode switch; now unused.  Remove in next refactor. */
185840d9f13SEnric Balletbo i Serra #define EC_SWITCH_IGNORE0                0x20
186840d9f13SEnric Balletbo i Serra 
187840d9f13SEnric Balletbo i Serra /* Host command interface flags */
188840d9f13SEnric Balletbo i Serra /* Host command interface supports LPC args (LPC interface only) */
189840d9f13SEnric Balletbo i Serra #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED  0x01
190840d9f13SEnric Balletbo i Serra /* Host command interface supports version 3 protocol */
191840d9f13SEnric Balletbo i Serra #define EC_HOST_CMD_FLAG_VERSION_3   0x02
192840d9f13SEnric Balletbo i Serra 
193840d9f13SEnric Balletbo i Serra /* Wireless switch flags */
194840d9f13SEnric Balletbo i Serra #define EC_WIRELESS_SWITCH_ALL       ~0x00  /* All flags */
195840d9f13SEnric Balletbo i Serra #define EC_WIRELESS_SWITCH_WLAN       0x01  /* WLAN radio */
196840d9f13SEnric Balletbo i Serra #define EC_WIRELESS_SWITCH_BLUETOOTH  0x02  /* Bluetooth radio */
197840d9f13SEnric Balletbo i Serra #define EC_WIRELESS_SWITCH_WWAN       0x04  /* WWAN power */
198840d9f13SEnric Balletbo i Serra #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08  /* WLAN power */
199840d9f13SEnric Balletbo i Serra 
200840d9f13SEnric Balletbo i Serra /*****************************************************************************/
201840d9f13SEnric Balletbo i Serra /*
202840d9f13SEnric Balletbo i Serra  * ACPI commands
203840d9f13SEnric Balletbo i Serra  *
204840d9f13SEnric Balletbo i Serra  * These are valid ONLY on the ACPI command/data port.
205840d9f13SEnric Balletbo i Serra  */
206840d9f13SEnric Balletbo i Serra 
207840d9f13SEnric Balletbo i Serra /*
208840d9f13SEnric Balletbo i Serra  * ACPI Read Embedded Controller
209840d9f13SEnric Balletbo i Serra  *
210840d9f13SEnric Balletbo i Serra  * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
211840d9f13SEnric Balletbo i Serra  *
212840d9f13SEnric Balletbo i Serra  * Use the following sequence:
213840d9f13SEnric Balletbo i Serra  *
214840d9f13SEnric Balletbo i Serra  *    - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
215840d9f13SEnric Balletbo i Serra  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
216840d9f13SEnric Balletbo i Serra  *    - Write address to EC_LPC_ADDR_ACPI_DATA
217840d9f13SEnric Balletbo i Serra  *    - Wait for EC_LPC_CMDR_DATA bit to set
218840d9f13SEnric Balletbo i Serra  *    - Read value from EC_LPC_ADDR_ACPI_DATA
219840d9f13SEnric Balletbo i Serra  */
220840d9f13SEnric Balletbo i Serra #define EC_CMD_ACPI_READ 0x0080
221840d9f13SEnric Balletbo i Serra 
222840d9f13SEnric Balletbo i Serra /*
223840d9f13SEnric Balletbo i Serra  * ACPI Write Embedded Controller
224840d9f13SEnric Balletbo i Serra  *
225840d9f13SEnric Balletbo i Serra  * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
226840d9f13SEnric Balletbo i Serra  *
227840d9f13SEnric Balletbo i Serra  * Use the following sequence:
228840d9f13SEnric Balletbo i Serra  *
229840d9f13SEnric Balletbo i Serra  *    - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
230840d9f13SEnric Balletbo i Serra  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
231840d9f13SEnric Balletbo i Serra  *    - Write address to EC_LPC_ADDR_ACPI_DATA
232840d9f13SEnric Balletbo i Serra  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
233840d9f13SEnric Balletbo i Serra  *    - Write value to EC_LPC_ADDR_ACPI_DATA
234840d9f13SEnric Balletbo i Serra  */
235840d9f13SEnric Balletbo i Serra #define EC_CMD_ACPI_WRITE 0x0081
236840d9f13SEnric Balletbo i Serra 
237840d9f13SEnric Balletbo i Serra /*
238840d9f13SEnric Balletbo i Serra  * ACPI Burst Enable Embedded Controller
239840d9f13SEnric Balletbo i Serra  *
240840d9f13SEnric Balletbo i Serra  * This enables burst mode on the EC to allow the host to issue several
241840d9f13SEnric Balletbo i Serra  * commands back-to-back. While in this mode, writes to mapped multi-byte
242840d9f13SEnric Balletbo i Serra  * data are locked out to ensure data consistency.
243840d9f13SEnric Balletbo i Serra  */
244840d9f13SEnric Balletbo i Serra #define EC_CMD_ACPI_BURST_ENABLE 0x0082
245840d9f13SEnric Balletbo i Serra 
246840d9f13SEnric Balletbo i Serra /*
247840d9f13SEnric Balletbo i Serra  * ACPI Burst Disable Embedded Controller
248840d9f13SEnric Balletbo i Serra  *
249840d9f13SEnric Balletbo i Serra  * This disables burst mode on the EC and stops preventing EC writes to mapped
250840d9f13SEnric Balletbo i Serra  * multi-byte data.
251840d9f13SEnric Balletbo i Serra  */
252840d9f13SEnric Balletbo i Serra #define EC_CMD_ACPI_BURST_DISABLE 0x0083
253840d9f13SEnric Balletbo i Serra 
254840d9f13SEnric Balletbo i Serra /*
255840d9f13SEnric Balletbo i Serra  * ACPI Query Embedded Controller
256840d9f13SEnric Balletbo i Serra  *
257840d9f13SEnric Balletbo i Serra  * This clears the lowest-order bit in the currently pending host events, and
258840d9f13SEnric Balletbo i Serra  * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
259840d9f13SEnric Balletbo i Serra  * event 0x80000000 = 32), or 0 if no event was pending.
260840d9f13SEnric Balletbo i Serra  */
261840d9f13SEnric Balletbo i Serra #define EC_CMD_ACPI_QUERY_EVENT 0x0084
262840d9f13SEnric Balletbo i Serra 
263840d9f13SEnric Balletbo i Serra /* Valid addresses in ACPI memory space, for read/write commands */
264840d9f13SEnric Balletbo i Serra 
265840d9f13SEnric Balletbo i Serra /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
266840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_VERSION            0x00
267840d9f13SEnric Balletbo i Serra /*
268840d9f13SEnric Balletbo i Serra  * Test location; writing value here updates test compliment byte to (0xff -
269840d9f13SEnric Balletbo i Serra  * value).
270840d9f13SEnric Balletbo i Serra  */
271840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TEST               0x01
272840d9f13SEnric Balletbo i Serra /* Test compliment; writes here are ignored. */
273840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TEST_COMPLIMENT    0x02
274840d9f13SEnric Balletbo i Serra 
275840d9f13SEnric Balletbo i Serra /* Keyboard backlight brightness percent (0 - 100) */
276840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
277840d9f13SEnric Balletbo i Serra /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
278840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_FAN_DUTY           0x04
279840d9f13SEnric Balletbo i Serra 
280840d9f13SEnric Balletbo i Serra /*
281840d9f13SEnric Balletbo i Serra  * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
282840d9f13SEnric Balletbo i Serra  * independent thresholds attached to them. The current value of the ID
283840d9f13SEnric Balletbo i Serra  * register determines which sensor is affected by the THRESHOLD and COMMIT
284840d9f13SEnric Balletbo i Serra  * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
285840d9f13SEnric Balletbo i Serra  * as the memory-mapped sensors. The COMMIT register applies those settings.
286840d9f13SEnric Balletbo i Serra  *
287840d9f13SEnric Balletbo i Serra  * The spec does not mandate any way to read back the threshold settings
288840d9f13SEnric Balletbo i Serra  * themselves, but when a threshold is crossed the AP needs a way to determine
289840d9f13SEnric Balletbo i Serra  * which sensor(s) are responsible. Each reading of the ID register clears and
290840d9f13SEnric Balletbo i Serra  * returns one sensor ID that has crossed one of its threshold (in either
291840d9f13SEnric Balletbo i Serra  * direction) since the last read. A value of 0xFF means "no new thresholds
292840d9f13SEnric Balletbo i Serra  * have tripped". Setting or enabling the thresholds for a sensor will clear
293840d9f13SEnric Balletbo i Serra  * the unread event count for that sensor.
294840d9f13SEnric Balletbo i Serra  */
295840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TEMP_ID            0x05
296840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TEMP_THRESHOLD     0x06
297840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TEMP_COMMIT        0x07
298840d9f13SEnric Balletbo i Serra /*
299840d9f13SEnric Balletbo i Serra  * Here are the bits for the COMMIT register:
300840d9f13SEnric Balletbo i Serra  *   bit 0 selects the threshold index for the chosen sensor (0/1)
301840d9f13SEnric Balletbo i Serra  *   bit 1 enables/disables the selected threshold (0 = off, 1 = on)
302840d9f13SEnric Balletbo i Serra  * Each write to the commit register affects one threshold.
303840d9f13SEnric Balletbo i Serra  */
304840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
305840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
306840d9f13SEnric Balletbo i Serra /*
307840d9f13SEnric Balletbo i Serra  * Example:
308840d9f13SEnric Balletbo i Serra  *
309840d9f13SEnric Balletbo i Serra  * Set the thresholds for sensor 2 to 50 C and 60 C:
310840d9f13SEnric Balletbo i Serra  *   write 2 to [0x05]      --  select temp sensor 2
311840d9f13SEnric Balletbo i Serra  *   write 0x7b to [0x06]   --  C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
312840d9f13SEnric Balletbo i Serra  *   write 0x2 to [0x07]    --  enable threshold 0 with this value
313840d9f13SEnric Balletbo i Serra  *   write 0x85 to [0x06]   --  C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
314840d9f13SEnric Balletbo i Serra  *   write 0x3 to [0x07]    --  enable threshold 1 with this value
315840d9f13SEnric Balletbo i Serra  *
316840d9f13SEnric Balletbo i Serra  * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
317840d9f13SEnric Balletbo i Serra  *   write 2 to [0x05]      --  select temp sensor 2
318840d9f13SEnric Balletbo i Serra  *   write 0x1 to [0x07]    --  disable threshold 1
319840d9f13SEnric Balletbo i Serra  */
320840d9f13SEnric Balletbo i Serra 
321840d9f13SEnric Balletbo i Serra /* DPTF battery charging current limit */
322840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_CHARGING_LIMIT     0x08
323840d9f13SEnric Balletbo i Serra 
324840d9f13SEnric Balletbo i Serra /* Charging limit is specified in 64 mA steps */
325840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA   64
326840d9f13SEnric Balletbo i Serra /* Value to disable DPTF battery charging limit */
327840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED  0xff
328840d9f13SEnric Balletbo i Serra 
329840d9f13SEnric Balletbo i Serra /*
330840d9f13SEnric Balletbo i Serra  * Report device orientation
331840d9f13SEnric Balletbo i Serra  *  Bits       Definition
332840d9f13SEnric Balletbo i Serra  *  3:1        Device DPTF Profile Number (DDPN)
333840d9f13SEnric Balletbo i Serra  *               0   = Reserved for backward compatibility (indicates no valid
334840d9f13SEnric Balletbo i Serra  *                     profile number. Host should fall back to using TBMD).
335840d9f13SEnric Balletbo i Serra  *              1..7 = DPTF Profile number to indicate to host which table needs
336840d9f13SEnric Balletbo i Serra  *                     to be loaded.
337840d9f13SEnric Balletbo i Serra  *   0         Tablet Mode Device Indicator (TBMD)
338840d9f13SEnric Balletbo i Serra  */
339840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
340840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TBMD_SHIFT         0
341840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_TBMD_MASK          0x1
342840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DDPN_SHIFT         1
343840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DDPN_MASK          0x7
344840d9f13SEnric Balletbo i Serra 
345840d9f13SEnric Balletbo i Serra /*
346840d9f13SEnric Balletbo i Serra  * Report device features. Uses the same format as the host command, except:
347840d9f13SEnric Balletbo i Serra  *
348840d9f13SEnric Balletbo i Serra  * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
349840d9f13SEnric Balletbo i Serra  * of features", which is of limited interest when the system is already
350840d9f13SEnric Balletbo i Serra  * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
351840d9f13SEnric Balletbo i Serra  * these are supported, it defaults to 0.
352840d9f13SEnric Balletbo i Serra  * This allows detecting the presence of this field since older versions of
353840d9f13SEnric Balletbo i Serra  * the EC codebase would simply return 0xff to that unknown address. Check
354840d9f13SEnric Balletbo i Serra  * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
355840d9f13SEnric Balletbo i Serra  * are valid.
356840d9f13SEnric Balletbo i Serra  */
357840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
358840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
359840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
360840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
361840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
362840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
363840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
364840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
365840d9f13SEnric Balletbo i Serra 
366840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_BATTERY_INDEX    0x12
367840d9f13SEnric Balletbo i Serra 
368840d9f13SEnric Balletbo i Serra /*
369840d9f13SEnric Balletbo i Serra  * USB Port Power. Each bit indicates whether the corresponding USB ports' power
370840d9f13SEnric Balletbo i Serra  * is enabled (1) or disabled (0).
371840d9f13SEnric Balletbo i Serra  *   bit 0 USB port ID 0
372840d9f13SEnric Balletbo i Serra  *   ...
373840d9f13SEnric Balletbo i Serra  *   bit 7 USB port ID 7
374840d9f13SEnric Balletbo i Serra  */
375840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_USB_PORT_POWER 0x13
376840d9f13SEnric Balletbo i Serra 
377840d9f13SEnric Balletbo i Serra /*
378840d9f13SEnric Balletbo i Serra  * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf.  This data
379840d9f13SEnric Balletbo i Serra  * is read-only from the AP.  Added in EC_ACPI_MEM_VERSION 2.
380840d9f13SEnric Balletbo i Serra  */
381840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_MAPPED_BEGIN   0x20
382840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_MAPPED_SIZE    0xe0
383840d9f13SEnric Balletbo i Serra 
384840d9f13SEnric Balletbo i Serra /* Current version of ACPI memory address space */
385840d9f13SEnric Balletbo i Serra #define EC_ACPI_MEM_VERSION_CURRENT 2
386840d9f13SEnric Balletbo i Serra 
387840d9f13SEnric Balletbo i Serra 
388840d9f13SEnric Balletbo i Serra /*
389840d9f13SEnric Balletbo i Serra  * This header file is used in coreboot both in C and ACPI code.  The ACPI code
390840d9f13SEnric Balletbo i Serra  * is pre-processed to handle constants but the ASL compiler is unable to
391840d9f13SEnric Balletbo i Serra  * handle actual C code so keep it separate.
392840d9f13SEnric Balletbo i Serra  */
393840d9f13SEnric Balletbo i Serra 
394840d9f13SEnric Balletbo i Serra 
395840d9f13SEnric Balletbo i Serra /*
396840d9f13SEnric Balletbo i Serra  * Attributes for EC request and response packets.  Just defining __packed
397840d9f13SEnric Balletbo i Serra  * results in inefficient assembly code on ARM, if the structure is actually
398840d9f13SEnric Balletbo i Serra  * 32-bit aligned, as it should be for all buffers.
399840d9f13SEnric Balletbo i Serra  *
400840d9f13SEnric Balletbo i Serra  * Be very careful when adding these to existing structures.  They will round
401840d9f13SEnric Balletbo i Serra  * up the structure size to the specified boundary.
402840d9f13SEnric Balletbo i Serra  *
403840d9f13SEnric Balletbo i Serra  * Also be very careful to make that if a structure is included in some other
404840d9f13SEnric Balletbo i Serra  * parent structure that the alignment will still be true given the packing of
405840d9f13SEnric Balletbo i Serra  * the parent structure.  This is particularly important if the sub-structure
406840d9f13SEnric Balletbo i Serra  * will be passed as a pointer to another function, since that function will
407840d9f13SEnric Balletbo i Serra  * not know about the misaligment caused by the parent structure's packing.
408840d9f13SEnric Balletbo i Serra  *
409840d9f13SEnric Balletbo i Serra  * Also be very careful using __packed - particularly when nesting non-packed
410840d9f13SEnric Balletbo i Serra  * structures inside packed ones.  In fact, DO NOT use __packed directly;
411840d9f13SEnric Balletbo i Serra  * always use one of these attributes.
412840d9f13SEnric Balletbo i Serra  *
413840d9f13SEnric Balletbo i Serra  * Once everything is annotated properly, the following search strings should
414840d9f13SEnric Balletbo i Serra  * not return ANY matches in this file other than right here:
415840d9f13SEnric Balletbo i Serra  *
416840d9f13SEnric Balletbo i Serra  * "__packed" - generates inefficient code; all sub-structs must also be packed
417840d9f13SEnric Balletbo i Serra  *
418840d9f13SEnric Balletbo i Serra  * "struct [^_]" - all structs should be annotated, except for structs that are
419840d9f13SEnric Balletbo i Serra  * members of other structs/unions (and their original declarations should be
420840d9f13SEnric Balletbo i Serra  * annotated).
421840d9f13SEnric Balletbo i Serra  */
422840d9f13SEnric Balletbo i Serra 
423840d9f13SEnric Balletbo i Serra /*
424840d9f13SEnric Balletbo i Serra  * Packed structures make no assumption about alignment, so they do inefficient
425840d9f13SEnric Balletbo i Serra  * byte-wise reads.
426840d9f13SEnric Balletbo i Serra  */
427840d9f13SEnric Balletbo i Serra #define __ec_align1 __packed
428840d9f13SEnric Balletbo i Serra #define __ec_align2 __packed
429840d9f13SEnric Balletbo i Serra #define __ec_align4 __packed
430840d9f13SEnric Balletbo i Serra #define __ec_align_size1 __packed
431840d9f13SEnric Balletbo i Serra #define __ec_align_offset1 __packed
432840d9f13SEnric Balletbo i Serra #define __ec_align_offset2 __packed
433840d9f13SEnric Balletbo i Serra #define __ec_todo_packed __packed
434840d9f13SEnric Balletbo i Serra #define __ec_todo_unpacked
435840d9f13SEnric Balletbo i Serra 
436840d9f13SEnric Balletbo i Serra 
437840d9f13SEnric Balletbo i Serra /* LPC command status byte masks */
438840d9f13SEnric Balletbo i Serra /* EC has written a byte in the data register and host hasn't read it yet */
439840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_TO_HOST     0x01
440840d9f13SEnric Balletbo i Serra /* Host has written a command/data byte and the EC hasn't read it yet */
441840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_FROM_HOST   0x02
442840d9f13SEnric Balletbo i Serra /* EC is processing a command */
443840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_PROCESSING  0x04
444840d9f13SEnric Balletbo i Serra /* Last write to EC was a command, not data */
445840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_LAST_CMD    0x08
446840d9f13SEnric Balletbo i Serra /* EC is in burst mode */
447840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_BURST_MODE  0x10
448840d9f13SEnric Balletbo i Serra /* SCI event is pending (requesting SCI query) */
449840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_SCI_PENDING 0x20
450840d9f13SEnric Balletbo i Serra /* SMI event is pending (requesting SMI query) */
451840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_SMI_PENDING 0x40
452840d9f13SEnric Balletbo i Serra /* (reserved) */
453840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_RESERVED    0x80
454840d9f13SEnric Balletbo i Serra 
455840d9f13SEnric Balletbo i Serra /*
456840d9f13SEnric Balletbo i Serra  * EC is busy.  This covers both the EC processing a command, and the host has
457840d9f13SEnric Balletbo i Serra  * written a new command but the EC hasn't picked it up yet.
458840d9f13SEnric Balletbo i Serra  */
459840d9f13SEnric Balletbo i Serra #define EC_LPC_STATUS_BUSY_MASK \
460840d9f13SEnric Balletbo i Serra 	(EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
461840d9f13SEnric Balletbo i Serra 
462840d9f13SEnric Balletbo i Serra /*
463840d9f13SEnric Balletbo i Serra  * Host command response codes (16-bit).  Note that response codes should be
464840d9f13SEnric Balletbo i Serra  * stored in a uint16_t rather than directly in a value of this type.
465840d9f13SEnric Balletbo i Serra  */
466840d9f13SEnric Balletbo i Serra enum ec_status {
467840d9f13SEnric Balletbo i Serra 	EC_RES_SUCCESS = 0,
468840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_COMMAND = 1,
469840d9f13SEnric Balletbo i Serra 	EC_RES_ERROR = 2,
470840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_PARAM = 3,
471840d9f13SEnric Balletbo i Serra 	EC_RES_ACCESS_DENIED = 4,
472840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_RESPONSE = 5,
473840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_VERSION = 6,
474840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_CHECKSUM = 7,
475840d9f13SEnric Balletbo i Serra 	EC_RES_IN_PROGRESS = 8,		/* Accepted, command in progress */
476840d9f13SEnric Balletbo i Serra 	EC_RES_UNAVAILABLE = 9,		/* No response available */
477840d9f13SEnric Balletbo i Serra 	EC_RES_TIMEOUT = 10,		/* We got a timeout */
478840d9f13SEnric Balletbo i Serra 	EC_RES_OVERFLOW = 11,		/* Table / data overflow */
479840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_HEADER = 12,     /* Header contains invalid data */
480840d9f13SEnric Balletbo i Serra 	EC_RES_REQUEST_TRUNCATED = 13,  /* Didn't get the entire request */
481840d9f13SEnric Balletbo i Serra 	EC_RES_RESPONSE_TOO_BIG = 14,   /* Response was too big to handle */
482840d9f13SEnric Balletbo i Serra 	EC_RES_BUS_ERROR = 15,		/* Communications bus error */
483840d9f13SEnric Balletbo i Serra 	EC_RES_BUSY = 16,		/* Up but too busy.  Should retry */
484840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_HEADER_VERSION = 17,  /* Header version invalid */
485840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_HEADER_CRC = 18,      /* Header CRC invalid */
486840d9f13SEnric Balletbo i Serra 	EC_RES_INVALID_DATA_CRC = 19,        /* Data CRC invalid */
487840d9f13SEnric Balletbo i Serra 	EC_RES_DUP_UNAVAILABLE = 20,         /* Can't resend response */
488840d9f13SEnric Balletbo i Serra };
489840d9f13SEnric Balletbo i Serra 
490840d9f13SEnric Balletbo i Serra /*
491840d9f13SEnric Balletbo i Serra  * Host event codes.  Note these are 1-based, not 0-based, because ACPI query
492840d9f13SEnric Balletbo i Serra  * EC command uses code 0 to mean "no event pending".  We explicitly specify
493840d9f13SEnric Balletbo i Serra  * each value in the enum listing so they won't change if we delete/insert an
494840d9f13SEnric Balletbo i Serra  * item or rearrange the list (it needs to be stable across platforms, not
495840d9f13SEnric Balletbo i Serra  * just within a single compiled instance).
496840d9f13SEnric Balletbo i Serra  */
497840d9f13SEnric Balletbo i Serra enum host_event_code {
498840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_LID_CLOSED = 1,
499840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_LID_OPEN = 2,
500840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_POWER_BUTTON = 3,
501840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_AC_CONNECTED = 4,
502840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_AC_DISCONNECTED = 5,
503840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_BATTERY_LOW = 6,
504840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_BATTERY_CRITICAL = 7,
505840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_BATTERY = 8,
506840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
507840d9f13SEnric Balletbo i Serra 	/* Event generated by a device attached to the EC */
508840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_DEVICE = 10,
509840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_THERMAL = 11,
510840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_USB_CHARGER = 12,
511840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_KEY_PRESSED = 13,
512840d9f13SEnric Balletbo i Serra 	/*
513840d9f13SEnric Balletbo i Serra 	 * EC has finished initializing the host interface.  The host can check
514840d9f13SEnric Balletbo i Serra 	 * for this event following sending a EC_CMD_REBOOT_EC command to
515840d9f13SEnric Balletbo i Serra 	 * determine when the EC is ready to accept subsequent commands.
516840d9f13SEnric Balletbo i Serra 	 */
517840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_INTERFACE_READY = 14,
518840d9f13SEnric Balletbo i Serra 	/* Keyboard recovery combo has been pressed */
519840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
520840d9f13SEnric Balletbo i Serra 
521840d9f13SEnric Balletbo i Serra 	/* Shutdown due to thermal overload */
522840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
523840d9f13SEnric Balletbo i Serra 	/* Shutdown due to battery level too low */
524840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
525840d9f13SEnric Balletbo i Serra 
526840d9f13SEnric Balletbo i Serra 	/* Suggest that the AP throttle itself */
527840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_THROTTLE_START = 18,
528840d9f13SEnric Balletbo i Serra 	/* Suggest that the AP resume normal speed */
529840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_THROTTLE_STOP = 19,
530840d9f13SEnric Balletbo i Serra 
531840d9f13SEnric Balletbo i Serra 	/* Hang detect logic detected a hang and host event timeout expired */
532840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_HANG_DETECT = 20,
533840d9f13SEnric Balletbo i Serra 	/* Hang detect logic detected a hang and warm rebooted the AP */
534840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_HANG_REBOOT = 21,
535840d9f13SEnric Balletbo i Serra 
536840d9f13SEnric Balletbo i Serra 	/* PD MCU triggering host event */
537840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_PD_MCU = 22,
538840d9f13SEnric Balletbo i Serra 
539840d9f13SEnric Balletbo i Serra 	/* Battery Status flags have changed */
540840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_BATTERY_STATUS = 23,
541840d9f13SEnric Balletbo i Serra 
542840d9f13SEnric Balletbo i Serra 	/* EC encountered a panic, triggering a reset */
543840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_PANIC = 24,
544840d9f13SEnric Balletbo i Serra 
545840d9f13SEnric Balletbo i Serra 	/* Keyboard fastboot combo has been pressed */
546840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
547840d9f13SEnric Balletbo i Serra 
548840d9f13SEnric Balletbo i Serra 	/* EC RTC event occurred */
549840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_RTC = 26,
550840d9f13SEnric Balletbo i Serra 
551840d9f13SEnric Balletbo i Serra 	/* Emulate MKBP event */
552840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_MKBP = 27,
553840d9f13SEnric Balletbo i Serra 
554840d9f13SEnric Balletbo i Serra 	/* EC desires to change state of host-controlled USB mux */
555840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_USB_MUX = 28,
556840d9f13SEnric Balletbo i Serra 
557840d9f13SEnric Balletbo i Serra 	/* TABLET/LAPTOP mode or detachable base attach/detach event */
558840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_MODE_CHANGE = 29,
559840d9f13SEnric Balletbo i Serra 
560840d9f13SEnric Balletbo i Serra 	/* Keyboard recovery combo with hardware reinitialization */
561840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
562840d9f13SEnric Balletbo i Serra 
563b6bc07d4STzung-Bi Shih 	/* WoV */
564b6bc07d4STzung-Bi Shih 	EC_HOST_EVENT_WOV = 31,
565b6bc07d4STzung-Bi Shih 
566840d9f13SEnric Balletbo i Serra 	/*
567840d9f13SEnric Balletbo i Serra 	 * The high bit of the event mask is not used as a host event code.  If
568840d9f13SEnric Balletbo i Serra 	 * it reads back as set, then the entire event mask should be
569840d9f13SEnric Balletbo i Serra 	 * considered invalid by the host.  This can happen when reading the
570840d9f13SEnric Balletbo i Serra 	 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
571840d9f13SEnric Balletbo i Serra 	 * not initialized on the EC, or improperly configured on the host.
572840d9f13SEnric Balletbo i Serra 	 */
573840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_INVALID = 32
574840d9f13SEnric Balletbo i Serra };
575840d9f13SEnric Balletbo i Serra /* Host event mask */
576840d9f13SEnric Balletbo i Serra #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)
577840d9f13SEnric Balletbo i Serra 
578840d9f13SEnric Balletbo i Serra /**
579840d9f13SEnric Balletbo i Serra  * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS
580840d9f13SEnric Balletbo i Serra  * @flags: The host argument flags.
581840d9f13SEnric Balletbo i Serra  * @command_version: Command version.
582840d9f13SEnric Balletbo i Serra  * @data_size: The length of data.
583840d9f13SEnric Balletbo i Serra  * @checksum: Checksum; sum of command + flags + command_version + data_size +
584840d9f13SEnric Balletbo i Serra  *            all params/response data bytes.
585840d9f13SEnric Balletbo i Serra  */
586840d9f13SEnric Balletbo i Serra struct ec_lpc_host_args {
587840d9f13SEnric Balletbo i Serra 	uint8_t flags;
588840d9f13SEnric Balletbo i Serra 	uint8_t command_version;
589840d9f13SEnric Balletbo i Serra 	uint8_t data_size;
590840d9f13SEnric Balletbo i Serra 	uint8_t checksum;
591840d9f13SEnric Balletbo i Serra } __ec_align4;
592840d9f13SEnric Balletbo i Serra 
593840d9f13SEnric Balletbo i Serra /* Flags for ec_lpc_host_args.flags */
594840d9f13SEnric Balletbo i Serra /*
595840d9f13SEnric Balletbo i Serra  * Args are from host.  Data area at EC_LPC_ADDR_HOST_PARAM contains command
596840d9f13SEnric Balletbo i Serra  * params.
597840d9f13SEnric Balletbo i Serra  *
598840d9f13SEnric Balletbo i Serra  * If EC gets a command and this flag is not set, this is an old-style command.
599840d9f13SEnric Balletbo i Serra  * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
600840d9f13SEnric Balletbo i Serra  * unknown length.  EC must respond with an old-style response (that is,
601840d9f13SEnric Balletbo i Serra  * without setting EC_HOST_ARGS_FLAG_TO_HOST).
602840d9f13SEnric Balletbo i Serra  */
603840d9f13SEnric Balletbo i Serra #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
604840d9f13SEnric Balletbo i Serra /*
605840d9f13SEnric Balletbo i Serra  * Args are from EC.  Data area at EC_LPC_ADDR_HOST_PARAM contains response.
606840d9f13SEnric Balletbo i Serra  *
607840d9f13SEnric Balletbo i Serra  * If EC responds to a command and this flag is not set, this is an old-style
608840d9f13SEnric Balletbo i Serra  * response.  Command version is 0 and response data from EC is at
609840d9f13SEnric Balletbo i Serra  * EC_LPC_ADDR_OLD_PARAM with unknown length.
610840d9f13SEnric Balletbo i Serra  */
611840d9f13SEnric Balletbo i Serra #define EC_HOST_ARGS_FLAG_TO_HOST   0x02
612840d9f13SEnric Balletbo i Serra 
613840d9f13SEnric Balletbo i Serra /*****************************************************************************/
614840d9f13SEnric Balletbo i Serra /*
615840d9f13SEnric Balletbo i Serra  * Byte codes returned by EC over SPI interface.
616840d9f13SEnric Balletbo i Serra  *
617840d9f13SEnric Balletbo i Serra  * These can be used by the AP to debug the EC interface, and to determine
618840d9f13SEnric Balletbo i Serra  * when the EC is not in a state where it will ever get around to responding
619840d9f13SEnric Balletbo i Serra  * to the AP.
620840d9f13SEnric Balletbo i Serra  *
621840d9f13SEnric Balletbo i Serra  * Example of sequence of bytes read from EC for a current good transfer:
622840d9f13SEnric Balletbo i Serra  *   1. -                  - AP asserts chip select (CS#)
623840d9f13SEnric Balletbo i Serra  *   2. EC_SPI_OLD_READY   - AP sends first byte(s) of request
624840d9f13SEnric Balletbo i Serra  *   3. -                  - EC starts handling CS# interrupt
625840d9f13SEnric Balletbo i Serra  *   4. EC_SPI_RECEIVING   - AP sends remaining byte(s) of request
626840d9f13SEnric Balletbo i Serra  *   5. EC_SPI_PROCESSING  - EC starts processing request; AP is clocking in
627840d9f13SEnric Balletbo i Serra  *                           bytes looking for EC_SPI_FRAME_START
628840d9f13SEnric Balletbo i Serra  *   6. -                  - EC finishes processing and sets up response
629840d9f13SEnric Balletbo i Serra  *   7. EC_SPI_FRAME_START - AP reads frame byte
630840d9f13SEnric Balletbo i Serra  *   8. (response packet)  - AP reads response packet
631840d9f13SEnric Balletbo i Serra  *   9. EC_SPI_PAST_END    - Any additional bytes read by AP
632840d9f13SEnric Balletbo i Serra  *   10 -                  - AP deasserts chip select
633840d9f13SEnric Balletbo i Serra  *   11 -                  - EC processes CS# interrupt and sets up DMA for
634840d9f13SEnric Balletbo i Serra  *                           next request
635840d9f13SEnric Balletbo i Serra  *
636840d9f13SEnric Balletbo i Serra  * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
637840d9f13SEnric Balletbo i Serra  * the following byte values:
638840d9f13SEnric Balletbo i Serra  *   EC_SPI_OLD_READY
639840d9f13SEnric Balletbo i Serra  *   EC_SPI_RX_READY
640840d9f13SEnric Balletbo i Serra  *   EC_SPI_RECEIVING
641840d9f13SEnric Balletbo i Serra  *   EC_SPI_PROCESSING
642840d9f13SEnric Balletbo i Serra  *
643840d9f13SEnric Balletbo i Serra  * Then the EC found an error in the request, or was not ready for the request
644840d9f13SEnric Balletbo i Serra  * and lost data.  The AP should give up waiting for EC_SPI_FRAME_START,
645840d9f13SEnric Balletbo i Serra  * because the EC is unable to tell when the AP is done sending its request.
646840d9f13SEnric Balletbo i Serra  */
647840d9f13SEnric Balletbo i Serra 
648840d9f13SEnric Balletbo i Serra /*
649840d9f13SEnric Balletbo i Serra  * Framing byte which precedes a response packet from the EC.  After sending a
650840d9f13SEnric Balletbo i Serra  * request, the AP will clock in bytes until it sees the framing byte, then
651840d9f13SEnric Balletbo i Serra  * clock in the response packet.
652840d9f13SEnric Balletbo i Serra  */
653840d9f13SEnric Balletbo i Serra #define EC_SPI_FRAME_START    0xec
654840d9f13SEnric Balletbo i Serra 
655840d9f13SEnric Balletbo i Serra /*
656840d9f13SEnric Balletbo i Serra  * Padding bytes which are clocked out after the end of a response packet.
657840d9f13SEnric Balletbo i Serra  */
658840d9f13SEnric Balletbo i Serra #define EC_SPI_PAST_END       0xed
659840d9f13SEnric Balletbo i Serra 
660840d9f13SEnric Balletbo i Serra /*
661840d9f13SEnric Balletbo i Serra  * EC is ready to receive, and has ignored the byte sent by the AP.  EC expects
662840d9f13SEnric Balletbo i Serra  * that the AP will send a valid packet header (starting with
663840d9f13SEnric Balletbo i Serra  * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
664840d9f13SEnric Balletbo i Serra  */
665840d9f13SEnric Balletbo i Serra #define EC_SPI_RX_READY       0xf8
666840d9f13SEnric Balletbo i Serra 
667840d9f13SEnric Balletbo i Serra /*
668840d9f13SEnric Balletbo i Serra  * EC has started receiving the request from the AP, but hasn't started
669840d9f13SEnric Balletbo i Serra  * processing it yet.
670840d9f13SEnric Balletbo i Serra  */
671840d9f13SEnric Balletbo i Serra #define EC_SPI_RECEIVING      0xf9
672840d9f13SEnric Balletbo i Serra 
673840d9f13SEnric Balletbo i Serra /* EC has received the entire request from the AP and is processing it. */
674840d9f13SEnric Balletbo i Serra #define EC_SPI_PROCESSING     0xfa
675840d9f13SEnric Balletbo i Serra 
676840d9f13SEnric Balletbo i Serra /*
677840d9f13SEnric Balletbo i Serra  * EC received bad data from the AP, such as a packet header with an invalid
678840d9f13SEnric Balletbo i Serra  * length.  EC will ignore all data until chip select deasserts.
679840d9f13SEnric Balletbo i Serra  */
680840d9f13SEnric Balletbo i Serra #define EC_SPI_RX_BAD_DATA    0xfb
681840d9f13SEnric Balletbo i Serra 
682840d9f13SEnric Balletbo i Serra /*
683840d9f13SEnric Balletbo i Serra  * EC received data from the AP before it was ready.  That is, the AP asserted
684840d9f13SEnric Balletbo i Serra  * chip select and started clocking data before the EC was ready to receive it.
685840d9f13SEnric Balletbo i Serra  * EC will ignore all data until chip select deasserts.
686840d9f13SEnric Balletbo i Serra  */
687840d9f13SEnric Balletbo i Serra #define EC_SPI_NOT_READY      0xfc
688840d9f13SEnric Balletbo i Serra 
689840d9f13SEnric Balletbo i Serra /*
690840d9f13SEnric Balletbo i Serra  * EC was ready to receive a request from the AP.  EC has treated the byte sent
691840d9f13SEnric Balletbo i Serra  * by the AP as part of a request packet, or (for old-style ECs) is processing
692840d9f13SEnric Balletbo i Serra  * a fully received packet but is not ready to respond yet.
693840d9f13SEnric Balletbo i Serra  */
694840d9f13SEnric Balletbo i Serra #define EC_SPI_OLD_READY      0xfd
695840d9f13SEnric Balletbo i Serra 
696840d9f13SEnric Balletbo i Serra /*****************************************************************************/
697840d9f13SEnric Balletbo i Serra 
698840d9f13SEnric Balletbo i Serra /*
699840d9f13SEnric Balletbo i Serra  * Protocol version 2 for I2C and SPI send a request this way:
700840d9f13SEnric Balletbo i Serra  *
701840d9f13SEnric Balletbo i Serra  *	0	EC_CMD_VERSION0 + (command version)
702840d9f13SEnric Balletbo i Serra  *	1	Command number
703840d9f13SEnric Balletbo i Serra  *	2	Length of params = N
704840d9f13SEnric Balletbo i Serra  *	3..N+2	Params, if any
705840d9f13SEnric Balletbo i Serra  *	N+3	8-bit checksum of bytes 0..N+2
706840d9f13SEnric Balletbo i Serra  *
707840d9f13SEnric Balletbo i Serra  * The corresponding response is:
708840d9f13SEnric Balletbo i Serra  *
709840d9f13SEnric Balletbo i Serra  *	0	Result code (EC_RES_*)
710840d9f13SEnric Balletbo i Serra  *	1	Length of params = M
711840d9f13SEnric Balletbo i Serra  *	2..M+1	Params, if any
712840d9f13SEnric Balletbo i Serra  *	M+2	8-bit checksum of bytes 0..M+1
713840d9f13SEnric Balletbo i Serra  */
714840d9f13SEnric Balletbo i Serra #define EC_PROTO2_REQUEST_HEADER_BYTES 3
715840d9f13SEnric Balletbo i Serra #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
716840d9f13SEnric Balletbo i Serra #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES +	\
717840d9f13SEnric Balletbo i Serra 				    EC_PROTO2_REQUEST_TRAILER_BYTES)
718840d9f13SEnric Balletbo i Serra 
719840d9f13SEnric Balletbo i Serra #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
720840d9f13SEnric Balletbo i Serra #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
721840d9f13SEnric Balletbo i Serra #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES +	\
722840d9f13SEnric Balletbo i Serra 				     EC_PROTO2_RESPONSE_TRAILER_BYTES)
723840d9f13SEnric Balletbo i Serra 
724840d9f13SEnric Balletbo i Serra /* Parameter length was limited by the LPC interface */
725840d9f13SEnric Balletbo i Serra #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
726840d9f13SEnric Balletbo i Serra 
727840d9f13SEnric Balletbo i Serra /* Maximum request and response packet sizes for protocol version 2 */
728840d9f13SEnric Balletbo i Serra #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD +	\
729840d9f13SEnric Balletbo i Serra 				    EC_PROTO2_MAX_PARAM_SIZE)
730840d9f13SEnric Balletbo i Serra #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD +	\
731840d9f13SEnric Balletbo i Serra 				     EC_PROTO2_MAX_PARAM_SIZE)
732840d9f13SEnric Balletbo i Serra 
733840d9f13SEnric Balletbo i Serra /*****************************************************************************/
734840d9f13SEnric Balletbo i Serra 
735840d9f13SEnric Balletbo i Serra /*
736840d9f13SEnric Balletbo i Serra  * Value written to legacy command port / prefix byte to indicate protocol
737840d9f13SEnric Balletbo i Serra  * 3+ structs are being used.  Usage is bus-dependent.
738840d9f13SEnric Balletbo i Serra  */
739840d9f13SEnric Balletbo i Serra #define EC_COMMAND_PROTOCOL_3 0xda
740840d9f13SEnric Balletbo i Serra 
741840d9f13SEnric Balletbo i Serra #define EC_HOST_REQUEST_VERSION 3
742840d9f13SEnric Balletbo i Serra 
743840d9f13SEnric Balletbo i Serra /**
744840d9f13SEnric Balletbo i Serra  * struct ec_host_request - Version 3 request from host.
745840d9f13SEnric Balletbo i Serra  * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it
746840d9f13SEnric Balletbo i Serra  *                  receives a header with a version it doesn't know how to
747840d9f13SEnric Balletbo i Serra  *                  parse.
748840d9f13SEnric Balletbo i Serra  * @checksum: Checksum of request and data; sum of all bytes including checksum
749840d9f13SEnric Balletbo i Serra  *            should total to 0.
750840d9f13SEnric Balletbo i Serra  * @command: Command to send (EC_CMD_...)
751840d9f13SEnric Balletbo i Serra  * @command_version: Command version.
752840d9f13SEnric Balletbo i Serra  * @reserved: Unused byte in current protocol version; set to 0.
753840d9f13SEnric Balletbo i Serra  * @data_len: Length of data which follows this header.
754840d9f13SEnric Balletbo i Serra  */
755840d9f13SEnric Balletbo i Serra struct ec_host_request {
756840d9f13SEnric Balletbo i Serra 	uint8_t struct_version;
757840d9f13SEnric Balletbo i Serra 	uint8_t checksum;
758840d9f13SEnric Balletbo i Serra 	uint16_t command;
759840d9f13SEnric Balletbo i Serra 	uint8_t command_version;
760840d9f13SEnric Balletbo i Serra 	uint8_t reserved;
761840d9f13SEnric Balletbo i Serra 	uint16_t data_len;
762840d9f13SEnric Balletbo i Serra } __ec_align4;
763840d9f13SEnric Balletbo i Serra 
764840d9f13SEnric Balletbo i Serra #define EC_HOST_RESPONSE_VERSION 3
765840d9f13SEnric Balletbo i Serra 
766840d9f13SEnric Balletbo i Serra /**
767840d9f13SEnric Balletbo i Serra  * struct ec_host_response - Version 3 response from EC.
768840d9f13SEnric Balletbo i Serra  * @struct_version: Struct version (=3).
769840d9f13SEnric Balletbo i Serra  * @checksum: Checksum of response and data; sum of all bytes including
770840d9f13SEnric Balletbo i Serra  *            checksum should total to 0.
771840d9f13SEnric Balletbo i Serra  * @result: EC's response to the command (separate from communication failure)
772840d9f13SEnric Balletbo i Serra  * @data_len: Length of data which follows this header.
773840d9f13SEnric Balletbo i Serra  * @reserved: Unused bytes in current protocol version; set to 0.
774840d9f13SEnric Balletbo i Serra  */
775840d9f13SEnric Balletbo i Serra struct ec_host_response {
776840d9f13SEnric Balletbo i Serra 	uint8_t struct_version;
777840d9f13SEnric Balletbo i Serra 	uint8_t checksum;
778840d9f13SEnric Balletbo i Serra 	uint16_t result;
779840d9f13SEnric Balletbo i Serra 	uint16_t data_len;
780840d9f13SEnric Balletbo i Serra 	uint16_t reserved;
781840d9f13SEnric Balletbo i Serra } __ec_align4;
782840d9f13SEnric Balletbo i Serra 
783840d9f13SEnric Balletbo i Serra /*****************************************************************************/
784840d9f13SEnric Balletbo i Serra 
785840d9f13SEnric Balletbo i Serra /*
786840d9f13SEnric Balletbo i Serra  * Host command protocol V4.
787840d9f13SEnric Balletbo i Serra  *
788840d9f13SEnric Balletbo i Serra  * Packets always start with a request or response header.  They are followed
789840d9f13SEnric Balletbo i Serra  * by data_len bytes of data.  If the data_crc_present flag is set, the data
7908d597608SXiang wangx  * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1
791840d9f13SEnric Balletbo i Serra  * polynomial.
792840d9f13SEnric Balletbo i Serra  *
793840d9f13SEnric Balletbo i Serra  * Host algorithm when sending a request q:
794840d9f13SEnric Balletbo i Serra  *
795840d9f13SEnric Balletbo i Serra  * 101) tries_left=(some value, e.g. 3);
796840d9f13SEnric Balletbo i Serra  * 102) q.seq_num++
797840d9f13SEnric Balletbo i Serra  * 103) q.seq_dup=0
798840d9f13SEnric Balletbo i Serra  * 104) Calculate q.header_crc.
799840d9f13SEnric Balletbo i Serra  * 105) Send request q to EC.
800840d9f13SEnric Balletbo i Serra  * 106) Wait for response r.  Go to 201 if received or 301 if timeout.
801840d9f13SEnric Balletbo i Serra  *
802840d9f13SEnric Balletbo i Serra  * 201) If r.struct_version != 4, go to 301.
803840d9f13SEnric Balletbo i Serra  * 202) If r.header_crc mismatches calculated CRC for r header, go to 301.
804840d9f13SEnric Balletbo i Serra  * 203) If r.data_crc_present and r.data_crc mismatches, go to 301.
805840d9f13SEnric Balletbo i Serra  * 204) If r.seq_num != q.seq_num, go to 301.
806840d9f13SEnric Balletbo i Serra  * 205) If r.seq_dup == q.seq_dup, return success.
807840d9f13SEnric Balletbo i Serra  * 207) If r.seq_dup == 1, go to 301.
808840d9f13SEnric Balletbo i Serra  * 208) Return error.
809840d9f13SEnric Balletbo i Serra  *
810840d9f13SEnric Balletbo i Serra  * 301) If --tries_left <= 0, return error.
811840d9f13SEnric Balletbo i Serra  * 302) If q.seq_dup == 1, go to 105.
812840d9f13SEnric Balletbo i Serra  * 303) q.seq_dup = 1
813840d9f13SEnric Balletbo i Serra  * 304) Go to 104.
814840d9f13SEnric Balletbo i Serra  *
815840d9f13SEnric Balletbo i Serra  * EC algorithm when receiving a request q.
816840d9f13SEnric Balletbo i Serra  * EC has response buffer r, error buffer e.
817840d9f13SEnric Balletbo i Serra  *
818840d9f13SEnric Balletbo i Serra  * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION
819840d9f13SEnric Balletbo i Serra  *      and go to 301
820840d9f13SEnric Balletbo i Serra  * 102) If q.header_crc mismatches calculated CRC, set e.result =
821840d9f13SEnric Balletbo i Serra  *      EC_RES_INVALID_HEADER_CRC and go to 301
822840d9f13SEnric Balletbo i Serra  * 103) If q.data_crc_present, calculate data CRC.  If that mismatches the CRC
823840d9f13SEnric Balletbo i Serra  *      byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC
824840d9f13SEnric Balletbo i Serra  *      and go to 301.
825840d9f13SEnric Balletbo i Serra  * 104) If q.seq_dup == 0, go to 201.
826840d9f13SEnric Balletbo i Serra  * 105) If q.seq_num != r.seq_num, go to 201.
827840d9f13SEnric Balletbo i Serra  * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203.
828840d9f13SEnric Balletbo i Serra  *
829840d9f13SEnric Balletbo i Serra  * 201) Process request q into response r.
830840d9f13SEnric Balletbo i Serra  * 202) r.seq_num = q.seq_num
831840d9f13SEnric Balletbo i Serra  * 203) r.seq_dup = q.seq_dup
832840d9f13SEnric Balletbo i Serra  * 204) Calculate r.header_crc
833840d9f13SEnric Balletbo i Serra  * 205) If r.data_len > 0 and data is no longer available, set e.result =
834840d9f13SEnric Balletbo i Serra  *      EC_RES_DUP_UNAVAILABLE and go to 301.
835840d9f13SEnric Balletbo i Serra  * 206) Send response r.
836840d9f13SEnric Balletbo i Serra  *
837840d9f13SEnric Balletbo i Serra  * 301) e.seq_num = q.seq_num
838840d9f13SEnric Balletbo i Serra  * 302) e.seq_dup = q.seq_dup
839840d9f13SEnric Balletbo i Serra  * 303) Calculate e.header_crc.
840840d9f13SEnric Balletbo i Serra  * 304) Send error response e.
841840d9f13SEnric Balletbo i Serra  */
842840d9f13SEnric Balletbo i Serra 
843840d9f13SEnric Balletbo i Serra /* Version 4 request from host */
844840d9f13SEnric Balletbo i Serra struct ec_host_request4 {
845840d9f13SEnric Balletbo i Serra 	/*
846840d9f13SEnric Balletbo i Serra 	 * bits 0-3: struct_version: Structure version (=4)
847840d9f13SEnric Balletbo i Serra 	 * bit    4: is_response: Is response (=0)
848840d9f13SEnric Balletbo i Serra 	 * bits 5-6: seq_num: Sequence number
849840d9f13SEnric Balletbo i Serra 	 * bit    7: seq_dup: Sequence duplicate flag
850840d9f13SEnric Balletbo i Serra 	 */
851840d9f13SEnric Balletbo i Serra 	uint8_t fields0;
852840d9f13SEnric Balletbo i Serra 
853840d9f13SEnric Balletbo i Serra 	/*
854840d9f13SEnric Balletbo i Serra 	 * bits 0-4: command_version: Command version
855840d9f13SEnric Balletbo i Serra 	 * bits 5-6: Reserved (set 0, ignore on read)
856840d9f13SEnric Balletbo i Serra 	 * bit    7: data_crc_present: Is data CRC present after data
857840d9f13SEnric Balletbo i Serra 	 */
858840d9f13SEnric Balletbo i Serra 	uint8_t fields1;
859840d9f13SEnric Balletbo i Serra 
860840d9f13SEnric Balletbo i Serra 	/* Command code (EC_CMD_*) */
861840d9f13SEnric Balletbo i Serra 	uint16_t command;
862840d9f13SEnric Balletbo i Serra 
863840d9f13SEnric Balletbo i Serra 	/* Length of data which follows this header (not including data CRC) */
864840d9f13SEnric Balletbo i Serra 	uint16_t data_len;
865840d9f13SEnric Balletbo i Serra 
866840d9f13SEnric Balletbo i Serra 	/* Reserved (set 0, ignore on read) */
867840d9f13SEnric Balletbo i Serra 	uint8_t reserved;
868840d9f13SEnric Balletbo i Serra 
869840d9f13SEnric Balletbo i Serra 	/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
870840d9f13SEnric Balletbo i Serra 	uint8_t header_crc;
871840d9f13SEnric Balletbo i Serra } __ec_align4;
872840d9f13SEnric Balletbo i Serra 
873840d9f13SEnric Balletbo i Serra /* Version 4 response from EC */
874840d9f13SEnric Balletbo i Serra struct ec_host_response4 {
875840d9f13SEnric Balletbo i Serra 	/*
876840d9f13SEnric Balletbo i Serra 	 * bits 0-3: struct_version: Structure version (=4)
877840d9f13SEnric Balletbo i Serra 	 * bit    4: is_response: Is response (=1)
878840d9f13SEnric Balletbo i Serra 	 * bits 5-6: seq_num: Sequence number
879840d9f13SEnric Balletbo i Serra 	 * bit    7: seq_dup: Sequence duplicate flag
880840d9f13SEnric Balletbo i Serra 	 */
881840d9f13SEnric Balletbo i Serra 	uint8_t fields0;
882840d9f13SEnric Balletbo i Serra 
883840d9f13SEnric Balletbo i Serra 	/*
884840d9f13SEnric Balletbo i Serra 	 * bits 0-6: Reserved (set 0, ignore on read)
885840d9f13SEnric Balletbo i Serra 	 * bit    7: data_crc_present: Is data CRC present after data
886840d9f13SEnric Balletbo i Serra 	 */
887840d9f13SEnric Balletbo i Serra 	uint8_t fields1;
888840d9f13SEnric Balletbo i Serra 
889840d9f13SEnric Balletbo i Serra 	/* Result code (EC_RES_*) */
890840d9f13SEnric Balletbo i Serra 	uint16_t result;
891840d9f13SEnric Balletbo i Serra 
892840d9f13SEnric Balletbo i Serra 	/* Length of data which follows this header (not including data CRC) */
893840d9f13SEnric Balletbo i Serra 	uint16_t data_len;
894840d9f13SEnric Balletbo i Serra 
895840d9f13SEnric Balletbo i Serra 	/* Reserved (set 0, ignore on read) */
896840d9f13SEnric Balletbo i Serra 	uint8_t reserved;
897840d9f13SEnric Balletbo i Serra 
898840d9f13SEnric Balletbo i Serra 	/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
899840d9f13SEnric Balletbo i Serra 	uint8_t header_crc;
900840d9f13SEnric Balletbo i Serra } __ec_align4;
901840d9f13SEnric Balletbo i Serra 
902840d9f13SEnric Balletbo i Serra /* Fields in fields0 byte */
903840d9f13SEnric Balletbo i Serra #define EC_PACKET4_0_STRUCT_VERSION_MASK	0x0f
904840d9f13SEnric Balletbo i Serra #define EC_PACKET4_0_IS_RESPONSE_MASK		0x10
905840d9f13SEnric Balletbo i Serra #define EC_PACKET4_0_SEQ_NUM_SHIFT		5
906840d9f13SEnric Balletbo i Serra #define EC_PACKET4_0_SEQ_NUM_MASK		0x60
907840d9f13SEnric Balletbo i Serra #define EC_PACKET4_0_SEQ_DUP_MASK		0x80
908840d9f13SEnric Balletbo i Serra 
909840d9f13SEnric Balletbo i Serra /* Fields in fields1 byte */
910840d9f13SEnric Balletbo i Serra #define EC_PACKET4_1_COMMAND_VERSION_MASK	0x1f  /* (request only) */
911840d9f13SEnric Balletbo i Serra #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK	0x80
912840d9f13SEnric Balletbo i Serra 
913840d9f13SEnric Balletbo i Serra /*****************************************************************************/
914840d9f13SEnric Balletbo i Serra /*
915840d9f13SEnric Balletbo i Serra  * Notes on commands:
916840d9f13SEnric Balletbo i Serra  *
917840d9f13SEnric Balletbo i Serra  * Each command is an 16-bit command value.  Commands which take params or
918840d9f13SEnric Balletbo i Serra  * return response data specify structures for that data.  If no structure is
919840d9f13SEnric Balletbo i Serra  * specified, the command does not input or output data, respectively.
920840d9f13SEnric Balletbo i Serra  * Parameter/response length is implicit in the structs.  Some underlying
921840d9f13SEnric Balletbo i Serra  * communication protocols (I2C, SPI) may add length or checksum headers, but
922840d9f13SEnric Balletbo i Serra  * those are implementation-dependent and not defined here.
923840d9f13SEnric Balletbo i Serra  *
924840d9f13SEnric Balletbo i Serra  * All commands MUST be #defined to be 4-digit UPPER CASE hex values
925840d9f13SEnric Balletbo i Serra  * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
926840d9f13SEnric Balletbo i Serra  */
927840d9f13SEnric Balletbo i Serra 
928840d9f13SEnric Balletbo i Serra /*****************************************************************************/
929840d9f13SEnric Balletbo i Serra /* General / test commands */
930840d9f13SEnric Balletbo i Serra 
931840d9f13SEnric Balletbo i Serra /*
932840d9f13SEnric Balletbo i Serra  * Get protocol version, used to deal with non-backward compatible protocol
933840d9f13SEnric Balletbo i Serra  * changes.
934840d9f13SEnric Balletbo i Serra  */
935840d9f13SEnric Balletbo i Serra #define EC_CMD_PROTO_VERSION 0x0000
936840d9f13SEnric Balletbo i Serra 
937840d9f13SEnric Balletbo i Serra /**
938840d9f13SEnric Balletbo i Serra  * struct ec_response_proto_version - Response to the proto version command.
939840d9f13SEnric Balletbo i Serra  * @version: The protocol version.
940840d9f13SEnric Balletbo i Serra  */
941840d9f13SEnric Balletbo i Serra struct ec_response_proto_version {
942840d9f13SEnric Balletbo i Serra 	uint32_t version;
943840d9f13SEnric Balletbo i Serra } __ec_align4;
944840d9f13SEnric Balletbo i Serra 
945840d9f13SEnric Balletbo i Serra /*
946840d9f13SEnric Balletbo i Serra  * Hello.  This is a simple command to test the EC is responsive to
947840d9f13SEnric Balletbo i Serra  * commands.
948840d9f13SEnric Balletbo i Serra  */
949840d9f13SEnric Balletbo i Serra #define EC_CMD_HELLO 0x0001
950840d9f13SEnric Balletbo i Serra 
951840d9f13SEnric Balletbo i Serra /**
952840d9f13SEnric Balletbo i Serra  * struct ec_params_hello - Parameters to the hello command.
953840d9f13SEnric Balletbo i Serra  * @in_data: Pass anything here.
954840d9f13SEnric Balletbo i Serra  */
955840d9f13SEnric Balletbo i Serra struct ec_params_hello {
956840d9f13SEnric Balletbo i Serra 	uint32_t in_data;
957840d9f13SEnric Balletbo i Serra } __ec_align4;
958840d9f13SEnric Balletbo i Serra 
959840d9f13SEnric Balletbo i Serra /**
960840d9f13SEnric Balletbo i Serra  * struct ec_response_hello - Response to the hello command.
961840d9f13SEnric Balletbo i Serra  * @out_data: Output will be in_data + 0x01020304.
962840d9f13SEnric Balletbo i Serra  */
963840d9f13SEnric Balletbo i Serra struct ec_response_hello {
964840d9f13SEnric Balletbo i Serra 	uint32_t out_data;
965840d9f13SEnric Balletbo i Serra } __ec_align4;
966840d9f13SEnric Balletbo i Serra 
967840d9f13SEnric Balletbo i Serra /* Get version number */
968840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_VERSION 0x0002
969840d9f13SEnric Balletbo i Serra 
970840d9f13SEnric Balletbo i Serra enum ec_current_image {
971840d9f13SEnric Balletbo i Serra 	EC_IMAGE_UNKNOWN = 0,
972840d9f13SEnric Balletbo i Serra 	EC_IMAGE_RO,
973840d9f13SEnric Balletbo i Serra 	EC_IMAGE_RW
974840d9f13SEnric Balletbo i Serra };
975840d9f13SEnric Balletbo i Serra 
976840d9f13SEnric Balletbo i Serra /**
977840d9f13SEnric Balletbo i Serra  * struct ec_response_get_version - Response to the get version command.
978840d9f13SEnric Balletbo i Serra  * @version_string_ro: Null-terminated RO firmware version string.
979840d9f13SEnric Balletbo i Serra  * @version_string_rw: Null-terminated RW firmware version string.
980840d9f13SEnric Balletbo i Serra  * @reserved: Unused bytes; was previously RW-B firmware version string.
981840d9f13SEnric Balletbo i Serra  * @current_image: One of ec_current_image.
982840d9f13SEnric Balletbo i Serra  */
983840d9f13SEnric Balletbo i Serra struct ec_response_get_version {
984840d9f13SEnric Balletbo i Serra 	char version_string_ro[32];
985840d9f13SEnric Balletbo i Serra 	char version_string_rw[32];
986840d9f13SEnric Balletbo i Serra 	char reserved[32];
987840d9f13SEnric Balletbo i Serra 	uint32_t current_image;
988840d9f13SEnric Balletbo i Serra } __ec_align4;
989840d9f13SEnric Balletbo i Serra 
990840d9f13SEnric Balletbo i Serra /* Read test */
991840d9f13SEnric Balletbo i Serra #define EC_CMD_READ_TEST 0x0003
992840d9f13SEnric Balletbo i Serra 
993840d9f13SEnric Balletbo i Serra /**
994840d9f13SEnric Balletbo i Serra  * struct ec_params_read_test - Parameters for the read test command.
995840d9f13SEnric Balletbo i Serra  * @offset: Starting value for read buffer.
996840d9f13SEnric Balletbo i Serra  * @size: Size to read in bytes.
997840d9f13SEnric Balletbo i Serra  */
998840d9f13SEnric Balletbo i Serra struct ec_params_read_test {
999840d9f13SEnric Balletbo i Serra 	uint32_t offset;
1000840d9f13SEnric Balletbo i Serra 	uint32_t size;
1001840d9f13SEnric Balletbo i Serra } __ec_align4;
1002840d9f13SEnric Balletbo i Serra 
1003840d9f13SEnric Balletbo i Serra /**
1004840d9f13SEnric Balletbo i Serra  * struct ec_response_read_test - Response to the read test command.
1005840d9f13SEnric Balletbo i Serra  * @data: Data returned by the read test command.
1006840d9f13SEnric Balletbo i Serra  */
1007840d9f13SEnric Balletbo i Serra struct ec_response_read_test {
1008840d9f13SEnric Balletbo i Serra 	uint32_t data[32];
1009840d9f13SEnric Balletbo i Serra } __ec_align4;
1010840d9f13SEnric Balletbo i Serra 
1011840d9f13SEnric Balletbo i Serra /*
1012840d9f13SEnric Balletbo i Serra  * Get build information
1013840d9f13SEnric Balletbo i Serra  *
1014840d9f13SEnric Balletbo i Serra  * Response is null-terminated string.
1015840d9f13SEnric Balletbo i Serra  */
1016840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_BUILD_INFO 0x0004
1017840d9f13SEnric Balletbo i Serra 
1018840d9f13SEnric Balletbo i Serra /* Get chip info */
1019840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_CHIP_INFO 0x0005
1020840d9f13SEnric Balletbo i Serra 
1021840d9f13SEnric Balletbo i Serra /**
1022840d9f13SEnric Balletbo i Serra  * struct ec_response_get_chip_info - Response to the get chip info command.
1023840d9f13SEnric Balletbo i Serra  * @vendor: Null-terminated string for chip vendor.
1024840d9f13SEnric Balletbo i Serra  * @name: Null-terminated string for chip name.
1025840d9f13SEnric Balletbo i Serra  * @revision: Null-terminated string for chip mask version.
1026840d9f13SEnric Balletbo i Serra  */
1027840d9f13SEnric Balletbo i Serra struct ec_response_get_chip_info {
1028840d9f13SEnric Balletbo i Serra 	char vendor[32];
1029840d9f13SEnric Balletbo i Serra 	char name[32];
1030840d9f13SEnric Balletbo i Serra 	char revision[32];
1031840d9f13SEnric Balletbo i Serra } __ec_align4;
1032840d9f13SEnric Balletbo i Serra 
1033840d9f13SEnric Balletbo i Serra /* Get board HW version */
1034840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_BOARD_VERSION 0x0006
1035840d9f13SEnric Balletbo i Serra 
1036840d9f13SEnric Balletbo i Serra /**
1037840d9f13SEnric Balletbo i Serra  * struct ec_response_board_version - Response to the board version command.
1038840d9f13SEnric Balletbo i Serra  * @board_version: A monotonously incrementing number.
1039840d9f13SEnric Balletbo i Serra  */
1040840d9f13SEnric Balletbo i Serra struct ec_response_board_version {
1041840d9f13SEnric Balletbo i Serra 	uint16_t board_version;
1042840d9f13SEnric Balletbo i Serra } __ec_align2;
1043840d9f13SEnric Balletbo i Serra 
1044840d9f13SEnric Balletbo i Serra /*
1045840d9f13SEnric Balletbo i Serra  * Read memory-mapped data.
1046840d9f13SEnric Balletbo i Serra  *
1047840d9f13SEnric Balletbo i Serra  * This is an alternate interface to memory-mapped data for bus protocols
1048840d9f13SEnric Balletbo i Serra  * which don't support direct-mapped memory - I2C, SPI, etc.
1049840d9f13SEnric Balletbo i Serra  *
1050840d9f13SEnric Balletbo i Serra  * Response is params.size bytes of data.
1051840d9f13SEnric Balletbo i Serra  */
1052840d9f13SEnric Balletbo i Serra #define EC_CMD_READ_MEMMAP 0x0007
1053840d9f13SEnric Balletbo i Serra 
1054840d9f13SEnric Balletbo i Serra /**
1055840d9f13SEnric Balletbo i Serra  * struct ec_params_read_memmap - Parameters for the read memory map command.
1056840d9f13SEnric Balletbo i Serra  * @offset: Offset in memmap (EC_MEMMAP_*).
1057840d9f13SEnric Balletbo i Serra  * @size: Size to read in bytes.
1058840d9f13SEnric Balletbo i Serra  */
1059840d9f13SEnric Balletbo i Serra struct ec_params_read_memmap {
1060840d9f13SEnric Balletbo i Serra 	uint8_t offset;
1061840d9f13SEnric Balletbo i Serra 	uint8_t size;
1062840d9f13SEnric Balletbo i Serra } __ec_align1;
1063840d9f13SEnric Balletbo i Serra 
1064840d9f13SEnric Balletbo i Serra /* Read versions supported for a command */
1065840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_CMD_VERSIONS 0x0008
1066840d9f13SEnric Balletbo i Serra 
1067840d9f13SEnric Balletbo i Serra /**
1068840d9f13SEnric Balletbo i Serra  * struct ec_params_get_cmd_versions - Parameters for the get command versions.
1069840d9f13SEnric Balletbo i Serra  * @cmd: Command to check.
1070840d9f13SEnric Balletbo i Serra  */
1071840d9f13SEnric Balletbo i Serra struct ec_params_get_cmd_versions {
1072840d9f13SEnric Balletbo i Serra 	uint8_t cmd;
1073840d9f13SEnric Balletbo i Serra } __ec_align1;
1074840d9f13SEnric Balletbo i Serra 
1075840d9f13SEnric Balletbo i Serra /**
1076840d9f13SEnric Balletbo i Serra  * struct ec_params_get_cmd_versions_v1 - Parameters for the get command
1077840d9f13SEnric Balletbo i Serra  *         versions (v1)
1078840d9f13SEnric Balletbo i Serra  * @cmd: Command to check.
1079840d9f13SEnric Balletbo i Serra  */
1080840d9f13SEnric Balletbo i Serra struct ec_params_get_cmd_versions_v1 {
1081840d9f13SEnric Balletbo i Serra 	uint16_t cmd;
1082840d9f13SEnric Balletbo i Serra } __ec_align2;
1083840d9f13SEnric Balletbo i Serra 
1084840d9f13SEnric Balletbo i Serra /**
10855fa1dd81STzung-Bi Shih  * struct ec_response_get_cmd_versions - Response to the get command versions.
1086840d9f13SEnric Balletbo i Serra  * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with
1087840d9f13SEnric Balletbo i Serra  *                a desired version.
1088840d9f13SEnric Balletbo i Serra  */
1089840d9f13SEnric Balletbo i Serra struct ec_response_get_cmd_versions {
1090840d9f13SEnric Balletbo i Serra 	uint32_t version_mask;
1091840d9f13SEnric Balletbo i Serra } __ec_align4;
1092840d9f13SEnric Balletbo i Serra 
1093840d9f13SEnric Balletbo i Serra /*
1094840d9f13SEnric Balletbo i Serra  * Check EC communications status (busy). This is needed on i2c/spi but not
1095840d9f13SEnric Balletbo i Serra  * on lpc since it has its own out-of-band busy indicator.
1096840d9f13SEnric Balletbo i Serra  *
1097840d9f13SEnric Balletbo i Serra  * lpc must read the status from the command register. Attempting this on
1098840d9f13SEnric Balletbo i Serra  * lpc will overwrite the args/parameter space and corrupt its data.
1099840d9f13SEnric Balletbo i Serra  */
1100840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_COMMS_STATUS		0x0009
1101840d9f13SEnric Balletbo i Serra 
1102840d9f13SEnric Balletbo i Serra /* Avoid using ec_status which is for return values */
1103840d9f13SEnric Balletbo i Serra enum ec_comms_status {
1104840d9f13SEnric Balletbo i Serra 	EC_COMMS_STATUS_PROCESSING	= BIT(0),	/* Processing cmd */
1105840d9f13SEnric Balletbo i Serra };
1106840d9f13SEnric Balletbo i Serra 
1107840d9f13SEnric Balletbo i Serra /**
1108840d9f13SEnric Balletbo i Serra  * struct ec_response_get_comms_status - Response to the get comms status
1109840d9f13SEnric Balletbo i Serra  *         command.
1110840d9f13SEnric Balletbo i Serra  * @flags: Mask of enum ec_comms_status.
1111840d9f13SEnric Balletbo i Serra  */
1112840d9f13SEnric Balletbo i Serra struct ec_response_get_comms_status {
1113840d9f13SEnric Balletbo i Serra 	uint32_t flags;		/* Mask of enum ec_comms_status */
1114840d9f13SEnric Balletbo i Serra } __ec_align4;
1115840d9f13SEnric Balletbo i Serra 
1116840d9f13SEnric Balletbo i Serra /* Fake a variety of responses, purely for testing purposes. */
1117840d9f13SEnric Balletbo i Serra #define EC_CMD_TEST_PROTOCOL		0x000A
1118840d9f13SEnric Balletbo i Serra 
1119840d9f13SEnric Balletbo i Serra /* Tell the EC what to send back to us. */
1120840d9f13SEnric Balletbo i Serra struct ec_params_test_protocol {
1121840d9f13SEnric Balletbo i Serra 	uint32_t ec_result;
1122840d9f13SEnric Balletbo i Serra 	uint32_t ret_len;
1123840d9f13SEnric Balletbo i Serra 	uint8_t buf[32];
1124840d9f13SEnric Balletbo i Serra } __ec_align4;
1125840d9f13SEnric Balletbo i Serra 
1126840d9f13SEnric Balletbo i Serra /* Here it comes... */
1127840d9f13SEnric Balletbo i Serra struct ec_response_test_protocol {
1128840d9f13SEnric Balletbo i Serra 	uint8_t buf[32];
1129840d9f13SEnric Balletbo i Serra } __ec_align4;
1130840d9f13SEnric Balletbo i Serra 
1131840d9f13SEnric Balletbo i Serra /* Get protocol information */
1132840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_PROTOCOL_INFO	0x000B
1133840d9f13SEnric Balletbo i Serra 
1134840d9f13SEnric Balletbo i Serra /* Flags for ec_response_get_protocol_info.flags */
1135840d9f13SEnric Balletbo i Serra /* EC_RES_IN_PROGRESS may be returned if a command is slow */
1136840d9f13SEnric Balletbo i Serra #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
1137840d9f13SEnric Balletbo i Serra 
1138840d9f13SEnric Balletbo i Serra /**
1139840d9f13SEnric Balletbo i Serra  * struct ec_response_get_protocol_info - Response to the get protocol info.
1140840d9f13SEnric Balletbo i Serra  * @protocol_versions: Bitmask of protocol versions supported (1 << n means
1141840d9f13SEnric Balletbo i Serra  *                     version n).
1142840d9f13SEnric Balletbo i Serra  * @max_request_packet_size: Maximum request packet size in bytes.
1143840d9f13SEnric Balletbo i Serra  * @max_response_packet_size: Maximum response packet size in bytes.
1144840d9f13SEnric Balletbo i Serra  * @flags: see EC_PROTOCOL_INFO_*
1145840d9f13SEnric Balletbo i Serra  */
1146840d9f13SEnric Balletbo i Serra struct ec_response_get_protocol_info {
1147840d9f13SEnric Balletbo i Serra 	/* Fields which exist if at least protocol version 3 supported */
1148840d9f13SEnric Balletbo i Serra 	uint32_t protocol_versions;
1149840d9f13SEnric Balletbo i Serra 	uint16_t max_request_packet_size;
1150840d9f13SEnric Balletbo i Serra 	uint16_t max_response_packet_size;
1151840d9f13SEnric Balletbo i Serra 	uint32_t flags;
1152840d9f13SEnric Balletbo i Serra } __ec_align4;
1153840d9f13SEnric Balletbo i Serra 
1154840d9f13SEnric Balletbo i Serra 
1155840d9f13SEnric Balletbo i Serra /*****************************************************************************/
1156840d9f13SEnric Balletbo i Serra /* Get/Set miscellaneous values */
1157840d9f13SEnric Balletbo i Serra 
1158840d9f13SEnric Balletbo i Serra /* The upper byte of .flags tells what to do (nothing means "get") */
1159840d9f13SEnric Balletbo i Serra #define EC_GSV_SET        0x80000000
1160840d9f13SEnric Balletbo i Serra 
1161840d9f13SEnric Balletbo i Serra /*
1162840d9f13SEnric Balletbo i Serra  * The lower three bytes of .flags identifies the parameter, if that has
1163840d9f13SEnric Balletbo i Serra  * meaning for an individual command.
1164840d9f13SEnric Balletbo i Serra  */
1165840d9f13SEnric Balletbo i Serra #define EC_GSV_PARAM_MASK 0x00ffffff
1166840d9f13SEnric Balletbo i Serra 
1167840d9f13SEnric Balletbo i Serra struct ec_params_get_set_value {
1168840d9f13SEnric Balletbo i Serra 	uint32_t flags;
1169840d9f13SEnric Balletbo i Serra 	uint32_t value;
1170840d9f13SEnric Balletbo i Serra } __ec_align4;
1171840d9f13SEnric Balletbo i Serra 
1172840d9f13SEnric Balletbo i Serra struct ec_response_get_set_value {
1173840d9f13SEnric Balletbo i Serra 	uint32_t flags;
1174840d9f13SEnric Balletbo i Serra 	uint32_t value;
1175840d9f13SEnric Balletbo i Serra } __ec_align4;
1176840d9f13SEnric Balletbo i Serra 
1177840d9f13SEnric Balletbo i Serra /* More than one command can use these structs to get/set parameters. */
1178840d9f13SEnric Balletbo i Serra #define EC_CMD_GSV_PAUSE_IN_S5	0x000C
1179840d9f13SEnric Balletbo i Serra 
1180840d9f13SEnric Balletbo i Serra /*****************************************************************************/
1181840d9f13SEnric Balletbo i Serra /* List the features supported by the firmware */
1182840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_FEATURES  0x000D
1183840d9f13SEnric Balletbo i Serra 
1184840d9f13SEnric Balletbo i Serra /* Supported features */
1185840d9f13SEnric Balletbo i Serra enum ec_feature_code {
1186840d9f13SEnric Balletbo i Serra 	/*
1187840d9f13SEnric Balletbo i Serra 	 * This image contains a limited set of features. Another image
1188840d9f13SEnric Balletbo i Serra 	 * in RW partition may support more features.
1189840d9f13SEnric Balletbo i Serra 	 */
1190840d9f13SEnric Balletbo i Serra 	EC_FEATURE_LIMITED = 0,
1191840d9f13SEnric Balletbo i Serra 	/*
1192840d9f13SEnric Balletbo i Serra 	 * Commands for probing/reading/writing/erasing the flash in the
1193840d9f13SEnric Balletbo i Serra 	 * EC are present.
1194840d9f13SEnric Balletbo i Serra 	 */
1195840d9f13SEnric Balletbo i Serra 	EC_FEATURE_FLASH = 1,
1196840d9f13SEnric Balletbo i Serra 	/*
1197840d9f13SEnric Balletbo i Serra 	 * Can control the fan speed directly.
1198840d9f13SEnric Balletbo i Serra 	 */
1199840d9f13SEnric Balletbo i Serra 	EC_FEATURE_PWM_FAN = 2,
1200840d9f13SEnric Balletbo i Serra 	/*
1201840d9f13SEnric Balletbo i Serra 	 * Can control the intensity of the keyboard backlight.
1202840d9f13SEnric Balletbo i Serra 	 */
1203840d9f13SEnric Balletbo i Serra 	EC_FEATURE_PWM_KEYB = 3,
1204840d9f13SEnric Balletbo i Serra 	/*
1205840d9f13SEnric Balletbo i Serra 	 * Support Google lightbar, introduced on Pixel.
1206840d9f13SEnric Balletbo i Serra 	 */
1207840d9f13SEnric Balletbo i Serra 	EC_FEATURE_LIGHTBAR = 4,
1208840d9f13SEnric Balletbo i Serra 	/* Control of LEDs  */
1209840d9f13SEnric Balletbo i Serra 	EC_FEATURE_LED = 5,
1210840d9f13SEnric Balletbo i Serra 	/* Exposes an interface to control gyro and sensors.
1211840d9f13SEnric Balletbo i Serra 	 * The host goes through the EC to access these sensors.
1212840d9f13SEnric Balletbo i Serra 	 * In addition, the EC may provide composite sensors, like lid angle.
1213840d9f13SEnric Balletbo i Serra 	 */
1214840d9f13SEnric Balletbo i Serra 	EC_FEATURE_MOTION_SENSE = 6,
1215840d9f13SEnric Balletbo i Serra 	/* The keyboard is controlled by the EC */
1216840d9f13SEnric Balletbo i Serra 	EC_FEATURE_KEYB = 7,
1217840d9f13SEnric Balletbo i Serra 	/* The AP can use part of the EC flash as persistent storage. */
1218840d9f13SEnric Balletbo i Serra 	EC_FEATURE_PSTORE = 8,
1219840d9f13SEnric Balletbo i Serra 	/* The EC monitors BIOS port 80h, and can return POST codes. */
1220840d9f13SEnric Balletbo i Serra 	EC_FEATURE_PORT80 = 9,
1221840d9f13SEnric Balletbo i Serra 	/*
1222840d9f13SEnric Balletbo i Serra 	 * Thermal management: include TMP specific commands.
1223840d9f13SEnric Balletbo i Serra 	 * Higher level than direct fan control.
1224840d9f13SEnric Balletbo i Serra 	 */
1225840d9f13SEnric Balletbo i Serra 	EC_FEATURE_THERMAL = 10,
1226840d9f13SEnric Balletbo i Serra 	/* Can switch the screen backlight on/off */
1227840d9f13SEnric Balletbo i Serra 	EC_FEATURE_BKLIGHT_SWITCH = 11,
1228840d9f13SEnric Balletbo i Serra 	/* Can switch the wifi module on/off */
1229840d9f13SEnric Balletbo i Serra 	EC_FEATURE_WIFI_SWITCH = 12,
1230840d9f13SEnric Balletbo i Serra 	/* Monitor host events, through for example SMI or SCI */
1231840d9f13SEnric Balletbo i Serra 	EC_FEATURE_HOST_EVENTS = 13,
1232840d9f13SEnric Balletbo i Serra 	/* The EC exposes GPIO commands to control/monitor connected devices. */
1233840d9f13SEnric Balletbo i Serra 	EC_FEATURE_GPIO = 14,
1234840d9f13SEnric Balletbo i Serra 	/* The EC can send i2c messages to downstream devices. */
1235840d9f13SEnric Balletbo i Serra 	EC_FEATURE_I2C = 15,
1236840d9f13SEnric Balletbo i Serra 	/* Command to control charger are included */
1237840d9f13SEnric Balletbo i Serra 	EC_FEATURE_CHARGER = 16,
1238840d9f13SEnric Balletbo i Serra 	/* Simple battery support. */
1239840d9f13SEnric Balletbo i Serra 	EC_FEATURE_BATTERY = 17,
1240840d9f13SEnric Balletbo i Serra 	/*
1241840d9f13SEnric Balletbo i Serra 	 * Support Smart battery protocol
1242840d9f13SEnric Balletbo i Serra 	 * (Common Smart Battery System Interface Specification)
1243840d9f13SEnric Balletbo i Serra 	 */
1244840d9f13SEnric Balletbo i Serra 	EC_FEATURE_SMART_BATTERY = 18,
1245840d9f13SEnric Balletbo i Serra 	/* EC can detect when the host hangs. */
1246840d9f13SEnric Balletbo i Serra 	EC_FEATURE_HANG_DETECT = 19,
1247840d9f13SEnric Balletbo i Serra 	/* Report power information, for pit only */
1248840d9f13SEnric Balletbo i Serra 	EC_FEATURE_PMU = 20,
1249840d9f13SEnric Balletbo i Serra 	/* Another Cros EC device is present downstream of this one */
1250840d9f13SEnric Balletbo i Serra 	EC_FEATURE_SUB_MCU = 21,
1251840d9f13SEnric Balletbo i Serra 	/* Support USB Power delivery (PD) commands */
1252840d9f13SEnric Balletbo i Serra 	EC_FEATURE_USB_PD = 22,
1253840d9f13SEnric Balletbo i Serra 	/* Control USB multiplexer, for audio through USB port for instance. */
1254840d9f13SEnric Balletbo i Serra 	EC_FEATURE_USB_MUX = 23,
1255840d9f13SEnric Balletbo i Serra 	/* Motion Sensor code has an internal software FIFO */
1256840d9f13SEnric Balletbo i Serra 	EC_FEATURE_MOTION_SENSE_FIFO = 24,
1257840d9f13SEnric Balletbo i Serra 	/* Support temporary secure vstore */
1258840d9f13SEnric Balletbo i Serra 	EC_FEATURE_VSTORE = 25,
1259840d9f13SEnric Balletbo i Serra 	/* EC decides on USB-C SS mux state, muxes configured by host */
1260840d9f13SEnric Balletbo i Serra 	EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1261840d9f13SEnric Balletbo i Serra 	/* EC has RTC feature that can be controlled by host commands */
1262840d9f13SEnric Balletbo i Serra 	EC_FEATURE_RTC = 27,
1263840d9f13SEnric Balletbo i Serra 	/* The MCU exposes a Fingerprint sensor */
1264840d9f13SEnric Balletbo i Serra 	EC_FEATURE_FINGERPRINT = 28,
1265840d9f13SEnric Balletbo i Serra 	/* The MCU exposes a Touchpad */
1266840d9f13SEnric Balletbo i Serra 	EC_FEATURE_TOUCHPAD = 29,
1267840d9f13SEnric Balletbo i Serra 	/* The MCU has RWSIG task enabled */
1268840d9f13SEnric Balletbo i Serra 	EC_FEATURE_RWSIG = 30,
1269840d9f13SEnric Balletbo i Serra 	/* EC has device events support */
1270840d9f13SEnric Balletbo i Serra 	EC_FEATURE_DEVICE_EVENT = 31,
1271840d9f13SEnric Balletbo i Serra 	/* EC supports the unified wake masks for LPC/eSPI systems */
1272840d9f13SEnric Balletbo i Serra 	EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1273840d9f13SEnric Balletbo i Serra 	/* EC supports 64-bit host events */
1274840d9f13SEnric Balletbo i Serra 	EC_FEATURE_HOST_EVENT64 = 33,
1275840d9f13SEnric Balletbo i Serra 	/* EC runs code in RAM (not in place, a.k.a. XIP) */
1276840d9f13SEnric Balletbo i Serra 	EC_FEATURE_EXEC_IN_RAM = 34,
1277840d9f13SEnric Balletbo i Serra 	/* EC supports CEC commands */
1278840d9f13SEnric Balletbo i Serra 	EC_FEATURE_CEC = 35,
1279840d9f13SEnric Balletbo i Serra 	/* EC supports tight sensor timestamping. */
1280840d9f13SEnric Balletbo i Serra 	EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36,
1281840d9f13SEnric Balletbo i Serra 	/*
1282840d9f13SEnric Balletbo i Serra 	 * EC supports tablet mode detection aligned to Chrome and allows
1283840d9f13SEnric Balletbo i Serra 	 * setting of threshold by host command using
1284840d9f13SEnric Balletbo i Serra 	 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
1285840d9f13SEnric Balletbo i Serra 	 */
1286840d9f13SEnric Balletbo i Serra 	EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
1287840d9f13SEnric Balletbo i Serra 	/* The MCU is a System Companion Processor (SCP). */
1288840d9f13SEnric Balletbo i Serra 	EC_FEATURE_SCP = 39,
1289840d9f13SEnric Balletbo i Serra 	/* The MCU is an Integrated Sensor Hub */
1290840d9f13SEnric Balletbo i Serra 	EC_FEATURE_ISH = 40,
1291cd2c40ffSPrashant Malani 	/* New TCPMv2 TYPEC_ prefaced commands supported */
1292cd2c40ffSPrashant Malani 	EC_FEATURE_TYPEC_CMD = 41,
12938553a979SUtkarsh Patel 	/*
12948553a979SUtkarsh Patel 	 * The EC will wait for direction from the AP to enter Type-C alternate
12958553a979SUtkarsh Patel 	 * modes or USB4.
12968553a979SUtkarsh Patel 	 */
12978553a979SUtkarsh Patel 	EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42,
12988553a979SUtkarsh Patel 	/*
12998553a979SUtkarsh Patel 	 * The EC will wait for an acknowledge from the AP after setting the
13008553a979SUtkarsh Patel 	 * mux.
13018553a979SUtkarsh Patel 	 */
13028553a979SUtkarsh Patel 	EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
13030e0dba88SPrashant Malani 	/*
13040e0dba88SPrashant Malani 	 * The EC supports entering and residing in S4.
13050e0dba88SPrashant Malani 	 */
13060e0dba88SPrashant Malani 	EC_FEATURE_S4_RESIDENCY = 44,
13070e0dba88SPrashant Malani 	/*
13080e0dba88SPrashant Malani 	 * The EC supports the AP directing mux sets for the board.
13090e0dba88SPrashant Malani 	 */
13100e0dba88SPrashant Malani 	EC_FEATURE_TYPEC_AP_MUX_SET = 45,
13110e0dba88SPrashant Malani 	/*
13120e0dba88SPrashant Malani 	 * The EC supports the AP composing VDMs for us to send.
13130e0dba88SPrashant Malani 	 */
13140e0dba88SPrashant Malani 	EC_FEATURE_TYPEC_AP_VDM_SEND = 46,
13152b627246SPavan Holla 	/*
13162b627246SPavan Holla 	 * The EC supports system safe mode panic recovery.
13172b627246SPavan Holla 	 */
13182b627246SPavan Holla 	EC_FEATURE_SYSTEM_SAFE_MODE = 47,
13192b627246SPavan Holla 	/*
13202b627246SPavan Holla 	 * The EC will reboot on runtime assertion failures.
13212b627246SPavan Holla 	 */
13222b627246SPavan Holla 	EC_FEATURE_ASSERT_REBOOTS = 48,
13232b627246SPavan Holla 	/*
13242b627246SPavan Holla 	 * The EC image is built with tokenized logging enabled.
13252b627246SPavan Holla 	 */
13262b627246SPavan Holla 	EC_FEATURE_TOKENIZED_LOGGING = 49,
13272b627246SPavan Holla 	/*
13282b627246SPavan Holla 	 * The EC supports triggering an STB dump.
13292b627246SPavan Holla 	 */
13302b627246SPavan Holla 	EC_FEATURE_AMD_STB_DUMP = 50,
13312b627246SPavan Holla 	/*
13322b627246SPavan Holla 	 * The EC supports memory dump commands.
13332b627246SPavan Holla 	 */
13342b627246SPavan Holla 	EC_FEATURE_MEMORY_DUMP = 51,
13352b627246SPavan Holla 	/*
13362b627246SPavan Holla 	 * The EC supports DP2.1 capability
13372b627246SPavan Holla 	 */
13382b627246SPavan Holla 	EC_FEATURE_TYPEC_DP2_1 = 52,
13392b627246SPavan Holla 	/*
13402b627246SPavan Holla 	 * The MCU is System Companion Processor Core 1
13412b627246SPavan Holla 	 */
13422b627246SPavan Holla 	EC_FEATURE_SCP_C1 = 53,
13432b627246SPavan Holla 	/*
13442b627246SPavan Holla 	 * The EC supports UCSI PPM.
13452b627246SPavan Holla 	 */
13462b627246SPavan Holla 	EC_FEATURE_UCSI_PPM = 54,
1347840d9f13SEnric Balletbo i Serra };
1348840d9f13SEnric Balletbo i Serra 
1349840d9f13SEnric Balletbo i Serra #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1350840d9f13SEnric Balletbo i Serra #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1351840d9f13SEnric Balletbo i Serra 
1352840d9f13SEnric Balletbo i Serra struct ec_response_get_features {
1353840d9f13SEnric Balletbo i Serra 	uint32_t flags[2];
1354840d9f13SEnric Balletbo i Serra } __ec_align4;
1355840d9f13SEnric Balletbo i Serra 
1356840d9f13SEnric Balletbo i Serra /*****************************************************************************/
1357840d9f13SEnric Balletbo i Serra /* Get the board's SKU ID from EC */
1358840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_SKU_ID 0x000E
1359840d9f13SEnric Balletbo i Serra 
1360840d9f13SEnric Balletbo i Serra /* Set SKU ID from AP */
1361840d9f13SEnric Balletbo i Serra #define EC_CMD_SET_SKU_ID 0x000F
1362840d9f13SEnric Balletbo i Serra 
1363840d9f13SEnric Balletbo i Serra struct ec_sku_id_info {
1364840d9f13SEnric Balletbo i Serra 	uint32_t sku_id;
1365840d9f13SEnric Balletbo i Serra } __ec_align4;
1366840d9f13SEnric Balletbo i Serra 
1367840d9f13SEnric Balletbo i Serra /*****************************************************************************/
1368840d9f13SEnric Balletbo i Serra /* Flash commands */
1369840d9f13SEnric Balletbo i Serra 
1370840d9f13SEnric Balletbo i Serra /* Get flash info */
1371840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_INFO 0x0010
1372840d9f13SEnric Balletbo i Serra #define EC_VER_FLASH_INFO 2
1373840d9f13SEnric Balletbo i Serra 
1374840d9f13SEnric Balletbo i Serra /**
1375840d9f13SEnric Balletbo i Serra  * struct ec_response_flash_info - Response to the flash info command.
1376840d9f13SEnric Balletbo i Serra  * @flash_size: Usable flash size in bytes.
1377840d9f13SEnric Balletbo i Serra  * @write_block_size: Write block size. Write offset and size must be a
1378840d9f13SEnric Balletbo i Serra  *                    multiple of this.
1379840d9f13SEnric Balletbo i Serra  * @erase_block_size: Erase block size. Erase offset and size must be a
1380840d9f13SEnric Balletbo i Serra  *                    multiple of this.
1381840d9f13SEnric Balletbo i Serra  * @protect_block_size: Protection block size. Protection offset and size
1382840d9f13SEnric Balletbo i Serra  *                      must be a multiple of this.
1383840d9f13SEnric Balletbo i Serra  *
1384840d9f13SEnric Balletbo i Serra  * Version 0 returns these fields.
1385840d9f13SEnric Balletbo i Serra  */
1386840d9f13SEnric Balletbo i Serra struct ec_response_flash_info {
1387840d9f13SEnric Balletbo i Serra 	uint32_t flash_size;
1388840d9f13SEnric Balletbo i Serra 	uint32_t write_block_size;
1389840d9f13SEnric Balletbo i Serra 	uint32_t erase_block_size;
1390840d9f13SEnric Balletbo i Serra 	uint32_t protect_block_size;
1391840d9f13SEnric Balletbo i Serra } __ec_align4;
1392840d9f13SEnric Balletbo i Serra 
1393840d9f13SEnric Balletbo i Serra /*
1394840d9f13SEnric Balletbo i Serra  * Flags for version 1+ flash info command
1395840d9f13SEnric Balletbo i Serra  * EC flash erases bits to 0 instead of 1.
1396840d9f13SEnric Balletbo i Serra  */
1397840d9f13SEnric Balletbo i Serra #define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1398840d9f13SEnric Balletbo i Serra 
1399840d9f13SEnric Balletbo i Serra /*
1400840d9f13SEnric Balletbo i Serra  * Flash must be selected for read/write/erase operations to succeed.  This may
1401840d9f13SEnric Balletbo i Serra  * be necessary on a chip where write/erase can be corrupted by other board
1402840d9f13SEnric Balletbo i Serra  * activity, or where the chip needs to enable some sort of programming voltage,
1403840d9f13SEnric Balletbo i Serra  * or where the read/write/erase operations require cleanly suspending other
1404840d9f13SEnric Balletbo i Serra  * chip functionality.
1405840d9f13SEnric Balletbo i Serra  */
1406840d9f13SEnric Balletbo i Serra #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1407840d9f13SEnric Balletbo i Serra 
1408840d9f13SEnric Balletbo i Serra /**
1409840d9f13SEnric Balletbo i Serra  * struct ec_response_flash_info_1 - Response to the flash info v1 command.
1410840d9f13SEnric Balletbo i Serra  * @flash_size: Usable flash size in bytes.
1411840d9f13SEnric Balletbo i Serra  * @write_block_size: Write block size. Write offset and size must be a
1412840d9f13SEnric Balletbo i Serra  *                    multiple of this.
1413840d9f13SEnric Balletbo i Serra  * @erase_block_size: Erase block size. Erase offset and size must be a
1414840d9f13SEnric Balletbo i Serra  *                    multiple of this.
1415840d9f13SEnric Balletbo i Serra  * @protect_block_size: Protection block size. Protection offset and size
1416840d9f13SEnric Balletbo i Serra  *                      must be a multiple of this.
1417840d9f13SEnric Balletbo i Serra  * @write_ideal_size: Ideal write size in bytes.  Writes will be fastest if
1418840d9f13SEnric Balletbo i Serra  *                    size is exactly this and offset is a multiple of this.
1419840d9f13SEnric Balletbo i Serra  *                    For example, an EC may have a write buffer which can do
1420840d9f13SEnric Balletbo i Serra  *                    half-page operations if data is aligned, and a slower
1421840d9f13SEnric Balletbo i Serra  *                    word-at-a-time write mode.
1422840d9f13SEnric Balletbo i Serra  * @flags: Flags; see EC_FLASH_INFO_*
1423840d9f13SEnric Balletbo i Serra  *
1424840d9f13SEnric Balletbo i Serra  * Version 1 returns the same initial fields as version 0, with additional
1425840d9f13SEnric Balletbo i Serra  * fields following.
1426840d9f13SEnric Balletbo i Serra  *
1427840d9f13SEnric Balletbo i Serra  * gcc anonymous structs don't seem to get along with the __packed directive;
1428840d9f13SEnric Balletbo i Serra  * if they did we'd define the version 0 structure as a sub-structure of this
1429840d9f13SEnric Balletbo i Serra  * one.
1430840d9f13SEnric Balletbo i Serra  *
1431840d9f13SEnric Balletbo i Serra  * Version 2 supports flash banks of different sizes:
1432840d9f13SEnric Balletbo i Serra  * The caller specified the number of banks it has preallocated
1433840d9f13SEnric Balletbo i Serra  * (num_banks_desc)
1434840d9f13SEnric Balletbo i Serra  * The EC returns the number of banks describing the flash memory.
1435840d9f13SEnric Balletbo i Serra  * It adds banks descriptions up to num_banks_desc.
1436840d9f13SEnric Balletbo i Serra  */
1437840d9f13SEnric Balletbo i Serra struct ec_response_flash_info_1 {
1438840d9f13SEnric Balletbo i Serra 	/* Version 0 fields; see above for description */
1439840d9f13SEnric Balletbo i Serra 	uint32_t flash_size;
1440840d9f13SEnric Balletbo i Serra 	uint32_t write_block_size;
1441840d9f13SEnric Balletbo i Serra 	uint32_t erase_block_size;
1442840d9f13SEnric Balletbo i Serra 	uint32_t protect_block_size;
1443840d9f13SEnric Balletbo i Serra 
1444840d9f13SEnric Balletbo i Serra 	/* Version 1 adds these fields: */
1445840d9f13SEnric Balletbo i Serra 	uint32_t write_ideal_size;
1446840d9f13SEnric Balletbo i Serra 	uint32_t flags;
1447840d9f13SEnric Balletbo i Serra } __ec_align4;
1448840d9f13SEnric Balletbo i Serra 
1449840d9f13SEnric Balletbo i Serra struct ec_params_flash_info_2 {
1450840d9f13SEnric Balletbo i Serra 	/* Number of banks to describe */
1451840d9f13SEnric Balletbo i Serra 	uint16_t num_banks_desc;
1452840d9f13SEnric Balletbo i Serra 	/* Reserved; set 0; ignore on read */
1453840d9f13SEnric Balletbo i Serra 	uint8_t reserved[2];
1454840d9f13SEnric Balletbo i Serra } __ec_align4;
1455840d9f13SEnric Balletbo i Serra 
1456840d9f13SEnric Balletbo i Serra struct ec_flash_bank {
1457840d9f13SEnric Balletbo i Serra 	/* Number of sector is in this bank. */
1458840d9f13SEnric Balletbo i Serra 	uint16_t count;
1459840d9f13SEnric Balletbo i Serra 	/* Size in power of 2 of each sector (8 --> 256 bytes) */
1460840d9f13SEnric Balletbo i Serra 	uint8_t size_exp;
1461840d9f13SEnric Balletbo i Serra 	/* Minimal write size for the sectors in this bank */
1462840d9f13SEnric Balletbo i Serra 	uint8_t write_size_exp;
1463840d9f13SEnric Balletbo i Serra 	/* Erase size for the sectors in this bank */
1464840d9f13SEnric Balletbo i Serra 	uint8_t erase_size_exp;
1465840d9f13SEnric Balletbo i Serra 	/* Size for write protection, usually identical to erase size. */
1466840d9f13SEnric Balletbo i Serra 	uint8_t protect_size_exp;
1467840d9f13SEnric Balletbo i Serra 	/* Reserved; set 0; ignore on read */
1468840d9f13SEnric Balletbo i Serra 	uint8_t reserved[2];
1469840d9f13SEnric Balletbo i Serra };
1470840d9f13SEnric Balletbo i Serra 
1471840d9f13SEnric Balletbo i Serra struct ec_response_flash_info_2 {
1472840d9f13SEnric Balletbo i Serra 	/* Total flash in the EC. */
1473840d9f13SEnric Balletbo i Serra 	uint32_t flash_size;
1474840d9f13SEnric Balletbo i Serra 	/* Flags; see EC_FLASH_INFO_* */
1475840d9f13SEnric Balletbo i Serra 	uint32_t flags;
1476840d9f13SEnric Balletbo i Serra 	/* Maximum size to use to send data to write to the EC. */
1477840d9f13SEnric Balletbo i Serra 	uint32_t write_ideal_size;
1478840d9f13SEnric Balletbo i Serra 	/* Number of banks present in the EC. */
1479840d9f13SEnric Balletbo i Serra 	uint16_t num_banks_total;
1480840d9f13SEnric Balletbo i Serra 	/* Number of banks described in banks array. */
1481840d9f13SEnric Balletbo i Serra 	uint16_t num_banks_desc;
148288354105SGustavo A. R. Silva 	struct ec_flash_bank banks[];
1483840d9f13SEnric Balletbo i Serra } __ec_align4;
1484840d9f13SEnric Balletbo i Serra 
1485840d9f13SEnric Balletbo i Serra /*
1486840d9f13SEnric Balletbo i Serra  * Read flash
1487840d9f13SEnric Balletbo i Serra  *
1488840d9f13SEnric Balletbo i Serra  * Response is params.size bytes of data.
1489840d9f13SEnric Balletbo i Serra  */
1490840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_READ 0x0011
1491840d9f13SEnric Balletbo i Serra 
1492840d9f13SEnric Balletbo i Serra /**
1493840d9f13SEnric Balletbo i Serra  * struct ec_params_flash_read - Parameters for the flash read command.
1494840d9f13SEnric Balletbo i Serra  * @offset: Byte offset to read.
1495840d9f13SEnric Balletbo i Serra  * @size: Size to read in bytes.
1496840d9f13SEnric Balletbo i Serra  */
1497840d9f13SEnric Balletbo i Serra struct ec_params_flash_read {
1498840d9f13SEnric Balletbo i Serra 	uint32_t offset;
1499840d9f13SEnric Balletbo i Serra 	uint32_t size;
1500840d9f13SEnric Balletbo i Serra } __ec_align4;
1501840d9f13SEnric Balletbo i Serra 
1502840d9f13SEnric Balletbo i Serra /* Write flash */
1503840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_WRITE 0x0012
1504840d9f13SEnric Balletbo i Serra #define EC_VER_FLASH_WRITE 1
1505840d9f13SEnric Balletbo i Serra 
1506840d9f13SEnric Balletbo i Serra /* Version 0 of the flash command supported only 64 bytes of data */
1507840d9f13SEnric Balletbo i Serra #define EC_FLASH_WRITE_VER0_SIZE 64
1508840d9f13SEnric Balletbo i Serra 
1509840d9f13SEnric Balletbo i Serra /**
1510840d9f13SEnric Balletbo i Serra  * struct ec_params_flash_write - Parameters for the flash write command.
1511840d9f13SEnric Balletbo i Serra  * @offset: Byte offset to write.
1512840d9f13SEnric Balletbo i Serra  * @size: Size to write in bytes.
1513840d9f13SEnric Balletbo i Serra  */
1514840d9f13SEnric Balletbo i Serra struct ec_params_flash_write {
1515840d9f13SEnric Balletbo i Serra 	uint32_t offset;
1516840d9f13SEnric Balletbo i Serra 	uint32_t size;
1517840d9f13SEnric Balletbo i Serra 	/* Followed by data to write */
1518840d9f13SEnric Balletbo i Serra } __ec_align4;
1519840d9f13SEnric Balletbo i Serra 
1520840d9f13SEnric Balletbo i Serra /* Erase flash */
1521840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_ERASE 0x0013
1522840d9f13SEnric Balletbo i Serra 
1523840d9f13SEnric Balletbo i Serra /**
1524840d9f13SEnric Balletbo i Serra  * struct ec_params_flash_erase - Parameters for the flash erase command, v0.
1525840d9f13SEnric Balletbo i Serra  * @offset: Byte offset to erase.
1526840d9f13SEnric Balletbo i Serra  * @size: Size to erase in bytes.
1527840d9f13SEnric Balletbo i Serra  */
1528840d9f13SEnric Balletbo i Serra struct ec_params_flash_erase {
1529840d9f13SEnric Balletbo i Serra 	uint32_t offset;
1530840d9f13SEnric Balletbo i Serra 	uint32_t size;
1531840d9f13SEnric Balletbo i Serra } __ec_align4;
1532840d9f13SEnric Balletbo i Serra 
1533840d9f13SEnric Balletbo i Serra /*
1534840d9f13SEnric Balletbo i Serra  * v1 add async erase:
1535840d9f13SEnric Balletbo i Serra  * subcommands can returns:
1536840d9f13SEnric Balletbo i Serra  * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1537840d9f13SEnric Balletbo i Serra  * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1538840d9f13SEnric Balletbo i Serra  * EC_RES_ERROR : other errors.
1539840d9f13SEnric Balletbo i Serra  * EC_RES_BUSY : an existing erase operation is in progress.
1540840d9f13SEnric Balletbo i Serra  * EC_RES_ACCESS_DENIED: Trying to erase running image.
1541840d9f13SEnric Balletbo i Serra  *
1542840d9f13SEnric Balletbo i Serra  * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1543840d9f13SEnric Balletbo i Serra  * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1544840d9f13SEnric Balletbo i Serra  * the proper result.
1545840d9f13SEnric Balletbo i Serra  * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1546840d9f13SEnric Balletbo i Serra  * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1547840d9f13SEnric Balletbo i Serra  * ERASE_GET_RESULT command may timeout on EC where flash access is not
1548840d9f13SEnric Balletbo i Serra  * permitted while erasing. (For instance, STM32F4).
1549840d9f13SEnric Balletbo i Serra  */
1550840d9f13SEnric Balletbo i Serra enum ec_flash_erase_cmd {
1551840d9f13SEnric Balletbo i Serra 	FLASH_ERASE_SECTOR,     /* Erase and wait for result */
1552840d9f13SEnric Balletbo i Serra 	FLASH_ERASE_SECTOR_ASYNC,  /* Erase and return immediately. */
1553840d9f13SEnric Balletbo i Serra 	FLASH_ERASE_GET_RESULT,  /* Ask for last erase result */
1554840d9f13SEnric Balletbo i Serra };
1555840d9f13SEnric Balletbo i Serra 
1556840d9f13SEnric Balletbo i Serra /**
1557840d9f13SEnric Balletbo i Serra  * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1.
1558840d9f13SEnric Balletbo i Serra  * @cmd: One of ec_flash_erase_cmd.
1559840d9f13SEnric Balletbo i Serra  * @reserved: Pad byte; currently always contains 0.
1560840d9f13SEnric Balletbo i Serra  * @flag: No flags defined yet; set to 0.
1561840d9f13SEnric Balletbo i Serra  * @params: Same as v0 parameters.
1562840d9f13SEnric Balletbo i Serra  */
1563840d9f13SEnric Balletbo i Serra struct ec_params_flash_erase_v1 {
1564840d9f13SEnric Balletbo i Serra 	uint8_t  cmd;
1565840d9f13SEnric Balletbo i Serra 	uint8_t  reserved;
1566840d9f13SEnric Balletbo i Serra 	uint16_t flag;
1567840d9f13SEnric Balletbo i Serra 	struct ec_params_flash_erase params;
1568840d9f13SEnric Balletbo i Serra } __ec_align4;
1569840d9f13SEnric Balletbo i Serra 
1570840d9f13SEnric Balletbo i Serra /*
1571840d9f13SEnric Balletbo i Serra  * Get/set flash protection.
1572840d9f13SEnric Balletbo i Serra  *
1573840d9f13SEnric Balletbo i Serra  * If mask!=0, sets/clear the requested bits of flags.  Depending on the
1574840d9f13SEnric Balletbo i Serra  * firmware write protect GPIO, not all flags will take effect immediately;
1575840d9f13SEnric Balletbo i Serra  * some flags require a subsequent hard reset to take effect.  Check the
1576840d9f13SEnric Balletbo i Serra  * returned flags bits to see what actually happened.
1577840d9f13SEnric Balletbo i Serra  *
1578840d9f13SEnric Balletbo i Serra  * If mask=0, simply returns the current flags state.
1579840d9f13SEnric Balletbo i Serra  */
1580840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_PROTECT 0x0015
1581840d9f13SEnric Balletbo i Serra #define EC_VER_FLASH_PROTECT 1  /* Command version 1 */
1582840d9f13SEnric Balletbo i Serra 
1583840d9f13SEnric Balletbo i Serra /* Flags for flash protection */
1584840d9f13SEnric Balletbo i Serra /* RO flash code protected when the EC boots */
1585840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_RO_AT_BOOT         BIT(0)
1586840d9f13SEnric Balletbo i Serra /*
1587840d9f13SEnric Balletbo i Serra  * RO flash code protected now.  If this bit is set, at-boot status cannot
1588840d9f13SEnric Balletbo i Serra  * be changed.
1589840d9f13SEnric Balletbo i Serra  */
1590840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_RO_NOW             BIT(1)
1591840d9f13SEnric Balletbo i Serra /* Entire flash code protected now, until reboot. */
1592840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_ALL_NOW            BIT(2)
1593840d9f13SEnric Balletbo i Serra /* Flash write protect GPIO is asserted now */
1594840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_GPIO_ASSERTED      BIT(3)
1595840d9f13SEnric Balletbo i Serra /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1596840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_ERROR_STUCK        BIT(4)
1597840d9f13SEnric Balletbo i Serra /*
1598840d9f13SEnric Balletbo i Serra  * Error - flash protection is in inconsistent state.  At least one bank of
1599840d9f13SEnric Balletbo i Serra  * flash which should be protected is not protected.  Usually fixed by
1600840d9f13SEnric Balletbo i Serra  * re-requesting the desired flags, or by a hard reset if that fails.
1601840d9f13SEnric Balletbo i Serra  */
1602840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1603840d9f13SEnric Balletbo i Serra /* Entire flash code protected when the EC boots */
1604840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_ALL_AT_BOOT        BIT(6)
1605840d9f13SEnric Balletbo i Serra /* RW flash code protected when the EC boots */
1606840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_RW_AT_BOOT         BIT(7)
1607840d9f13SEnric Balletbo i Serra /* RW flash code protected now. */
1608840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_RW_NOW             BIT(8)
1609840d9f13SEnric Balletbo i Serra /* Rollback information flash region protected when the EC boots */
1610840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT   BIT(9)
1611840d9f13SEnric Balletbo i Serra /* Rollback information flash region protected now */
1612840d9f13SEnric Balletbo i Serra #define EC_FLASH_PROTECT_ROLLBACK_NOW       BIT(10)
1613840d9f13SEnric Balletbo i Serra 
1614840d9f13SEnric Balletbo i Serra 
1615840d9f13SEnric Balletbo i Serra /**
1616840d9f13SEnric Balletbo i Serra  * struct ec_params_flash_protect - Parameters for the flash protect command.
1617840d9f13SEnric Balletbo i Serra  * @mask: Bits in flags to apply.
1618840d9f13SEnric Balletbo i Serra  * @flags: New flags to apply.
1619840d9f13SEnric Balletbo i Serra  */
1620840d9f13SEnric Balletbo i Serra struct ec_params_flash_protect {
1621840d9f13SEnric Balletbo i Serra 	uint32_t mask;
1622840d9f13SEnric Balletbo i Serra 	uint32_t flags;
1623840d9f13SEnric Balletbo i Serra } __ec_align4;
1624840d9f13SEnric Balletbo i Serra 
1625840d9f13SEnric Balletbo i Serra /**
1626840d9f13SEnric Balletbo i Serra  * struct ec_response_flash_protect - Response to the flash protect command.
1627840d9f13SEnric Balletbo i Serra  * @flags: Current value of flash protect flags.
1628840d9f13SEnric Balletbo i Serra  * @valid_flags: Flags which are valid on this platform. This allows the
1629840d9f13SEnric Balletbo i Serra  *               caller to distinguish between flags which aren't set vs. flags
1630840d9f13SEnric Balletbo i Serra  *               which can't be set on this platform.
1631840d9f13SEnric Balletbo i Serra  * @writable_flags: Flags which can be changed given the current protection
1632840d9f13SEnric Balletbo i Serra  *                  state.
1633840d9f13SEnric Balletbo i Serra  */
1634840d9f13SEnric Balletbo i Serra struct ec_response_flash_protect {
1635840d9f13SEnric Balletbo i Serra 	uint32_t flags;
1636840d9f13SEnric Balletbo i Serra 	uint32_t valid_flags;
1637840d9f13SEnric Balletbo i Serra 	uint32_t writable_flags;
1638840d9f13SEnric Balletbo i Serra } __ec_align4;
1639840d9f13SEnric Balletbo i Serra 
1640840d9f13SEnric Balletbo i Serra /*
1641840d9f13SEnric Balletbo i Serra  * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1642840d9f13SEnric Balletbo i Serra  * write protect.  These commands may be reused with version > 0.
1643840d9f13SEnric Balletbo i Serra  */
1644840d9f13SEnric Balletbo i Serra 
1645840d9f13SEnric Balletbo i Serra /* Get the region offset/size */
1646840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_REGION_INFO 0x0016
1647840d9f13SEnric Balletbo i Serra #define EC_VER_FLASH_REGION_INFO 1
1648840d9f13SEnric Balletbo i Serra 
1649840d9f13SEnric Balletbo i Serra enum ec_flash_region {
1650840d9f13SEnric Balletbo i Serra 	/* Region which holds read-only EC image */
1651840d9f13SEnric Balletbo i Serra 	EC_FLASH_REGION_RO = 0,
1652840d9f13SEnric Balletbo i Serra 	/*
1653840d9f13SEnric Balletbo i Serra 	 * Region which holds active RW image. 'Active' is different from
1654840d9f13SEnric Balletbo i Serra 	 * 'running'. Active means 'scheduled-to-run'. Since RO image always
1655840d9f13SEnric Balletbo i Serra 	 * scheduled to run, active/non-active applies only to RW images (for
1656840d9f13SEnric Balletbo i Serra 	 * the same reason 'update' applies only to RW images. It's a state of
1657840d9f13SEnric Balletbo i Serra 	 * an image on a flash. Running image can be RO, RW_A, RW_B but active
1658840d9f13SEnric Balletbo i Serra 	 * image can only be RW_A or RW_B. In recovery mode, an active RW image
1659840d9f13SEnric Balletbo i Serra 	 * doesn't enter 'running' state but it's still active on a flash.
1660840d9f13SEnric Balletbo i Serra 	 */
1661840d9f13SEnric Balletbo i Serra 	EC_FLASH_REGION_ACTIVE,
1662840d9f13SEnric Balletbo i Serra 	/*
1663840d9f13SEnric Balletbo i Serra 	 * Region which should be write-protected in the factory (a superset of
1664840d9f13SEnric Balletbo i Serra 	 * EC_FLASH_REGION_RO)
1665840d9f13SEnric Balletbo i Serra 	 */
1666840d9f13SEnric Balletbo i Serra 	EC_FLASH_REGION_WP_RO,
1667840d9f13SEnric Balletbo i Serra 	/* Region which holds updatable (non-active) RW image */
1668840d9f13SEnric Balletbo i Serra 	EC_FLASH_REGION_UPDATE,
1669840d9f13SEnric Balletbo i Serra 	/* Number of regions */
1670840d9f13SEnric Balletbo i Serra 	EC_FLASH_REGION_COUNT,
1671840d9f13SEnric Balletbo i Serra };
1672840d9f13SEnric Balletbo i Serra /*
1673840d9f13SEnric Balletbo i Serra  * 'RW' is vague if there are multiple RW images; we mean the active one,
1674840d9f13SEnric Balletbo i Serra  * so the old constant is deprecated.
1675840d9f13SEnric Balletbo i Serra  */
1676840d9f13SEnric Balletbo i Serra #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
1677840d9f13SEnric Balletbo i Serra 
1678840d9f13SEnric Balletbo i Serra /**
1679840d9f13SEnric Balletbo i Serra  * struct ec_params_flash_region_info - Parameters for the flash region info
1680840d9f13SEnric Balletbo i Serra  *         command.
1681840d9f13SEnric Balletbo i Serra  * @region: Flash region; see EC_FLASH_REGION_*
1682840d9f13SEnric Balletbo i Serra  */
1683840d9f13SEnric Balletbo i Serra struct ec_params_flash_region_info {
1684840d9f13SEnric Balletbo i Serra 	uint32_t region;
1685840d9f13SEnric Balletbo i Serra } __ec_align4;
1686840d9f13SEnric Balletbo i Serra 
1687840d9f13SEnric Balletbo i Serra struct ec_response_flash_region_info {
1688840d9f13SEnric Balletbo i Serra 	uint32_t offset;
1689840d9f13SEnric Balletbo i Serra 	uint32_t size;
1690840d9f13SEnric Balletbo i Serra } __ec_align4;
1691840d9f13SEnric Balletbo i Serra 
1692840d9f13SEnric Balletbo i Serra /* Read/write VbNvContext */
1693840d9f13SEnric Balletbo i Serra #define EC_CMD_VBNV_CONTEXT 0x0017
1694840d9f13SEnric Balletbo i Serra #define EC_VER_VBNV_CONTEXT 1
1695840d9f13SEnric Balletbo i Serra #define EC_VBNV_BLOCK_SIZE 16
1696840d9f13SEnric Balletbo i Serra 
1697840d9f13SEnric Balletbo i Serra enum ec_vbnvcontext_op {
1698840d9f13SEnric Balletbo i Serra 	EC_VBNV_CONTEXT_OP_READ,
1699840d9f13SEnric Balletbo i Serra 	EC_VBNV_CONTEXT_OP_WRITE,
1700840d9f13SEnric Balletbo i Serra };
1701840d9f13SEnric Balletbo i Serra 
1702840d9f13SEnric Balletbo i Serra struct ec_params_vbnvcontext {
1703840d9f13SEnric Balletbo i Serra 	uint32_t op;
1704840d9f13SEnric Balletbo i Serra 	uint8_t block[EC_VBNV_BLOCK_SIZE];
1705840d9f13SEnric Balletbo i Serra } __ec_align4;
1706840d9f13SEnric Balletbo i Serra 
1707840d9f13SEnric Balletbo i Serra struct ec_response_vbnvcontext {
1708840d9f13SEnric Balletbo i Serra 	uint8_t block[EC_VBNV_BLOCK_SIZE];
1709840d9f13SEnric Balletbo i Serra } __ec_align4;
1710840d9f13SEnric Balletbo i Serra 
1711840d9f13SEnric Balletbo i Serra 
1712840d9f13SEnric Balletbo i Serra /* Get SPI flash information */
1713840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_SPI_INFO 0x0018
1714840d9f13SEnric Balletbo i Serra 
1715840d9f13SEnric Balletbo i Serra struct ec_response_flash_spi_info {
1716840d9f13SEnric Balletbo i Serra 	/* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1717840d9f13SEnric Balletbo i Serra 	uint8_t jedec[3];
1718840d9f13SEnric Balletbo i Serra 
1719840d9f13SEnric Balletbo i Serra 	/* Pad byte; currently always contains 0 */
1720840d9f13SEnric Balletbo i Serra 	uint8_t reserved0;
1721840d9f13SEnric Balletbo i Serra 
1722840d9f13SEnric Balletbo i Serra 	/* Manufacturer / device ID from command 0x90 */
1723840d9f13SEnric Balletbo i Serra 	uint8_t mfr_dev_id[2];
1724840d9f13SEnric Balletbo i Serra 
1725840d9f13SEnric Balletbo i Serra 	/* Status registers from command 0x05 and 0x35 */
1726840d9f13SEnric Balletbo i Serra 	uint8_t sr1, sr2;
1727840d9f13SEnric Balletbo i Serra } __ec_align1;
1728840d9f13SEnric Balletbo i Serra 
1729840d9f13SEnric Balletbo i Serra 
1730840d9f13SEnric Balletbo i Serra /* Select flash during flash operations */
1731840d9f13SEnric Balletbo i Serra #define EC_CMD_FLASH_SELECT 0x0019
1732840d9f13SEnric Balletbo i Serra 
1733840d9f13SEnric Balletbo i Serra /**
1734840d9f13SEnric Balletbo i Serra  * struct ec_params_flash_select - Parameters for the flash select command.
1735840d9f13SEnric Balletbo i Serra  * @select: 1 to select flash, 0 to deselect flash
1736840d9f13SEnric Balletbo i Serra  */
1737840d9f13SEnric Balletbo i Serra struct ec_params_flash_select {
1738840d9f13SEnric Balletbo i Serra 	uint8_t select;
1739840d9f13SEnric Balletbo i Serra } __ec_align4;
1740840d9f13SEnric Balletbo i Serra 
1741840d9f13SEnric Balletbo i Serra 
1742840d9f13SEnric Balletbo i Serra /*****************************************************************************/
1743840d9f13SEnric Balletbo i Serra /* PWM commands */
1744840d9f13SEnric Balletbo i Serra 
1745840d9f13SEnric Balletbo i Serra /* Get fan target RPM */
1746840d9f13SEnric Balletbo i Serra #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1747840d9f13SEnric Balletbo i Serra 
1748840d9f13SEnric Balletbo i Serra struct ec_response_pwm_get_fan_rpm {
1749840d9f13SEnric Balletbo i Serra 	uint32_t rpm;
1750840d9f13SEnric Balletbo i Serra } __ec_align4;
1751840d9f13SEnric Balletbo i Serra 
1752840d9f13SEnric Balletbo i Serra /* Set target fan RPM */
1753840d9f13SEnric Balletbo i Serra #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1754840d9f13SEnric Balletbo i Serra 
1755840d9f13SEnric Balletbo i Serra /* Version 0 of input params */
1756840d9f13SEnric Balletbo i Serra struct ec_params_pwm_set_fan_target_rpm_v0 {
1757840d9f13SEnric Balletbo i Serra 	uint32_t rpm;
1758840d9f13SEnric Balletbo i Serra } __ec_align4;
1759840d9f13SEnric Balletbo i Serra 
1760840d9f13SEnric Balletbo i Serra /* Version 1 of input params */
1761840d9f13SEnric Balletbo i Serra struct ec_params_pwm_set_fan_target_rpm_v1 {
1762840d9f13SEnric Balletbo i Serra 	uint32_t rpm;
1763840d9f13SEnric Balletbo i Serra 	uint8_t fan_idx;
1764840d9f13SEnric Balletbo i Serra } __ec_align_size1;
1765840d9f13SEnric Balletbo i Serra 
1766840d9f13SEnric Balletbo i Serra /* Get keyboard backlight */
1767840d9f13SEnric Balletbo i Serra /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1768840d9f13SEnric Balletbo i Serra #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1769840d9f13SEnric Balletbo i Serra 
1770840d9f13SEnric Balletbo i Serra struct ec_response_pwm_get_keyboard_backlight {
1771840d9f13SEnric Balletbo i Serra 	uint8_t percent;
1772840d9f13SEnric Balletbo i Serra 	uint8_t enabled;
1773840d9f13SEnric Balletbo i Serra } __ec_align1;
1774840d9f13SEnric Balletbo i Serra 
1775840d9f13SEnric Balletbo i Serra /* Set keyboard backlight */
1776840d9f13SEnric Balletbo i Serra /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1777840d9f13SEnric Balletbo i Serra #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1778840d9f13SEnric Balletbo i Serra 
1779840d9f13SEnric Balletbo i Serra struct ec_params_pwm_set_keyboard_backlight {
1780840d9f13SEnric Balletbo i Serra 	uint8_t percent;
1781840d9f13SEnric Balletbo i Serra } __ec_align1;
1782840d9f13SEnric Balletbo i Serra 
1783840d9f13SEnric Balletbo i Serra /* Set target fan PWM duty cycle */
1784840d9f13SEnric Balletbo i Serra #define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1785840d9f13SEnric Balletbo i Serra 
1786840d9f13SEnric Balletbo i Serra /* Version 0 of input params */
1787840d9f13SEnric Balletbo i Serra struct ec_params_pwm_set_fan_duty_v0 {
1788840d9f13SEnric Balletbo i Serra 	uint32_t percent;
1789840d9f13SEnric Balletbo i Serra } __ec_align4;
1790840d9f13SEnric Balletbo i Serra 
1791840d9f13SEnric Balletbo i Serra /* Version 1 of input params */
1792840d9f13SEnric Balletbo i Serra struct ec_params_pwm_set_fan_duty_v1 {
1793840d9f13SEnric Balletbo i Serra 	uint32_t percent;
1794840d9f13SEnric Balletbo i Serra 	uint8_t fan_idx;
1795840d9f13SEnric Balletbo i Serra } __ec_align_size1;
1796840d9f13SEnric Balletbo i Serra 
1797840d9f13SEnric Balletbo i Serra #define EC_CMD_PWM_SET_DUTY 0x0025
1798840d9f13SEnric Balletbo i Serra /* 16 bit duty cycle, 0xffff = 100% */
1799840d9f13SEnric Balletbo i Serra #define EC_PWM_MAX_DUTY 0xffff
1800840d9f13SEnric Balletbo i Serra 
1801840d9f13SEnric Balletbo i Serra enum ec_pwm_type {
1802840d9f13SEnric Balletbo i Serra 	/* All types, indexed by board-specific enum pwm_channel */
1803840d9f13SEnric Balletbo i Serra 	EC_PWM_TYPE_GENERIC = 0,
1804840d9f13SEnric Balletbo i Serra 	/* Keyboard backlight */
1805840d9f13SEnric Balletbo i Serra 	EC_PWM_TYPE_KB_LIGHT,
1806840d9f13SEnric Balletbo i Serra 	/* Display backlight */
1807840d9f13SEnric Balletbo i Serra 	EC_PWM_TYPE_DISPLAY_LIGHT,
1808840d9f13SEnric Balletbo i Serra 	EC_PWM_TYPE_COUNT,
1809840d9f13SEnric Balletbo i Serra };
1810840d9f13SEnric Balletbo i Serra 
1811840d9f13SEnric Balletbo i Serra struct ec_params_pwm_set_duty {
1812840d9f13SEnric Balletbo i Serra 	uint16_t duty;     /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1813840d9f13SEnric Balletbo i Serra 	uint8_t pwm_type;  /* ec_pwm_type */
1814840d9f13SEnric Balletbo i Serra 	uint8_t index;     /* Type-specific index, or 0 if unique */
1815840d9f13SEnric Balletbo i Serra } __ec_align4;
1816840d9f13SEnric Balletbo i Serra 
1817840d9f13SEnric Balletbo i Serra #define EC_CMD_PWM_GET_DUTY 0x0026
1818840d9f13SEnric Balletbo i Serra 
1819840d9f13SEnric Balletbo i Serra struct ec_params_pwm_get_duty {
1820840d9f13SEnric Balletbo i Serra 	uint8_t pwm_type;  /* ec_pwm_type */
1821840d9f13SEnric Balletbo i Serra 	uint8_t index;     /* Type-specific index, or 0 if unique */
1822840d9f13SEnric Balletbo i Serra } __ec_align1;
1823840d9f13SEnric Balletbo i Serra 
1824840d9f13SEnric Balletbo i Serra struct ec_response_pwm_get_duty {
1825840d9f13SEnric Balletbo i Serra 	uint16_t duty;     /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1826840d9f13SEnric Balletbo i Serra } __ec_align2;
1827840d9f13SEnric Balletbo i Serra 
1828840d9f13SEnric Balletbo i Serra /*****************************************************************************/
1829840d9f13SEnric Balletbo i Serra /*
1830840d9f13SEnric Balletbo i Serra  * Lightbar commands. This looks worse than it is. Since we only use one HOST
1831840d9f13SEnric Balletbo i Serra  * command to say "talk to the lightbar", we put the "and tell it to do X" part
1832840d9f13SEnric Balletbo i Serra  * into a subcommand. We'll make separate structs for subcommands with
1833840d9f13SEnric Balletbo i Serra  * different input args, so that we know how much to expect.
1834840d9f13SEnric Balletbo i Serra  */
1835840d9f13SEnric Balletbo i Serra #define EC_CMD_LIGHTBAR_CMD 0x0028
1836840d9f13SEnric Balletbo i Serra 
1837840d9f13SEnric Balletbo i Serra struct rgb_s {
1838840d9f13SEnric Balletbo i Serra 	uint8_t r, g, b;
1839840d9f13SEnric Balletbo i Serra } __ec_todo_unpacked;
1840840d9f13SEnric Balletbo i Serra 
1841840d9f13SEnric Balletbo i Serra #define LB_BATTERY_LEVELS 4
1842840d9f13SEnric Balletbo i Serra 
1843840d9f13SEnric Balletbo i Serra /*
1844840d9f13SEnric Balletbo i Serra  * List of tweakable parameters. NOTE: It's __packed so it can be sent in a
1845840d9f13SEnric Balletbo i Serra  * host command, but the alignment is the same regardless. Keep it that way.
1846840d9f13SEnric Balletbo i Serra  */
1847840d9f13SEnric Balletbo i Serra struct lightbar_params_v0 {
1848840d9f13SEnric Balletbo i Serra 	/* Timing */
1849840d9f13SEnric Balletbo i Serra 	int32_t google_ramp_up;
1850840d9f13SEnric Balletbo i Serra 	int32_t google_ramp_down;
1851840d9f13SEnric Balletbo i Serra 	int32_t s3s0_ramp_up;
1852840d9f13SEnric Balletbo i Serra 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1853840d9f13SEnric Balletbo i Serra 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1854840d9f13SEnric Balletbo i Serra 	int32_t s0s3_ramp_down;
1855840d9f13SEnric Balletbo i Serra 	int32_t s3_sleep_for;
1856840d9f13SEnric Balletbo i Serra 	int32_t s3_ramp_up;
1857840d9f13SEnric Balletbo i Serra 	int32_t s3_ramp_down;
1858840d9f13SEnric Balletbo i Serra 
1859840d9f13SEnric Balletbo i Serra 	/* Oscillation */
1860840d9f13SEnric Balletbo i Serra 	uint8_t new_s0;
1861840d9f13SEnric Balletbo i Serra 	uint8_t osc_min[2];			/* AC=0/1 */
1862840d9f13SEnric Balletbo i Serra 	uint8_t osc_max[2];			/* AC=0/1 */
1863840d9f13SEnric Balletbo i Serra 	uint8_t w_ofs[2];			/* AC=0/1 */
1864840d9f13SEnric Balletbo i Serra 
1865840d9f13SEnric Balletbo i Serra 	/* Brightness limits based on the backlight and AC. */
1866840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1867840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1868840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1869840d9f13SEnric Balletbo i Serra 
1870840d9f13SEnric Balletbo i Serra 	/* Battery level thresholds */
1871840d9f13SEnric Balletbo i Serra 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1872840d9f13SEnric Balletbo i Serra 
1873840d9f13SEnric Balletbo i Serra 	/* Map [AC][battery_level] to color index */
1874840d9f13SEnric Balletbo i Serra 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1875840d9f13SEnric Balletbo i Serra 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1876840d9f13SEnric Balletbo i Serra 
1877840d9f13SEnric Balletbo i Serra 	/* Color palette */
1878840d9f13SEnric Balletbo i Serra 	struct rgb_s color[8];			/* 0-3 are Google colors */
1879840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1880840d9f13SEnric Balletbo i Serra 
1881840d9f13SEnric Balletbo i Serra struct lightbar_params_v1 {
1882840d9f13SEnric Balletbo i Serra 	/* Timing */
1883840d9f13SEnric Balletbo i Serra 	int32_t google_ramp_up;
1884840d9f13SEnric Balletbo i Serra 	int32_t google_ramp_down;
1885840d9f13SEnric Balletbo i Serra 	int32_t s3s0_ramp_up;
1886840d9f13SEnric Balletbo i Serra 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1887840d9f13SEnric Balletbo i Serra 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1888840d9f13SEnric Balletbo i Serra 	int32_t s0s3_ramp_down;
1889840d9f13SEnric Balletbo i Serra 	int32_t s3_sleep_for;
1890840d9f13SEnric Balletbo i Serra 	int32_t s3_ramp_up;
1891840d9f13SEnric Balletbo i Serra 	int32_t s3_ramp_down;
1892840d9f13SEnric Balletbo i Serra 	int32_t s5_ramp_up;
1893840d9f13SEnric Balletbo i Serra 	int32_t s5_ramp_down;
1894840d9f13SEnric Balletbo i Serra 	int32_t tap_tick_delay;
1895840d9f13SEnric Balletbo i Serra 	int32_t tap_gate_delay;
1896840d9f13SEnric Balletbo i Serra 	int32_t tap_display_time;
1897840d9f13SEnric Balletbo i Serra 
1898840d9f13SEnric Balletbo i Serra 	/* Tap-for-battery params */
1899840d9f13SEnric Balletbo i Serra 	uint8_t tap_pct_red;
1900840d9f13SEnric Balletbo i Serra 	uint8_t tap_pct_green;
1901840d9f13SEnric Balletbo i Serra 	uint8_t tap_seg_min_on;
1902840d9f13SEnric Balletbo i Serra 	uint8_t tap_seg_max_on;
1903840d9f13SEnric Balletbo i Serra 	uint8_t tap_seg_osc;
1904840d9f13SEnric Balletbo i Serra 	uint8_t tap_idx[3];
1905840d9f13SEnric Balletbo i Serra 
1906840d9f13SEnric Balletbo i Serra 	/* Oscillation */
1907840d9f13SEnric Balletbo i Serra 	uint8_t osc_min[2];			/* AC=0/1 */
1908840d9f13SEnric Balletbo i Serra 	uint8_t osc_max[2];			/* AC=0/1 */
1909840d9f13SEnric Balletbo i Serra 	uint8_t w_ofs[2];			/* AC=0/1 */
1910840d9f13SEnric Balletbo i Serra 
1911840d9f13SEnric Balletbo i Serra 	/* Brightness limits based on the backlight and AC. */
1912840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1913840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1914840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1915840d9f13SEnric Balletbo i Serra 
1916840d9f13SEnric Balletbo i Serra 	/* Battery level thresholds */
1917840d9f13SEnric Balletbo i Serra 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1918840d9f13SEnric Balletbo i Serra 
1919840d9f13SEnric Balletbo i Serra 	/* Map [AC][battery_level] to color index */
1920840d9f13SEnric Balletbo i Serra 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1921840d9f13SEnric Balletbo i Serra 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1922840d9f13SEnric Balletbo i Serra 
1923840d9f13SEnric Balletbo i Serra 	/* s5: single color pulse on inhibited power-up */
1924840d9f13SEnric Balletbo i Serra 	uint8_t s5_idx;
1925840d9f13SEnric Balletbo i Serra 
1926840d9f13SEnric Balletbo i Serra 	/* Color palette */
1927840d9f13SEnric Balletbo i Serra 	struct rgb_s color[8];			/* 0-3 are Google colors */
1928840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1929840d9f13SEnric Balletbo i Serra 
1930840d9f13SEnric Balletbo i Serra /* Lightbar command params v2
1931840d9f13SEnric Balletbo i Serra  * crbug.com/467716
1932840d9f13SEnric Balletbo i Serra  *
1933840d9f13SEnric Balletbo i Serra  * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
1934840d9f13SEnric Balletbo i Serra  * logical groups to make it more manageable ( < 120 bytes).
1935840d9f13SEnric Balletbo i Serra  *
1936840d9f13SEnric Balletbo i Serra  * NOTE: Each of these groups must be less than 120 bytes.
1937840d9f13SEnric Balletbo i Serra  */
1938840d9f13SEnric Balletbo i Serra 
1939840d9f13SEnric Balletbo i Serra struct lightbar_params_v2_timing {
1940840d9f13SEnric Balletbo i Serra 	/* Timing */
1941840d9f13SEnric Balletbo i Serra 	int32_t google_ramp_up;
1942840d9f13SEnric Balletbo i Serra 	int32_t google_ramp_down;
1943840d9f13SEnric Balletbo i Serra 	int32_t s3s0_ramp_up;
1944840d9f13SEnric Balletbo i Serra 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1945840d9f13SEnric Balletbo i Serra 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1946840d9f13SEnric Balletbo i Serra 	int32_t s0s3_ramp_down;
1947840d9f13SEnric Balletbo i Serra 	int32_t s3_sleep_for;
1948840d9f13SEnric Balletbo i Serra 	int32_t s3_ramp_up;
1949840d9f13SEnric Balletbo i Serra 	int32_t s3_ramp_down;
1950840d9f13SEnric Balletbo i Serra 	int32_t s5_ramp_up;
1951840d9f13SEnric Balletbo i Serra 	int32_t s5_ramp_down;
1952840d9f13SEnric Balletbo i Serra 	int32_t tap_tick_delay;
1953840d9f13SEnric Balletbo i Serra 	int32_t tap_gate_delay;
1954840d9f13SEnric Balletbo i Serra 	int32_t tap_display_time;
1955840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1956840d9f13SEnric Balletbo i Serra 
1957840d9f13SEnric Balletbo i Serra struct lightbar_params_v2_tap {
1958840d9f13SEnric Balletbo i Serra 	/* Tap-for-battery params */
1959840d9f13SEnric Balletbo i Serra 	uint8_t tap_pct_red;
1960840d9f13SEnric Balletbo i Serra 	uint8_t tap_pct_green;
1961840d9f13SEnric Balletbo i Serra 	uint8_t tap_seg_min_on;
1962840d9f13SEnric Balletbo i Serra 	uint8_t tap_seg_max_on;
1963840d9f13SEnric Balletbo i Serra 	uint8_t tap_seg_osc;
1964840d9f13SEnric Balletbo i Serra 	uint8_t tap_idx[3];
1965840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1966840d9f13SEnric Balletbo i Serra 
1967840d9f13SEnric Balletbo i Serra struct lightbar_params_v2_oscillation {
1968840d9f13SEnric Balletbo i Serra 	/* Oscillation */
1969840d9f13SEnric Balletbo i Serra 	uint8_t osc_min[2];			/* AC=0/1 */
1970840d9f13SEnric Balletbo i Serra 	uint8_t osc_max[2];			/* AC=0/1 */
1971840d9f13SEnric Balletbo i Serra 	uint8_t w_ofs[2];			/* AC=0/1 */
1972840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1973840d9f13SEnric Balletbo i Serra 
1974840d9f13SEnric Balletbo i Serra struct lightbar_params_v2_brightness {
1975840d9f13SEnric Balletbo i Serra 	/* Brightness limits based on the backlight and AC. */
1976840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1977840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1978840d9f13SEnric Balletbo i Serra 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1979840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1980840d9f13SEnric Balletbo i Serra 
1981840d9f13SEnric Balletbo i Serra struct lightbar_params_v2_thresholds {
1982840d9f13SEnric Balletbo i Serra 	/* Battery level thresholds */
1983840d9f13SEnric Balletbo i Serra 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1984840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1985840d9f13SEnric Balletbo i Serra 
1986840d9f13SEnric Balletbo i Serra struct lightbar_params_v2_colors {
1987840d9f13SEnric Balletbo i Serra 	/* Map [AC][battery_level] to color index */
1988840d9f13SEnric Balletbo i Serra 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1989840d9f13SEnric Balletbo i Serra 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1990840d9f13SEnric Balletbo i Serra 
1991840d9f13SEnric Balletbo i Serra 	/* s5: single color pulse on inhibited power-up */
1992840d9f13SEnric Balletbo i Serra 	uint8_t s5_idx;
1993840d9f13SEnric Balletbo i Serra 
1994840d9f13SEnric Balletbo i Serra 	/* Color palette */
1995840d9f13SEnric Balletbo i Serra 	struct rgb_s color[8];			/* 0-3 are Google colors */
1996840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
1997840d9f13SEnric Balletbo i Serra 
1998840d9f13SEnric Balletbo i Serra /* Lightbar program. */
1999840d9f13SEnric Balletbo i Serra #define EC_LB_PROG_LEN 192
2000840d9f13SEnric Balletbo i Serra struct lightbar_program {
2001840d9f13SEnric Balletbo i Serra 	uint8_t size;
2002840d9f13SEnric Balletbo i Serra 	uint8_t data[EC_LB_PROG_LEN];
2003840d9f13SEnric Balletbo i Serra } __ec_todo_unpacked;
2004840d9f13SEnric Balletbo i Serra 
2005840d9f13SEnric Balletbo i Serra struct ec_params_lightbar {
2006840d9f13SEnric Balletbo i Serra 	uint8_t cmd;		      /* Command (see enum lightbar_command) */
2007840d9f13SEnric Balletbo i Serra 	union {
2008840d9f13SEnric Balletbo i Serra 		/*
2009840d9f13SEnric Balletbo i Serra 		 * The following commands have no args:
2010840d9f13SEnric Balletbo i Serra 		 *
2011840d9f13SEnric Balletbo i Serra 		 * dump, off, on, init, get_seq, get_params_v0, get_params_v1,
2012840d9f13SEnric Balletbo i Serra 		 * version, get_brightness, get_demo, suspend, resume,
2013840d9f13SEnric Balletbo i Serra 		 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc,
2014840d9f13SEnric Balletbo i Serra 		 * get_params_v2_bright, get_params_v2_thlds,
2015840d9f13SEnric Balletbo i Serra 		 * get_params_v2_colors
2016840d9f13SEnric Balletbo i Serra 		 *
2017840d9f13SEnric Balletbo i Serra 		 * Don't use an empty struct, because C++ hates that.
2018840d9f13SEnric Balletbo i Serra 		 */
2019840d9f13SEnric Balletbo i Serra 
2020840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2021840d9f13SEnric Balletbo i Serra 			uint8_t num;
2022840d9f13SEnric Balletbo i Serra 		} set_brightness, seq, demo;
2023840d9f13SEnric Balletbo i Serra 
2024840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2025840d9f13SEnric Balletbo i Serra 			uint8_t ctrl, reg, value;
2026840d9f13SEnric Balletbo i Serra 		} reg;
2027840d9f13SEnric Balletbo i Serra 
2028840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2029840d9f13SEnric Balletbo i Serra 			uint8_t led, red, green, blue;
2030840d9f13SEnric Balletbo i Serra 		} set_rgb;
2031840d9f13SEnric Balletbo i Serra 
2032840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2033840d9f13SEnric Balletbo i Serra 			uint8_t led;
2034840d9f13SEnric Balletbo i Serra 		} get_rgb;
2035840d9f13SEnric Balletbo i Serra 
2036840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2037840d9f13SEnric Balletbo i Serra 			uint8_t enable;
2038840d9f13SEnric Balletbo i Serra 		} manual_suspend_ctrl;
2039840d9f13SEnric Balletbo i Serra 
2040840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v0 set_params_v0;
2041840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v1 set_params_v1;
2042840d9f13SEnric Balletbo i Serra 
2043840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_timing set_v2par_timing;
2044840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_tap set_v2par_tap;
2045840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_oscillation set_v2par_osc;
2046840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_brightness set_v2par_bright;
2047840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_thresholds set_v2par_thlds;
2048840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_colors set_v2par_colors;
2049840d9f13SEnric Balletbo i Serra 
2050840d9f13SEnric Balletbo i Serra 		struct lightbar_program set_program;
2051840d9f13SEnric Balletbo i Serra 	};
2052840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2053840d9f13SEnric Balletbo i Serra 
2054840d9f13SEnric Balletbo i Serra struct ec_response_lightbar {
2055840d9f13SEnric Balletbo i Serra 	union {
2056840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2057840d9f13SEnric Balletbo i Serra 			struct __ec_todo_unpacked {
2058840d9f13SEnric Balletbo i Serra 				uint8_t reg;
2059840d9f13SEnric Balletbo i Serra 				uint8_t ic0;
2060840d9f13SEnric Balletbo i Serra 				uint8_t ic1;
2061840d9f13SEnric Balletbo i Serra 			} vals[23];
2062840d9f13SEnric Balletbo i Serra 		} dump;
2063840d9f13SEnric Balletbo i Serra 
2064840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2065840d9f13SEnric Balletbo i Serra 			uint8_t num;
2066840d9f13SEnric Balletbo i Serra 		} get_seq, get_brightness, get_demo;
2067840d9f13SEnric Balletbo i Serra 
2068840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v0 get_params_v0;
2069840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v1 get_params_v1;
2070840d9f13SEnric Balletbo i Serra 
2071840d9f13SEnric Balletbo i Serra 
2072840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_timing get_params_v2_timing;
2073840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_tap get_params_v2_tap;
2074840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_oscillation get_params_v2_osc;
2075840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_brightness get_params_v2_bright;
2076840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_thresholds get_params_v2_thlds;
2077840d9f13SEnric Balletbo i Serra 		struct lightbar_params_v2_colors get_params_v2_colors;
2078840d9f13SEnric Balletbo i Serra 
2079840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2080840d9f13SEnric Balletbo i Serra 			uint32_t num;
2081840d9f13SEnric Balletbo i Serra 			uint32_t flags;
2082840d9f13SEnric Balletbo i Serra 		} version;
2083840d9f13SEnric Balletbo i Serra 
2084840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2085840d9f13SEnric Balletbo i Serra 			uint8_t red, green, blue;
2086840d9f13SEnric Balletbo i Serra 		} get_rgb;
2087840d9f13SEnric Balletbo i Serra 
2088840d9f13SEnric Balletbo i Serra 		/*
2089840d9f13SEnric Balletbo i Serra 		 * The following commands have no response:
2090840d9f13SEnric Balletbo i Serra 		 *
2091840d9f13SEnric Balletbo i Serra 		 * off, on, init, set_brightness, seq, reg, set_rgb, demo,
2092840d9f13SEnric Balletbo i Serra 		 * set_params_v0, set_params_v1, set_program,
2093840d9f13SEnric Balletbo i Serra 		 * manual_suspend_ctrl, suspend, resume, set_v2par_timing,
2094840d9f13SEnric Balletbo i Serra 		 * set_v2par_tap, set_v2par_osc, set_v2par_bright,
2095840d9f13SEnric Balletbo i Serra 		 * set_v2par_thlds, set_v2par_colors
2096840d9f13SEnric Balletbo i Serra 		 */
2097840d9f13SEnric Balletbo i Serra 	};
2098840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2099840d9f13SEnric Balletbo i Serra 
2100840d9f13SEnric Balletbo i Serra /* Lightbar commands */
2101840d9f13SEnric Balletbo i Serra enum lightbar_command {
2102840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_DUMP = 0,
2103840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_OFF = 1,
2104840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_ON = 2,
2105840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_INIT = 3,
2106840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
2107840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SEQ = 5,
2108840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_REG = 6,
2109840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_RGB = 7,
2110840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_SEQ = 8,
2111840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_DEMO = 9,
2112840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
2113840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
2114840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_VERSION = 12,
2115840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
2116840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_RGB = 14,
2117840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_DEMO = 15,
2118840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
2119840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
2120840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PROGRAM = 18,
2121840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
2122840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SUSPEND = 20,
2123840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_RESUME = 21,
2124840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
2125840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
2126840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
2127840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
2128840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
2129840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
2130840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
2131840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
2132840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
2133840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
2134840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
2135840d9f13SEnric Balletbo i Serra 	LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
2136840d9f13SEnric Balletbo i Serra 	LIGHTBAR_NUM_CMDS
2137840d9f13SEnric Balletbo i Serra };
2138840d9f13SEnric Balletbo i Serra 
2139840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2140840d9f13SEnric Balletbo i Serra /* LED control commands */
2141840d9f13SEnric Balletbo i Serra 
2142840d9f13SEnric Balletbo i Serra #define EC_CMD_LED_CONTROL 0x0029
2143840d9f13SEnric Balletbo i Serra 
2144840d9f13SEnric Balletbo i Serra enum ec_led_id {
2145840d9f13SEnric Balletbo i Serra 	/* LED to indicate battery state of charge */
2146840d9f13SEnric Balletbo i Serra 	EC_LED_ID_BATTERY_LED = 0,
2147840d9f13SEnric Balletbo i Serra 	/*
2148840d9f13SEnric Balletbo i Serra 	 * LED to indicate system power state (on or in suspend).
2149840d9f13SEnric Balletbo i Serra 	 * May be on power button or on C-panel.
2150840d9f13SEnric Balletbo i Serra 	 */
2151840d9f13SEnric Balletbo i Serra 	EC_LED_ID_POWER_LED,
2152840d9f13SEnric Balletbo i Serra 	/* LED on power adapter or its plug */
2153840d9f13SEnric Balletbo i Serra 	EC_LED_ID_ADAPTER_LED,
2154840d9f13SEnric Balletbo i Serra 	/* LED to indicate left side */
2155840d9f13SEnric Balletbo i Serra 	EC_LED_ID_LEFT_LED,
2156840d9f13SEnric Balletbo i Serra 	/* LED to indicate right side */
2157840d9f13SEnric Balletbo i Serra 	EC_LED_ID_RIGHT_LED,
2158840d9f13SEnric Balletbo i Serra 	/* LED to indicate recovery mode with HW_REINIT */
2159840d9f13SEnric Balletbo i Serra 	EC_LED_ID_RECOVERY_HW_REINIT_LED,
2160840d9f13SEnric Balletbo i Serra 	/* LED to indicate sysrq debug mode. */
2161840d9f13SEnric Balletbo i Serra 	EC_LED_ID_SYSRQ_DEBUG_LED,
2162840d9f13SEnric Balletbo i Serra 
2163840d9f13SEnric Balletbo i Serra 	EC_LED_ID_COUNT
2164840d9f13SEnric Balletbo i Serra };
2165840d9f13SEnric Balletbo i Serra 
2166840d9f13SEnric Balletbo i Serra /* LED control flags */
2167840d9f13SEnric Balletbo i Serra #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */
2168840d9f13SEnric Balletbo i Serra #define EC_LED_FLAGS_AUTO  BIT(1) /* Switch LED back to automatic control */
2169840d9f13SEnric Balletbo i Serra 
2170840d9f13SEnric Balletbo i Serra enum ec_led_colors {
2171840d9f13SEnric Balletbo i Serra 	EC_LED_COLOR_RED = 0,
2172840d9f13SEnric Balletbo i Serra 	EC_LED_COLOR_GREEN,
2173840d9f13SEnric Balletbo i Serra 	EC_LED_COLOR_BLUE,
2174840d9f13SEnric Balletbo i Serra 	EC_LED_COLOR_YELLOW,
2175840d9f13SEnric Balletbo i Serra 	EC_LED_COLOR_WHITE,
2176840d9f13SEnric Balletbo i Serra 	EC_LED_COLOR_AMBER,
2177840d9f13SEnric Balletbo i Serra 
2178840d9f13SEnric Balletbo i Serra 	EC_LED_COLOR_COUNT
2179840d9f13SEnric Balletbo i Serra };
2180840d9f13SEnric Balletbo i Serra 
2181840d9f13SEnric Balletbo i Serra struct ec_params_led_control {
2182840d9f13SEnric Balletbo i Serra 	uint8_t led_id;     /* Which LED to control */
2183840d9f13SEnric Balletbo i Serra 	uint8_t flags;      /* Control flags */
2184840d9f13SEnric Balletbo i Serra 
2185840d9f13SEnric Balletbo i Serra 	uint8_t brightness[EC_LED_COLOR_COUNT];
2186840d9f13SEnric Balletbo i Serra } __ec_align1;
2187840d9f13SEnric Balletbo i Serra 
2188840d9f13SEnric Balletbo i Serra struct ec_response_led_control {
2189840d9f13SEnric Balletbo i Serra 	/*
2190840d9f13SEnric Balletbo i Serra 	 * Available brightness value range.
2191840d9f13SEnric Balletbo i Serra 	 *
2192840d9f13SEnric Balletbo i Serra 	 * Range 0 means color channel not present.
2193840d9f13SEnric Balletbo i Serra 	 * Range 1 means on/off control.
2194840d9f13SEnric Balletbo i Serra 	 * Other values means the LED is control by PWM.
2195840d9f13SEnric Balletbo i Serra 	 */
2196840d9f13SEnric Balletbo i Serra 	uint8_t brightness_range[EC_LED_COLOR_COUNT];
2197840d9f13SEnric Balletbo i Serra } __ec_align1;
2198840d9f13SEnric Balletbo i Serra 
2199840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2200840d9f13SEnric Balletbo i Serra /* Verified boot commands */
2201840d9f13SEnric Balletbo i Serra 
2202840d9f13SEnric Balletbo i Serra /*
2203840d9f13SEnric Balletbo i Serra  * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
2204840d9f13SEnric Balletbo i Serra  * reused for other purposes with version > 0.
2205840d9f13SEnric Balletbo i Serra  */
2206840d9f13SEnric Balletbo i Serra 
2207840d9f13SEnric Balletbo i Serra /* Verified boot hash command */
2208840d9f13SEnric Balletbo i Serra #define EC_CMD_VBOOT_HASH 0x002A
2209840d9f13SEnric Balletbo i Serra 
2210840d9f13SEnric Balletbo i Serra struct ec_params_vboot_hash {
2211840d9f13SEnric Balletbo i Serra 	uint8_t cmd;             /* enum ec_vboot_hash_cmd */
2212840d9f13SEnric Balletbo i Serra 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
2213840d9f13SEnric Balletbo i Serra 	uint8_t nonce_size;      /* Nonce size; may be 0 */
2214840d9f13SEnric Balletbo i Serra 	uint8_t reserved0;       /* Reserved; set 0 */
2215840d9f13SEnric Balletbo i Serra 	uint32_t offset;         /* Offset in flash to hash */
2216840d9f13SEnric Balletbo i Serra 	uint32_t size;           /* Number of bytes to hash */
2217840d9f13SEnric Balletbo i Serra 	uint8_t nonce_data[64];  /* Nonce data; ignored if nonce_size=0 */
2218840d9f13SEnric Balletbo i Serra } __ec_align4;
2219840d9f13SEnric Balletbo i Serra 
2220840d9f13SEnric Balletbo i Serra struct ec_response_vboot_hash {
2221840d9f13SEnric Balletbo i Serra 	uint8_t status;          /* enum ec_vboot_hash_status */
2222840d9f13SEnric Balletbo i Serra 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
2223840d9f13SEnric Balletbo i Serra 	uint8_t digest_size;     /* Size of hash digest in bytes */
2224840d9f13SEnric Balletbo i Serra 	uint8_t reserved0;       /* Ignore; will be 0 */
2225840d9f13SEnric Balletbo i Serra 	uint32_t offset;         /* Offset in flash which was hashed */
2226840d9f13SEnric Balletbo i Serra 	uint32_t size;           /* Number of bytes hashed */
2227840d9f13SEnric Balletbo i Serra 	uint8_t hash_digest[64]; /* Hash digest data */
2228840d9f13SEnric Balletbo i Serra } __ec_align4;
2229840d9f13SEnric Balletbo i Serra 
2230840d9f13SEnric Balletbo i Serra enum ec_vboot_hash_cmd {
2231840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_GET = 0,       /* Get current hash status */
2232840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_ABORT = 1,     /* Abort calculating current hash */
2233840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_START = 2,     /* Start computing a new hash */
2234840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_RECALC = 3,    /* Synchronously compute a new hash */
2235840d9f13SEnric Balletbo i Serra };
2236840d9f13SEnric Balletbo i Serra 
2237840d9f13SEnric Balletbo i Serra enum ec_vboot_hash_type {
2238840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
2239840d9f13SEnric Balletbo i Serra };
2240840d9f13SEnric Balletbo i Serra 
2241840d9f13SEnric Balletbo i Serra enum ec_vboot_hash_status {
2242840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
2243840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
2244840d9f13SEnric Balletbo i Serra 	EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
2245840d9f13SEnric Balletbo i Serra };
2246840d9f13SEnric Balletbo i Serra 
2247840d9f13SEnric Balletbo i Serra /*
2248840d9f13SEnric Balletbo i Serra  * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
2249840d9f13SEnric Balletbo i Serra  * If one of these is specified, the EC will automatically update offset and
2250840d9f13SEnric Balletbo i Serra  * size to the correct values for the specified image (RO or RW).
2251840d9f13SEnric Balletbo i Serra  */
2252840d9f13SEnric Balletbo i Serra #define EC_VBOOT_HASH_OFFSET_RO		0xfffffffe
2253840d9f13SEnric Balletbo i Serra #define EC_VBOOT_HASH_OFFSET_ACTIVE	0xfffffffd
2254840d9f13SEnric Balletbo i Serra #define EC_VBOOT_HASH_OFFSET_UPDATE	0xfffffffc
2255840d9f13SEnric Balletbo i Serra 
2256840d9f13SEnric Balletbo i Serra /*
2257840d9f13SEnric Balletbo i Serra  * 'RW' is vague if there are multiple RW images; we mean the active one,
2258840d9f13SEnric Balletbo i Serra  * so the old constant is deprecated.
2259840d9f13SEnric Balletbo i Serra  */
2260840d9f13SEnric Balletbo i Serra #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2261840d9f13SEnric Balletbo i Serra 
2262840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2263840d9f13SEnric Balletbo i Serra /*
2264840d9f13SEnric Balletbo i Serra  * Motion sense commands. We'll make separate structs for sub-commands with
2265840d9f13SEnric Balletbo i Serra  * different input args, so that we know how much to expect.
2266840d9f13SEnric Balletbo i Serra  */
2267840d9f13SEnric Balletbo i Serra #define EC_CMD_MOTION_SENSE_CMD 0x002B
2268840d9f13SEnric Balletbo i Serra 
2269840d9f13SEnric Balletbo i Serra /* Motion sense commands */
2270840d9f13SEnric Balletbo i Serra enum motionsense_command {
2271840d9f13SEnric Balletbo i Serra 	/*
2272840d9f13SEnric Balletbo i Serra 	 * Dump command returns all motion sensor data including motion sense
2273840d9f13SEnric Balletbo i Serra 	 * module flags and individual sensor flags.
2274840d9f13SEnric Balletbo i Serra 	 */
2275840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_DUMP = 0,
2276840d9f13SEnric Balletbo i Serra 
2277840d9f13SEnric Balletbo i Serra 	/*
2278840d9f13SEnric Balletbo i Serra 	 * Info command returns data describing the details of a given sensor,
2279840d9f13SEnric Balletbo i Serra 	 * including enum motionsensor_type, enum motionsensor_location, and
2280840d9f13SEnric Balletbo i Serra 	 * enum motionsensor_chip.
2281840d9f13SEnric Balletbo i Serra 	 */
2282840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_INFO = 1,
2283840d9f13SEnric Balletbo i Serra 
2284840d9f13SEnric Balletbo i Serra 	/*
2285840d9f13SEnric Balletbo i Serra 	 * EC Rate command is a setter/getter command for the EC sampling rate
2286840d9f13SEnric Balletbo i Serra 	 * in milliseconds.
2287840d9f13SEnric Balletbo i Serra 	 * It is per sensor, the EC run sample task  at the minimum of all
2288840d9f13SEnric Balletbo i Serra 	 * sensors EC_RATE.
2289840d9f13SEnric Balletbo i Serra 	 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
2290840d9f13SEnric Balletbo i Serra 	 * to collect all the sensor samples.
2291840d9f13SEnric Balletbo i Serra 	 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
2292840d9f13SEnric Balletbo i Serra 	 * to process of all motion sensors in milliseconds.
2293840d9f13SEnric Balletbo i Serra 	 */
2294840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_EC_RATE = 2,
2295840d9f13SEnric Balletbo i Serra 
2296840d9f13SEnric Balletbo i Serra 	/*
2297840d9f13SEnric Balletbo i Serra 	 * Sensor ODR command is a setter/getter command for the output data
2298840d9f13SEnric Balletbo i Serra 	 * rate of a specific motion sensor in millihertz.
2299840d9f13SEnric Balletbo i Serra 	 */
2300840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_SENSOR_ODR = 3,
2301840d9f13SEnric Balletbo i Serra 
2302840d9f13SEnric Balletbo i Serra 	/*
2303840d9f13SEnric Balletbo i Serra 	 * Sensor range command is a setter/getter command for the range of
2304840d9f13SEnric Balletbo i Serra 	 * a specified motion sensor in +/-G's or +/- deg/s.
2305840d9f13SEnric Balletbo i Serra 	 */
2306840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_SENSOR_RANGE = 4,
2307840d9f13SEnric Balletbo i Serra 
2308840d9f13SEnric Balletbo i Serra 	/*
2309840d9f13SEnric Balletbo i Serra 	 * Setter/getter command for the keyboard wake angle. When the lid
2310840d9f13SEnric Balletbo i Serra 	 * angle is greater than this value, keyboard wake is disabled in S3,
2311840d9f13SEnric Balletbo i Serra 	 * and when the lid angle goes less than this value, keyboard wake is
2312840d9f13SEnric Balletbo i Serra 	 * enabled. Note, the lid angle measurement is an approximate,
2313840d9f13SEnric Balletbo i Serra 	 * un-calibrated value, hence the wake angle isn't exact.
2314840d9f13SEnric Balletbo i Serra 	 */
2315840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
2316840d9f13SEnric Balletbo i Serra 
2317840d9f13SEnric Balletbo i Serra 	/*
2318840d9f13SEnric Balletbo i Serra 	 * Returns a single sensor data.
2319840d9f13SEnric Balletbo i Serra 	 */
2320840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_DATA = 6,
2321840d9f13SEnric Balletbo i Serra 
2322840d9f13SEnric Balletbo i Serra 	/*
2323840d9f13SEnric Balletbo i Serra 	 * Return sensor fifo info.
2324840d9f13SEnric Balletbo i Serra 	 */
2325840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_FIFO_INFO = 7,
2326840d9f13SEnric Balletbo i Serra 
2327840d9f13SEnric Balletbo i Serra 	/*
2328840d9f13SEnric Balletbo i Serra 	 * Insert a flush element in the fifo and return sensor fifo info.
2329840d9f13SEnric Balletbo i Serra 	 * The host can use that element to synchronize its operation.
2330840d9f13SEnric Balletbo i Serra 	 */
2331840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2332840d9f13SEnric Balletbo i Serra 
2333840d9f13SEnric Balletbo i Serra 	/*
2334840d9f13SEnric Balletbo i Serra 	 * Return a portion of the fifo.
2335840d9f13SEnric Balletbo i Serra 	 */
2336840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_FIFO_READ = 9,
2337840d9f13SEnric Balletbo i Serra 
2338840d9f13SEnric Balletbo i Serra 	/*
2339840d9f13SEnric Balletbo i Serra 	 * Perform low level calibration.
2340840d9f13SEnric Balletbo i Serra 	 * On sensors that support it, ask to do offset calibration.
2341840d9f13SEnric Balletbo i Serra 	 */
2342840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2343840d9f13SEnric Balletbo i Serra 
2344840d9f13SEnric Balletbo i Serra 	/*
2345840d9f13SEnric Balletbo i Serra 	 * Sensor Offset command is a setter/getter command for the offset
2346840d9f13SEnric Balletbo i Serra 	 * used for calibration.
2347840d9f13SEnric Balletbo i Serra 	 * The offsets can be calculated by the host, or via
2348840d9f13SEnric Balletbo i Serra 	 * PERFORM_CALIB command.
2349840d9f13SEnric Balletbo i Serra 	 */
2350840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2351840d9f13SEnric Balletbo i Serra 
2352840d9f13SEnric Balletbo i Serra 	/*
2353840d9f13SEnric Balletbo i Serra 	 * List available activities for a MOTION sensor.
2354840d9f13SEnric Balletbo i Serra 	 * Indicates if they are enabled or disabled.
2355840d9f13SEnric Balletbo i Serra 	 */
2356840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2357840d9f13SEnric Balletbo i Serra 
2358840d9f13SEnric Balletbo i Serra 	/*
2359840d9f13SEnric Balletbo i Serra 	 * Activity management
2360840d9f13SEnric Balletbo i Serra 	 * Enable/Disable activity recognition.
2361840d9f13SEnric Balletbo i Serra 	 */
2362840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2363840d9f13SEnric Balletbo i Serra 
2364840d9f13SEnric Balletbo i Serra 	/*
2365840d9f13SEnric Balletbo i Serra 	 * Lid Angle
2366840d9f13SEnric Balletbo i Serra 	 */
2367840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_LID_ANGLE = 14,
2368840d9f13SEnric Balletbo i Serra 
2369840d9f13SEnric Balletbo i Serra 	/*
2370840d9f13SEnric Balletbo i Serra 	 * Allow the FIFO to trigger interrupt via MKBP events.
2371840d9f13SEnric Balletbo i Serra 	 * By default the FIFO does not send interrupt to process the FIFO
2372840d9f13SEnric Balletbo i Serra 	 * until the AP is ready or it is coming from a wakeup sensor.
2373840d9f13SEnric Balletbo i Serra 	 */
2374840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2375840d9f13SEnric Balletbo i Serra 
2376840d9f13SEnric Balletbo i Serra 	/*
2377840d9f13SEnric Balletbo i Serra 	 * Spoof the readings of the sensors.  The spoofed readings can be set
2378840d9f13SEnric Balletbo i Serra 	 * to arbitrary values, or will lock to the last read actual values.
2379840d9f13SEnric Balletbo i Serra 	 */
2380840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_SPOOF = 16,
2381840d9f13SEnric Balletbo i Serra 
2382840d9f13SEnric Balletbo i Serra 	/* Set lid angle for tablet mode detection. */
2383840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17,
2384840d9f13SEnric Balletbo i Serra 
2385840d9f13SEnric Balletbo i Serra 	/*
2386840d9f13SEnric Balletbo i Serra 	 * Sensor Scale command is a setter/getter command for the calibration
2387840d9f13SEnric Balletbo i Serra 	 * scale.
2388840d9f13SEnric Balletbo i Serra 	 */
2389840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CMD_SENSOR_SCALE = 18,
2390840d9f13SEnric Balletbo i Serra 
2391840d9f13SEnric Balletbo i Serra 	/* Number of motionsense sub-commands. */
2392840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_NUM_CMDS
2393840d9f13SEnric Balletbo i Serra };
2394840d9f13SEnric Balletbo i Serra 
2395840d9f13SEnric Balletbo i Serra /* List of motion sensor types. */
2396840d9f13SEnric Balletbo i Serra enum motionsensor_type {
2397840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_ACCEL = 0,
2398840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_GYRO = 1,
2399840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_MAG = 2,
2400840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_PROX = 3,
2401840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_LIGHT = 4,
2402840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_ACTIVITY = 5,
2403840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_BARO = 6,
2404840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_SYNC = 7,
2405840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_TYPE_MAX,
2406840d9f13SEnric Balletbo i Serra };
2407840d9f13SEnric Balletbo i Serra 
2408840d9f13SEnric Balletbo i Serra /* List of motion sensor locations. */
2409840d9f13SEnric Balletbo i Serra enum motionsensor_location {
2410840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_LOC_BASE = 0,
2411840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_LOC_LID = 1,
2412840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_LOC_CAMERA = 2,
2413840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_LOC_MAX,
2414840d9f13SEnric Balletbo i Serra };
2415840d9f13SEnric Balletbo i Serra 
2416840d9f13SEnric Balletbo i Serra /* List of motion sensor chips. */
2417840d9f13SEnric Balletbo i Serra enum motionsensor_chip {
2418840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_KXCJ9 = 0,
2419840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LSM6DS0 = 1,
2420840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_BMI160 = 2,
2421840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_SI1141 = 3,
2422840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_SI1142 = 4,
2423840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_SI1143 = 5,
2424840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_KX022 = 6,
2425840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_L3GD20H = 7,
2426840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_BMA255 = 8,
2427840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_BMP280 = 9,
2428840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_OPT3001 = 10,
2429840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_BH1730 = 11,
2430840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_GPIO = 12,
2431840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LIS2DH = 13,
2432840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LSM6DSM = 14,
2433840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LIS2DE = 15,
2434840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LIS2MDL = 16,
2435840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LSM6DS3 = 17,
2436840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LSM6DSO = 18,
2437840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_LNG2DM = 19,
2438840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_CHIP_MAX,
2439840d9f13SEnric Balletbo i Serra };
2440840d9f13SEnric Balletbo i Serra 
2441840d9f13SEnric Balletbo i Serra /* List of orientation positions */
2442840d9f13SEnric Balletbo i Serra enum motionsensor_orientation {
2443840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ORIENTATION_LANDSCAPE = 0,
2444840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ORIENTATION_PORTRAIT = 1,
2445840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2,
2446840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3,
2447840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ORIENTATION_UNKNOWN = 4,
2448840d9f13SEnric Balletbo i Serra };
2449840d9f13SEnric Balletbo i Serra 
2450840d9f13SEnric Balletbo i Serra struct ec_response_motion_sensor_data {
2451840d9f13SEnric Balletbo i Serra 	/* Flags for each sensor. */
2452840d9f13SEnric Balletbo i Serra 	uint8_t flags;
2453840d9f13SEnric Balletbo i Serra 	/* Sensor number the data comes from. */
2454840d9f13SEnric Balletbo i Serra 	uint8_t sensor_num;
2455840d9f13SEnric Balletbo i Serra 	/* Each sensor is up to 3-axis. */
2456840d9f13SEnric Balletbo i Serra 	union {
2457840d9f13SEnric Balletbo i Serra 		int16_t             data[3];
2458840d9f13SEnric Balletbo i Serra 		struct __ec_todo_packed {
2459840d9f13SEnric Balletbo i Serra 			uint16_t    reserved;
2460840d9f13SEnric Balletbo i Serra 			uint32_t    timestamp;
2461840d9f13SEnric Balletbo i Serra 		};
2462840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2463840d9f13SEnric Balletbo i Serra 			uint8_t     activity; /* motionsensor_activity */
2464840d9f13SEnric Balletbo i Serra 			uint8_t     state;
2465840d9f13SEnric Balletbo i Serra 			int16_t     add_info[2];
2466840d9f13SEnric Balletbo i Serra 		};
2467840d9f13SEnric Balletbo i Serra 	};
2468840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2469840d9f13SEnric Balletbo i Serra 
2470840d9f13SEnric Balletbo i Serra /* Note: used in ec_response_get_next_data */
2471840d9f13SEnric Balletbo i Serra struct ec_response_motion_sense_fifo_info {
2472840d9f13SEnric Balletbo i Serra 	/* Size of the fifo */
2473840d9f13SEnric Balletbo i Serra 	uint16_t size;
2474840d9f13SEnric Balletbo i Serra 	/* Amount of space used in the fifo */
2475840d9f13SEnric Balletbo i Serra 	uint16_t count;
2476840d9f13SEnric Balletbo i Serra 	/* Timestamp recorded in us.
2477840d9f13SEnric Balletbo i Serra 	 * aka accurate timestamp when host event was triggered.
2478840d9f13SEnric Balletbo i Serra 	 */
2479840d9f13SEnric Balletbo i Serra 	uint32_t timestamp;
2480840d9f13SEnric Balletbo i Serra 	/* Total amount of vector lost */
2481840d9f13SEnric Balletbo i Serra 	uint16_t total_lost;
2482840d9f13SEnric Balletbo i Serra 	/* Lost events since the last fifo_info, per sensors */
248388354105SGustavo A. R. Silva 	uint16_t lost[];
2484840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2485840d9f13SEnric Balletbo i Serra 
2486840d9f13SEnric Balletbo i Serra struct ec_response_motion_sense_fifo_data {
2487840d9f13SEnric Balletbo i Serra 	uint32_t number_data;
248888354105SGustavo A. R. Silva 	struct ec_response_motion_sensor_data data[];
2489840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2490840d9f13SEnric Balletbo i Serra 
2491840d9f13SEnric Balletbo i Serra /* List supported activity recognition */
2492840d9f13SEnric Balletbo i Serra enum motionsensor_activity {
2493840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ACTIVITY_RESERVED = 0,
2494840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2495840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2496840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_ACTIVITY_ORIENTATION = 3,
2497840d9f13SEnric Balletbo i Serra };
2498840d9f13SEnric Balletbo i Serra 
2499840d9f13SEnric Balletbo i Serra struct ec_motion_sense_activity {
2500840d9f13SEnric Balletbo i Serra 	uint8_t sensor_num;
2501840d9f13SEnric Balletbo i Serra 	uint8_t activity; /* one of enum motionsensor_activity */
2502840d9f13SEnric Balletbo i Serra 	uint8_t enable;   /* 1: enable, 0: disable */
2503840d9f13SEnric Balletbo i Serra 	uint8_t reserved;
2504840d9f13SEnric Balletbo i Serra 	uint16_t parameters[3]; /* activity dependent parameters */
2505840d9f13SEnric Balletbo i Serra } __ec_todo_unpacked;
2506840d9f13SEnric Balletbo i Serra 
2507840d9f13SEnric Balletbo i Serra /* Module flag masks used for the dump sub-command. */
2508840d9f13SEnric Balletbo i Serra #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2509840d9f13SEnric Balletbo i Serra 
2510840d9f13SEnric Balletbo i Serra /* Sensor flag masks used for the dump sub-command. */
2511840d9f13SEnric Balletbo i Serra #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2512840d9f13SEnric Balletbo i Serra 
2513840d9f13SEnric Balletbo i Serra /*
2514840d9f13SEnric Balletbo i Serra  * Flush entry for synchronization.
2515840d9f13SEnric Balletbo i Serra  * data contains time stamp
2516840d9f13SEnric Balletbo i Serra  */
2517840d9f13SEnric Balletbo i Serra #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2518840d9f13SEnric Balletbo i Serra #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
2519840d9f13SEnric Balletbo i Serra #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
2520840d9f13SEnric Balletbo i Serra #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
2521840d9f13SEnric Balletbo i Serra #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
2522840d9f13SEnric Balletbo i Serra 
2523840d9f13SEnric Balletbo i Serra /*
2524840d9f13SEnric Balletbo i Serra  * Send this value for the data element to only perform a read. If you
2525840d9f13SEnric Balletbo i Serra  * send any other value, the EC will interpret it as data to set and will
2526840d9f13SEnric Balletbo i Serra  * return the actual value set.
2527840d9f13SEnric Balletbo i Serra  */
2528840d9f13SEnric Balletbo i Serra #define EC_MOTION_SENSE_NO_VALUE -1
2529840d9f13SEnric Balletbo i Serra 
2530840d9f13SEnric Balletbo i Serra #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2531840d9f13SEnric Balletbo i Serra 
2532840d9f13SEnric Balletbo i Serra /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
2533840d9f13SEnric Balletbo i Serra /* Set Calibration information */
2534840d9f13SEnric Balletbo i Serra #define MOTION_SENSE_SET_OFFSET BIT(0)
2535840d9f13SEnric Balletbo i Serra 
2536840d9f13SEnric Balletbo i Serra /* Default Scale value, factor 1. */
2537840d9f13SEnric Balletbo i Serra #define MOTION_SENSE_DEFAULT_SCALE BIT(15)
2538840d9f13SEnric Balletbo i Serra 
2539840d9f13SEnric Balletbo i Serra #define LID_ANGLE_UNRELIABLE 500
2540840d9f13SEnric Balletbo i Serra 
2541840d9f13SEnric Balletbo i Serra enum motionsense_spoof_mode {
2542840d9f13SEnric Balletbo i Serra 	/* Disable spoof mode. */
2543840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2544840d9f13SEnric Balletbo i Serra 
2545840d9f13SEnric Balletbo i Serra 	/* Enable spoof mode, but use provided component values. */
2546840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_SPOOF_MODE_CUSTOM,
2547840d9f13SEnric Balletbo i Serra 
2548840d9f13SEnric Balletbo i Serra 	/* Enable spoof mode, but use the current sensor values. */
2549840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2550840d9f13SEnric Balletbo i Serra 
2551840d9f13SEnric Balletbo i Serra 	/* Query the current spoof mode status for the sensor. */
2552840d9f13SEnric Balletbo i Serra 	MOTIONSENSE_SPOOF_MODE_QUERY,
2553840d9f13SEnric Balletbo i Serra };
2554840d9f13SEnric Balletbo i Serra 
2555840d9f13SEnric Balletbo i Serra struct ec_params_motion_sense {
2556840d9f13SEnric Balletbo i Serra 	uint8_t cmd;
2557840d9f13SEnric Balletbo i Serra 	union {
2558840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_DUMP. */
2559840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2560840d9f13SEnric Balletbo i Serra 			/*
2561840d9f13SEnric Balletbo i Serra 			 * Maximal number of sensor the host is expecting.
2562840d9f13SEnric Balletbo i Serra 			 * 0 means the host is only interested in the number
2563840d9f13SEnric Balletbo i Serra 			 * of sensors controlled by the EC.
2564840d9f13SEnric Balletbo i Serra 			 */
2565840d9f13SEnric Balletbo i Serra 			uint8_t max_sensor_count;
2566840d9f13SEnric Balletbo i Serra 		} dump;
2567840d9f13SEnric Balletbo i Serra 
2568840d9f13SEnric Balletbo i Serra 		/*
2569840d9f13SEnric Balletbo i Serra 		 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
2570840d9f13SEnric Balletbo i Serra 		 */
2571840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2572840d9f13SEnric Balletbo i Serra 			/* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
2573840d9f13SEnric Balletbo i Serra 			 * kb_wake_angle: angle to wakup AP.
2574840d9f13SEnric Balletbo i Serra 			 */
2575840d9f13SEnric Balletbo i Serra 			int16_t data;
2576840d9f13SEnric Balletbo i Serra 		} kb_wake_angle;
2577840d9f13SEnric Balletbo i Serra 
2578840d9f13SEnric Balletbo i Serra 		/*
2579840d9f13SEnric Balletbo i Serra 		 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
2580840d9f13SEnric Balletbo i Serra 		 * and MOTIONSENSE_CMD_PERFORM_CALIB.
2581840d9f13SEnric Balletbo i Serra 		 */
2582840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2583840d9f13SEnric Balletbo i Serra 			uint8_t sensor_num;
2584840d9f13SEnric Balletbo i Serra 		} info, info_3, data, fifo_flush, perform_calib,
2585840d9f13SEnric Balletbo i Serra 				list_activities;
2586840d9f13SEnric Balletbo i Serra 
2587840d9f13SEnric Balletbo i Serra 		/*
2588840d9f13SEnric Balletbo i Serra 		 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
2589840d9f13SEnric Balletbo i Serra 		 * and MOTIONSENSE_CMD_SENSOR_RANGE.
2590840d9f13SEnric Balletbo i Serra 		 */
2591840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2592840d9f13SEnric Balletbo i Serra 			uint8_t sensor_num;
2593840d9f13SEnric Balletbo i Serra 
2594840d9f13SEnric Balletbo i Serra 			/* Rounding flag, true for round-up, false for down. */
2595840d9f13SEnric Balletbo i Serra 			uint8_t roundup;
2596840d9f13SEnric Balletbo i Serra 
2597840d9f13SEnric Balletbo i Serra 			uint16_t reserved;
2598840d9f13SEnric Balletbo i Serra 
2599840d9f13SEnric Balletbo i Serra 			/* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
2600840d9f13SEnric Balletbo i Serra 			int32_t data;
2601840d9f13SEnric Balletbo i Serra 		} ec_rate, sensor_odr, sensor_range;
2602840d9f13SEnric Balletbo i Serra 
2603840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2604840d9f13SEnric Balletbo i Serra 		struct __ec_todo_packed {
2605840d9f13SEnric Balletbo i Serra 			uint8_t sensor_num;
2606840d9f13SEnric Balletbo i Serra 
2607840d9f13SEnric Balletbo i Serra 			/*
2608840d9f13SEnric Balletbo i Serra 			 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2609840d9f13SEnric Balletbo i Serra 			 * the calibration information in the EC.
2610840d9f13SEnric Balletbo i Serra 			 * If unset, just retrieve calibration information.
2611840d9f13SEnric Balletbo i Serra 			 */
2612840d9f13SEnric Balletbo i Serra 			uint16_t flags;
2613840d9f13SEnric Balletbo i Serra 
2614840d9f13SEnric Balletbo i Serra 			/*
2615840d9f13SEnric Balletbo i Serra 			 * Temperature at calibration, in units of 0.01 C
2616840d9f13SEnric Balletbo i Serra 			 * 0x8000: invalid / unknown.
2617840d9f13SEnric Balletbo i Serra 			 * 0x0: 0C
2618840d9f13SEnric Balletbo i Serra 			 * 0x7fff: +327.67C
2619840d9f13SEnric Balletbo i Serra 			 */
2620840d9f13SEnric Balletbo i Serra 			int16_t temp;
2621840d9f13SEnric Balletbo i Serra 
2622840d9f13SEnric Balletbo i Serra 			/*
2623840d9f13SEnric Balletbo i Serra 			 * Offset for calibration.
2624840d9f13SEnric Balletbo i Serra 			 * Unit:
2625840d9f13SEnric Balletbo i Serra 			 * Accelerometer: 1/1024 g
2626840d9f13SEnric Balletbo i Serra 			 * Gyro:          1/1024 deg/s
2627840d9f13SEnric Balletbo i Serra 			 * Compass:       1/16 uT
2628840d9f13SEnric Balletbo i Serra 			 */
2629840d9f13SEnric Balletbo i Serra 			int16_t offset[3];
2630840d9f13SEnric Balletbo i Serra 		} sensor_offset;
2631840d9f13SEnric Balletbo i Serra 
2632840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2633840d9f13SEnric Balletbo i Serra 		struct __ec_todo_packed {
2634840d9f13SEnric Balletbo i Serra 			uint8_t sensor_num;
2635840d9f13SEnric Balletbo i Serra 
2636840d9f13SEnric Balletbo i Serra 			/*
2637840d9f13SEnric Balletbo i Serra 			 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2638840d9f13SEnric Balletbo i Serra 			 * the calibration information in the EC.
2639840d9f13SEnric Balletbo i Serra 			 * If unset, just retrieve calibration information.
2640840d9f13SEnric Balletbo i Serra 			 */
2641840d9f13SEnric Balletbo i Serra 			uint16_t flags;
2642840d9f13SEnric Balletbo i Serra 
2643840d9f13SEnric Balletbo i Serra 			/*
2644840d9f13SEnric Balletbo i Serra 			 * Temperature at calibration, in units of 0.01 C
2645840d9f13SEnric Balletbo i Serra 			 * 0x8000: invalid / unknown.
2646840d9f13SEnric Balletbo i Serra 			 * 0x0: 0C
2647840d9f13SEnric Balletbo i Serra 			 * 0x7fff: +327.67C
2648840d9f13SEnric Balletbo i Serra 			 */
2649840d9f13SEnric Balletbo i Serra 			int16_t temp;
2650840d9f13SEnric Balletbo i Serra 
2651840d9f13SEnric Balletbo i Serra 			/*
2652840d9f13SEnric Balletbo i Serra 			 * Scale for calibration:
2653840d9f13SEnric Balletbo i Serra 			 * By default scale is 1, it is encoded on 16bits:
2654840d9f13SEnric Balletbo i Serra 			 * 1 = BIT(15)
2655840d9f13SEnric Balletbo i Serra 			 * ~2 = 0xFFFF
2656840d9f13SEnric Balletbo i Serra 			 * ~0 = 0.
2657840d9f13SEnric Balletbo i Serra 			 */
2658840d9f13SEnric Balletbo i Serra 			uint16_t scale[3];
2659840d9f13SEnric Balletbo i Serra 		} sensor_scale;
2660840d9f13SEnric Balletbo i Serra 
2661840d9f13SEnric Balletbo i Serra 
2662840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_FIFO_INFO */
2663840d9f13SEnric Balletbo i Serra 		/* (no params) */
2664840d9f13SEnric Balletbo i Serra 
2665840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_FIFO_READ */
2666840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2667840d9f13SEnric Balletbo i Serra 			/*
2668840d9f13SEnric Balletbo i Serra 			 * Number of expected vector to return.
2669840d9f13SEnric Balletbo i Serra 			 * EC may return less or 0 if none available.
2670840d9f13SEnric Balletbo i Serra 			 */
2671840d9f13SEnric Balletbo i Serra 			uint32_t max_data_vector;
2672840d9f13SEnric Balletbo i Serra 		} fifo_read;
2673840d9f13SEnric Balletbo i Serra 
2674840d9f13SEnric Balletbo i Serra 		struct ec_motion_sense_activity set_activity;
2675840d9f13SEnric Balletbo i Serra 
2676840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_LID_ANGLE */
2677840d9f13SEnric Balletbo i Serra 		/* (no params) */
2678840d9f13SEnric Balletbo i Serra 
2679840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
2680840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2681840d9f13SEnric Balletbo i Serra 			/*
2682840d9f13SEnric Balletbo i Serra 			 * 1: enable, 0 disable fifo,
2683840d9f13SEnric Balletbo i Serra 			 * EC_MOTION_SENSE_NO_VALUE return value.
2684840d9f13SEnric Balletbo i Serra 			 */
2685840d9f13SEnric Balletbo i Serra 			int8_t enable;
2686840d9f13SEnric Balletbo i Serra 		} fifo_int_enable;
2687840d9f13SEnric Balletbo i Serra 
2688840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_SPOOF */
2689840d9f13SEnric Balletbo i Serra 		struct __ec_todo_packed {
2690840d9f13SEnric Balletbo i Serra 			uint8_t sensor_id;
2691840d9f13SEnric Balletbo i Serra 
2692840d9f13SEnric Balletbo i Serra 			/* See enum motionsense_spoof_mode. */
2693840d9f13SEnric Balletbo i Serra 			uint8_t spoof_enable;
2694840d9f13SEnric Balletbo i Serra 
2695840d9f13SEnric Balletbo i Serra 			/* Ignored, used for alignment. */
2696840d9f13SEnric Balletbo i Serra 			uint8_t reserved;
2697840d9f13SEnric Balletbo i Serra 
2698840d9f13SEnric Balletbo i Serra 			/* Individual component values to spoof. */
2699840d9f13SEnric Balletbo i Serra 			int16_t components[3];
2700840d9f13SEnric Balletbo i Serra 		} spoof;
2701840d9f13SEnric Balletbo i Serra 
2702840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2703840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2704840d9f13SEnric Balletbo i Serra 			/*
2705840d9f13SEnric Balletbo i Serra 			 * Lid angle threshold for switching between tablet and
2706840d9f13SEnric Balletbo i Serra 			 * clamshell mode.
2707840d9f13SEnric Balletbo i Serra 			 */
2708840d9f13SEnric Balletbo i Serra 			int16_t lid_angle;
2709840d9f13SEnric Balletbo i Serra 
2710840d9f13SEnric Balletbo i Serra 			/*
2711840d9f13SEnric Balletbo i Serra 			 * Hysteresis degree to prevent fluctuations between
2712840d9f13SEnric Balletbo i Serra 			 * clamshell and tablet mode if lid angle keeps
2713840d9f13SEnric Balletbo i Serra 			 * changing around the threshold. Lid motion driver will
2714840d9f13SEnric Balletbo i Serra 			 * use lid_angle + hys_degree to trigger tablet mode and
2715840d9f13SEnric Balletbo i Serra 			 * lid_angle - hys_degree to trigger clamshell mode.
2716840d9f13SEnric Balletbo i Serra 			 */
2717840d9f13SEnric Balletbo i Serra 			int16_t hys_degree;
2718840d9f13SEnric Balletbo i Serra 		} tablet_mode_threshold;
2719840d9f13SEnric Balletbo i Serra 	};
2720840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2721840d9f13SEnric Balletbo i Serra 
2722840d9f13SEnric Balletbo i Serra struct ec_response_motion_sense {
2723840d9f13SEnric Balletbo i Serra 	union {
2724840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_DUMP */
2725840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2726840d9f13SEnric Balletbo i Serra 			/* Flags representing the motion sensor module. */
2727840d9f13SEnric Balletbo i Serra 			uint8_t module_flags;
2728840d9f13SEnric Balletbo i Serra 
2729840d9f13SEnric Balletbo i Serra 			/* Number of sensors managed directly by the EC. */
2730840d9f13SEnric Balletbo i Serra 			uint8_t sensor_count;
2731840d9f13SEnric Balletbo i Serra 
2732840d9f13SEnric Balletbo i Serra 			/*
2733840d9f13SEnric Balletbo i Serra 			 * Sensor data is truncated if response_max is too small
2734840d9f13SEnric Balletbo i Serra 			 * for holding all the data.
2735840d9f13SEnric Balletbo i Serra 			 */
273632d2a15eSGustavo A. R. Silva 			DECLARE_FLEX_ARRAY(struct ec_response_motion_sensor_data, sensor);
2737840d9f13SEnric Balletbo i Serra 		} dump;
2738840d9f13SEnric Balletbo i Serra 
2739840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_INFO. */
2740840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2741840d9f13SEnric Balletbo i Serra 			/* Should be element of enum motionsensor_type. */
2742840d9f13SEnric Balletbo i Serra 			uint8_t type;
2743840d9f13SEnric Balletbo i Serra 
2744840d9f13SEnric Balletbo i Serra 			/* Should be element of enum motionsensor_location. */
2745840d9f13SEnric Balletbo i Serra 			uint8_t location;
2746840d9f13SEnric Balletbo i Serra 
2747840d9f13SEnric Balletbo i Serra 			/* Should be element of enum motionsensor_chip. */
2748840d9f13SEnric Balletbo i Serra 			uint8_t chip;
2749840d9f13SEnric Balletbo i Serra 		} info;
2750840d9f13SEnric Balletbo i Serra 
2751840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_INFO version 3 */
2752840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2753840d9f13SEnric Balletbo i Serra 			/* Should be element of enum motionsensor_type. */
2754840d9f13SEnric Balletbo i Serra 			uint8_t type;
2755840d9f13SEnric Balletbo i Serra 
2756840d9f13SEnric Balletbo i Serra 			/* Should be element of enum motionsensor_location. */
2757840d9f13SEnric Balletbo i Serra 			uint8_t location;
2758840d9f13SEnric Balletbo i Serra 
2759840d9f13SEnric Balletbo i Serra 			/* Should be element of enum motionsensor_chip. */
2760840d9f13SEnric Balletbo i Serra 			uint8_t chip;
2761840d9f13SEnric Balletbo i Serra 
2762840d9f13SEnric Balletbo i Serra 			/* Minimum sensor sampling frequency */
2763840d9f13SEnric Balletbo i Serra 			uint32_t min_frequency;
2764840d9f13SEnric Balletbo i Serra 
2765840d9f13SEnric Balletbo i Serra 			/* Maximum sensor sampling frequency */
2766840d9f13SEnric Balletbo i Serra 			uint32_t max_frequency;
2767840d9f13SEnric Balletbo i Serra 
2768840d9f13SEnric Balletbo i Serra 			/* Max number of sensor events that could be in fifo */
2769840d9f13SEnric Balletbo i Serra 			uint32_t fifo_max_event_count;
2770840d9f13SEnric Balletbo i Serra 		} info_3;
2771840d9f13SEnric Balletbo i Serra 
2772840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_DATA */
2773840d9f13SEnric Balletbo i Serra 		struct ec_response_motion_sensor_data data;
2774840d9f13SEnric Balletbo i Serra 
2775840d9f13SEnric Balletbo i Serra 		/*
2776840d9f13SEnric Balletbo i Serra 		 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
2777840d9f13SEnric Balletbo i Serra 		 * MOTIONSENSE_CMD_SENSOR_RANGE,
2778840d9f13SEnric Balletbo i Serra 		 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
2779840d9f13SEnric Balletbo i Serra 		 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
2780840d9f13SEnric Balletbo i Serra 		 * MOTIONSENSE_CMD_SPOOF.
2781840d9f13SEnric Balletbo i Serra 		 */
2782840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2783840d9f13SEnric Balletbo i Serra 			/* Current value of the parameter queried. */
2784840d9f13SEnric Balletbo i Serra 			int32_t ret;
2785840d9f13SEnric Balletbo i Serra 		} ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2786840d9f13SEnric Balletbo i Serra 		  fifo_int_enable, spoof;
2787840d9f13SEnric Balletbo i Serra 
2788840d9f13SEnric Balletbo i Serra 		/*
2789840d9f13SEnric Balletbo i Serra 		 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET,
2790840d9f13SEnric Balletbo i Serra 		 * PERFORM_CALIB.
2791840d9f13SEnric Balletbo i Serra 		 */
2792840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked  {
2793840d9f13SEnric Balletbo i Serra 			int16_t temp;
2794840d9f13SEnric Balletbo i Serra 			int16_t offset[3];
2795840d9f13SEnric Balletbo i Serra 		} sensor_offset, perform_calib;
2796840d9f13SEnric Balletbo i Serra 
2797840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2798840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked  {
2799840d9f13SEnric Balletbo i Serra 			int16_t temp;
2800840d9f13SEnric Balletbo i Serra 			uint16_t scale[3];
2801840d9f13SEnric Balletbo i Serra 		} sensor_scale;
2802840d9f13SEnric Balletbo i Serra 
2803840d9f13SEnric Balletbo i Serra 		struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2804840d9f13SEnric Balletbo i Serra 
2805840d9f13SEnric Balletbo i Serra 		struct ec_response_motion_sense_fifo_data fifo_read;
2806840d9f13SEnric Balletbo i Serra 
2807840d9f13SEnric Balletbo i Serra 		struct __ec_todo_packed {
2808840d9f13SEnric Balletbo i Serra 			uint16_t reserved;
2809840d9f13SEnric Balletbo i Serra 			uint32_t enabled;
2810840d9f13SEnric Balletbo i Serra 			uint32_t disabled;
2811840d9f13SEnric Balletbo i Serra 		} list_activities;
2812840d9f13SEnric Balletbo i Serra 
2813840d9f13SEnric Balletbo i Serra 		/* No params for set activity */
2814840d9f13SEnric Balletbo i Serra 
2815840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_LID_ANGLE */
2816840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2817840d9f13SEnric Balletbo i Serra 			/*
2818840d9f13SEnric Balletbo i Serra 			 * Angle between 0 and 360 degree if available,
2819840d9f13SEnric Balletbo i Serra 			 * LID_ANGLE_UNRELIABLE otherwise.
2820840d9f13SEnric Balletbo i Serra 			 */
2821840d9f13SEnric Balletbo i Serra 			uint16_t value;
2822840d9f13SEnric Balletbo i Serra 		} lid_angle;
2823840d9f13SEnric Balletbo i Serra 
2824840d9f13SEnric Balletbo i Serra 		/* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2825840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2826840d9f13SEnric Balletbo i Serra 			/*
2827840d9f13SEnric Balletbo i Serra 			 * Lid angle threshold for switching between tablet and
2828840d9f13SEnric Balletbo i Serra 			 * clamshell mode.
2829840d9f13SEnric Balletbo i Serra 			 */
2830840d9f13SEnric Balletbo i Serra 			uint16_t lid_angle;
2831840d9f13SEnric Balletbo i Serra 
2832840d9f13SEnric Balletbo i Serra 			/* Hysteresis degree. */
2833840d9f13SEnric Balletbo i Serra 			uint16_t hys_degree;
2834840d9f13SEnric Balletbo i Serra 		} tablet_mode_threshold;
2835840d9f13SEnric Balletbo i Serra 
2836840d9f13SEnric Balletbo i Serra 	};
2837840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2838840d9f13SEnric Balletbo i Serra 
2839840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2840840d9f13SEnric Balletbo i Serra /* Force lid open command */
2841840d9f13SEnric Balletbo i Serra 
2842840d9f13SEnric Balletbo i Serra /* Make lid event always open */
2843840d9f13SEnric Balletbo i Serra #define EC_CMD_FORCE_LID_OPEN 0x002C
2844840d9f13SEnric Balletbo i Serra 
2845840d9f13SEnric Balletbo i Serra struct ec_params_force_lid_open {
2846840d9f13SEnric Balletbo i Serra 	uint8_t enabled;
2847840d9f13SEnric Balletbo i Serra } __ec_align1;
2848840d9f13SEnric Balletbo i Serra 
2849840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2850840d9f13SEnric Balletbo i Serra /* Configure the behavior of the power button */
2851840d9f13SEnric Balletbo i Serra #define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2852840d9f13SEnric Balletbo i Serra 
2853840d9f13SEnric Balletbo i Serra enum ec_config_power_button_flags {
2854840d9f13SEnric Balletbo i Serra 	/* Enable/Disable power button pulses for x86 devices */
2855840d9f13SEnric Balletbo i Serra 	EC_POWER_BUTTON_ENABLE_PULSE = BIT(0),
2856840d9f13SEnric Balletbo i Serra };
2857840d9f13SEnric Balletbo i Serra 
2858840d9f13SEnric Balletbo i Serra struct ec_params_config_power_button {
2859840d9f13SEnric Balletbo i Serra 	/* See enum ec_config_power_button_flags */
2860840d9f13SEnric Balletbo i Serra 	uint8_t flags;
2861840d9f13SEnric Balletbo i Serra } __ec_align1;
2862840d9f13SEnric Balletbo i Serra 
2863840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2864840d9f13SEnric Balletbo i Serra /* USB charging control commands */
2865840d9f13SEnric Balletbo i Serra 
2866840d9f13SEnric Balletbo i Serra /* Set USB port charging mode */
2867840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2868840d9f13SEnric Balletbo i Serra 
2869840d9f13SEnric Balletbo i Serra struct ec_params_usb_charge_set_mode {
2870840d9f13SEnric Balletbo i Serra 	uint8_t usb_port_id;
2871840d9f13SEnric Balletbo i Serra 	uint8_t mode:7;
2872840d9f13SEnric Balletbo i Serra 	uint8_t inhibit_charge:1;
2873840d9f13SEnric Balletbo i Serra } __ec_align1;
2874840d9f13SEnric Balletbo i Serra 
2875840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2876840d9f13SEnric Balletbo i Serra /* Persistent storage for host */
2877840d9f13SEnric Balletbo i Serra 
2878840d9f13SEnric Balletbo i Serra /* Maximum bytes that can be read/written in a single command */
2879840d9f13SEnric Balletbo i Serra #define EC_PSTORE_SIZE_MAX 64
2880840d9f13SEnric Balletbo i Serra 
2881840d9f13SEnric Balletbo i Serra /* Get persistent storage info */
2882840d9f13SEnric Balletbo i Serra #define EC_CMD_PSTORE_INFO 0x0040
2883840d9f13SEnric Balletbo i Serra 
2884840d9f13SEnric Balletbo i Serra struct ec_response_pstore_info {
2885840d9f13SEnric Balletbo i Serra 	/* Persistent storage size, in bytes */
2886840d9f13SEnric Balletbo i Serra 	uint32_t pstore_size;
2887840d9f13SEnric Balletbo i Serra 	/* Access size; read/write offset and size must be a multiple of this */
2888840d9f13SEnric Balletbo i Serra 	uint32_t access_size;
2889840d9f13SEnric Balletbo i Serra } __ec_align4;
2890840d9f13SEnric Balletbo i Serra 
2891840d9f13SEnric Balletbo i Serra /*
2892840d9f13SEnric Balletbo i Serra  * Read persistent storage
2893840d9f13SEnric Balletbo i Serra  *
2894840d9f13SEnric Balletbo i Serra  * Response is params.size bytes of data.
2895840d9f13SEnric Balletbo i Serra  */
2896840d9f13SEnric Balletbo i Serra #define EC_CMD_PSTORE_READ 0x0041
2897840d9f13SEnric Balletbo i Serra 
2898840d9f13SEnric Balletbo i Serra struct ec_params_pstore_read {
2899840d9f13SEnric Balletbo i Serra 	uint32_t offset;   /* Byte offset to read */
2900840d9f13SEnric Balletbo i Serra 	uint32_t size;     /* Size to read in bytes */
2901840d9f13SEnric Balletbo i Serra } __ec_align4;
2902840d9f13SEnric Balletbo i Serra 
2903840d9f13SEnric Balletbo i Serra /* Write persistent storage */
2904840d9f13SEnric Balletbo i Serra #define EC_CMD_PSTORE_WRITE 0x0042
2905840d9f13SEnric Balletbo i Serra 
2906840d9f13SEnric Balletbo i Serra struct ec_params_pstore_write {
2907840d9f13SEnric Balletbo i Serra 	uint32_t offset;   /* Byte offset to write */
2908840d9f13SEnric Balletbo i Serra 	uint32_t size;     /* Size to write in bytes */
2909840d9f13SEnric Balletbo i Serra 	uint8_t data[EC_PSTORE_SIZE_MAX];
2910840d9f13SEnric Balletbo i Serra } __ec_align4;
2911840d9f13SEnric Balletbo i Serra 
2912840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2913840d9f13SEnric Balletbo i Serra /* Real-time clock */
2914840d9f13SEnric Balletbo i Serra 
2915840d9f13SEnric Balletbo i Serra /* RTC params and response structures */
2916840d9f13SEnric Balletbo i Serra struct ec_params_rtc {
2917840d9f13SEnric Balletbo i Serra 	uint32_t time;
2918840d9f13SEnric Balletbo i Serra } __ec_align4;
2919840d9f13SEnric Balletbo i Serra 
2920840d9f13SEnric Balletbo i Serra struct ec_response_rtc {
2921840d9f13SEnric Balletbo i Serra 	uint32_t time;
2922840d9f13SEnric Balletbo i Serra } __ec_align4;
2923840d9f13SEnric Balletbo i Serra 
2924840d9f13SEnric Balletbo i Serra /* These use ec_response_rtc */
2925840d9f13SEnric Balletbo i Serra #define EC_CMD_RTC_GET_VALUE 0x0044
2926840d9f13SEnric Balletbo i Serra #define EC_CMD_RTC_GET_ALARM 0x0045
2927840d9f13SEnric Balletbo i Serra 
2928840d9f13SEnric Balletbo i Serra /* These all use ec_params_rtc */
2929840d9f13SEnric Balletbo i Serra #define EC_CMD_RTC_SET_VALUE 0x0046
2930840d9f13SEnric Balletbo i Serra #define EC_CMD_RTC_SET_ALARM 0x0047
2931840d9f13SEnric Balletbo i Serra 
2932840d9f13SEnric Balletbo i Serra /* Pass as time param to SET_ALARM to clear the current alarm */
2933840d9f13SEnric Balletbo i Serra #define EC_RTC_ALARM_CLEAR 0
2934840d9f13SEnric Balletbo i Serra 
2935840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2936840d9f13SEnric Balletbo i Serra /* Port80 log access */
2937840d9f13SEnric Balletbo i Serra 
2938840d9f13SEnric Balletbo i Serra /* Maximum entries that can be read/written in a single command */
2939840d9f13SEnric Balletbo i Serra #define EC_PORT80_SIZE_MAX 32
2940840d9f13SEnric Balletbo i Serra 
2941840d9f13SEnric Balletbo i Serra /* Get last port80 code from previous boot */
2942840d9f13SEnric Balletbo i Serra #define EC_CMD_PORT80_LAST_BOOT 0x0048
2943840d9f13SEnric Balletbo i Serra #define EC_CMD_PORT80_READ 0x0048
2944840d9f13SEnric Balletbo i Serra 
2945840d9f13SEnric Balletbo i Serra enum ec_port80_subcmd {
2946840d9f13SEnric Balletbo i Serra 	EC_PORT80_GET_INFO = 0,
2947840d9f13SEnric Balletbo i Serra 	EC_PORT80_READ_BUFFER,
2948840d9f13SEnric Balletbo i Serra };
2949840d9f13SEnric Balletbo i Serra 
2950840d9f13SEnric Balletbo i Serra struct ec_params_port80_read {
2951840d9f13SEnric Balletbo i Serra 	uint16_t subcmd;
2952840d9f13SEnric Balletbo i Serra 	union {
2953840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2954840d9f13SEnric Balletbo i Serra 			uint32_t offset;
2955840d9f13SEnric Balletbo i Serra 			uint32_t num_entries;
2956840d9f13SEnric Balletbo i Serra 		} read_buffer;
2957840d9f13SEnric Balletbo i Serra 	};
2958840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2959840d9f13SEnric Balletbo i Serra 
2960840d9f13SEnric Balletbo i Serra struct ec_response_port80_read {
2961840d9f13SEnric Balletbo i Serra 	union {
2962840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2963840d9f13SEnric Balletbo i Serra 			uint32_t writes;
2964840d9f13SEnric Balletbo i Serra 			uint32_t history_size;
2965840d9f13SEnric Balletbo i Serra 			uint32_t last_boot;
2966840d9f13SEnric Balletbo i Serra 		} get_info;
2967840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
2968840d9f13SEnric Balletbo i Serra 			uint16_t codes[EC_PORT80_SIZE_MAX];
2969840d9f13SEnric Balletbo i Serra 		} data;
2970840d9f13SEnric Balletbo i Serra 	};
2971840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
2972840d9f13SEnric Balletbo i Serra 
2973840d9f13SEnric Balletbo i Serra struct ec_response_port80_last_boot {
2974840d9f13SEnric Balletbo i Serra 	uint16_t code;
2975840d9f13SEnric Balletbo i Serra } __ec_align2;
2976840d9f13SEnric Balletbo i Serra 
2977840d9f13SEnric Balletbo i Serra /*****************************************************************************/
2978840d9f13SEnric Balletbo i Serra /* Temporary secure storage for host verified boot use */
2979840d9f13SEnric Balletbo i Serra 
2980840d9f13SEnric Balletbo i Serra /* Number of bytes in a vstore slot */
2981840d9f13SEnric Balletbo i Serra #define EC_VSTORE_SLOT_SIZE 64
2982840d9f13SEnric Balletbo i Serra 
2983840d9f13SEnric Balletbo i Serra /* Maximum number of vstore slots */
2984840d9f13SEnric Balletbo i Serra #define EC_VSTORE_SLOT_MAX 32
2985840d9f13SEnric Balletbo i Serra 
2986840d9f13SEnric Balletbo i Serra /* Get persistent storage info */
2987840d9f13SEnric Balletbo i Serra #define EC_CMD_VSTORE_INFO 0x0049
2988840d9f13SEnric Balletbo i Serra struct ec_response_vstore_info {
2989840d9f13SEnric Balletbo i Serra 	/* Indicates which slots are locked */
2990840d9f13SEnric Balletbo i Serra 	uint32_t slot_locked;
2991840d9f13SEnric Balletbo i Serra 	/* Total number of slots available */
2992840d9f13SEnric Balletbo i Serra 	uint8_t slot_count;
2993840d9f13SEnric Balletbo i Serra } __ec_align_size1;
2994840d9f13SEnric Balletbo i Serra 
2995840d9f13SEnric Balletbo i Serra /*
2996840d9f13SEnric Balletbo i Serra  * Read temporary secure storage
2997840d9f13SEnric Balletbo i Serra  *
2998840d9f13SEnric Balletbo i Serra  * Response is EC_VSTORE_SLOT_SIZE bytes of data.
2999840d9f13SEnric Balletbo i Serra  */
3000840d9f13SEnric Balletbo i Serra #define EC_CMD_VSTORE_READ 0x004A
3001840d9f13SEnric Balletbo i Serra 
3002840d9f13SEnric Balletbo i Serra struct ec_params_vstore_read {
3003840d9f13SEnric Balletbo i Serra 	uint8_t slot; /* Slot to read from */
3004840d9f13SEnric Balletbo i Serra } __ec_align1;
3005840d9f13SEnric Balletbo i Serra 
3006840d9f13SEnric Balletbo i Serra struct ec_response_vstore_read {
3007840d9f13SEnric Balletbo i Serra 	uint8_t data[EC_VSTORE_SLOT_SIZE];
3008840d9f13SEnric Balletbo i Serra } __ec_align1;
3009840d9f13SEnric Balletbo i Serra 
3010840d9f13SEnric Balletbo i Serra /*
3011840d9f13SEnric Balletbo i Serra  * Write temporary secure storage and lock it.
3012840d9f13SEnric Balletbo i Serra  */
3013840d9f13SEnric Balletbo i Serra #define EC_CMD_VSTORE_WRITE 0x004B
3014840d9f13SEnric Balletbo i Serra 
3015840d9f13SEnric Balletbo i Serra struct ec_params_vstore_write {
3016840d9f13SEnric Balletbo i Serra 	uint8_t slot; /* Slot to write to */
3017840d9f13SEnric Balletbo i Serra 	uint8_t data[EC_VSTORE_SLOT_SIZE];
3018840d9f13SEnric Balletbo i Serra } __ec_align1;
3019840d9f13SEnric Balletbo i Serra 
3020840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3021840d9f13SEnric Balletbo i Serra /* Thermal engine commands. Note that there are two implementations. We'll
3022840d9f13SEnric Balletbo i Serra  * reuse the command number, but the data and behavior is incompatible.
3023840d9f13SEnric Balletbo i Serra  * Version 0 is what originally shipped on Link.
3024840d9f13SEnric Balletbo i Serra  * Version 1 separates the CPU thermal limits from the fan control.
3025840d9f13SEnric Balletbo i Serra  */
3026840d9f13SEnric Balletbo i Serra 
3027840d9f13SEnric Balletbo i Serra #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
3028840d9f13SEnric Balletbo i Serra #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
3029840d9f13SEnric Balletbo i Serra 
3030840d9f13SEnric Balletbo i Serra /* The version 0 structs are opaque. You have to know what they are for
3031840d9f13SEnric Balletbo i Serra  * the get/set commands to make any sense.
3032840d9f13SEnric Balletbo i Serra  */
3033840d9f13SEnric Balletbo i Serra 
3034840d9f13SEnric Balletbo i Serra /* Version 0 - set */
3035840d9f13SEnric Balletbo i Serra struct ec_params_thermal_set_threshold {
3036840d9f13SEnric Balletbo i Serra 	uint8_t sensor_type;
3037840d9f13SEnric Balletbo i Serra 	uint8_t threshold_id;
3038840d9f13SEnric Balletbo i Serra 	uint16_t value;
3039840d9f13SEnric Balletbo i Serra } __ec_align2;
3040840d9f13SEnric Balletbo i Serra 
3041840d9f13SEnric Balletbo i Serra /* Version 0 - get */
3042840d9f13SEnric Balletbo i Serra struct ec_params_thermal_get_threshold {
3043840d9f13SEnric Balletbo i Serra 	uint8_t sensor_type;
3044840d9f13SEnric Balletbo i Serra 	uint8_t threshold_id;
3045840d9f13SEnric Balletbo i Serra } __ec_align1;
3046840d9f13SEnric Balletbo i Serra 
3047840d9f13SEnric Balletbo i Serra struct ec_response_thermal_get_threshold {
3048840d9f13SEnric Balletbo i Serra 	uint16_t value;
3049840d9f13SEnric Balletbo i Serra } __ec_align2;
3050840d9f13SEnric Balletbo i Serra 
3051840d9f13SEnric Balletbo i Serra 
3052840d9f13SEnric Balletbo i Serra /* The version 1 structs are visible. */
3053840d9f13SEnric Balletbo i Serra enum ec_temp_thresholds {
3054840d9f13SEnric Balletbo i Serra 	EC_TEMP_THRESH_WARN = 0,
3055840d9f13SEnric Balletbo i Serra 	EC_TEMP_THRESH_HIGH,
3056840d9f13SEnric Balletbo i Serra 	EC_TEMP_THRESH_HALT,
3057840d9f13SEnric Balletbo i Serra 
3058840d9f13SEnric Balletbo i Serra 	EC_TEMP_THRESH_COUNT
3059840d9f13SEnric Balletbo i Serra };
3060840d9f13SEnric Balletbo i Serra 
3061840d9f13SEnric Balletbo i Serra /*
3062840d9f13SEnric Balletbo i Serra  * Thermal configuration for one temperature sensor. Temps are in degrees K.
3063840d9f13SEnric Balletbo i Serra  * Zero values will be silently ignored by the thermal task.
3064840d9f13SEnric Balletbo i Serra  *
3065840d9f13SEnric Balletbo i Serra  * Set 'temp_host' value allows thermal task to trigger some event with 1 degree
3066840d9f13SEnric Balletbo i Serra  * hysteresis.
3067840d9f13SEnric Balletbo i Serra  * For example,
3068840d9f13SEnric Balletbo i Serra  *	temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3069840d9f13SEnric Balletbo i Serra  *	temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K
3070840d9f13SEnric Balletbo i Serra  * EC will throttle ap when temperature >= 301 K, and release throttling when
3071840d9f13SEnric Balletbo i Serra  * temperature <= 299 K.
3072840d9f13SEnric Balletbo i Serra  *
3073840d9f13SEnric Balletbo i Serra  * Set 'temp_host_release' value allows thermal task has a custom hysteresis.
3074840d9f13SEnric Balletbo i Serra  * For example,
3075840d9f13SEnric Balletbo i Serra  *	temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3076840d9f13SEnric Balletbo i Serra  *	temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K
3077840d9f13SEnric Balletbo i Serra  * EC will throttle ap when temperature >= 301 K, and release throttling when
3078840d9f13SEnric Balletbo i Serra  * temperature <= 294 K.
3079840d9f13SEnric Balletbo i Serra  *
3080840d9f13SEnric Balletbo i Serra  * Note that this structure is a sub-structure of
3081840d9f13SEnric Balletbo i Serra  * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
3082840d9f13SEnric Balletbo i Serra  */
3083840d9f13SEnric Balletbo i Serra struct ec_thermal_config {
3084840d9f13SEnric Balletbo i Serra 	uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
3085840d9f13SEnric Balletbo i Serra 	uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */
3086840d9f13SEnric Balletbo i Serra 	uint32_t temp_fan_off;		/* no active cooling needed */
3087840d9f13SEnric Balletbo i Serra 	uint32_t temp_fan_max;		/* max active cooling needed */
3088840d9f13SEnric Balletbo i Serra } __ec_align4;
3089840d9f13SEnric Balletbo i Serra 
3090840d9f13SEnric Balletbo i Serra /* Version 1 - get config for one sensor. */
3091840d9f13SEnric Balletbo i Serra struct ec_params_thermal_get_threshold_v1 {
3092840d9f13SEnric Balletbo i Serra 	uint32_t sensor_num;
3093840d9f13SEnric Balletbo i Serra } __ec_align4;
3094840d9f13SEnric Balletbo i Serra /* This returns a struct ec_thermal_config */
3095840d9f13SEnric Balletbo i Serra 
3096840d9f13SEnric Balletbo i Serra /*
3097840d9f13SEnric Balletbo i Serra  * Version 1 - set config for one sensor.
3098840d9f13SEnric Balletbo i Serra  * Use read-modify-write for best results!
3099840d9f13SEnric Balletbo i Serra  */
3100840d9f13SEnric Balletbo i Serra struct ec_params_thermal_set_threshold_v1 {
3101840d9f13SEnric Balletbo i Serra 	uint32_t sensor_num;
3102840d9f13SEnric Balletbo i Serra 	struct ec_thermal_config cfg;
3103840d9f13SEnric Balletbo i Serra } __ec_align4;
3104840d9f13SEnric Balletbo i Serra /* This returns no data */
3105840d9f13SEnric Balletbo i Serra 
3106840d9f13SEnric Balletbo i Serra /****************************************************************************/
3107840d9f13SEnric Balletbo i Serra 
3108840d9f13SEnric Balletbo i Serra /* Toggle automatic fan control */
3109840d9f13SEnric Balletbo i Serra #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3110840d9f13SEnric Balletbo i Serra 
3111840d9f13SEnric Balletbo i Serra /* Version 1 of input params */
3112840d9f13SEnric Balletbo i Serra struct ec_params_auto_fan_ctrl_v1 {
3113840d9f13SEnric Balletbo i Serra 	uint8_t fan_idx;
3114840d9f13SEnric Balletbo i Serra } __ec_align1;
3115840d9f13SEnric Balletbo i Serra 
3116840d9f13SEnric Balletbo i Serra /* Get/Set TMP006 calibration data */
3117840d9f13SEnric Balletbo i Serra #define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3118840d9f13SEnric Balletbo i Serra #define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3119840d9f13SEnric Balletbo i Serra 
3120840d9f13SEnric Balletbo i Serra /*
3121840d9f13SEnric Balletbo i Serra  * The original TMP006 calibration only needed four params, but now we need
3122840d9f13SEnric Balletbo i Serra  * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
3123840d9f13SEnric Balletbo i Serra  * the params opaque. The v1 "get" response will include the algorithm number
3124840d9f13SEnric Balletbo i Serra  * and how many params it requires. That way we can change the EC code without
3125840d9f13SEnric Balletbo i Serra  * needing to update this file. We can also use a different algorithm on each
3126840d9f13SEnric Balletbo i Serra  * sensor.
3127840d9f13SEnric Balletbo i Serra  */
3128840d9f13SEnric Balletbo i Serra 
3129840d9f13SEnric Balletbo i Serra /* This is the same struct for both v0 and v1. */
3130840d9f13SEnric Balletbo i Serra struct ec_params_tmp006_get_calibration {
3131840d9f13SEnric Balletbo i Serra 	uint8_t index;
3132840d9f13SEnric Balletbo i Serra } __ec_align1;
3133840d9f13SEnric Balletbo i Serra 
3134840d9f13SEnric Balletbo i Serra /* Version 0 */
3135840d9f13SEnric Balletbo i Serra struct ec_response_tmp006_get_calibration_v0 {
3136840d9f13SEnric Balletbo i Serra 	float s0;
3137840d9f13SEnric Balletbo i Serra 	float b0;
3138840d9f13SEnric Balletbo i Serra 	float b1;
3139840d9f13SEnric Balletbo i Serra 	float b2;
3140840d9f13SEnric Balletbo i Serra } __ec_align4;
3141840d9f13SEnric Balletbo i Serra 
3142840d9f13SEnric Balletbo i Serra struct ec_params_tmp006_set_calibration_v0 {
3143840d9f13SEnric Balletbo i Serra 	uint8_t index;
3144840d9f13SEnric Balletbo i Serra 	uint8_t reserved[3];
3145840d9f13SEnric Balletbo i Serra 	float s0;
3146840d9f13SEnric Balletbo i Serra 	float b0;
3147840d9f13SEnric Balletbo i Serra 	float b1;
3148840d9f13SEnric Balletbo i Serra 	float b2;
3149840d9f13SEnric Balletbo i Serra } __ec_align4;
3150840d9f13SEnric Balletbo i Serra 
3151840d9f13SEnric Balletbo i Serra /* Version 1 */
3152840d9f13SEnric Balletbo i Serra struct ec_response_tmp006_get_calibration_v1 {
3153840d9f13SEnric Balletbo i Serra 	uint8_t algorithm;
3154840d9f13SEnric Balletbo i Serra 	uint8_t num_params;
3155840d9f13SEnric Balletbo i Serra 	uint8_t reserved[2];
315688354105SGustavo A. R. Silva 	float val[];
3157840d9f13SEnric Balletbo i Serra } __ec_align4;
3158840d9f13SEnric Balletbo i Serra 
3159840d9f13SEnric Balletbo i Serra struct ec_params_tmp006_set_calibration_v1 {
3160840d9f13SEnric Balletbo i Serra 	uint8_t index;
3161840d9f13SEnric Balletbo i Serra 	uint8_t algorithm;
3162840d9f13SEnric Balletbo i Serra 	uint8_t num_params;
3163840d9f13SEnric Balletbo i Serra 	uint8_t reserved;
316488354105SGustavo A. R. Silva 	float val[];
3165840d9f13SEnric Balletbo i Serra } __ec_align4;
3166840d9f13SEnric Balletbo i Serra 
3167840d9f13SEnric Balletbo i Serra 
3168840d9f13SEnric Balletbo i Serra /* Read raw TMP006 data */
3169840d9f13SEnric Balletbo i Serra #define EC_CMD_TMP006_GET_RAW 0x0055
3170840d9f13SEnric Balletbo i Serra 
3171840d9f13SEnric Balletbo i Serra struct ec_params_tmp006_get_raw {
3172840d9f13SEnric Balletbo i Serra 	uint8_t index;
3173840d9f13SEnric Balletbo i Serra } __ec_align1;
3174840d9f13SEnric Balletbo i Serra 
3175840d9f13SEnric Balletbo i Serra struct ec_response_tmp006_get_raw {
3176840d9f13SEnric Balletbo i Serra 	int32_t t;  /* In 1/100 K */
3177840d9f13SEnric Balletbo i Serra 	int32_t v;  /* In nV */
3178840d9f13SEnric Balletbo i Serra } __ec_align4;
3179840d9f13SEnric Balletbo i Serra 
3180840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3181840d9f13SEnric Balletbo i Serra /* MKBP - Matrix KeyBoard Protocol */
3182840d9f13SEnric Balletbo i Serra 
3183840d9f13SEnric Balletbo i Serra /*
3184840d9f13SEnric Balletbo i Serra  * Read key state
3185840d9f13SEnric Balletbo i Serra  *
3186840d9f13SEnric Balletbo i Serra  * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
3187840d9f13SEnric Balletbo i Serra  * expected response size.
3188840d9f13SEnric Balletbo i Serra  *
3189840d9f13SEnric Balletbo i Serra  * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT.  If you wish
3190840d9f13SEnric Balletbo i Serra  * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
3191840d9f13SEnric Balletbo i Serra  * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
3192840d9f13SEnric Balletbo i Serra  */
3193840d9f13SEnric Balletbo i Serra #define EC_CMD_MKBP_STATE 0x0060
3194840d9f13SEnric Balletbo i Serra 
3195840d9f13SEnric Balletbo i Serra /*
3196840d9f13SEnric Balletbo i Serra  * Provide information about various MKBP things.  See enum ec_mkbp_info_type.
3197840d9f13SEnric Balletbo i Serra  */
3198840d9f13SEnric Balletbo i Serra #define EC_CMD_MKBP_INFO 0x0061
3199840d9f13SEnric Balletbo i Serra 
3200840d9f13SEnric Balletbo i Serra struct ec_response_mkbp_info {
3201840d9f13SEnric Balletbo i Serra 	uint32_t rows;
3202840d9f13SEnric Balletbo i Serra 	uint32_t cols;
3203840d9f13SEnric Balletbo i Serra 	/* Formerly "switches", which was 0. */
3204840d9f13SEnric Balletbo i Serra 	uint8_t reserved;
3205840d9f13SEnric Balletbo i Serra } __ec_align_size1;
3206840d9f13SEnric Balletbo i Serra 
3207840d9f13SEnric Balletbo i Serra struct ec_params_mkbp_info {
3208840d9f13SEnric Balletbo i Serra 	uint8_t info_type;
3209840d9f13SEnric Balletbo i Serra 	uint8_t event_type;
3210840d9f13SEnric Balletbo i Serra } __ec_align1;
3211840d9f13SEnric Balletbo i Serra 
3212840d9f13SEnric Balletbo i Serra enum ec_mkbp_info_type {
3213840d9f13SEnric Balletbo i Serra 	/*
3214840d9f13SEnric Balletbo i Serra 	 * Info about the keyboard matrix: number of rows and columns.
3215840d9f13SEnric Balletbo i Serra 	 *
3216840d9f13SEnric Balletbo i Serra 	 * Returns struct ec_response_mkbp_info.
3217840d9f13SEnric Balletbo i Serra 	 */
3218840d9f13SEnric Balletbo i Serra 	EC_MKBP_INFO_KBD = 0,
3219840d9f13SEnric Balletbo i Serra 
3220840d9f13SEnric Balletbo i Serra 	/*
3221840d9f13SEnric Balletbo i Serra 	 * For buttons and switches, info about which specifically are
3222840d9f13SEnric Balletbo i Serra 	 * supported.  event_type must be set to one of the values in enum
3223840d9f13SEnric Balletbo i Serra 	 * ec_mkbp_event.
3224840d9f13SEnric Balletbo i Serra 	 *
3225840d9f13SEnric Balletbo i Serra 	 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
3226840d9f13SEnric Balletbo i Serra 	 * bitmask indicating which buttons or switches are present.  See the
3227840d9f13SEnric Balletbo i Serra 	 * bit inidices below.
3228840d9f13SEnric Balletbo i Serra 	 */
3229840d9f13SEnric Balletbo i Serra 	EC_MKBP_INFO_SUPPORTED = 1,
3230840d9f13SEnric Balletbo i Serra 
3231840d9f13SEnric Balletbo i Serra 	/*
3232840d9f13SEnric Balletbo i Serra 	 * Instantaneous state of buttons and switches.
3233840d9f13SEnric Balletbo i Serra 	 *
3234840d9f13SEnric Balletbo i Serra 	 * event_type must be set to one of the values in enum ec_mkbp_event.
3235840d9f13SEnric Balletbo i Serra 	 *
3236840d9f13SEnric Balletbo i Serra 	 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
3237840d9f13SEnric Balletbo i Serra 	 * indicating the current state of the keyboard matrix.
3238840d9f13SEnric Balletbo i Serra 	 *
3239840d9f13SEnric Balletbo i Serra 	 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
3240840d9f13SEnric Balletbo i Serra 	 * event state.
3241840d9f13SEnric Balletbo i Serra 	 *
3242840d9f13SEnric Balletbo i Serra 	 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
3243840d9f13SEnric Balletbo i Serra 	 * state of supported buttons.
3244840d9f13SEnric Balletbo i Serra 	 *
3245840d9f13SEnric Balletbo i Serra 	 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
3246840d9f13SEnric Balletbo i Serra 	 * state of supported switches.
3247840d9f13SEnric Balletbo i Serra 	 */
3248840d9f13SEnric Balletbo i Serra 	EC_MKBP_INFO_CURRENT = 2,
3249840d9f13SEnric Balletbo i Serra };
3250840d9f13SEnric Balletbo i Serra 
3251840d9f13SEnric Balletbo i Serra /* Simulate key press */
3252840d9f13SEnric Balletbo i Serra #define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3253840d9f13SEnric Balletbo i Serra 
3254840d9f13SEnric Balletbo i Serra struct ec_params_mkbp_simulate_key {
3255840d9f13SEnric Balletbo i Serra 	uint8_t col;
3256840d9f13SEnric Balletbo i Serra 	uint8_t row;
3257840d9f13SEnric Balletbo i Serra 	uint8_t pressed;
3258840d9f13SEnric Balletbo i Serra } __ec_align1;
3259840d9f13SEnric Balletbo i Serra 
3260840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_KEYBOARD_ID 0x0063
3261840d9f13SEnric Balletbo i Serra 
3262840d9f13SEnric Balletbo i Serra struct ec_response_keyboard_id {
3263840d9f13SEnric Balletbo i Serra 	uint32_t keyboard_id;
3264840d9f13SEnric Balletbo i Serra } __ec_align4;
3265840d9f13SEnric Balletbo i Serra 
3266840d9f13SEnric Balletbo i Serra enum keyboard_id {
3267840d9f13SEnric Balletbo i Serra 	KEYBOARD_ID_UNSUPPORTED = 0,
3268840d9f13SEnric Balletbo i Serra 	KEYBOARD_ID_UNREADABLE = 0xffffffff,
3269840d9f13SEnric Balletbo i Serra };
3270840d9f13SEnric Balletbo i Serra 
3271840d9f13SEnric Balletbo i Serra /* Configure keyboard scanning */
3272840d9f13SEnric Balletbo i Serra #define EC_CMD_MKBP_SET_CONFIG 0x0064
3273840d9f13SEnric Balletbo i Serra #define EC_CMD_MKBP_GET_CONFIG 0x0065
3274840d9f13SEnric Balletbo i Serra 
3275840d9f13SEnric Balletbo i Serra /* flags */
3276840d9f13SEnric Balletbo i Serra enum mkbp_config_flags {
3277840d9f13SEnric Balletbo i Serra 	EC_MKBP_FLAGS_ENABLE = 1,	/* Enable keyboard scanning */
3278840d9f13SEnric Balletbo i Serra };
3279840d9f13SEnric Balletbo i Serra 
3280840d9f13SEnric Balletbo i Serra enum mkbp_config_valid {
3281840d9f13SEnric Balletbo i Serra 	EC_MKBP_VALID_SCAN_PERIOD		= BIT(0),
3282840d9f13SEnric Balletbo i Serra 	EC_MKBP_VALID_POLL_TIMEOUT		= BIT(1),
3283840d9f13SEnric Balletbo i Serra 	EC_MKBP_VALID_MIN_POST_SCAN_DELAY	= BIT(3),
3284840d9f13SEnric Balletbo i Serra 	EC_MKBP_VALID_OUTPUT_SETTLE		= BIT(4),
3285840d9f13SEnric Balletbo i Serra 	EC_MKBP_VALID_DEBOUNCE_DOWN		= BIT(5),
3286840d9f13SEnric Balletbo i Serra 	EC_MKBP_VALID_DEBOUNCE_UP		= BIT(6),
3287840d9f13SEnric Balletbo i Serra 	EC_MKBP_VALID_FIFO_MAX_DEPTH		= BIT(7),
3288840d9f13SEnric Balletbo i Serra };
3289840d9f13SEnric Balletbo i Serra 
3290840d9f13SEnric Balletbo i Serra /*
3291840d9f13SEnric Balletbo i Serra  * Configuration for our key scanning algorithm.
3292840d9f13SEnric Balletbo i Serra  *
3293840d9f13SEnric Balletbo i Serra  * Note that this is used as a sub-structure of
3294840d9f13SEnric Balletbo i Serra  * ec_{params/response}_mkbp_get_config.
3295840d9f13SEnric Balletbo i Serra  */
3296840d9f13SEnric Balletbo i Serra struct ec_mkbp_config {
3297840d9f13SEnric Balletbo i Serra 	uint32_t valid_mask;		/* valid fields */
3298840d9f13SEnric Balletbo i Serra 	uint8_t flags;		/* some flags (enum mkbp_config_flags) */
3299840d9f13SEnric Balletbo i Serra 	uint8_t valid_flags;		/* which flags are valid */
3300840d9f13SEnric Balletbo i Serra 	uint16_t scan_period_us;	/* period between start of scans */
3301840d9f13SEnric Balletbo i Serra 	/* revert to interrupt mode after no activity for this long */
3302840d9f13SEnric Balletbo i Serra 	uint32_t poll_timeout_us;
3303840d9f13SEnric Balletbo i Serra 	/*
3304840d9f13SEnric Balletbo i Serra 	 * minimum post-scan relax time. Once we finish a scan we check
3305840d9f13SEnric Balletbo i Serra 	 * the time until we are due to start the next one. If this time is
3306840d9f13SEnric Balletbo i Serra 	 * shorter this field, we use this instead.
3307840d9f13SEnric Balletbo i Serra 	 */
3308840d9f13SEnric Balletbo i Serra 	uint16_t min_post_scan_delay_us;
3309840d9f13SEnric Balletbo i Serra 	/* delay between setting up output and waiting for it to settle */
3310840d9f13SEnric Balletbo i Serra 	uint16_t output_settle_us;
3311840d9f13SEnric Balletbo i Serra 	uint16_t debounce_down_us;	/* time for debounce on key down */
3312840d9f13SEnric Balletbo i Serra 	uint16_t debounce_up_us;	/* time for debounce on key up */
3313840d9f13SEnric Balletbo i Serra 	/* maximum depth to allow for fifo (0 = no keyscan output) */
3314840d9f13SEnric Balletbo i Serra 	uint8_t fifo_max_depth;
3315840d9f13SEnric Balletbo i Serra } __ec_align_size1;
3316840d9f13SEnric Balletbo i Serra 
3317840d9f13SEnric Balletbo i Serra struct ec_params_mkbp_set_config {
3318840d9f13SEnric Balletbo i Serra 	struct ec_mkbp_config config;
3319840d9f13SEnric Balletbo i Serra } __ec_align_size1;
3320840d9f13SEnric Balletbo i Serra 
3321840d9f13SEnric Balletbo i Serra struct ec_response_mkbp_get_config {
3322840d9f13SEnric Balletbo i Serra 	struct ec_mkbp_config config;
3323840d9f13SEnric Balletbo i Serra } __ec_align_size1;
3324840d9f13SEnric Balletbo i Serra 
3325840d9f13SEnric Balletbo i Serra /* Run the key scan emulation */
3326840d9f13SEnric Balletbo i Serra #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3327840d9f13SEnric Balletbo i Serra 
3328840d9f13SEnric Balletbo i Serra enum ec_keyscan_seq_cmd {
3329840d9f13SEnric Balletbo i Serra 	EC_KEYSCAN_SEQ_STATUS = 0,	/* Get status information */
3330840d9f13SEnric Balletbo i Serra 	EC_KEYSCAN_SEQ_CLEAR = 1,	/* Clear sequence */
3331840d9f13SEnric Balletbo i Serra 	EC_KEYSCAN_SEQ_ADD = 2,		/* Add item to sequence */
3332840d9f13SEnric Balletbo i Serra 	EC_KEYSCAN_SEQ_START = 3,	/* Start running sequence */
3333840d9f13SEnric Balletbo i Serra 	EC_KEYSCAN_SEQ_COLLECT = 4,	/* Collect sequence summary data */
3334840d9f13SEnric Balletbo i Serra };
3335840d9f13SEnric Balletbo i Serra 
3336840d9f13SEnric Balletbo i Serra enum ec_collect_flags {
3337840d9f13SEnric Balletbo i Serra 	/*
3338840d9f13SEnric Balletbo i Serra 	 * Indicates this scan was processed by the EC. Due to timing, some
3339840d9f13SEnric Balletbo i Serra 	 * scans may be skipped.
3340840d9f13SEnric Balletbo i Serra 	 */
3341840d9f13SEnric Balletbo i Serra 	EC_KEYSCAN_SEQ_FLAG_DONE	= BIT(0),
3342840d9f13SEnric Balletbo i Serra };
3343840d9f13SEnric Balletbo i Serra 
3344840d9f13SEnric Balletbo i Serra struct ec_collect_item {
3345840d9f13SEnric Balletbo i Serra 	uint8_t flags;		/* some flags (enum ec_collect_flags) */
3346840d9f13SEnric Balletbo i Serra } __ec_align1;
3347840d9f13SEnric Balletbo i Serra 
3348840d9f13SEnric Balletbo i Serra struct ec_params_keyscan_seq_ctrl {
3349840d9f13SEnric Balletbo i Serra 	uint8_t cmd;	/* Command to send (enum ec_keyscan_seq_cmd) */
3350840d9f13SEnric Balletbo i Serra 	union {
3351840d9f13SEnric Balletbo i Serra 		struct __ec_align1 {
3352840d9f13SEnric Balletbo i Serra 			uint8_t active;		/* still active */
3353840d9f13SEnric Balletbo i Serra 			uint8_t num_items;	/* number of items */
3354840d9f13SEnric Balletbo i Serra 			/* Current item being presented */
3355840d9f13SEnric Balletbo i Serra 			uint8_t cur_item;
3356840d9f13SEnric Balletbo i Serra 		} status;
3357840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
3358840d9f13SEnric Balletbo i Serra 			/*
3359840d9f13SEnric Balletbo i Serra 			 * Absolute time for this scan, measured from the
3360840d9f13SEnric Balletbo i Serra 			 * start of the sequence.
3361840d9f13SEnric Balletbo i Serra 			 */
3362840d9f13SEnric Balletbo i Serra 			uint32_t time_us;
3363840d9f13SEnric Balletbo i Serra 			uint8_t scan[0];	/* keyscan data */
3364840d9f13SEnric Balletbo i Serra 		} add;
3365840d9f13SEnric Balletbo i Serra 		struct __ec_align1 {
3366840d9f13SEnric Balletbo i Serra 			uint8_t start_item;	/* First item to return */
3367840d9f13SEnric Balletbo i Serra 			uint8_t num_items;	/* Number of items to return */
3368840d9f13SEnric Balletbo i Serra 		} collect;
3369840d9f13SEnric Balletbo i Serra 	};
3370840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
3371840d9f13SEnric Balletbo i Serra 
3372840d9f13SEnric Balletbo i Serra struct ec_result_keyscan_seq_ctrl {
3373840d9f13SEnric Balletbo i Serra 	union {
3374840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
3375840d9f13SEnric Balletbo i Serra 			uint8_t num_items;	/* Number of items */
3376840d9f13SEnric Balletbo i Serra 			/* Data for each item */
3377840d9f13SEnric Balletbo i Serra 			struct ec_collect_item item[0];
3378840d9f13SEnric Balletbo i Serra 		} collect;
3379840d9f13SEnric Balletbo i Serra 	};
3380840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
3381840d9f13SEnric Balletbo i Serra 
3382840d9f13SEnric Balletbo i Serra /*
3383840d9f13SEnric Balletbo i Serra  * Get the next pending MKBP event.
3384840d9f13SEnric Balletbo i Serra  *
3385840d9f13SEnric Balletbo i Serra  * Returns EC_RES_UNAVAILABLE if there is no event pending.
3386840d9f13SEnric Balletbo i Serra  */
3387840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_NEXT_EVENT 0x0067
3388840d9f13SEnric Balletbo i Serra 
3389840d9f13SEnric Balletbo i Serra #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3390840d9f13SEnric Balletbo i Serra 
3391840d9f13SEnric Balletbo i Serra /*
3392840d9f13SEnric Balletbo i Serra  * We use the most significant bit of the event type to indicate to the host
3393840d9f13SEnric Balletbo i Serra  * that the EC has more MKBP events available to provide.
3394840d9f13SEnric Balletbo i Serra  */
3395840d9f13SEnric Balletbo i Serra #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3396840d9f13SEnric Balletbo i Serra 
3397840d9f13SEnric Balletbo i Serra /* The mask to apply to get the raw event type */
3398840d9f13SEnric Balletbo i Serra #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3399840d9f13SEnric Balletbo i Serra 
3400840d9f13SEnric Balletbo i Serra enum ec_mkbp_event {
3401840d9f13SEnric Balletbo i Serra 	/* Keyboard matrix changed. The event data is the new matrix state. */
3402840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_KEY_MATRIX = 0,
3403840d9f13SEnric Balletbo i Serra 
3404840d9f13SEnric Balletbo i Serra 	/* New host event. The event data is 4 bytes of host event flags. */
3405840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_HOST_EVENT = 1,
3406840d9f13SEnric Balletbo i Serra 
3407840d9f13SEnric Balletbo i Serra 	/* New Sensor FIFO data. The event data is fifo_info structure. */
3408840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_SENSOR_FIFO = 2,
3409840d9f13SEnric Balletbo i Serra 
3410840d9f13SEnric Balletbo i Serra 	/* The state of the non-matrixed buttons have changed. */
3411840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_BUTTON = 3,
3412840d9f13SEnric Balletbo i Serra 
3413840d9f13SEnric Balletbo i Serra 	/* The state of the switches have changed. */
3414840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_SWITCH = 4,
3415840d9f13SEnric Balletbo i Serra 
3416840d9f13SEnric Balletbo i Serra 	/* New Fingerprint sensor event, the event data is fp_events bitmap. */
3417840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_FINGERPRINT = 5,
3418840d9f13SEnric Balletbo i Serra 
3419840d9f13SEnric Balletbo i Serra 	/*
3420840d9f13SEnric Balletbo i Serra 	 * Sysrq event: send emulated sysrq. The event data is sysrq,
3421840d9f13SEnric Balletbo i Serra 	 * corresponding to the key to be pressed.
3422840d9f13SEnric Balletbo i Serra 	 */
3423840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_SYSRQ = 6,
3424840d9f13SEnric Balletbo i Serra 
3425840d9f13SEnric Balletbo i Serra 	/*
3426840d9f13SEnric Balletbo i Serra 	 * New 64-bit host event.
3427840d9f13SEnric Balletbo i Serra 	 * The event data is 8 bytes of host event flags.
3428840d9f13SEnric Balletbo i Serra 	 */
3429840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_HOST_EVENT64 = 7,
3430840d9f13SEnric Balletbo i Serra 
3431840d9f13SEnric Balletbo i Serra 	/* Notify the AP that something happened on CEC */
3432840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_CEC_EVENT = 8,
3433840d9f13SEnric Balletbo i Serra 
3434840d9f13SEnric Balletbo i Serra 	/* Send an incoming CEC message to the AP */
3435840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_CEC_MESSAGE = 9,
3436840d9f13SEnric Balletbo i Serra 
343784530100SDaisuke Nojiri 	/* Peripheral device charger event */
343884530100SDaisuke Nojiri 	EC_MKBP_EVENT_PCHG = 12,
343984530100SDaisuke Nojiri 
3440840d9f13SEnric Balletbo i Serra 	/* Number of MKBP events */
3441840d9f13SEnric Balletbo i Serra 	EC_MKBP_EVENT_COUNT,
3442840d9f13SEnric Balletbo i Serra };
3443840d9f13SEnric Balletbo i Serra BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK);
3444840d9f13SEnric Balletbo i Serra 
3445840d9f13SEnric Balletbo i Serra union __ec_align_offset1 ec_response_get_next_data {
3446840d9f13SEnric Balletbo i Serra 	uint8_t key_matrix[13];
3447840d9f13SEnric Balletbo i Serra 
3448840d9f13SEnric Balletbo i Serra 	/* Unaligned */
3449840d9f13SEnric Balletbo i Serra 	uint32_t host_event;
3450840d9f13SEnric Balletbo i Serra 	uint64_t host_event64;
3451840d9f13SEnric Balletbo i Serra 
3452840d9f13SEnric Balletbo i Serra 	struct __ec_todo_unpacked {
3453840d9f13SEnric Balletbo i Serra 		/* For aligning the fifo_info */
3454840d9f13SEnric Balletbo i Serra 		uint8_t reserved[3];
3455840d9f13SEnric Balletbo i Serra 		struct ec_response_motion_sense_fifo_info info;
3456840d9f13SEnric Balletbo i Serra 	} sensor_fifo;
3457840d9f13SEnric Balletbo i Serra 
3458840d9f13SEnric Balletbo i Serra 	uint32_t buttons;
3459840d9f13SEnric Balletbo i Serra 
3460840d9f13SEnric Balletbo i Serra 	uint32_t switches;
3461840d9f13SEnric Balletbo i Serra 
3462840d9f13SEnric Balletbo i Serra 	uint32_t fp_events;
3463840d9f13SEnric Balletbo i Serra 
3464840d9f13SEnric Balletbo i Serra 	uint32_t sysrq;
3465840d9f13SEnric Balletbo i Serra 
3466840d9f13SEnric Balletbo i Serra 	/* CEC events from enum mkbp_cec_event */
3467840d9f13SEnric Balletbo i Serra 	uint32_t cec_events;
3468840d9f13SEnric Balletbo i Serra };
3469840d9f13SEnric Balletbo i Serra 
3470840d9f13SEnric Balletbo i Serra union __ec_align_offset1 ec_response_get_next_data_v1 {
3471840d9f13SEnric Balletbo i Serra 	uint8_t key_matrix[16];
3472840d9f13SEnric Balletbo i Serra 
3473840d9f13SEnric Balletbo i Serra 	/* Unaligned */
3474840d9f13SEnric Balletbo i Serra 	uint32_t host_event;
3475840d9f13SEnric Balletbo i Serra 	uint64_t host_event64;
3476840d9f13SEnric Balletbo i Serra 
3477840d9f13SEnric Balletbo i Serra 	struct __ec_todo_unpacked {
3478840d9f13SEnric Balletbo i Serra 		/* For aligning the fifo_info */
3479840d9f13SEnric Balletbo i Serra 		uint8_t reserved[3];
3480840d9f13SEnric Balletbo i Serra 		struct ec_response_motion_sense_fifo_info info;
3481840d9f13SEnric Balletbo i Serra 	} sensor_fifo;
3482840d9f13SEnric Balletbo i Serra 
3483840d9f13SEnric Balletbo i Serra 	uint32_t buttons;
3484840d9f13SEnric Balletbo i Serra 
3485840d9f13SEnric Balletbo i Serra 	uint32_t switches;
3486840d9f13SEnric Balletbo i Serra 
3487840d9f13SEnric Balletbo i Serra 	uint32_t fp_events;
3488840d9f13SEnric Balletbo i Serra 
3489840d9f13SEnric Balletbo i Serra 	uint32_t sysrq;
3490840d9f13SEnric Balletbo i Serra 
3491840d9f13SEnric Balletbo i Serra 	/* CEC events from enum mkbp_cec_event */
3492840d9f13SEnric Balletbo i Serra 	uint32_t cec_events;
3493840d9f13SEnric Balletbo i Serra 
3494840d9f13SEnric Balletbo i Serra 	uint8_t cec_message[16];
3495840d9f13SEnric Balletbo i Serra };
3496840d9f13SEnric Balletbo i Serra BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16);
3497840d9f13SEnric Balletbo i Serra 
3498ba098ed9SDaisuke Nojiri union __ec_align_offset1 ec_response_get_next_data_v3 {
3499ba098ed9SDaisuke Nojiri 	uint8_t key_matrix[18];
3500ba098ed9SDaisuke Nojiri 
3501ba098ed9SDaisuke Nojiri 	/* Unaligned */
3502ba098ed9SDaisuke Nojiri 	uint32_t host_event;
3503ba098ed9SDaisuke Nojiri 	uint64_t host_event64;
3504ba098ed9SDaisuke Nojiri 
3505ba098ed9SDaisuke Nojiri 	struct __ec_todo_unpacked {
3506ba098ed9SDaisuke Nojiri 		/* For aligning the fifo_info */
3507ba098ed9SDaisuke Nojiri 		uint8_t reserved[3];
3508ba098ed9SDaisuke Nojiri 		struct ec_response_motion_sense_fifo_info info;
3509ba098ed9SDaisuke Nojiri 	} sensor_fifo;
3510ba098ed9SDaisuke Nojiri 
3511ba098ed9SDaisuke Nojiri 	uint32_t buttons;
3512ba098ed9SDaisuke Nojiri 
3513ba098ed9SDaisuke Nojiri 	uint32_t switches;
3514ba098ed9SDaisuke Nojiri 
3515ba098ed9SDaisuke Nojiri 	uint32_t fp_events;
3516ba098ed9SDaisuke Nojiri 
3517ba098ed9SDaisuke Nojiri 	uint32_t sysrq;
3518ba098ed9SDaisuke Nojiri 
3519ba098ed9SDaisuke Nojiri 	/* CEC events from enum mkbp_cec_event */
3520ba098ed9SDaisuke Nojiri 	uint32_t cec_events;
3521ba098ed9SDaisuke Nojiri 
3522ba098ed9SDaisuke Nojiri 	uint8_t cec_message[16];
3523ba098ed9SDaisuke Nojiri };
3524ba098ed9SDaisuke Nojiri BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3) == 18);
3525ba098ed9SDaisuke Nojiri 
3526840d9f13SEnric Balletbo i Serra struct ec_response_get_next_event {
3527840d9f13SEnric Balletbo i Serra 	uint8_t event_type;
3528840d9f13SEnric Balletbo i Serra 	/* Followed by event data if any */
3529840d9f13SEnric Balletbo i Serra 	union ec_response_get_next_data data;
3530840d9f13SEnric Balletbo i Serra } __ec_align1;
3531840d9f13SEnric Balletbo i Serra 
3532840d9f13SEnric Balletbo i Serra struct ec_response_get_next_event_v1 {
3533840d9f13SEnric Balletbo i Serra 	uint8_t event_type;
3534840d9f13SEnric Balletbo i Serra 	/* Followed by event data if any */
3535840d9f13SEnric Balletbo i Serra 	union ec_response_get_next_data_v1 data;
3536840d9f13SEnric Balletbo i Serra } __ec_align1;
3537840d9f13SEnric Balletbo i Serra 
3538ba098ed9SDaisuke Nojiri struct ec_response_get_next_event_v3 {
3539ba098ed9SDaisuke Nojiri 	uint8_t event_type;
3540ba098ed9SDaisuke Nojiri 	/* Followed by event data if any */
3541ba098ed9SDaisuke Nojiri 	union ec_response_get_next_data_v3 data;
3542ba098ed9SDaisuke Nojiri } __ec_align1;
3543ba098ed9SDaisuke Nojiri 
3544840d9f13SEnric Balletbo i Serra /* Bit indices for buttons and switches.*/
3545840d9f13SEnric Balletbo i Serra /* Buttons */
3546840d9f13SEnric Balletbo i Serra #define EC_MKBP_POWER_BUTTON	0
3547840d9f13SEnric Balletbo i Serra #define EC_MKBP_VOL_UP		1
3548840d9f13SEnric Balletbo i Serra #define EC_MKBP_VOL_DOWN	2
3549840d9f13SEnric Balletbo i Serra #define EC_MKBP_RECOVERY	3
35508aaec117Sjoewu (吳仲振) #define EC_MKBP_BRI_UP		4
35518aaec117Sjoewu (吳仲振) #define EC_MKBP_BRI_DOWN	5
35528aaec117Sjoewu (吳仲振) #define EC_MKBP_SCREEN_LOCK	6
3553840d9f13SEnric Balletbo i Serra 
3554840d9f13SEnric Balletbo i Serra /* Switches */
3555840d9f13SEnric Balletbo i Serra #define EC_MKBP_LID_OPEN	0
3556840d9f13SEnric Balletbo i Serra #define EC_MKBP_TABLET_MODE	1
3557840d9f13SEnric Balletbo i Serra #define EC_MKBP_BASE_ATTACHED	2
3558374be283SStephen Boyd #define EC_MKBP_FRONT_PROXIMITY	3
3559840d9f13SEnric Balletbo i Serra 
3560840d9f13SEnric Balletbo i Serra /* Run keyboard factory test scanning */
3561840d9f13SEnric Balletbo i Serra #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3562840d9f13SEnric Balletbo i Serra 
3563840d9f13SEnric Balletbo i Serra struct ec_response_keyboard_factory_test {
3564840d9f13SEnric Balletbo i Serra 	uint16_t shorted;	/* Keyboard pins are shorted */
3565840d9f13SEnric Balletbo i Serra } __ec_align2;
3566840d9f13SEnric Balletbo i Serra 
3567840d9f13SEnric Balletbo i Serra /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
3568840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3569840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERRCODE(fp_events)   ((fp_events) & 0x0000000F)
3570840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
3571840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \
3572840d9f13SEnric Balletbo i Serra 					 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
3573840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_MATCH_IDX_OFFSET 12
3574840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
3575840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \
3576840d9f13SEnric Balletbo i Serra 					 >> EC_MKBP_FP_MATCH_IDX_OFFSET)
3577840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ENROLL               BIT(27)
3578840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_MATCH                BIT(28)
3579840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_FINGER_DOWN          BIT(29)
3580840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_FINGER_UP            BIT(30)
3581840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_IMAGE_READY          BIT(31)
3582840d9f13SEnric Balletbo i Serra /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */
3583840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_ENROLL_OK               0
3584840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY      1
3585840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE         2
3586840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE     3
3587840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_ENROLL_INTERNAL         5
3588840d9f13SEnric Balletbo i Serra /* Can be used to detect if image was usable for enrollment or not. */
3589840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK     1
3590840d9f13SEnric Balletbo i Serra /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */
3591840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_NO                0
3592840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL       6
3593840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES      7
3594840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY    2
3595840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE   4
3596840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_YES               1
3597840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED       3
3598840d9f13SEnric Balletbo i Serra #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
3599840d9f13SEnric Balletbo i Serra 
3600840d9f13SEnric Balletbo i Serra 
3601840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3602840d9f13SEnric Balletbo i Serra /* Temperature sensor commands */
3603840d9f13SEnric Balletbo i Serra 
3604840d9f13SEnric Balletbo i Serra /* Read temperature sensor info */
3605840d9f13SEnric Balletbo i Serra #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3606840d9f13SEnric Balletbo i Serra 
3607840d9f13SEnric Balletbo i Serra struct ec_params_temp_sensor_get_info {
3608840d9f13SEnric Balletbo i Serra 	uint8_t id;
3609840d9f13SEnric Balletbo i Serra } __ec_align1;
3610840d9f13SEnric Balletbo i Serra 
3611840d9f13SEnric Balletbo i Serra struct ec_response_temp_sensor_get_info {
3612840d9f13SEnric Balletbo i Serra 	char sensor_name[32];
3613840d9f13SEnric Balletbo i Serra 	uint8_t sensor_type;
3614840d9f13SEnric Balletbo i Serra } __ec_align1;
3615840d9f13SEnric Balletbo i Serra 
3616840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3617840d9f13SEnric Balletbo i Serra 
3618840d9f13SEnric Balletbo i Serra /*
3619840d9f13SEnric Balletbo i Serra  * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3620840d9f13SEnric Balletbo i Serra  * commands accidentally sent to the wrong interface.  See the ACPI section
3621840d9f13SEnric Balletbo i Serra  * below.
3622840d9f13SEnric Balletbo i Serra  */
3623840d9f13SEnric Balletbo i Serra 
3624840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3625840d9f13SEnric Balletbo i Serra /* Host event commands */
3626840d9f13SEnric Balletbo i Serra 
3627840d9f13SEnric Balletbo i Serra 
3628840d9f13SEnric Balletbo i Serra /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */
3629840d9f13SEnric Balletbo i Serra /*
3630840d9f13SEnric Balletbo i Serra  * Host event mask params and response structures, shared by all of the host
3631840d9f13SEnric Balletbo i Serra  * event commands below.
3632840d9f13SEnric Balletbo i Serra  */
3633840d9f13SEnric Balletbo i Serra struct ec_params_host_event_mask {
3634840d9f13SEnric Balletbo i Serra 	uint32_t mask;
3635840d9f13SEnric Balletbo i Serra } __ec_align4;
3636840d9f13SEnric Balletbo i Serra 
3637840d9f13SEnric Balletbo i Serra struct ec_response_host_event_mask {
3638840d9f13SEnric Balletbo i Serra 	uint32_t mask;
3639840d9f13SEnric Balletbo i Serra } __ec_align4;
3640840d9f13SEnric Balletbo i Serra 
3641840d9f13SEnric Balletbo i Serra /* These all use ec_response_host_event_mask */
3642840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_GET_B         0x0087
3643840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_GET_SMI_MASK  0x0088
3644840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_GET_SCI_MASK  0x0089
3645840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3646840d9f13SEnric Balletbo i Serra 
3647840d9f13SEnric Balletbo i Serra /* These all use ec_params_host_event_mask */
3648840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_SET_SMI_MASK  0x008A
3649840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_SET_SCI_MASK  0x008B
3650840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_CLEAR         0x008C
3651840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3652840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT_CLEAR_B       0x008F
3653840d9f13SEnric Balletbo i Serra 
3654840d9f13SEnric Balletbo i Serra /*
3655840d9f13SEnric Balletbo i Serra  * Unified host event programming interface - Should be used by newer versions
3656840d9f13SEnric Balletbo i Serra  * of BIOS/OS to program host events and masks
3657840d9f13SEnric Balletbo i Serra  */
3658840d9f13SEnric Balletbo i Serra 
3659840d9f13SEnric Balletbo i Serra struct ec_params_host_event {
3660840d9f13SEnric Balletbo i Serra 
3661840d9f13SEnric Balletbo i Serra 	/* Action requested by host - one of enum ec_host_event_action. */
3662840d9f13SEnric Balletbo i Serra 	uint8_t action;
3663840d9f13SEnric Balletbo i Serra 
3664840d9f13SEnric Balletbo i Serra 	/*
3665840d9f13SEnric Balletbo i Serra 	 * Mask type that the host requested the action on - one of
3666840d9f13SEnric Balletbo i Serra 	 * enum ec_host_event_mask_type.
3667840d9f13SEnric Balletbo i Serra 	 */
3668840d9f13SEnric Balletbo i Serra 	uint8_t mask_type;
3669840d9f13SEnric Balletbo i Serra 
3670840d9f13SEnric Balletbo i Serra 	/* Set to 0, ignore on read */
3671840d9f13SEnric Balletbo i Serra 	uint16_t reserved;
3672840d9f13SEnric Balletbo i Serra 
3673840d9f13SEnric Balletbo i Serra 	/* Value to be used in case of set operations. */
3674840d9f13SEnric Balletbo i Serra 	uint64_t value;
3675840d9f13SEnric Balletbo i Serra } __ec_align4;
3676840d9f13SEnric Balletbo i Serra 
3677840d9f13SEnric Balletbo i Serra /*
3678840d9f13SEnric Balletbo i Serra  * Response structure returned by EC_CMD_HOST_EVENT.
3679840d9f13SEnric Balletbo i Serra  * Update the value on a GET request. Set to 0 on GET/CLEAR
3680840d9f13SEnric Balletbo i Serra  */
3681840d9f13SEnric Balletbo i Serra 
3682840d9f13SEnric Balletbo i Serra struct ec_response_host_event {
3683840d9f13SEnric Balletbo i Serra 
3684840d9f13SEnric Balletbo i Serra 	/* Mask value in case of get operation */
3685840d9f13SEnric Balletbo i Serra 	uint64_t value;
3686840d9f13SEnric Balletbo i Serra } __ec_align4;
3687840d9f13SEnric Balletbo i Serra 
3688840d9f13SEnric Balletbo i Serra enum ec_host_event_action {
3689840d9f13SEnric Balletbo i Serra 	/*
3690840d9f13SEnric Balletbo i Serra 	 * params.value is ignored. Value of mask_type populated
3691840d9f13SEnric Balletbo i Serra 	 * in response.value
3692840d9f13SEnric Balletbo i Serra 	 */
3693840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_GET,
3694840d9f13SEnric Balletbo i Serra 
3695840d9f13SEnric Balletbo i Serra 	/* Bits in params.value are set */
3696840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_SET,
3697840d9f13SEnric Balletbo i Serra 
3698840d9f13SEnric Balletbo i Serra 	/* Bits in params.value are cleared */
3699840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_CLEAR,
3700840d9f13SEnric Balletbo i Serra };
3701840d9f13SEnric Balletbo i Serra 
3702840d9f13SEnric Balletbo i Serra enum ec_host_event_mask_type {
3703840d9f13SEnric Balletbo i Serra 
3704840d9f13SEnric Balletbo i Serra 	/* Main host event copy */
3705840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_MAIN,
3706840d9f13SEnric Balletbo i Serra 
3707840d9f13SEnric Balletbo i Serra 	/* Copy B of host events */
3708840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_B,
3709840d9f13SEnric Balletbo i Serra 
3710840d9f13SEnric Balletbo i Serra 	/* SCI Mask */
3711840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_SCI_MASK,
3712840d9f13SEnric Balletbo i Serra 
3713840d9f13SEnric Balletbo i Serra 	/* SMI Mask */
3714840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_SMI_MASK,
3715840d9f13SEnric Balletbo i Serra 
3716840d9f13SEnric Balletbo i Serra 	/* Mask of events that should be always reported in hostevents */
3717840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3718840d9f13SEnric Balletbo i Serra 
3719840d9f13SEnric Balletbo i Serra 	/* Active wake mask */
3720840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3721840d9f13SEnric Balletbo i Serra 
3722840d9f13SEnric Balletbo i Serra 	/* Lazy wake mask for S0ix */
3723840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3724840d9f13SEnric Balletbo i Serra 
3725840d9f13SEnric Balletbo i Serra 	/* Lazy wake mask for S3 */
3726840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3727840d9f13SEnric Balletbo i Serra 
3728840d9f13SEnric Balletbo i Serra 	/* Lazy wake mask for S5 */
3729840d9f13SEnric Balletbo i Serra 	EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3730840d9f13SEnric Balletbo i Serra };
3731840d9f13SEnric Balletbo i Serra 
3732840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_EVENT       0x00A4
3733840d9f13SEnric Balletbo i Serra 
3734840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3735840d9f13SEnric Balletbo i Serra /* Switch commands */
3736840d9f13SEnric Balletbo i Serra 
3737840d9f13SEnric Balletbo i Serra /* Enable/disable LCD backlight */
3738840d9f13SEnric Balletbo i Serra #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3739840d9f13SEnric Balletbo i Serra 
3740840d9f13SEnric Balletbo i Serra struct ec_params_switch_enable_backlight {
3741840d9f13SEnric Balletbo i Serra 	uint8_t enabled;
3742840d9f13SEnric Balletbo i Serra } __ec_align1;
3743840d9f13SEnric Balletbo i Serra 
3744840d9f13SEnric Balletbo i Serra /* Enable/disable WLAN/Bluetooth */
3745840d9f13SEnric Balletbo i Serra #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3746840d9f13SEnric Balletbo i Serra #define EC_VER_SWITCH_ENABLE_WIRELESS 1
3747840d9f13SEnric Balletbo i Serra 
3748840d9f13SEnric Balletbo i Serra /* Version 0 params; no response */
3749840d9f13SEnric Balletbo i Serra struct ec_params_switch_enable_wireless_v0 {
3750840d9f13SEnric Balletbo i Serra 	uint8_t enabled;
3751840d9f13SEnric Balletbo i Serra } __ec_align1;
3752840d9f13SEnric Balletbo i Serra 
3753840d9f13SEnric Balletbo i Serra /* Version 1 params */
3754840d9f13SEnric Balletbo i Serra struct ec_params_switch_enable_wireless_v1 {
3755840d9f13SEnric Balletbo i Serra 	/* Flags to enable now */
3756840d9f13SEnric Balletbo i Serra 	uint8_t now_flags;
3757840d9f13SEnric Balletbo i Serra 
3758840d9f13SEnric Balletbo i Serra 	/* Which flags to copy from now_flags */
3759840d9f13SEnric Balletbo i Serra 	uint8_t now_mask;
3760840d9f13SEnric Balletbo i Serra 
3761840d9f13SEnric Balletbo i Serra 	/*
3762840d9f13SEnric Balletbo i Serra 	 * Flags to leave enabled in S3, if they're on at the S0->S3
3763840d9f13SEnric Balletbo i Serra 	 * transition.  (Other flags will be disabled by the S0->S3
3764840d9f13SEnric Balletbo i Serra 	 * transition.)
3765840d9f13SEnric Balletbo i Serra 	 */
3766840d9f13SEnric Balletbo i Serra 	uint8_t suspend_flags;
3767840d9f13SEnric Balletbo i Serra 
3768840d9f13SEnric Balletbo i Serra 	/* Which flags to copy from suspend_flags */
3769840d9f13SEnric Balletbo i Serra 	uint8_t suspend_mask;
3770840d9f13SEnric Balletbo i Serra } __ec_align1;
3771840d9f13SEnric Balletbo i Serra 
3772840d9f13SEnric Balletbo i Serra /* Version 1 response */
3773840d9f13SEnric Balletbo i Serra struct ec_response_switch_enable_wireless_v1 {
3774840d9f13SEnric Balletbo i Serra 	/* Flags to enable now */
3775840d9f13SEnric Balletbo i Serra 	uint8_t now_flags;
3776840d9f13SEnric Balletbo i Serra 
3777840d9f13SEnric Balletbo i Serra 	/* Flags to leave enabled in S3 */
3778840d9f13SEnric Balletbo i Serra 	uint8_t suspend_flags;
3779840d9f13SEnric Balletbo i Serra } __ec_align1;
3780840d9f13SEnric Balletbo i Serra 
3781840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3782840d9f13SEnric Balletbo i Serra /* GPIO commands. Only available on EC if write protect has been disabled. */
3783840d9f13SEnric Balletbo i Serra 
3784840d9f13SEnric Balletbo i Serra /* Set GPIO output value */
3785840d9f13SEnric Balletbo i Serra #define EC_CMD_GPIO_SET 0x0092
3786840d9f13SEnric Balletbo i Serra 
3787840d9f13SEnric Balletbo i Serra struct ec_params_gpio_set {
3788840d9f13SEnric Balletbo i Serra 	char name[32];
3789840d9f13SEnric Balletbo i Serra 	uint8_t val;
3790840d9f13SEnric Balletbo i Serra } __ec_align1;
3791840d9f13SEnric Balletbo i Serra 
3792840d9f13SEnric Balletbo i Serra /* Get GPIO value */
3793840d9f13SEnric Balletbo i Serra #define EC_CMD_GPIO_GET 0x0093
3794840d9f13SEnric Balletbo i Serra 
3795840d9f13SEnric Balletbo i Serra /* Version 0 of input params and response */
3796840d9f13SEnric Balletbo i Serra struct ec_params_gpio_get {
3797840d9f13SEnric Balletbo i Serra 	char name[32];
3798840d9f13SEnric Balletbo i Serra } __ec_align1;
3799840d9f13SEnric Balletbo i Serra 
3800840d9f13SEnric Balletbo i Serra struct ec_response_gpio_get {
3801840d9f13SEnric Balletbo i Serra 	uint8_t val;
3802840d9f13SEnric Balletbo i Serra } __ec_align1;
3803840d9f13SEnric Balletbo i Serra 
3804840d9f13SEnric Balletbo i Serra /* Version 1 of input params and response */
3805840d9f13SEnric Balletbo i Serra struct ec_params_gpio_get_v1 {
3806840d9f13SEnric Balletbo i Serra 	uint8_t subcmd;
3807840d9f13SEnric Balletbo i Serra 	union {
3808840d9f13SEnric Balletbo i Serra 		struct __ec_align1 {
3809840d9f13SEnric Balletbo i Serra 			char name[32];
3810840d9f13SEnric Balletbo i Serra 		} get_value_by_name;
3811840d9f13SEnric Balletbo i Serra 		struct __ec_align1 {
3812840d9f13SEnric Balletbo i Serra 			uint8_t index;
3813840d9f13SEnric Balletbo i Serra 		} get_info;
3814840d9f13SEnric Balletbo i Serra 	};
3815840d9f13SEnric Balletbo i Serra } __ec_align1;
3816840d9f13SEnric Balletbo i Serra 
3817840d9f13SEnric Balletbo i Serra struct ec_response_gpio_get_v1 {
3818840d9f13SEnric Balletbo i Serra 	union {
3819840d9f13SEnric Balletbo i Serra 		struct __ec_align1 {
3820840d9f13SEnric Balletbo i Serra 			uint8_t val;
3821840d9f13SEnric Balletbo i Serra 		} get_value_by_name, get_count;
3822840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
3823840d9f13SEnric Balletbo i Serra 			uint8_t val;
3824840d9f13SEnric Balletbo i Serra 			char name[32];
3825840d9f13SEnric Balletbo i Serra 			uint32_t flags;
3826840d9f13SEnric Balletbo i Serra 		} get_info;
3827840d9f13SEnric Balletbo i Serra 	};
3828840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
3829840d9f13SEnric Balletbo i Serra 
3830840d9f13SEnric Balletbo i Serra enum gpio_get_subcmd {
3831840d9f13SEnric Balletbo i Serra 	EC_GPIO_GET_BY_NAME = 0,
3832840d9f13SEnric Balletbo i Serra 	EC_GPIO_GET_COUNT = 1,
3833840d9f13SEnric Balletbo i Serra 	EC_GPIO_GET_INFO = 2,
3834840d9f13SEnric Balletbo i Serra };
3835840d9f13SEnric Balletbo i Serra 
3836840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3837840d9f13SEnric Balletbo i Serra /* I2C commands. Only available when flash write protect is unlocked. */
3838840d9f13SEnric Balletbo i Serra 
3839840d9f13SEnric Balletbo i Serra /*
3840840d9f13SEnric Balletbo i Serra  * CAUTION: These commands are deprecated, and are not supported anymore in EC
3841840d9f13SEnric Balletbo i Serra  * builds >= 8398.0.0 (see crosbug.com/p/23570).
3842840d9f13SEnric Balletbo i Serra  *
3843840d9f13SEnric Balletbo i Serra  * Use EC_CMD_I2C_PASSTHRU instead.
3844840d9f13SEnric Balletbo i Serra  */
3845840d9f13SEnric Balletbo i Serra 
3846840d9f13SEnric Balletbo i Serra /* Read I2C bus */
3847840d9f13SEnric Balletbo i Serra #define EC_CMD_I2C_READ 0x0094
3848840d9f13SEnric Balletbo i Serra 
3849840d9f13SEnric Balletbo i Serra struct ec_params_i2c_read {
3850840d9f13SEnric Balletbo i Serra 	uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3851840d9f13SEnric Balletbo i Serra 	uint8_t read_size; /* Either 8 or 16. */
3852840d9f13SEnric Balletbo i Serra 	uint8_t port;
3853840d9f13SEnric Balletbo i Serra 	uint8_t offset;
3854840d9f13SEnric Balletbo i Serra } __ec_align_size1;
3855840d9f13SEnric Balletbo i Serra 
3856840d9f13SEnric Balletbo i Serra struct ec_response_i2c_read {
3857840d9f13SEnric Balletbo i Serra 	uint16_t data;
3858840d9f13SEnric Balletbo i Serra } __ec_align2;
3859840d9f13SEnric Balletbo i Serra 
3860840d9f13SEnric Balletbo i Serra /* Write I2C bus */
3861840d9f13SEnric Balletbo i Serra #define EC_CMD_I2C_WRITE 0x0095
3862840d9f13SEnric Balletbo i Serra 
3863840d9f13SEnric Balletbo i Serra struct ec_params_i2c_write {
3864840d9f13SEnric Balletbo i Serra 	uint16_t data;
3865840d9f13SEnric Balletbo i Serra 	uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3866840d9f13SEnric Balletbo i Serra 	uint8_t write_size; /* Either 8 or 16. */
3867840d9f13SEnric Balletbo i Serra 	uint8_t port;
3868840d9f13SEnric Balletbo i Serra 	uint8_t offset;
3869840d9f13SEnric Balletbo i Serra } __ec_align_size1;
3870840d9f13SEnric Balletbo i Serra 
3871840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3872840d9f13SEnric Balletbo i Serra /* Charge state commands. Only available when flash write protect unlocked. */
3873840d9f13SEnric Balletbo i Serra 
3874840d9f13SEnric Balletbo i Serra /* Force charge state machine to stop charging the battery or force it to
3875840d9f13SEnric Balletbo i Serra  * discharge the battery.
3876840d9f13SEnric Balletbo i Serra  */
3877840d9f13SEnric Balletbo i Serra #define EC_CMD_CHARGE_CONTROL 0x0096
3878c05cb5bdSThomas Weißschuh #define EC_VER_CHARGE_CONTROL 3
3879840d9f13SEnric Balletbo i Serra 
3880840d9f13SEnric Balletbo i Serra enum ec_charge_control_mode {
3881840d9f13SEnric Balletbo i Serra 	CHARGE_CONTROL_NORMAL = 0,
3882840d9f13SEnric Balletbo i Serra 	CHARGE_CONTROL_IDLE,
3883840d9f13SEnric Balletbo i Serra 	CHARGE_CONTROL_DISCHARGE,
3884c05cb5bdSThomas Weißschuh 	/* Add no more entry below. */
3885c05cb5bdSThomas Weißschuh 	CHARGE_CONTROL_COUNT,
3886c05cb5bdSThomas Weißschuh };
3887c05cb5bdSThomas Weißschuh 
3888c05cb5bdSThomas Weißschuh #define EC_CHARGE_MODE_TEXT                               \
3889c05cb5bdSThomas Weißschuh 	{                                                 \
3890c05cb5bdSThomas Weißschuh 		[CHARGE_CONTROL_NORMAL] = "NORMAL",       \
3891c05cb5bdSThomas Weißschuh 		[CHARGE_CONTROL_IDLE] = "IDLE",           \
3892c05cb5bdSThomas Weißschuh 		[CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \
3893c05cb5bdSThomas Weißschuh 	}
3894c05cb5bdSThomas Weißschuh 
3895c05cb5bdSThomas Weißschuh enum ec_charge_control_cmd {
3896c05cb5bdSThomas Weißschuh 	EC_CHARGE_CONTROL_CMD_SET = 0,
3897c05cb5bdSThomas Weißschuh 	EC_CHARGE_CONTROL_CMD_GET,
3898c05cb5bdSThomas Weißschuh };
3899c05cb5bdSThomas Weißschuh 
3900c05cb5bdSThomas Weißschuh enum ec_charge_control_flag {
3901c05cb5bdSThomas Weißschuh 	EC_CHARGE_CONTROL_FLAG_NO_IDLE = BIT(0),
3902840d9f13SEnric Balletbo i Serra };
3903840d9f13SEnric Balletbo i Serra 
3904840d9f13SEnric Balletbo i Serra struct ec_params_charge_control {
3905840d9f13SEnric Balletbo i Serra 	uint32_t mode; /* enum charge_control_mode */
3906c05cb5bdSThomas Weißschuh 
3907c05cb5bdSThomas Weißschuh 	/* Below are the fields added in V2. */
3908c05cb5bdSThomas Weißschuh 	uint8_t cmd; /* enum ec_charge_control_cmd. */
3909c05cb5bdSThomas Weißschuh 	uint8_t flags; /* enum ec_charge_control_flag (v3+) */
3910c05cb5bdSThomas Weißschuh 	/*
3911c05cb5bdSThomas Weißschuh 	 * Lower and upper thresholds for battery sustainer. This struct isn't
3912c05cb5bdSThomas Weißschuh 	 * named to avoid tainting foreign projects' name spaces.
3913c05cb5bdSThomas Weißschuh 	 *
3914c05cb5bdSThomas Weißschuh 	 * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer
3915c05cb5bdSThomas Weißschuh 	 * will be disabled. To disable battery sustainer, set mode=NORMAL,
3916c05cb5bdSThomas Weißschuh 	 * lower=-1, upper=-1.
3917c05cb5bdSThomas Weißschuh 	 */
3918c05cb5bdSThomas Weißschuh 	struct {
3919c05cb5bdSThomas Weißschuh 		int8_t lower; /* Display SoC in percentage. */
3920c05cb5bdSThomas Weißschuh 		int8_t upper; /* Display SoC in percentage. */
3921c05cb5bdSThomas Weißschuh 	} sustain_soc;
3922c05cb5bdSThomas Weißschuh } __ec_align4;
3923c05cb5bdSThomas Weißschuh 
3924c05cb5bdSThomas Weißschuh /* Added in v2 */
3925c05cb5bdSThomas Weißschuh struct ec_response_charge_control {
3926c05cb5bdSThomas Weißschuh 	uint32_t mode; /* enum charge_control_mode */
3927c05cb5bdSThomas Weißschuh 	struct { /* Battery sustainer thresholds */
3928c05cb5bdSThomas Weißschuh 		int8_t lower;
3929c05cb5bdSThomas Weißschuh 		int8_t upper;
3930c05cb5bdSThomas Weißschuh 	} sustain_soc;
3931c05cb5bdSThomas Weißschuh 	uint8_t flags; /* enum ec_charge_control_flag (v3+) */
3932c05cb5bdSThomas Weißschuh 	uint8_t reserved;
3933840d9f13SEnric Balletbo i Serra } __ec_align4;
3934840d9f13SEnric Balletbo i Serra 
3935840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3936840d9f13SEnric Balletbo i Serra 
3937840d9f13SEnric Balletbo i Serra /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
3938840d9f13SEnric Balletbo i Serra #define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3939840d9f13SEnric Balletbo i Serra 
3940840d9f13SEnric Balletbo i Serra /*
3941840d9f13SEnric Balletbo i Serra  * Read data from the saved snapshot. If the subcmd parameter is
3942840d9f13SEnric Balletbo i Serra  * CONSOLE_READ_NEXT, this will return data starting from the beginning of
3943840d9f13SEnric Balletbo i Serra  * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
3944840d9f13SEnric Balletbo i Serra  * end of the previous snapshot.
3945840d9f13SEnric Balletbo i Serra  *
3946840d9f13SEnric Balletbo i Serra  * The params are only looked at in version >= 1 of this command. Prior
3947840d9f13SEnric Balletbo i Serra  * versions will just default to CONSOLE_READ_NEXT behavior.
3948840d9f13SEnric Balletbo i Serra  *
3949840d9f13SEnric Balletbo i Serra  * Response is null-terminated string.  Empty string, if there is no more
3950840d9f13SEnric Balletbo i Serra  * remaining output.
3951840d9f13SEnric Balletbo i Serra  */
3952840d9f13SEnric Balletbo i Serra #define EC_CMD_CONSOLE_READ 0x0098
3953840d9f13SEnric Balletbo i Serra 
3954840d9f13SEnric Balletbo i Serra enum ec_console_read_subcmd {
3955840d9f13SEnric Balletbo i Serra 	CONSOLE_READ_NEXT = 0,
3956840d9f13SEnric Balletbo i Serra 	CONSOLE_READ_RECENT
3957840d9f13SEnric Balletbo i Serra };
3958840d9f13SEnric Balletbo i Serra 
3959840d9f13SEnric Balletbo i Serra struct ec_params_console_read_v1 {
3960840d9f13SEnric Balletbo i Serra 	uint8_t subcmd; /* enum ec_console_read_subcmd */
3961840d9f13SEnric Balletbo i Serra } __ec_align1;
3962840d9f13SEnric Balletbo i Serra 
3963840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3964840d9f13SEnric Balletbo i Serra 
3965840d9f13SEnric Balletbo i Serra /*
3966840d9f13SEnric Balletbo i Serra  * Cut off battery power immediately or after the host has shut down.
3967840d9f13SEnric Balletbo i Serra  *
3968840d9f13SEnric Balletbo i Serra  * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
3969840d9f13SEnric Balletbo i Serra  *	  EC_RES_SUCCESS if the command was successful.
3970840d9f13SEnric Balletbo i Serra  *	  EC_RES_ERROR if the cut off command failed.
3971840d9f13SEnric Balletbo i Serra  */
3972840d9f13SEnric Balletbo i Serra #define EC_CMD_BATTERY_CUT_OFF 0x0099
3973840d9f13SEnric Balletbo i Serra 
3974840d9f13SEnric Balletbo i Serra #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN	BIT(0)
3975840d9f13SEnric Balletbo i Serra 
3976840d9f13SEnric Balletbo i Serra struct ec_params_battery_cutoff {
3977840d9f13SEnric Balletbo i Serra 	uint8_t flags;
3978840d9f13SEnric Balletbo i Serra } __ec_align1;
3979840d9f13SEnric Balletbo i Serra 
3980840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3981840d9f13SEnric Balletbo i Serra /* USB port mux control. */
3982840d9f13SEnric Balletbo i Serra 
3983840d9f13SEnric Balletbo i Serra /*
3984840d9f13SEnric Balletbo i Serra  * Switch USB mux or return to automatic switching.
3985840d9f13SEnric Balletbo i Serra  */
3986840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_MUX 0x009A
3987840d9f13SEnric Balletbo i Serra 
3988840d9f13SEnric Balletbo i Serra struct ec_params_usb_mux {
3989840d9f13SEnric Balletbo i Serra 	uint8_t mux;
3990840d9f13SEnric Balletbo i Serra } __ec_align1;
3991840d9f13SEnric Balletbo i Serra 
3992840d9f13SEnric Balletbo i Serra /*****************************************************************************/
3993840d9f13SEnric Balletbo i Serra /* LDOs / FETs control. */
3994840d9f13SEnric Balletbo i Serra 
3995840d9f13SEnric Balletbo i Serra enum ec_ldo_state {
3996840d9f13SEnric Balletbo i Serra 	EC_LDO_STATE_OFF = 0,	/* the LDO / FET is shut down */
3997840d9f13SEnric Balletbo i Serra 	EC_LDO_STATE_ON = 1,	/* the LDO / FET is ON / providing power */
3998840d9f13SEnric Balletbo i Serra };
3999840d9f13SEnric Balletbo i Serra 
4000840d9f13SEnric Balletbo i Serra /*
4001840d9f13SEnric Balletbo i Serra  * Switch on/off a LDO.
4002840d9f13SEnric Balletbo i Serra  */
4003840d9f13SEnric Balletbo i Serra #define EC_CMD_LDO_SET 0x009B
4004840d9f13SEnric Balletbo i Serra 
4005840d9f13SEnric Balletbo i Serra struct ec_params_ldo_set {
4006840d9f13SEnric Balletbo i Serra 	uint8_t index;
4007840d9f13SEnric Balletbo i Serra 	uint8_t state;
4008840d9f13SEnric Balletbo i Serra } __ec_align1;
4009840d9f13SEnric Balletbo i Serra 
4010840d9f13SEnric Balletbo i Serra /*
4011840d9f13SEnric Balletbo i Serra  * Get LDO state.
4012840d9f13SEnric Balletbo i Serra  */
4013840d9f13SEnric Balletbo i Serra #define EC_CMD_LDO_GET 0x009C
4014840d9f13SEnric Balletbo i Serra 
4015840d9f13SEnric Balletbo i Serra struct ec_params_ldo_get {
4016840d9f13SEnric Balletbo i Serra 	uint8_t index;
4017840d9f13SEnric Balletbo i Serra } __ec_align1;
4018840d9f13SEnric Balletbo i Serra 
4019840d9f13SEnric Balletbo i Serra struct ec_response_ldo_get {
4020840d9f13SEnric Balletbo i Serra 	uint8_t state;
4021840d9f13SEnric Balletbo i Serra } __ec_align1;
4022840d9f13SEnric Balletbo i Serra 
4023840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4024840d9f13SEnric Balletbo i Serra /* Power info. */
4025840d9f13SEnric Balletbo i Serra 
4026840d9f13SEnric Balletbo i Serra /*
4027840d9f13SEnric Balletbo i Serra  * Get power info.
4028840d9f13SEnric Balletbo i Serra  */
4029840d9f13SEnric Balletbo i Serra #define EC_CMD_POWER_INFO 0x009D
4030840d9f13SEnric Balletbo i Serra 
4031840d9f13SEnric Balletbo i Serra struct ec_response_power_info {
4032840d9f13SEnric Balletbo i Serra 	uint32_t usb_dev_type;
4033840d9f13SEnric Balletbo i Serra 	uint16_t voltage_ac;
4034840d9f13SEnric Balletbo i Serra 	uint16_t voltage_system;
4035840d9f13SEnric Balletbo i Serra 	uint16_t current_system;
4036840d9f13SEnric Balletbo i Serra 	uint16_t usb_current_limit;
4037840d9f13SEnric Balletbo i Serra } __ec_align4;
4038840d9f13SEnric Balletbo i Serra 
4039840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4040840d9f13SEnric Balletbo i Serra /* I2C passthru command */
4041840d9f13SEnric Balletbo i Serra 
4042840d9f13SEnric Balletbo i Serra #define EC_CMD_I2C_PASSTHRU 0x009E
4043840d9f13SEnric Balletbo i Serra 
4044840d9f13SEnric Balletbo i Serra /* Read data; if not present, message is a write */
4045840d9f13SEnric Balletbo i Serra #define EC_I2C_FLAG_READ	BIT(15)
4046840d9f13SEnric Balletbo i Serra 
4047840d9f13SEnric Balletbo i Serra /* Mask for address */
4048840d9f13SEnric Balletbo i Serra #define EC_I2C_ADDR_MASK	0x3ff
4049840d9f13SEnric Balletbo i Serra 
4050840d9f13SEnric Balletbo i Serra #define EC_I2C_STATUS_NAK	BIT(0) /* Transfer was not acknowledged */
4051840d9f13SEnric Balletbo i Serra #define EC_I2C_STATUS_TIMEOUT	BIT(1) /* Timeout during transfer */
4052840d9f13SEnric Balletbo i Serra 
4053840d9f13SEnric Balletbo i Serra /* Any error */
4054840d9f13SEnric Balletbo i Serra #define EC_I2C_STATUS_ERROR	(EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
4055840d9f13SEnric Balletbo i Serra 
4056840d9f13SEnric Balletbo i Serra struct ec_params_i2c_passthru_msg {
4057840d9f13SEnric Balletbo i Serra 	uint16_t addr_flags;	/* I2C slave address (7 or 10 bits) and flags */
4058840d9f13SEnric Balletbo i Serra 	uint16_t len;		/* Number of bytes to read or write */
4059840d9f13SEnric Balletbo i Serra } __ec_align2;
4060840d9f13SEnric Balletbo i Serra 
4061840d9f13SEnric Balletbo i Serra struct ec_params_i2c_passthru {
4062840d9f13SEnric Balletbo i Serra 	uint8_t port;		/* I2C port number */
4063840d9f13SEnric Balletbo i Serra 	uint8_t num_msgs;	/* Number of messages */
4064840d9f13SEnric Balletbo i Serra 	struct ec_params_i2c_passthru_msg msg[];
4065840d9f13SEnric Balletbo i Serra 	/* Data to write for all messages is concatenated here */
4066840d9f13SEnric Balletbo i Serra } __ec_align2;
4067840d9f13SEnric Balletbo i Serra 
4068840d9f13SEnric Balletbo i Serra struct ec_response_i2c_passthru {
4069840d9f13SEnric Balletbo i Serra 	uint8_t i2c_status;	/* Status flags (EC_I2C_STATUS_...) */
4070840d9f13SEnric Balletbo i Serra 	uint8_t num_msgs;	/* Number of messages processed */
4071840d9f13SEnric Balletbo i Serra 	uint8_t data[];		/* Data read by messages concatenated here */
4072840d9f13SEnric Balletbo i Serra } __ec_align1;
4073840d9f13SEnric Balletbo i Serra 
4074840d9f13SEnric Balletbo i Serra /*****************************************************************************/
40754d2ff655SLukasz Majczak /* AP hang detect */
4076840d9f13SEnric Balletbo i Serra #define EC_CMD_HANG_DETECT 0x009F
4077840d9f13SEnric Balletbo i Serra 
40784d2ff655SLukasz Majczak #define EC_HANG_DETECT_MIN_TIMEOUT 5
40794d2ff655SLukasz Majczak #define EC_HANG_DETECT_MAX_TIMEOUT 65535
4080840d9f13SEnric Balletbo i Serra 
40814d2ff655SLukasz Majczak /* EC hang detect commands */
40824d2ff655SLukasz Majczak enum ec_hang_detect_cmds {
40834d2ff655SLukasz Majczak 	/* Reload AP hang detect timer. */
40844d2ff655SLukasz Majczak 	EC_HANG_DETECT_CMD_RELOAD = 0x0,
4085840d9f13SEnric Balletbo i Serra 
40864d2ff655SLukasz Majczak 	/* Stop AP hang detect timer. */
40874d2ff655SLukasz Majczak 	EC_HANG_DETECT_CMD_CANCEL = 0x1,
4088840d9f13SEnric Balletbo i Serra 
40894d2ff655SLukasz Majczak 	/* Configure watchdog with given reboot timeout and
40904d2ff655SLukasz Majczak 	 * cancel currently running AP hang detect timer.
4091840d9f13SEnric Balletbo i Serra 	 */
40924d2ff655SLukasz Majczak 	EC_HANG_DETECT_CMD_SET_TIMEOUT = 0x2,
4093840d9f13SEnric Balletbo i Serra 
40944d2ff655SLukasz Majczak 	/* Get last hang status - whether the AP boot was clear or not */
40954d2ff655SLukasz Majczak 	EC_HANG_DETECT_CMD_GET_STATUS = 0x3,
40964d2ff655SLukasz Majczak 
40974d2ff655SLukasz Majczak 	/* Clear last hang status. Called when AP is rebooting/shutting down
40984d2ff655SLukasz Majczak 	 * gracefully.
4099840d9f13SEnric Balletbo i Serra 	 */
41004d2ff655SLukasz Majczak 	EC_HANG_DETECT_CMD_CLEAR_STATUS = 0x4
41014d2ff655SLukasz Majczak };
4102840d9f13SEnric Balletbo i Serra 
4103840d9f13SEnric Balletbo i Serra struct ec_params_hang_detect {
41044d2ff655SLukasz Majczak 	uint16_t command; /* enum ec_hang_detect_cmds */
41054d2ff655SLukasz Majczak 	/* Timeout in seconds before generating reboot */
41064d2ff655SLukasz Majczak 	uint16_t reboot_timeout_sec;
41074d2ff655SLukasz Majczak } __ec_align2;
4108840d9f13SEnric Balletbo i Serra 
41094d2ff655SLukasz Majczak /* Status codes that describe whether AP has boot normally or the hang has been
41104d2ff655SLukasz Majczak  * detected and EC has reset AP
41114d2ff655SLukasz Majczak  */
41124d2ff655SLukasz Majczak enum ec_hang_detect_status {
41134d2ff655SLukasz Majczak 	EC_HANG_DETECT_AP_BOOT_NORMAL = 0x0,
41144d2ff655SLukasz Majczak 	EC_HANG_DETECT_AP_BOOT_EC_WDT = 0x1,
41154d2ff655SLukasz Majczak 	EC_HANG_DETECT_AP_BOOT_COUNT,
41164d2ff655SLukasz Majczak };
4117840d9f13SEnric Balletbo i Serra 
41184d2ff655SLukasz Majczak struct ec_response_hang_detect {
41194d2ff655SLukasz Majczak 	uint8_t status; /* enum ec_hang_detect_status */
41204d2ff655SLukasz Majczak } __ec_align1;
4121840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4122840d9f13SEnric Balletbo i Serra /* Commands for battery charging */
4123840d9f13SEnric Balletbo i Serra 
4124840d9f13SEnric Balletbo i Serra /*
4125840d9f13SEnric Balletbo i Serra  * This is the single catch-all host command to exchange data regarding the
4126840d9f13SEnric Balletbo i Serra  * charge state machine (v2 and up).
4127840d9f13SEnric Balletbo i Serra  */
4128840d9f13SEnric Balletbo i Serra #define EC_CMD_CHARGE_STATE 0x00A0
4129840d9f13SEnric Balletbo i Serra 
4130840d9f13SEnric Balletbo i Serra /* Subcommands for this host command */
4131840d9f13SEnric Balletbo i Serra enum charge_state_command {
4132840d9f13SEnric Balletbo i Serra 	CHARGE_STATE_CMD_GET_STATE,
4133840d9f13SEnric Balletbo i Serra 	CHARGE_STATE_CMD_GET_PARAM,
4134840d9f13SEnric Balletbo i Serra 	CHARGE_STATE_CMD_SET_PARAM,
4135840d9f13SEnric Balletbo i Serra 	CHARGE_STATE_NUM_CMDS
4136840d9f13SEnric Balletbo i Serra };
4137840d9f13SEnric Balletbo i Serra 
4138840d9f13SEnric Balletbo i Serra /*
4139840d9f13SEnric Balletbo i Serra  * Known param numbers are defined here. Ranges are reserved for board-specific
4140840d9f13SEnric Balletbo i Serra  * params, which are handled by the particular implementations.
4141840d9f13SEnric Balletbo i Serra  */
4142840d9f13SEnric Balletbo i Serra enum charge_state_params {
4143840d9f13SEnric Balletbo i Serra 	CS_PARAM_CHG_VOLTAGE,	      /* charger voltage limit */
4144840d9f13SEnric Balletbo i Serra 	CS_PARAM_CHG_CURRENT,	      /* charger current limit */
4145840d9f13SEnric Balletbo i Serra 	CS_PARAM_CHG_INPUT_CURRENT,   /* charger input current limit */
4146840d9f13SEnric Balletbo i Serra 	CS_PARAM_CHG_STATUS,	      /* charger-specific status */
4147840d9f13SEnric Balletbo i Serra 	CS_PARAM_CHG_OPTION,	      /* charger-specific options */
4148840d9f13SEnric Balletbo i Serra 	CS_PARAM_LIMIT_POWER,	      /*
4149840d9f13SEnric Balletbo i Serra 				       * Check if power is limited due to
4150840d9f13SEnric Balletbo i Serra 				       * low battery and / or a weak external
4151840d9f13SEnric Balletbo i Serra 				       * charger. READ ONLY.
4152840d9f13SEnric Balletbo i Serra 				       */
4153840d9f13SEnric Balletbo i Serra 	/* How many so far? */
4154840d9f13SEnric Balletbo i Serra 	CS_NUM_BASE_PARAMS,
4155840d9f13SEnric Balletbo i Serra 
4156840d9f13SEnric Balletbo i Serra 	/* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
4157840d9f13SEnric Balletbo i Serra 	CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
4158840d9f13SEnric Balletbo i Serra 	CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
4159840d9f13SEnric Balletbo i Serra 
4160840d9f13SEnric Balletbo i Serra 	/* Range for CONFIG_CHARGE_STATE_DEBUG params */
4161840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_MIN = 0x20000,
4162840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_CTL_MODE = 0x20000,
4163840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_MANUAL_MODE,
4164840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_SEEMS_DEAD,
4165840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_SEEMS_DISCONNECTED,
4166840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_BATT_REMOVED,
4167840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_MANUAL_CURRENT,
4168840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_MANUAL_VOLTAGE,
4169840d9f13SEnric Balletbo i Serra 	CS_PARAM_DEBUG_MAX = 0x2ffff,
4170840d9f13SEnric Balletbo i Serra 
4171840d9f13SEnric Balletbo i Serra 	/* Other custom param ranges go here... */
4172840d9f13SEnric Balletbo i Serra };
4173840d9f13SEnric Balletbo i Serra 
4174840d9f13SEnric Balletbo i Serra struct ec_params_charge_state {
4175840d9f13SEnric Balletbo i Serra 	uint8_t cmd;				/* enum charge_state_command */
4176840d9f13SEnric Balletbo i Serra 	union {
4177840d9f13SEnric Balletbo i Serra 		/* get_state has no args */
4178840d9f13SEnric Balletbo i Serra 
4179840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
4180840d9f13SEnric Balletbo i Serra 			uint32_t param;		/* enum charge_state_param */
4181840d9f13SEnric Balletbo i Serra 		} get_param;
4182840d9f13SEnric Balletbo i Serra 
4183840d9f13SEnric Balletbo i Serra 		struct __ec_todo_unpacked {
4184840d9f13SEnric Balletbo i Serra 			uint32_t param;		/* param to set */
4185840d9f13SEnric Balletbo i Serra 			uint32_t value;		/* value to set */
4186840d9f13SEnric Balletbo i Serra 		} set_param;
4187840d9f13SEnric Balletbo i Serra 	};
4188840d9f13SEnric Balletbo i Serra } __ec_todo_packed;
4189840d9f13SEnric Balletbo i Serra 
4190840d9f13SEnric Balletbo i Serra struct ec_response_charge_state {
4191840d9f13SEnric Balletbo i Serra 	union {
4192840d9f13SEnric Balletbo i Serra 		struct __ec_align4 {
4193840d9f13SEnric Balletbo i Serra 			int ac;
4194840d9f13SEnric Balletbo i Serra 			int chg_voltage;
4195840d9f13SEnric Balletbo i Serra 			int chg_current;
4196840d9f13SEnric Balletbo i Serra 			int chg_input_current;
4197840d9f13SEnric Balletbo i Serra 			int batt_state_of_charge;
4198840d9f13SEnric Balletbo i Serra 		} get_state;
4199840d9f13SEnric Balletbo i Serra 
4200840d9f13SEnric Balletbo i Serra 		struct __ec_align4 {
4201840d9f13SEnric Balletbo i Serra 			uint32_t value;
4202840d9f13SEnric Balletbo i Serra 		} get_param;
4203840d9f13SEnric Balletbo i Serra 
4204840d9f13SEnric Balletbo i Serra 		/* set_param returns no args */
4205840d9f13SEnric Balletbo i Serra 	};
4206840d9f13SEnric Balletbo i Serra } __ec_align4;
4207840d9f13SEnric Balletbo i Serra 
4208840d9f13SEnric Balletbo i Serra 
4209840d9f13SEnric Balletbo i Serra /*
4210840d9f13SEnric Balletbo i Serra  * Set maximum battery charging current.
4211840d9f13SEnric Balletbo i Serra  */
4212840d9f13SEnric Balletbo i Serra #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4213840d9f13SEnric Balletbo i Serra 
4214840d9f13SEnric Balletbo i Serra struct ec_params_current_limit {
4215840d9f13SEnric Balletbo i Serra 	uint32_t limit; /* in mA */
4216840d9f13SEnric Balletbo i Serra } __ec_align4;
4217840d9f13SEnric Balletbo i Serra 
4218840d9f13SEnric Balletbo i Serra /*
4219840d9f13SEnric Balletbo i Serra  * Set maximum external voltage / current.
4220840d9f13SEnric Balletbo i Serra  */
4221840d9f13SEnric Balletbo i Serra #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4222840d9f13SEnric Balletbo i Serra 
4223840d9f13SEnric Balletbo i Serra /* Command v0 is used only on Spring and is obsolete + unsupported */
4224840d9f13SEnric Balletbo i Serra struct ec_params_external_power_limit_v1 {
4225840d9f13SEnric Balletbo i Serra 	uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
4226840d9f13SEnric Balletbo i Serra 	uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
4227840d9f13SEnric Balletbo i Serra } __ec_align2;
4228840d9f13SEnric Balletbo i Serra 
4229840d9f13SEnric Balletbo i Serra #define EC_POWER_LIMIT_NONE 0xffff
4230840d9f13SEnric Balletbo i Serra 
4231840d9f13SEnric Balletbo i Serra /*
4232840d9f13SEnric Balletbo i Serra  * Set maximum voltage & current of a dedicated charge port
4233840d9f13SEnric Balletbo i Serra  */
4234840d9f13SEnric Balletbo i Serra #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4235840d9f13SEnric Balletbo i Serra 
4236840d9f13SEnric Balletbo i Serra struct ec_params_dedicated_charger_limit {
4237840d9f13SEnric Balletbo i Serra 	uint16_t current_lim; /* in mA */
4238840d9f13SEnric Balletbo i Serra 	uint16_t voltage_lim; /* in mV */
4239840d9f13SEnric Balletbo i Serra } __ec_align2;
4240840d9f13SEnric Balletbo i Serra 
4241840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4242840d9f13SEnric Balletbo i Serra /* Hibernate/Deep Sleep Commands */
4243840d9f13SEnric Balletbo i Serra 
4244840d9f13SEnric Balletbo i Serra /* Set the delay before going into hibernation. */
4245840d9f13SEnric Balletbo i Serra #define EC_CMD_HIBERNATION_DELAY 0x00A8
4246840d9f13SEnric Balletbo i Serra 
4247840d9f13SEnric Balletbo i Serra struct ec_params_hibernation_delay {
4248840d9f13SEnric Balletbo i Serra 	/*
4249840d9f13SEnric Balletbo i Serra 	 * Seconds to wait in G3 before hibernate.  Pass in 0 to read the
4250840d9f13SEnric Balletbo i Serra 	 * current settings without changing them.
4251840d9f13SEnric Balletbo i Serra 	 */
4252840d9f13SEnric Balletbo i Serra 	uint32_t seconds;
4253840d9f13SEnric Balletbo i Serra } __ec_align4;
4254840d9f13SEnric Balletbo i Serra 
4255840d9f13SEnric Balletbo i Serra struct ec_response_hibernation_delay {
4256840d9f13SEnric Balletbo i Serra 	/*
4257840d9f13SEnric Balletbo i Serra 	 * The current time in seconds in which the system has been in the G3
4258840d9f13SEnric Balletbo i Serra 	 * state.  This value is reset if the EC transitions out of G3.
4259840d9f13SEnric Balletbo i Serra 	 */
4260840d9f13SEnric Balletbo i Serra 	uint32_t time_g3;
4261840d9f13SEnric Balletbo i Serra 
4262840d9f13SEnric Balletbo i Serra 	/*
4263840d9f13SEnric Balletbo i Serra 	 * The current time remaining in seconds until the EC should hibernate.
4264840d9f13SEnric Balletbo i Serra 	 * This value is also reset if the EC transitions out of G3.
4265840d9f13SEnric Balletbo i Serra 	 */
4266840d9f13SEnric Balletbo i Serra 	uint32_t time_remaining;
4267840d9f13SEnric Balletbo i Serra 
4268840d9f13SEnric Balletbo i Serra 	/*
4269840d9f13SEnric Balletbo i Serra 	 * The current time in seconds that the EC should wait in G3 before
4270840d9f13SEnric Balletbo i Serra 	 * hibernating.
4271840d9f13SEnric Balletbo i Serra 	 */
4272840d9f13SEnric Balletbo i Serra 	uint32_t hibernate_delay;
4273840d9f13SEnric Balletbo i Serra } __ec_align4;
4274840d9f13SEnric Balletbo i Serra 
4275840d9f13SEnric Balletbo i Serra /* Inform the EC when entering a sleep state */
4276840d9f13SEnric Balletbo i Serra #define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4277840d9f13SEnric Balletbo i Serra 
4278840d9f13SEnric Balletbo i Serra enum host_sleep_event {
4279840d9f13SEnric Balletbo i Serra 	HOST_SLEEP_EVENT_S3_SUSPEND   = 1,
4280840d9f13SEnric Balletbo i Serra 	HOST_SLEEP_EVENT_S3_RESUME    = 2,
4281840d9f13SEnric Balletbo i Serra 	HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
4282840d9f13SEnric Balletbo i Serra 	HOST_SLEEP_EVENT_S0IX_RESUME  = 4,
4283840d9f13SEnric Balletbo i Serra 	/* S3 suspend with additional enabled wake sources */
4284840d9f13SEnric Balletbo i Serra 	HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5,
4285840d9f13SEnric Balletbo i Serra };
4286840d9f13SEnric Balletbo i Serra 
4287840d9f13SEnric Balletbo i Serra struct ec_params_host_sleep_event {
4288840d9f13SEnric Balletbo i Serra 	uint8_t sleep_event;
4289840d9f13SEnric Balletbo i Serra } __ec_align1;
4290840d9f13SEnric Balletbo i Serra 
4291840d9f13SEnric Balletbo i Serra /*
4292840d9f13SEnric Balletbo i Serra  * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep
4293840d9f13SEnric Balletbo i Serra  * transition failures
4294840d9f13SEnric Balletbo i Serra  */
4295840d9f13SEnric Balletbo i Serra #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4296840d9f13SEnric Balletbo i Serra 
4297840d9f13SEnric Balletbo i Serra /* Disable timeout detection for this sleep transition */
4298840d9f13SEnric Balletbo i Serra #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4299840d9f13SEnric Balletbo i Serra 
4300840d9f13SEnric Balletbo i Serra struct ec_params_host_sleep_event_v1 {
4301840d9f13SEnric Balletbo i Serra 	/* The type of sleep being entered or exited. */
4302840d9f13SEnric Balletbo i Serra 	uint8_t sleep_event;
4303840d9f13SEnric Balletbo i Serra 
4304840d9f13SEnric Balletbo i Serra 	/* Padding */
4305840d9f13SEnric Balletbo i Serra 	uint8_t reserved;
4306840d9f13SEnric Balletbo i Serra 	union {
4307840d9f13SEnric Balletbo i Serra 		/* Parameters that apply for suspend messages. */
4308840d9f13SEnric Balletbo i Serra 		struct {
4309840d9f13SEnric Balletbo i Serra 			/*
4310840d9f13SEnric Balletbo i Serra 			 * The timeout in milliseconds between when this message
4311840d9f13SEnric Balletbo i Serra 			 * is received and when the EC will declare sleep
4312840d9f13SEnric Balletbo i Serra 			 * transition failure if the sleep signal is not
4313840d9f13SEnric Balletbo i Serra 			 * asserted.
4314840d9f13SEnric Balletbo i Serra 			 */
4315840d9f13SEnric Balletbo i Serra 			uint16_t sleep_timeout_ms;
4316840d9f13SEnric Balletbo i Serra 		} suspend_params;
4317840d9f13SEnric Balletbo i Serra 
4318840d9f13SEnric Balletbo i Serra 		/* No parameters for non-suspend messages. */
4319840d9f13SEnric Balletbo i Serra 	};
4320840d9f13SEnric Balletbo i Serra } __ec_align2;
4321840d9f13SEnric Balletbo i Serra 
4322840d9f13SEnric Balletbo i Serra /* A timeout occurred when this bit is set */
4323840d9f13SEnric Balletbo i Serra #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4324840d9f13SEnric Balletbo i Serra 
4325840d9f13SEnric Balletbo i Serra /*
4326840d9f13SEnric Balletbo i Serra  * The mask defining which bits correspond to the number of sleep transitions,
4327840d9f13SEnric Balletbo i Serra  * as well as the maximum number of suspend line transitions that will be
4328840d9f13SEnric Balletbo i Serra  * reported back to the host.
4329840d9f13SEnric Balletbo i Serra  */
4330840d9f13SEnric Balletbo i Serra #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4331840d9f13SEnric Balletbo i Serra 
4332840d9f13SEnric Balletbo i Serra struct ec_response_host_sleep_event_v1 {
4333840d9f13SEnric Balletbo i Serra 	union {
4334840d9f13SEnric Balletbo i Serra 		/* Response fields that apply for resume messages. */
4335840d9f13SEnric Balletbo i Serra 		struct {
4336840d9f13SEnric Balletbo i Serra 			/*
4337840d9f13SEnric Balletbo i Serra 			 * The number of sleep power signal transitions that
4338840d9f13SEnric Balletbo i Serra 			 * occurred since the suspend message. The high bit
4339840d9f13SEnric Balletbo i Serra 			 * indicates a timeout occurred.
4340840d9f13SEnric Balletbo i Serra 			 */
4341840d9f13SEnric Balletbo i Serra 			uint32_t sleep_transitions;
4342840d9f13SEnric Balletbo i Serra 		} resume_response;
4343840d9f13SEnric Balletbo i Serra 
4344840d9f13SEnric Balletbo i Serra 		/* No response fields for non-resume messages. */
4345840d9f13SEnric Balletbo i Serra 	};
4346840d9f13SEnric Balletbo i Serra } __ec_align4;
4347840d9f13SEnric Balletbo i Serra 
4348840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4349840d9f13SEnric Balletbo i Serra /* Device events */
4350840d9f13SEnric Balletbo i Serra #define EC_CMD_DEVICE_EVENT 0x00AA
4351840d9f13SEnric Balletbo i Serra 
4352840d9f13SEnric Balletbo i Serra enum ec_device_event {
4353840d9f13SEnric Balletbo i Serra 	EC_DEVICE_EVENT_TRACKPAD,
4354840d9f13SEnric Balletbo i Serra 	EC_DEVICE_EVENT_DSP,
4355840d9f13SEnric Balletbo i Serra 	EC_DEVICE_EVENT_WIFI,
435656d629afSDaisuke Nojiri 	EC_DEVICE_EVENT_WLC,
4357840d9f13SEnric Balletbo i Serra };
4358840d9f13SEnric Balletbo i Serra 
4359840d9f13SEnric Balletbo i Serra enum ec_device_event_param {
4360840d9f13SEnric Balletbo i Serra 	/* Get and clear pending device events */
4361840d9f13SEnric Balletbo i Serra 	EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
4362840d9f13SEnric Balletbo i Serra 	/* Get device event mask */
4363840d9f13SEnric Balletbo i Serra 	EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
4364840d9f13SEnric Balletbo i Serra 	/* Set device event mask */
4365840d9f13SEnric Balletbo i Serra 	EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
4366840d9f13SEnric Balletbo i Serra };
4367840d9f13SEnric Balletbo i Serra 
4368840d9f13SEnric Balletbo i Serra #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
4369840d9f13SEnric Balletbo i Serra 
4370840d9f13SEnric Balletbo i Serra struct ec_params_device_event {
4371840d9f13SEnric Balletbo i Serra 	uint32_t event_mask;
4372840d9f13SEnric Balletbo i Serra 	uint8_t param;
4373840d9f13SEnric Balletbo i Serra } __ec_align_size1;
4374840d9f13SEnric Balletbo i Serra 
4375840d9f13SEnric Balletbo i Serra struct ec_response_device_event {
4376840d9f13SEnric Balletbo i Serra 	uint32_t event_mask;
4377840d9f13SEnric Balletbo i Serra } __ec_align4;
4378840d9f13SEnric Balletbo i Serra 
4379840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4380840d9f13SEnric Balletbo i Serra /* Smart battery pass-through */
4381840d9f13SEnric Balletbo i Serra 
4382840d9f13SEnric Balletbo i Serra /* Get / Set 16-bit smart battery registers */
4383840d9f13SEnric Balletbo i Serra #define EC_CMD_SB_READ_WORD   0x00B0
4384840d9f13SEnric Balletbo i Serra #define EC_CMD_SB_WRITE_WORD  0x00B1
4385840d9f13SEnric Balletbo i Serra 
4386840d9f13SEnric Balletbo i Serra /* Get / Set string smart battery parameters
4387840d9f13SEnric Balletbo i Serra  * formatted as SMBUS "block".
4388840d9f13SEnric Balletbo i Serra  */
4389840d9f13SEnric Balletbo i Serra #define EC_CMD_SB_READ_BLOCK  0x00B2
4390840d9f13SEnric Balletbo i Serra #define EC_CMD_SB_WRITE_BLOCK 0x00B3
4391840d9f13SEnric Balletbo i Serra 
4392840d9f13SEnric Balletbo i Serra struct ec_params_sb_rd {
4393840d9f13SEnric Balletbo i Serra 	uint8_t reg;
4394840d9f13SEnric Balletbo i Serra } __ec_align1;
4395840d9f13SEnric Balletbo i Serra 
4396840d9f13SEnric Balletbo i Serra struct ec_response_sb_rd_word {
4397840d9f13SEnric Balletbo i Serra 	uint16_t value;
4398840d9f13SEnric Balletbo i Serra } __ec_align2;
4399840d9f13SEnric Balletbo i Serra 
4400840d9f13SEnric Balletbo i Serra struct ec_params_sb_wr_word {
4401840d9f13SEnric Balletbo i Serra 	uint8_t reg;
4402840d9f13SEnric Balletbo i Serra 	uint16_t value;
4403840d9f13SEnric Balletbo i Serra } __ec_align1;
4404840d9f13SEnric Balletbo i Serra 
4405840d9f13SEnric Balletbo i Serra struct ec_response_sb_rd_block {
4406840d9f13SEnric Balletbo i Serra 	uint8_t data[32];
4407840d9f13SEnric Balletbo i Serra } __ec_align1;
4408840d9f13SEnric Balletbo i Serra 
4409840d9f13SEnric Balletbo i Serra struct ec_params_sb_wr_block {
4410840d9f13SEnric Balletbo i Serra 	uint8_t reg;
4411840d9f13SEnric Balletbo i Serra 	uint16_t data[32];
4412840d9f13SEnric Balletbo i Serra } __ec_align1;
4413840d9f13SEnric Balletbo i Serra 
4414840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4415840d9f13SEnric Balletbo i Serra /* Battery vendor parameters
4416840d9f13SEnric Balletbo i Serra  *
4417840d9f13SEnric Balletbo i Serra  * Get or set vendor-specific parameters in the battery. Implementations may
4418840d9f13SEnric Balletbo i Serra  * differ between boards or batteries. On a set operation, the response
4419840d9f13SEnric Balletbo i Serra  * contains the actual value set, which may be rounded or clipped from the
4420840d9f13SEnric Balletbo i Serra  * requested value.
4421840d9f13SEnric Balletbo i Serra  */
4422840d9f13SEnric Balletbo i Serra 
4423840d9f13SEnric Balletbo i Serra #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
4424840d9f13SEnric Balletbo i Serra 
4425840d9f13SEnric Balletbo i Serra enum ec_battery_vendor_param_mode {
4426840d9f13SEnric Balletbo i Serra 	BATTERY_VENDOR_PARAM_MODE_GET = 0,
4427840d9f13SEnric Balletbo i Serra 	BATTERY_VENDOR_PARAM_MODE_SET,
4428840d9f13SEnric Balletbo i Serra };
4429840d9f13SEnric Balletbo i Serra 
4430840d9f13SEnric Balletbo i Serra struct ec_params_battery_vendor_param {
4431840d9f13SEnric Balletbo i Serra 	uint32_t param;
4432840d9f13SEnric Balletbo i Serra 	uint32_t value;
4433840d9f13SEnric Balletbo i Serra 	uint8_t mode;
4434840d9f13SEnric Balletbo i Serra } __ec_align_size1;
4435840d9f13SEnric Balletbo i Serra 
4436840d9f13SEnric Balletbo i Serra struct ec_response_battery_vendor_param {
4437840d9f13SEnric Balletbo i Serra 	uint32_t value;
4438840d9f13SEnric Balletbo i Serra } __ec_align4;
4439840d9f13SEnric Balletbo i Serra 
4440840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4441840d9f13SEnric Balletbo i Serra /*
4442840d9f13SEnric Balletbo i Serra  * Smart Battery Firmware Update Commands
4443840d9f13SEnric Balletbo i Serra  */
4444840d9f13SEnric Balletbo i Serra #define EC_CMD_SB_FW_UPDATE 0x00B5
4445840d9f13SEnric Balletbo i Serra 
4446840d9f13SEnric Balletbo i Serra enum ec_sb_fw_update_subcmd {
4447840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_PREPARE  = 0x0,
4448840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_INFO     = 0x1, /*query sb info */
4449840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_BEGIN    = 0x2, /*check if protected */
4450840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_WRITE    = 0x3, /*check if protected */
4451840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_END      = 0x4,
4452840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_STATUS   = 0x5,
4453840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_PROTECT  = 0x6,
4454840d9f13SEnric Balletbo i Serra 	EC_SB_FW_UPDATE_MAX      = 0x7,
4455840d9f13SEnric Balletbo i Serra };
4456840d9f13SEnric Balletbo i Serra 
4457840d9f13SEnric Balletbo i Serra #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
4458840d9f13SEnric Balletbo i Serra #define SB_FW_UPDATE_CMD_STATUS_SIZE 2
4459840d9f13SEnric Balletbo i Serra #define SB_FW_UPDATE_CMD_INFO_SIZE 8
4460840d9f13SEnric Balletbo i Serra 
4461840d9f13SEnric Balletbo i Serra struct ec_sb_fw_update_header {
4462840d9f13SEnric Balletbo i Serra 	uint16_t subcmd;  /* enum ec_sb_fw_update_subcmd */
4463840d9f13SEnric Balletbo i Serra 	uint16_t fw_id;   /* firmware id */
4464840d9f13SEnric Balletbo i Serra } __ec_align4;
4465840d9f13SEnric Balletbo i Serra 
4466840d9f13SEnric Balletbo i Serra struct ec_params_sb_fw_update {
4467840d9f13SEnric Balletbo i Serra 	struct ec_sb_fw_update_header hdr;
4468840d9f13SEnric Balletbo i Serra 	union {
4469840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_PREPARE  = 0x0 */
4470840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_INFO     = 0x1 */
4471840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_BEGIN    = 0x2 */
4472840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_END      = 0x4 */
4473840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_STATUS   = 0x5 */
4474840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_PROTECT  = 0x6 */
4475840d9f13SEnric Balletbo i Serra 		/* Those have no args */
4476840d9f13SEnric Balletbo i Serra 
4477840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_WRITE    = 0x3 */
4478840d9f13SEnric Balletbo i Serra 		struct __ec_align4 {
4479840d9f13SEnric Balletbo i Serra 			uint8_t  data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
4480840d9f13SEnric Balletbo i Serra 		} write;
4481840d9f13SEnric Balletbo i Serra 	};
4482840d9f13SEnric Balletbo i Serra } __ec_align4;
4483840d9f13SEnric Balletbo i Serra 
4484840d9f13SEnric Balletbo i Serra struct ec_response_sb_fw_update {
4485840d9f13SEnric Balletbo i Serra 	union {
4486840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_INFO     = 0x1 */
4487840d9f13SEnric Balletbo i Serra 		struct __ec_align1 {
4488840d9f13SEnric Balletbo i Serra 			uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
4489840d9f13SEnric Balletbo i Serra 		} info;
4490840d9f13SEnric Balletbo i Serra 
4491840d9f13SEnric Balletbo i Serra 		/* EC_SB_FW_UPDATE_STATUS   = 0x5 */
4492840d9f13SEnric Balletbo i Serra 		struct __ec_align1 {
4493840d9f13SEnric Balletbo i Serra 			uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
4494840d9f13SEnric Balletbo i Serra 		} status;
4495840d9f13SEnric Balletbo i Serra 	};
4496840d9f13SEnric Balletbo i Serra } __ec_align1;
4497840d9f13SEnric Balletbo i Serra 
4498840d9f13SEnric Balletbo i Serra /*
4499840d9f13SEnric Balletbo i Serra  * Entering Verified Boot Mode Command
4500840d9f13SEnric Balletbo i Serra  * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
4501840d9f13SEnric Balletbo i Serra  * Valid Modes are: normal, developer, and recovery.
4502840d9f13SEnric Balletbo i Serra  */
4503840d9f13SEnric Balletbo i Serra #define EC_CMD_ENTERING_MODE 0x00B6
4504840d9f13SEnric Balletbo i Serra 
4505840d9f13SEnric Balletbo i Serra struct ec_params_entering_mode {
4506840d9f13SEnric Balletbo i Serra 	int vboot_mode;
4507840d9f13SEnric Balletbo i Serra } __ec_align4;
4508840d9f13SEnric Balletbo i Serra 
4509840d9f13SEnric Balletbo i Serra #define VBOOT_MODE_NORMAL    0
4510840d9f13SEnric Balletbo i Serra #define VBOOT_MODE_DEVELOPER 1
4511840d9f13SEnric Balletbo i Serra #define VBOOT_MODE_RECOVERY  2
4512840d9f13SEnric Balletbo i Serra 
4513840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4514840d9f13SEnric Balletbo i Serra /*
4515840d9f13SEnric Balletbo i Serra  * I2C passthru protection command: Protects I2C tunnels against access on
4516840d9f13SEnric Balletbo i Serra  * certain addresses (board-specific).
4517840d9f13SEnric Balletbo i Serra  */
4518840d9f13SEnric Balletbo i Serra #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
4519840d9f13SEnric Balletbo i Serra 
4520840d9f13SEnric Balletbo i Serra enum ec_i2c_passthru_protect_subcmd {
4521840d9f13SEnric Balletbo i Serra 	EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
4522840d9f13SEnric Balletbo i Serra 	EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
4523840d9f13SEnric Balletbo i Serra };
4524840d9f13SEnric Balletbo i Serra 
4525840d9f13SEnric Balletbo i Serra struct ec_params_i2c_passthru_protect {
4526840d9f13SEnric Balletbo i Serra 	uint8_t subcmd;
4527840d9f13SEnric Balletbo i Serra 	uint8_t port;		/* I2C port number */
4528840d9f13SEnric Balletbo i Serra } __ec_align1;
4529840d9f13SEnric Balletbo i Serra 
4530840d9f13SEnric Balletbo i Serra struct ec_response_i2c_passthru_protect {
4531840d9f13SEnric Balletbo i Serra 	uint8_t status;		/* Status flags (0: unlocked, 1: locked) */
4532840d9f13SEnric Balletbo i Serra } __ec_align1;
4533840d9f13SEnric Balletbo i Serra 
4534840d9f13SEnric Balletbo i Serra 
4535840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4536840d9f13SEnric Balletbo i Serra /*
4537840d9f13SEnric Balletbo i Serra  * HDMI CEC commands
4538840d9f13SEnric Balletbo i Serra  *
4539840d9f13SEnric Balletbo i Serra  * These commands are for sending and receiving message via HDMI CEC
4540840d9f13SEnric Balletbo i Serra  */
4541840d9f13SEnric Balletbo i Serra 
45424d0e179aSReka Norman #define EC_CEC_MAX_PORTS 16
45434d0e179aSReka Norman 
4544840d9f13SEnric Balletbo i Serra #define MAX_CEC_MSG_LEN 16
4545840d9f13SEnric Balletbo i Serra 
45461cabf526SReka Norman /*
45471cabf526SReka Norman  * Helper macros for packing/unpacking cec_events.
45481cabf526SReka Norman  * bits[27:0] : bitmask of events from enum mkbp_cec_event
45491cabf526SReka Norman  * bits[31:28]: port number
45501cabf526SReka Norman  */
45511cabf526SReka Norman #define EC_MKBP_EVENT_CEC_PACK(events, port) \
45521cabf526SReka Norman 		(((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28))
45531cabf526SReka Norman #define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0))
45541cabf526SReka Norman #define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf)
45551cabf526SReka Norman 
4556840d9f13SEnric Balletbo i Serra /* CEC message from the AP to be written on the CEC bus */
4557840d9f13SEnric Balletbo i Serra #define EC_CMD_CEC_WRITE_MSG 0x00B8
4558840d9f13SEnric Balletbo i Serra 
4559840d9f13SEnric Balletbo i Serra /**
4560840d9f13SEnric Balletbo i Serra  * struct ec_params_cec_write - Message to write to the CEC bus
4561840d9f13SEnric Balletbo i Serra  * @msg: message content to write to the CEC bus
4562840d9f13SEnric Balletbo i Serra  */
4563840d9f13SEnric Balletbo i Serra struct ec_params_cec_write {
4564840d9f13SEnric Balletbo i Serra 	uint8_t msg[MAX_CEC_MSG_LEN];
4565840d9f13SEnric Balletbo i Serra } __ec_align1;
4566840d9f13SEnric Balletbo i Serra 
4567adbfc747SReka Norman /**
4568adbfc747SReka Norman  * struct ec_params_cec_write_v1 - Message to write to the CEC bus
4569adbfc747SReka Norman  * @port: CEC port to write the message on
4570adbfc747SReka Norman  * @msg_len: length of msg in bytes
4571adbfc747SReka Norman  * @msg: message content to write to the CEC bus
4572adbfc747SReka Norman  */
4573adbfc747SReka Norman struct ec_params_cec_write_v1 {
4574adbfc747SReka Norman 	uint8_t port;
4575adbfc747SReka Norman 	uint8_t msg_len;
4576adbfc747SReka Norman 	uint8_t msg[MAX_CEC_MSG_LEN];
4577adbfc747SReka Norman } __ec_align1;
4578adbfc747SReka Norman 
4579425d2051SReka Norman /* CEC message read from a CEC bus reported back to the AP */
4580425d2051SReka Norman #define EC_CMD_CEC_READ_MSG 0x00B9
4581425d2051SReka Norman 
4582425d2051SReka Norman /**
4583425d2051SReka Norman  * struct ec_params_cec_read - Read a message from the CEC bus
4584425d2051SReka Norman  * @port: CEC port to read a message on
4585425d2051SReka Norman  */
4586425d2051SReka Norman struct ec_params_cec_read {
4587425d2051SReka Norman 	uint8_t port;
4588425d2051SReka Norman } __ec_align1;
4589425d2051SReka Norman 
4590425d2051SReka Norman /**
4591425d2051SReka Norman  * struct ec_response_cec_read - Message read from the CEC bus
4592425d2051SReka Norman  * @msg_len: length of msg in bytes
4593425d2051SReka Norman  * @msg: message content read from the CEC bus
4594425d2051SReka Norman  */
4595425d2051SReka Norman struct ec_response_cec_read {
4596425d2051SReka Norman 	uint8_t msg_len;
4597425d2051SReka Norman 	uint8_t msg[MAX_CEC_MSG_LEN];
4598425d2051SReka Norman } __ec_align1;
4599425d2051SReka Norman 
4600840d9f13SEnric Balletbo i Serra /* Set various CEC parameters */
4601840d9f13SEnric Balletbo i Serra #define EC_CMD_CEC_SET 0x00BA
4602840d9f13SEnric Balletbo i Serra 
4603840d9f13SEnric Balletbo i Serra /**
4604840d9f13SEnric Balletbo i Serra  * struct ec_params_cec_set - CEC parameters set
4605840d9f13SEnric Balletbo i Serra  * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4606e90bd1feSReka Norman  * @port: CEC port to set the parameter on
4607840d9f13SEnric Balletbo i Serra  * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
4608840d9f13SEnric Balletbo i Serra  *	or 1 to enable CEC functionality, in case cmd is
4609840d9f13SEnric Balletbo i Serra  *	CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical
4610840d9f13SEnric Balletbo i Serra  *	address between 0 and 15 or 0xff to unregister
4611840d9f13SEnric Balletbo i Serra  */
4612840d9f13SEnric Balletbo i Serra struct ec_params_cec_set {
4613e90bd1feSReka Norman 	uint8_t cmd : 4; /* enum cec_command */
4614e90bd1feSReka Norman 	uint8_t port : 4;
4615840d9f13SEnric Balletbo i Serra 	uint8_t val;
4616840d9f13SEnric Balletbo i Serra } __ec_align1;
4617840d9f13SEnric Balletbo i Serra 
4618840d9f13SEnric Balletbo i Serra /* Read various CEC parameters */
4619840d9f13SEnric Balletbo i Serra #define EC_CMD_CEC_GET 0x00BB
4620840d9f13SEnric Balletbo i Serra 
4621840d9f13SEnric Balletbo i Serra /**
4622840d9f13SEnric Balletbo i Serra  * struct ec_params_cec_get - CEC parameters get
4623840d9f13SEnric Balletbo i Serra  * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4624e90bd1feSReka Norman  * @port: CEC port to get the parameter on
4625840d9f13SEnric Balletbo i Serra  */
4626840d9f13SEnric Balletbo i Serra struct ec_params_cec_get {
4627e90bd1feSReka Norman 	uint8_t cmd : 4; /* enum cec_command */
4628e90bd1feSReka Norman 	uint8_t port : 4;
4629840d9f13SEnric Balletbo i Serra } __ec_align1;
4630840d9f13SEnric Balletbo i Serra 
4631840d9f13SEnric Balletbo i Serra /**
4632840d9f13SEnric Balletbo i Serra  * struct ec_response_cec_get - CEC parameters get response
4633840d9f13SEnric Balletbo i Serra  * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
4634840d9f13SEnric Balletbo i Serra  *	disabled or 1 if CEC functionality is enabled,
4635840d9f13SEnric Balletbo i Serra  *	in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the
4636840d9f13SEnric Balletbo i Serra  *	configured logical address between 0 and 15 or 0xff if unregistered
4637840d9f13SEnric Balletbo i Serra  */
4638840d9f13SEnric Balletbo i Serra struct ec_response_cec_get {
4639840d9f13SEnric Balletbo i Serra 	uint8_t val;
4640840d9f13SEnric Balletbo i Serra } __ec_align1;
4641840d9f13SEnric Balletbo i Serra 
46425d227f02SReka Norman /* Get the number of CEC ports */
46435d227f02SReka Norman #define EC_CMD_CEC_PORT_COUNT 0x00C1
46445d227f02SReka Norman 
46455d227f02SReka Norman /**
46465d227f02SReka Norman  * struct ec_response_cec_port_count - CEC port count response
46475d227f02SReka Norman  * @port_count: number of CEC ports
46485d227f02SReka Norman  */
46495d227f02SReka Norman struct ec_response_cec_port_count {
46505d227f02SReka Norman 	uint8_t port_count;
46515d227f02SReka Norman } __ec_align1;
46525d227f02SReka Norman 
4653840d9f13SEnric Balletbo i Serra /* CEC parameters command */
4654840d9f13SEnric Balletbo i Serra enum cec_command {
4655840d9f13SEnric Balletbo i Serra 	/* CEC reading, writing and events enable */
4656840d9f13SEnric Balletbo i Serra 	CEC_CMD_ENABLE,
4657840d9f13SEnric Balletbo i Serra 	/* CEC logical address  */
4658840d9f13SEnric Balletbo i Serra 	CEC_CMD_LOGICAL_ADDRESS,
4659840d9f13SEnric Balletbo i Serra };
4660840d9f13SEnric Balletbo i Serra 
4661840d9f13SEnric Balletbo i Serra /* Events from CEC to AP */
4662840d9f13SEnric Balletbo i Serra enum mkbp_cec_event {
4663840d9f13SEnric Balletbo i Serra 	/* Outgoing message was acknowledged by a follower */
4664840d9f13SEnric Balletbo i Serra 	EC_MKBP_CEC_SEND_OK			= BIT(0),
4665840d9f13SEnric Balletbo i Serra 	/* Outgoing message was not acknowledged */
4666840d9f13SEnric Balletbo i Serra 	EC_MKBP_CEC_SEND_FAILED			= BIT(1),
4667425d2051SReka Norman 	/* Incoming message can be read out by AP */
4668425d2051SReka Norman 	EC_MKBP_CEC_HAVE_DATA			= BIT(2),
4669840d9f13SEnric Balletbo i Serra };
4670840d9f13SEnric Balletbo i Serra 
4671840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4672840d9f13SEnric Balletbo i Serra 
4673104c6f8fSTzung-Bi Shih /* Commands for audio codec. */
4674104c6f8fSTzung-Bi Shih #define EC_CMD_EC_CODEC 0x00BC
4675104c6f8fSTzung-Bi Shih 
4676104c6f8fSTzung-Bi Shih enum ec_codec_subcmd {
4677104c6f8fSTzung-Bi Shih 	EC_CODEC_GET_CAPABILITIES = 0x0,
4678104c6f8fSTzung-Bi Shih 	EC_CODEC_GET_SHM_ADDR = 0x1,
4679104c6f8fSTzung-Bi Shih 	EC_CODEC_SET_SHM_ADDR = 0x2,
4680104c6f8fSTzung-Bi Shih 	EC_CODEC_SUBCMD_COUNT,
4681104c6f8fSTzung-Bi Shih };
4682104c6f8fSTzung-Bi Shih 
4683104c6f8fSTzung-Bi Shih enum ec_codec_cap {
4684b6bc07d4STzung-Bi Shih 	EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
4685b6bc07d4STzung-Bi Shih 	EC_CODEC_CAP_WOV_LANG_SHM = 1,
4686104c6f8fSTzung-Bi Shih 	EC_CODEC_CAP_LAST = 32,
4687104c6f8fSTzung-Bi Shih };
4688104c6f8fSTzung-Bi Shih 
4689104c6f8fSTzung-Bi Shih enum ec_codec_shm_id {
4690b6bc07d4STzung-Bi Shih 	EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
4691b6bc07d4STzung-Bi Shih 	EC_CODEC_SHM_ID_WOV_LANG = 0x1,
4692104c6f8fSTzung-Bi Shih 	EC_CODEC_SHM_ID_LAST,
4693104c6f8fSTzung-Bi Shih };
4694104c6f8fSTzung-Bi Shih 
4695104c6f8fSTzung-Bi Shih enum ec_codec_shm_type {
4696104c6f8fSTzung-Bi Shih 	EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
4697104c6f8fSTzung-Bi Shih 	EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
4698104c6f8fSTzung-Bi Shih };
4699104c6f8fSTzung-Bi Shih 
4700104c6f8fSTzung-Bi Shih struct __ec_align1 ec_param_ec_codec_get_shm_addr {
4701104c6f8fSTzung-Bi Shih 	uint8_t shm_id;
4702104c6f8fSTzung-Bi Shih 	uint8_t reserved[3];
4703104c6f8fSTzung-Bi Shih };
4704104c6f8fSTzung-Bi Shih 
4705104c6f8fSTzung-Bi Shih struct __ec_align4 ec_param_ec_codec_set_shm_addr {
4706104c6f8fSTzung-Bi Shih 	uint64_t phys_addr;
4707104c6f8fSTzung-Bi Shih 	uint32_t len;
4708104c6f8fSTzung-Bi Shih 	uint8_t shm_id;
4709104c6f8fSTzung-Bi Shih 	uint8_t reserved[3];
4710104c6f8fSTzung-Bi Shih };
4711104c6f8fSTzung-Bi Shih 
4712104c6f8fSTzung-Bi Shih struct __ec_align4 ec_param_ec_codec {
4713104c6f8fSTzung-Bi Shih 	uint8_t cmd; /* enum ec_codec_subcmd */
4714104c6f8fSTzung-Bi Shih 	uint8_t reserved[3];
4715104c6f8fSTzung-Bi Shih 
4716104c6f8fSTzung-Bi Shih 	union {
4717104c6f8fSTzung-Bi Shih 		struct ec_param_ec_codec_get_shm_addr
4718104c6f8fSTzung-Bi Shih 				get_shm_addr_param;
4719104c6f8fSTzung-Bi Shih 		struct ec_param_ec_codec_set_shm_addr
4720104c6f8fSTzung-Bi Shih 				set_shm_addr_param;
4721104c6f8fSTzung-Bi Shih 	};
4722104c6f8fSTzung-Bi Shih };
4723104c6f8fSTzung-Bi Shih 
4724104c6f8fSTzung-Bi Shih struct __ec_align4 ec_response_ec_codec_get_capabilities {
4725104c6f8fSTzung-Bi Shih 	uint32_t capabilities;
4726104c6f8fSTzung-Bi Shih };
4727104c6f8fSTzung-Bi Shih 
4728104c6f8fSTzung-Bi Shih struct __ec_align4 ec_response_ec_codec_get_shm_addr {
4729104c6f8fSTzung-Bi Shih 	uint64_t phys_addr;
4730104c6f8fSTzung-Bi Shih 	uint32_t len;
4731104c6f8fSTzung-Bi Shih 	uint8_t type;
4732104c6f8fSTzung-Bi Shih 	uint8_t reserved[3];
4733104c6f8fSTzung-Bi Shih };
4734104c6f8fSTzung-Bi Shih 
4735104c6f8fSTzung-Bi Shih /*****************************************************************************/
4736104c6f8fSTzung-Bi Shih 
47378f731d4cSTzung-Bi Shih /* Commands for DMIC on audio codec. */
4738104c6f8fSTzung-Bi Shih #define EC_CMD_EC_CODEC_DMIC 0x00BD
47398f731d4cSTzung-Bi Shih 
47408f731d4cSTzung-Bi Shih enum ec_codec_dmic_subcmd {
4741f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
4742f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
4743f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
47448f731d4cSTzung-Bi Shih 	EC_CODEC_DMIC_SUBCMD_COUNT,
47458f731d4cSTzung-Bi Shih };
47468f731d4cSTzung-Bi Shih 
4747f3e82ad4STzung-Bi Shih enum ec_codec_dmic_channel {
4748f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_0 = 0x0,
4749f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_1 = 0x1,
4750f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_2 = 0x2,
4751f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_3 = 0x3,
4752f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_4 = 0x4,
4753f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_5 = 0x5,
4754f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_6 = 0x6,
4755f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_7 = 0x7,
4756f3e82ad4STzung-Bi Shih 	EC_CODEC_DMIC_CHANNEL_COUNT,
4757f3e82ad4STzung-Bi Shih };
4758f3e82ad4STzung-Bi Shih 
4759f3e82ad4STzung-Bi Shih struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
4760f3e82ad4STzung-Bi Shih 	uint8_t channel; /* enum ec_codec_dmic_channel */
4761f3e82ad4STzung-Bi Shih 	uint8_t gain;
47628f731d4cSTzung-Bi Shih 	uint8_t reserved[2];
47638f731d4cSTzung-Bi Shih };
47648f731d4cSTzung-Bi Shih 
4765f3e82ad4STzung-Bi Shih struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
4766f3e82ad4STzung-Bi Shih 	uint8_t channel; /* enum ec_codec_dmic_channel */
4767f3e82ad4STzung-Bi Shih 	uint8_t reserved[3];
4768f3e82ad4STzung-Bi Shih };
4769f3e82ad4STzung-Bi Shih 
47708f731d4cSTzung-Bi Shih struct __ec_align4 ec_param_ec_codec_dmic {
47718f731d4cSTzung-Bi Shih 	uint8_t cmd; /* enum ec_codec_dmic_subcmd */
47728f731d4cSTzung-Bi Shih 	uint8_t reserved[3];
47738f731d4cSTzung-Bi Shih 
47748f731d4cSTzung-Bi Shih 	union {
4775f3e82ad4STzung-Bi Shih 		struct ec_param_ec_codec_dmic_set_gain_idx
4776f3e82ad4STzung-Bi Shih 				set_gain_idx_param;
4777f3e82ad4STzung-Bi Shih 		struct ec_param_ec_codec_dmic_get_gain_idx
4778f3e82ad4STzung-Bi Shih 				get_gain_idx_param;
47798f731d4cSTzung-Bi Shih 	};
47808f731d4cSTzung-Bi Shih };
47818f731d4cSTzung-Bi Shih 
4782f3e82ad4STzung-Bi Shih struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
4783f3e82ad4STzung-Bi Shih 	uint8_t max_gain;
4784f3e82ad4STzung-Bi Shih };
4785f3e82ad4STzung-Bi Shih 
4786f3e82ad4STzung-Bi Shih struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
4787f3e82ad4STzung-Bi Shih 	uint8_t gain;
47888f731d4cSTzung-Bi Shih };
47898f731d4cSTzung-Bi Shih 
47908f731d4cSTzung-Bi Shih /*****************************************************************************/
47918f731d4cSTzung-Bi Shih 
4792727f1c71STzung-Bi Shih /* Commands for I2S RX on audio codec. */
4793840d9f13SEnric Balletbo i Serra 
4794104c6f8fSTzung-Bi Shih #define EC_CMD_EC_CODEC_I2S_RX 0x00BE
4795840d9f13SEnric Balletbo i Serra 
4796727f1c71STzung-Bi Shih enum ec_codec_i2s_rx_subcmd {
4797727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_ENABLE = 0x0,
4798727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_DISABLE = 0x1,
47998f731d4cSTzung-Bi Shih 	EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
48008f731d4cSTzung-Bi Shih 	EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
48018f731d4cSTzung-Bi Shih 	EC_CODEC_I2S_RX_SET_BCLK = 0x4,
4802f4d3bd8bSYu-Hsuan Hsu 	EC_CODEC_I2S_RX_RESET = 0x5,
4803727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_SUBCMD_COUNT,
4804840d9f13SEnric Balletbo i Serra };
4805840d9f13SEnric Balletbo i Serra 
4806727f1c71STzung-Bi Shih enum ec_codec_i2s_rx_sample_depth {
4807727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
4808727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
4809727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
4810840d9f13SEnric Balletbo i Serra };
4811840d9f13SEnric Balletbo i Serra 
4812727f1c71STzung-Bi Shih enum ec_codec_i2s_rx_daifmt {
4813727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
4814727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
4815727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
4816727f1c71STzung-Bi Shih 	EC_CODEC_I2S_RX_DAIFMT_COUNT,
4817840d9f13SEnric Balletbo i Serra };
4818840d9f13SEnric Balletbo i Serra 
4819727f1c71STzung-Bi Shih struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
4820727f1c71STzung-Bi Shih 	uint8_t depth;
4821727f1c71STzung-Bi Shih 	uint8_t reserved[3];
4822727f1c71STzung-Bi Shih };
4823727f1c71STzung-Bi Shih 
4824727f1c71STzung-Bi Shih struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
4825727f1c71STzung-Bi Shih 	uint8_t left;
4826727f1c71STzung-Bi Shih 	uint8_t right;
4827727f1c71STzung-Bi Shih 	uint8_t reserved[2];
4828727f1c71STzung-Bi Shih };
4829727f1c71STzung-Bi Shih 
4830727f1c71STzung-Bi Shih struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
4831727f1c71STzung-Bi Shih 	uint8_t daifmt;
4832727f1c71STzung-Bi Shih 	uint8_t reserved[3];
4833727f1c71STzung-Bi Shih };
4834727f1c71STzung-Bi Shih 
4835727f1c71STzung-Bi Shih struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
4836727f1c71STzung-Bi Shih 	uint32_t bclk;
4837727f1c71STzung-Bi Shih };
4838727f1c71STzung-Bi Shih 
4839727f1c71STzung-Bi Shih struct __ec_align4 ec_param_ec_codec_i2s_rx {
4840727f1c71STzung-Bi Shih 	uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */
4841727f1c71STzung-Bi Shih 	uint8_t reserved[3];
4842727f1c71STzung-Bi Shih 
4843727f1c71STzung-Bi Shih 	union {
4844727f1c71STzung-Bi Shih 		struct ec_param_ec_codec_i2s_rx_set_sample_depth
4845727f1c71STzung-Bi Shih 				set_sample_depth_param;
4846727f1c71STzung-Bi Shih 		struct ec_param_ec_codec_i2s_rx_set_daifmt
4847727f1c71STzung-Bi Shih 				set_daifmt_param;
4848727f1c71STzung-Bi Shih 		struct ec_param_ec_codec_i2s_rx_set_bclk
4849727f1c71STzung-Bi Shih 				set_bclk_param;
4850727f1c71STzung-Bi Shih 	};
4851727f1c71STzung-Bi Shih };
4852727f1c71STzung-Bi Shih 
4853840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4854b6bc07d4STzung-Bi Shih /* Commands for WoV on audio codec. */
4855b6bc07d4STzung-Bi Shih 
4856b6bc07d4STzung-Bi Shih #define EC_CMD_EC_CODEC_WOV 0x00BF
4857b6bc07d4STzung-Bi Shih 
4858b6bc07d4STzung-Bi Shih enum ec_codec_wov_subcmd {
4859b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_SET_LANG = 0x0,
4860b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_SET_LANG_SHM = 0x1,
4861b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_GET_LANG = 0x2,
4862b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_ENABLE = 0x3,
4863b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_DISABLE = 0x4,
4864b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_READ_AUDIO = 0x5,
4865b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
4866b6bc07d4STzung-Bi Shih 	EC_CODEC_WOV_SUBCMD_COUNT,
4867b6bc07d4STzung-Bi Shih };
4868b6bc07d4STzung-Bi Shih 
4869b6bc07d4STzung-Bi Shih /*
4870b6bc07d4STzung-Bi Shih  * @hash is SHA256 of the whole language model.
4871b6bc07d4STzung-Bi Shih  * @total_len indicates the length of whole language model.
4872b6bc07d4STzung-Bi Shih  * @offset is the cursor from the beginning of the model.
4873b6bc07d4STzung-Bi Shih  * @buf is the packet buffer.
4874b6bc07d4STzung-Bi Shih  * @len denotes how many bytes in the buf.
4875b6bc07d4STzung-Bi Shih  */
4876b6bc07d4STzung-Bi Shih struct __ec_align4 ec_param_ec_codec_wov_set_lang {
4877b6bc07d4STzung-Bi Shih 	uint8_t hash[32];
4878b6bc07d4STzung-Bi Shih 	uint32_t total_len;
4879b6bc07d4STzung-Bi Shih 	uint32_t offset;
4880b6bc07d4STzung-Bi Shih 	uint8_t buf[128];
4881b6bc07d4STzung-Bi Shih 	uint32_t len;
4882b6bc07d4STzung-Bi Shih };
4883b6bc07d4STzung-Bi Shih 
4884b6bc07d4STzung-Bi Shih struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
4885b6bc07d4STzung-Bi Shih 	uint8_t hash[32];
4886b6bc07d4STzung-Bi Shih 	uint32_t total_len;
4887b6bc07d4STzung-Bi Shih };
4888b6bc07d4STzung-Bi Shih 
4889b6bc07d4STzung-Bi Shih struct __ec_align4 ec_param_ec_codec_wov {
4890b6bc07d4STzung-Bi Shih 	uint8_t cmd; /* enum ec_codec_wov_subcmd */
4891b6bc07d4STzung-Bi Shih 	uint8_t reserved[3];
4892b6bc07d4STzung-Bi Shih 
4893b6bc07d4STzung-Bi Shih 	union {
4894b6bc07d4STzung-Bi Shih 		struct ec_param_ec_codec_wov_set_lang
4895b6bc07d4STzung-Bi Shih 				set_lang_param;
4896b6bc07d4STzung-Bi Shih 		struct ec_param_ec_codec_wov_set_lang_shm
4897b6bc07d4STzung-Bi Shih 				set_lang_shm_param;
4898b6bc07d4STzung-Bi Shih 	};
4899b6bc07d4STzung-Bi Shih };
4900b6bc07d4STzung-Bi Shih 
4901b6bc07d4STzung-Bi Shih struct __ec_align4 ec_response_ec_codec_wov_get_lang {
4902b6bc07d4STzung-Bi Shih 	uint8_t hash[32];
4903b6bc07d4STzung-Bi Shih };
4904b6bc07d4STzung-Bi Shih 
4905b6bc07d4STzung-Bi Shih struct __ec_align4 ec_response_ec_codec_wov_read_audio {
4906b6bc07d4STzung-Bi Shih 	uint8_t buf[128];
4907b6bc07d4STzung-Bi Shih 	uint32_t len;
4908b6bc07d4STzung-Bi Shih };
4909b6bc07d4STzung-Bi Shih 
4910b6bc07d4STzung-Bi Shih struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
4911b6bc07d4STzung-Bi Shih 	uint32_t offset;
4912b6bc07d4STzung-Bi Shih 	uint32_t len;
4913b6bc07d4STzung-Bi Shih };
4914b6bc07d4STzung-Bi Shih 
4915b6bc07d4STzung-Bi Shih /*****************************************************************************/
4916840d9f13SEnric Balletbo i Serra /* System commands */
4917840d9f13SEnric Balletbo i Serra 
4918840d9f13SEnric Balletbo i Serra /*
4919840d9f13SEnric Balletbo i Serra  * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
4920840d9f13SEnric Balletbo i Serra  * necessarily reboot the EC.  Rename to "image" or something similar?
4921840d9f13SEnric Balletbo i Serra  */
4922840d9f13SEnric Balletbo i Serra #define EC_CMD_REBOOT_EC 0x00D2
4923840d9f13SEnric Balletbo i Serra 
4924840d9f13SEnric Balletbo i Serra /* Command */
4925840d9f13SEnric Balletbo i Serra enum ec_reboot_cmd {
4926840d9f13SEnric Balletbo i Serra 	EC_REBOOT_CANCEL = 0,        /* Cancel a pending reboot */
4927840d9f13SEnric Balletbo i Serra 	EC_REBOOT_JUMP_RO = 1,       /* Jump to RO without rebooting */
4928840d9f13SEnric Balletbo i Serra 	EC_REBOOT_JUMP_RW = 2,       /* Jump to active RW without rebooting */
4929840d9f13SEnric Balletbo i Serra 	/* (command 3 was jump to RW-B) */
4930840d9f13SEnric Balletbo i Serra 	EC_REBOOT_COLD = 4,          /* Cold-reboot */
4931840d9f13SEnric Balletbo i Serra 	EC_REBOOT_DISABLE_JUMP = 5,  /* Disable jump until next reboot */
4932840d9f13SEnric Balletbo i Serra 	EC_REBOOT_HIBERNATE = 6,     /* Hibernate EC */
4933840d9f13SEnric Balletbo i Serra 	EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */
49349f77c58dSPi-Hsun Shih 	EC_REBOOT_COLD_AP_OFF = 8,   /* Cold-reboot and don't boot AP */
4935840d9f13SEnric Balletbo i Serra };
4936840d9f13SEnric Balletbo i Serra 
4937840d9f13SEnric Balletbo i Serra /* Flags for ec_params_reboot_ec.reboot_flags */
4938840d9f13SEnric Balletbo i Serra #define EC_REBOOT_FLAG_RESERVED0      BIT(0)  /* Was recovery request */
4939840d9f13SEnric Balletbo i Serra #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1)  /* Reboot after AP shutdown */
4940840d9f13SEnric Balletbo i Serra #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2)  /* Switch RW slot */
4941840d9f13SEnric Balletbo i Serra 
4942840d9f13SEnric Balletbo i Serra struct ec_params_reboot_ec {
4943840d9f13SEnric Balletbo i Serra 	uint8_t cmd;           /* enum ec_reboot_cmd */
4944840d9f13SEnric Balletbo i Serra 	uint8_t flags;         /* See EC_REBOOT_FLAG_* */
4945840d9f13SEnric Balletbo i Serra } __ec_align1;
4946840d9f13SEnric Balletbo i Serra 
4947840d9f13SEnric Balletbo i Serra /*
4948840d9f13SEnric Balletbo i Serra  * Get information on last EC panic.
4949840d9f13SEnric Balletbo i Serra  *
4950840d9f13SEnric Balletbo i Serra  * Returns variable-length platform-dependent panic information.  See panic.h
4951840d9f13SEnric Balletbo i Serra  * for details.
4952840d9f13SEnric Balletbo i Serra  */
4953840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_PANIC_INFO 0x00D3
4954840d9f13SEnric Balletbo i Serra 
4955840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4956840d9f13SEnric Balletbo i Serra /*
4957840d9f13SEnric Balletbo i Serra  * Special commands
4958840d9f13SEnric Balletbo i Serra  *
4959840d9f13SEnric Balletbo i Serra  * These do not follow the normal rules for commands.  See each command for
4960840d9f13SEnric Balletbo i Serra  * details.
4961840d9f13SEnric Balletbo i Serra  */
4962840d9f13SEnric Balletbo i Serra 
4963840d9f13SEnric Balletbo i Serra /*
4964840d9f13SEnric Balletbo i Serra  * Reboot NOW
4965840d9f13SEnric Balletbo i Serra  *
4966840d9f13SEnric Balletbo i Serra  * This command will work even when the EC LPC interface is busy, because the
4967840d9f13SEnric Balletbo i Serra  * reboot command is processed at interrupt level.  Note that when the EC
4968840d9f13SEnric Balletbo i Serra  * reboots, the host will reboot too, so there is no response to this command.
4969840d9f13SEnric Balletbo i Serra  *
4970840d9f13SEnric Balletbo i Serra  * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
4971840d9f13SEnric Balletbo i Serra  */
4972840d9f13SEnric Balletbo i Serra #define EC_CMD_REBOOT 0x00D1  /* Think "die" */
4973840d9f13SEnric Balletbo i Serra 
4974840d9f13SEnric Balletbo i Serra /*
4975840d9f13SEnric Balletbo i Serra  * Resend last response (not supported on LPC).
4976840d9f13SEnric Balletbo i Serra  *
4977840d9f13SEnric Balletbo i Serra  * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
4978840d9f13SEnric Balletbo i Serra  * there was no previous command, or the previous command's response was too
4979840d9f13SEnric Balletbo i Serra  * big to save.
4980840d9f13SEnric Balletbo i Serra  */
4981840d9f13SEnric Balletbo i Serra #define EC_CMD_RESEND_RESPONSE 0x00DB
4982840d9f13SEnric Balletbo i Serra 
4983840d9f13SEnric Balletbo i Serra /*
4984840d9f13SEnric Balletbo i Serra  * This header byte on a command indicate version 0. Any header byte less
4985840d9f13SEnric Balletbo i Serra  * than this means that we are talking to an old EC which doesn't support
4986840d9f13SEnric Balletbo i Serra  * versioning. In that case, we assume version 0.
4987840d9f13SEnric Balletbo i Serra  *
4988840d9f13SEnric Balletbo i Serra  * Header bytes greater than this indicate a later version. For example,
4989840d9f13SEnric Balletbo i Serra  * EC_CMD_VERSION0 + 1 means we are using version 1.
4990840d9f13SEnric Balletbo i Serra  *
4991840d9f13SEnric Balletbo i Serra  * The old EC interface must not use commands 0xdc or higher.
4992840d9f13SEnric Balletbo i Serra  */
4993840d9f13SEnric Balletbo i Serra #define EC_CMD_VERSION0 0x00DC
4994840d9f13SEnric Balletbo i Serra 
4995840d9f13SEnric Balletbo i Serra /*****************************************************************************/
4996840d9f13SEnric Balletbo i Serra /*
4997840d9f13SEnric Balletbo i Serra  * PD commands
4998840d9f13SEnric Balletbo i Serra  *
4999840d9f13SEnric Balletbo i Serra  * These commands are for PD MCU communication.
5000840d9f13SEnric Balletbo i Serra  */
5001840d9f13SEnric Balletbo i Serra 
5002840d9f13SEnric Balletbo i Serra /* EC to PD MCU exchange status command */
5003840d9f13SEnric Balletbo i Serra #define EC_CMD_PD_EXCHANGE_STATUS 0x0100
5004840d9f13SEnric Balletbo i Serra #define EC_VER_PD_EXCHANGE_STATUS 2
5005840d9f13SEnric Balletbo i Serra 
5006840d9f13SEnric Balletbo i Serra enum pd_charge_state {
5007840d9f13SEnric Balletbo i Serra 	PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
5008840d9f13SEnric Balletbo i Serra 	PD_CHARGE_NONE,          /* No charging allowed */
5009840d9f13SEnric Balletbo i Serra 	PD_CHARGE_5V,            /* 5V charging only */
5010840d9f13SEnric Balletbo i Serra 	PD_CHARGE_MAX            /* Charge at max voltage */
5011840d9f13SEnric Balletbo i Serra };
5012840d9f13SEnric Balletbo i Serra 
5013840d9f13SEnric Balletbo i Serra /* Status of EC being sent to PD */
5014840d9f13SEnric Balletbo i Serra #define EC_STATUS_HIBERNATING	BIT(0)
5015840d9f13SEnric Balletbo i Serra 
5016840d9f13SEnric Balletbo i Serra struct ec_params_pd_status {
5017840d9f13SEnric Balletbo i Serra 	uint8_t status;       /* EC status */
5018840d9f13SEnric Balletbo i Serra 	int8_t batt_soc;      /* battery state of charge */
5019840d9f13SEnric Balletbo i Serra 	uint8_t charge_state; /* charging state (from enum pd_charge_state) */
5020840d9f13SEnric Balletbo i Serra } __ec_align1;
5021840d9f13SEnric Balletbo i Serra 
5022840d9f13SEnric Balletbo i Serra /* Status of PD being sent back to EC */
5023840d9f13SEnric Balletbo i Serra #define PD_STATUS_HOST_EVENT      BIT(0) /* Forward host event to AP */
5024840d9f13SEnric Balletbo i Serra #define PD_STATUS_IN_RW           BIT(1) /* Running RW image */
5025840d9f13SEnric Balletbo i Serra #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */
5026840d9f13SEnric Balletbo i Serra #define PD_STATUS_TCPC_ALERT_0    BIT(3) /* Alert active in port 0 TCPC */
5027840d9f13SEnric Balletbo i Serra #define PD_STATUS_TCPC_ALERT_1    BIT(4) /* Alert active in port 1 TCPC */
5028840d9f13SEnric Balletbo i Serra #define PD_STATUS_TCPC_ALERT_2    BIT(5) /* Alert active in port 2 TCPC */
5029840d9f13SEnric Balletbo i Serra #define PD_STATUS_TCPC_ALERT_3    BIT(6) /* Alert active in port 3 TCPC */
5030840d9f13SEnric Balletbo i Serra #define PD_STATUS_EC_INT_ACTIVE  (PD_STATUS_TCPC_ALERT_0 | \
5031840d9f13SEnric Balletbo i Serra 				      PD_STATUS_TCPC_ALERT_1 | \
5032840d9f13SEnric Balletbo i Serra 				      PD_STATUS_HOST_EVENT)
5033840d9f13SEnric Balletbo i Serra struct ec_response_pd_status {
5034840d9f13SEnric Balletbo i Serra 	uint32_t curr_lim_ma;       /* input current limit */
5035840d9f13SEnric Balletbo i Serra 	uint16_t status;            /* PD MCU status */
5036840d9f13SEnric Balletbo i Serra 	int8_t active_charge_port;  /* active charging port */
5037840d9f13SEnric Balletbo i Serra } __ec_align_size1;
5038840d9f13SEnric Balletbo i Serra 
5039840d9f13SEnric Balletbo i Serra /* AP to PD MCU host event status command, cleared on read */
5040840d9f13SEnric Balletbo i Serra #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
5041840d9f13SEnric Balletbo i Serra 
5042840d9f13SEnric Balletbo i Serra /* PD MCU host event status bits */
5043840d9f13SEnric Balletbo i Serra #define PD_EVENT_UPDATE_DEVICE     BIT(0)
5044840d9f13SEnric Balletbo i Serra #define PD_EVENT_POWER_CHANGE      BIT(1)
5045840d9f13SEnric Balletbo i Serra #define PD_EVENT_IDENTITY_RECEIVED BIT(2)
5046840d9f13SEnric Balletbo i Serra #define PD_EVENT_DATA_SWAP         BIT(3)
5047401d07d5SPavan Holla #define PD_EVENT_TYPEC             BIT(4)
5048401d07d5SPavan Holla #define PD_EVENT_PPM               BIT(5)
5049*dcba6971SJameson Thies #define PD_EVENT_INIT              BIT(6)
5050401d07d5SPavan Holla 
5051840d9f13SEnric Balletbo i Serra struct ec_response_host_event_status {
5052840d9f13SEnric Balletbo i Serra 	uint32_t status; /* PD MCU host event status */
5053840d9f13SEnric Balletbo i Serra } __ec_align4;
5054840d9f13SEnric Balletbo i Serra 
5055840d9f13SEnric Balletbo i Serra /* Set USB type-C port role and muxes */
5056840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_CONTROL 0x0101
5057840d9f13SEnric Balletbo i Serra 
5058840d9f13SEnric Balletbo i Serra enum usb_pd_control_role {
5059840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_ROLE_NO_CHANGE = 0,
5060840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
5061840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
5062840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_ROLE_FORCE_SINK = 3,
5063840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
5064840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_ROLE_FREEZE = 5,
5065840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_ROLE_COUNT
5066840d9f13SEnric Balletbo i Serra };
5067840d9f13SEnric Balletbo i Serra 
5068840d9f13SEnric Balletbo i Serra enum usb_pd_control_mux {
5069840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_MUX_NO_CHANGE = 0,
5070840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_MUX_NONE = 1,
5071840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_MUX_USB = 2,
5072840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_MUX_DP = 3,
5073840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_MUX_DOCK = 4,
5074840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_MUX_AUTO = 5,
5075840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_MUX_COUNT
5076840d9f13SEnric Balletbo i Serra };
5077840d9f13SEnric Balletbo i Serra 
5078840d9f13SEnric Balletbo i Serra enum usb_pd_control_swap {
5079840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_SWAP_NONE = 0,
5080840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_SWAP_DATA = 1,
5081840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_SWAP_POWER = 2,
5082840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_SWAP_VCONN = 3,
5083840d9f13SEnric Balletbo i Serra 	USB_PD_CTRL_SWAP_COUNT
5084840d9f13SEnric Balletbo i Serra };
5085840d9f13SEnric Balletbo i Serra 
5086840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_control {
5087840d9f13SEnric Balletbo i Serra 	uint8_t port;
5088840d9f13SEnric Balletbo i Serra 	uint8_t role;
5089840d9f13SEnric Balletbo i Serra 	uint8_t mux;
5090840d9f13SEnric Balletbo i Serra 	uint8_t swap;
5091840d9f13SEnric Balletbo i Serra } __ec_align1;
5092840d9f13SEnric Balletbo i Serra 
5093840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ENABLED_COMMS      BIT(0) /* Communication enabled */
5094840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ENABLED_CONNECTED  BIT(1) /* Device connected */
5095840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */
5096840d9f13SEnric Balletbo i Serra 
5097840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ROLE_POWER         BIT(0) /* 0=SNK/1=SRC */
5098840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ROLE_DATA          BIT(1) /* 0=UFP/1=DFP */
5099840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ROLE_VCONN         BIT(2) /* Vconn status */
5100840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ROLE_DR_POWER      BIT(3) /* Partner is dualrole power */
5101840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ROLE_DR_DATA       BIT(4) /* Partner is dualrole data */
5102840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ROLE_USB_COMM      BIT(5) /* Partner USB comm capable */
5103840d9f13SEnric Balletbo i Serra #define PD_CTRL_RESP_ROLE_EXT_POWERED   BIT(6) /* Partner externally powerd */
5104840d9f13SEnric Balletbo i Serra 
5105840d9f13SEnric Balletbo i Serra struct ec_response_usb_pd_control {
5106840d9f13SEnric Balletbo i Serra 	uint8_t enabled;
5107840d9f13SEnric Balletbo i Serra 	uint8_t role;
5108840d9f13SEnric Balletbo i Serra 	uint8_t polarity;
5109840d9f13SEnric Balletbo i Serra 	uint8_t state;
5110840d9f13SEnric Balletbo i Serra } __ec_align1;
5111840d9f13SEnric Balletbo i Serra 
5112840d9f13SEnric Balletbo i Serra struct ec_response_usb_pd_control_v1 {
5113840d9f13SEnric Balletbo i Serra 	uint8_t enabled;
5114840d9f13SEnric Balletbo i Serra 	uint8_t role;
5115840d9f13SEnric Balletbo i Serra 	uint8_t polarity;
5116840d9f13SEnric Balletbo i Serra 	char state[32];
5117840d9f13SEnric Balletbo i Serra } __ec_align1;
5118840d9f13SEnric Balletbo i Serra 
5119840d9f13SEnric Balletbo i Serra /* Values representing usbc PD CC state */
5120840d9f13SEnric Balletbo i Serra #define USBC_PD_CC_NONE		0 /* No accessory connected */
5121840d9f13SEnric Balletbo i Serra #define USBC_PD_CC_NO_UFP	1 /* No UFP accessory connected */
5122840d9f13SEnric Balletbo i Serra #define USBC_PD_CC_AUDIO_ACC	2 /* Audio accessory connected */
5123840d9f13SEnric Balletbo i Serra #define USBC_PD_CC_DEBUG_ACC	3 /* Debug accessory connected */
5124840d9f13SEnric Balletbo i Serra #define USBC_PD_CC_UFP_ATTACHED	4 /* UFP attached to usbc */
5125840d9f13SEnric Balletbo i Serra #define USBC_PD_CC_DFP_ATTACHED	5 /* DPF attached to usbc */
5126840d9f13SEnric Balletbo i Serra 
51275e48a03bSPrashant Malani /* Active/Passive Cable */
51285e48a03bSPrashant Malani #define USB_PD_CTRL_ACTIVE_CABLE        BIT(0)
51295e48a03bSPrashant Malani /* Optical/Non-optical cable */
51305e48a03bSPrashant Malani #define USB_PD_CTRL_OPTICAL_CABLE       BIT(1)
51315e48a03bSPrashant Malani /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
51325e48a03bSPrashant Malani #define USB_PD_CTRL_TBT_LEGACY_ADAPTER  BIT(2)
51335e48a03bSPrashant Malani /* Active Link Uni-Direction */
51345e48a03bSPrashant Malani #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR  BIT(3)
51355e48a03bSPrashant Malani 
5136840d9f13SEnric Balletbo i Serra struct ec_response_usb_pd_control_v2 {
5137840d9f13SEnric Balletbo i Serra 	uint8_t enabled;
5138840d9f13SEnric Balletbo i Serra 	uint8_t role;
5139840d9f13SEnric Balletbo i Serra 	uint8_t polarity;
5140840d9f13SEnric Balletbo i Serra 	char state[32];
51415e48a03bSPrashant Malani 	uint8_t cc_state;	/* enum pd_cc_states representing cc state */
5142840d9f13SEnric Balletbo i Serra 	uint8_t dp_mode;	/* Current DP pin mode (MODE_DP_PIN_[A-E]) */
51435e48a03bSPrashant Malani 	uint8_t reserved;	/* Reserved for future use */
51445e48a03bSPrashant Malani 	uint8_t control_flags;	/* USB_PD_CTRL_*flags */
51455e48a03bSPrashant Malani 	uint8_t cable_speed;	/* TBT_SS_* cable speed */
51465e48a03bSPrashant Malani 	uint8_t cable_gen;	/* TBT_GEN3_* cable rounded support */
5147840d9f13SEnric Balletbo i Serra } __ec_align1;
5148840d9f13SEnric Balletbo i Serra 
5149840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_PORTS 0x0102
5150840d9f13SEnric Balletbo i Serra 
5151840d9f13SEnric Balletbo i Serra /* Maximum number of PD ports on a device, num_ports will be <= this */
5152840d9f13SEnric Balletbo i Serra #define EC_USB_PD_MAX_PORTS 8
5153840d9f13SEnric Balletbo i Serra 
5154840d9f13SEnric Balletbo i Serra struct ec_response_usb_pd_ports {
5155840d9f13SEnric Balletbo i Serra 	uint8_t num_ports;
5156840d9f13SEnric Balletbo i Serra } __ec_align1;
5157840d9f13SEnric Balletbo i Serra 
5158840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_POWER_INFO 0x0103
5159840d9f13SEnric Balletbo i Serra 
5160840d9f13SEnric Balletbo i Serra #define PD_POWER_CHARGING_PORT 0xff
5161840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_power_info {
5162840d9f13SEnric Balletbo i Serra 	uint8_t port;
5163840d9f13SEnric Balletbo i Serra } __ec_align1;
5164840d9f13SEnric Balletbo i Serra 
5165840d9f13SEnric Balletbo i Serra enum usb_chg_type {
5166840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_NONE,
5167840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_PD,
5168840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_C,
5169840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_PROPRIETARY,
5170840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_BC12_DCP,
5171840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_BC12_CDP,
5172840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_BC12_SDP,
5173840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_OTHER,
5174840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_VBUS,
5175840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_UNKNOWN,
5176840d9f13SEnric Balletbo i Serra 	USB_CHG_TYPE_DEDICATED,
5177840d9f13SEnric Balletbo i Serra };
5178840d9f13SEnric Balletbo i Serra enum usb_power_roles {
5179840d9f13SEnric Balletbo i Serra 	USB_PD_PORT_POWER_DISCONNECTED,
5180840d9f13SEnric Balletbo i Serra 	USB_PD_PORT_POWER_SOURCE,
5181840d9f13SEnric Balletbo i Serra 	USB_PD_PORT_POWER_SINK,
5182840d9f13SEnric Balletbo i Serra 	USB_PD_PORT_POWER_SINK_NOT_CHARGING,
5183840d9f13SEnric Balletbo i Serra };
5184840d9f13SEnric Balletbo i Serra 
5185840d9f13SEnric Balletbo i Serra struct usb_chg_measures {
5186840d9f13SEnric Balletbo i Serra 	uint16_t voltage_max;
5187840d9f13SEnric Balletbo i Serra 	uint16_t voltage_now;
5188840d9f13SEnric Balletbo i Serra 	uint16_t current_max;
5189840d9f13SEnric Balletbo i Serra 	uint16_t current_lim;
5190840d9f13SEnric Balletbo i Serra } __ec_align2;
5191840d9f13SEnric Balletbo i Serra 
5192840d9f13SEnric Balletbo i Serra struct ec_response_usb_pd_power_info {
5193840d9f13SEnric Balletbo i Serra 	uint8_t role;
5194840d9f13SEnric Balletbo i Serra 	uint8_t type;
5195840d9f13SEnric Balletbo i Serra 	uint8_t dualrole;
5196840d9f13SEnric Balletbo i Serra 	uint8_t reserved1;
5197840d9f13SEnric Balletbo i Serra 	struct usb_chg_measures meas;
5198840d9f13SEnric Balletbo i Serra 	uint32_t max_power;
5199840d9f13SEnric Balletbo i Serra } __ec_align4;
5200840d9f13SEnric Balletbo i Serra 
5201840d9f13SEnric Balletbo i Serra 
5202840d9f13SEnric Balletbo i Serra /*
5203840d9f13SEnric Balletbo i Serra  * This command will return the number of USB PD charge port + the number
5204840d9f13SEnric Balletbo i Serra  * of dedicated port present.
5205840d9f13SEnric Balletbo i Serra  * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports
5206840d9f13SEnric Balletbo i Serra  */
5207840d9f13SEnric Balletbo i Serra #define EC_CMD_CHARGE_PORT_COUNT 0x0105
5208840d9f13SEnric Balletbo i Serra struct ec_response_charge_port_count {
5209840d9f13SEnric Balletbo i Serra 	uint8_t port_count;
5210840d9f13SEnric Balletbo i Serra } __ec_align1;
5211840d9f13SEnric Balletbo i Serra 
5212840d9f13SEnric Balletbo i Serra /* Write USB-PD device FW */
5213840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_FW_UPDATE 0x0110
5214840d9f13SEnric Balletbo i Serra 
5215840d9f13SEnric Balletbo i Serra enum usb_pd_fw_update_cmds {
5216840d9f13SEnric Balletbo i Serra 	USB_PD_FW_REBOOT,
5217840d9f13SEnric Balletbo i Serra 	USB_PD_FW_FLASH_ERASE,
5218840d9f13SEnric Balletbo i Serra 	USB_PD_FW_FLASH_WRITE,
5219840d9f13SEnric Balletbo i Serra 	USB_PD_FW_ERASE_SIG,
5220840d9f13SEnric Balletbo i Serra };
5221840d9f13SEnric Balletbo i Serra 
5222840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_fw_update {
5223840d9f13SEnric Balletbo i Serra 	uint16_t dev_id;
5224840d9f13SEnric Balletbo i Serra 	uint8_t cmd;
5225840d9f13SEnric Balletbo i Serra 	uint8_t port;
5226840d9f13SEnric Balletbo i Serra 	uint32_t size;     /* Size to write in bytes */
5227840d9f13SEnric Balletbo i Serra 	/* Followed by data to write */
5228840d9f13SEnric Balletbo i Serra } __ec_align4;
5229840d9f13SEnric Balletbo i Serra 
5230840d9f13SEnric Balletbo i Serra /* Write USB-PD Accessory RW_HASH table entry */
5231840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5232840d9f13SEnric Balletbo i Serra /* RW hash is first 20 bytes of SHA-256 of RW section */
5233840d9f13SEnric Balletbo i Serra #define PD_RW_HASH_SIZE 20
5234840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_rw_hash_entry {
5235840d9f13SEnric Balletbo i Serra 	uint16_t dev_id;
5236840d9f13SEnric Balletbo i Serra 	uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
5237840d9f13SEnric Balletbo i Serra 	uint8_t reserved;        /*
5238840d9f13SEnric Balletbo i Serra 				  * For alignment of current_image
5239840d9f13SEnric Balletbo i Serra 				  * TODO(rspangler) but it's not aligned!
5240840d9f13SEnric Balletbo i Serra 				  * Should have been reserved[2].
5241840d9f13SEnric Balletbo i Serra 				  */
5242840d9f13SEnric Balletbo i Serra 	uint32_t current_image;  /* One of ec_current_image */
5243840d9f13SEnric Balletbo i Serra } __ec_align1;
5244840d9f13SEnric Balletbo i Serra 
5245840d9f13SEnric Balletbo i Serra /* Read USB-PD Accessory info */
5246840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_DEV_INFO 0x0112
5247840d9f13SEnric Balletbo i Serra 
5248840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_info_request {
5249840d9f13SEnric Balletbo i Serra 	uint8_t port;
5250840d9f13SEnric Balletbo i Serra } __ec_align1;
5251840d9f13SEnric Balletbo i Serra 
5252840d9f13SEnric Balletbo i Serra /* Read USB-PD Device discovery info */
5253840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_DISCOVERY 0x0113
5254840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_discovery_entry {
5255840d9f13SEnric Balletbo i Serra 	uint16_t vid;  /* USB-IF VID */
5256840d9f13SEnric Balletbo i Serra 	uint16_t pid;  /* USB-IF PID */
5257840d9f13SEnric Balletbo i Serra 	uint8_t ptype; /* product type (hub,periph,cable,ama) */
5258840d9f13SEnric Balletbo i Serra } __ec_align_size1;
5259840d9f13SEnric Balletbo i Serra 
5260840d9f13SEnric Balletbo i Serra /* Override default charge behavior */
5261840d9f13SEnric Balletbo i Serra #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5262840d9f13SEnric Balletbo i Serra 
5263840d9f13SEnric Balletbo i Serra /* Negative port parameters have special meaning */
5264840d9f13SEnric Balletbo i Serra enum usb_pd_override_ports {
5265840d9f13SEnric Balletbo i Serra 	OVERRIDE_DONT_CHARGE = -2,
5266840d9f13SEnric Balletbo i Serra 	OVERRIDE_OFF = -1,
5267840d9f13SEnric Balletbo i Serra 	/* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
5268840d9f13SEnric Balletbo i Serra };
5269840d9f13SEnric Balletbo i Serra 
5270840d9f13SEnric Balletbo i Serra struct ec_params_charge_port_override {
5271840d9f13SEnric Balletbo i Serra 	int16_t override_port; /* Override port# */
5272840d9f13SEnric Balletbo i Serra } __ec_align2;
5273840d9f13SEnric Balletbo i Serra 
5274840d9f13SEnric Balletbo i Serra /*
5275840d9f13SEnric Balletbo i Serra  * Read (and delete) one entry of PD event log.
5276840d9f13SEnric Balletbo i Serra  * TODO(crbug.com/751742): Make this host command more generic to accommodate
5277840d9f13SEnric Balletbo i Serra  * future non-PD logs that use the same internal EC event_log.
5278840d9f13SEnric Balletbo i Serra  */
5279840d9f13SEnric Balletbo i Serra #define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5280840d9f13SEnric Balletbo i Serra 
5281840d9f13SEnric Balletbo i Serra struct ec_response_pd_log {
5282840d9f13SEnric Balletbo i Serra 	uint32_t timestamp; /* relative timestamp in milliseconds */
5283840d9f13SEnric Balletbo i Serra 	uint8_t type;       /* event type : see PD_EVENT_xx below */
5284840d9f13SEnric Balletbo i Serra 	uint8_t size_port;  /* [7:5] port number [4:0] payload size in bytes */
5285840d9f13SEnric Balletbo i Serra 	uint16_t data;      /* type-defined data payload */
528688354105SGustavo A. R. Silva 	uint8_t payload[];  /* optional additional data payload: 0..16 bytes */
5287840d9f13SEnric Balletbo i Serra } __ec_align4;
5288840d9f13SEnric Balletbo i Serra 
5289840d9f13SEnric Balletbo i Serra /* The timestamp is the microsecond counter shifted to get about a ms. */
5290840d9f13SEnric Balletbo i Serra #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
5291840d9f13SEnric Balletbo i Serra 
5292840d9f13SEnric Balletbo i Serra #define PD_LOG_SIZE_MASK  0x1f
5293840d9f13SEnric Balletbo i Serra #define PD_LOG_PORT_MASK  0xe0
5294840d9f13SEnric Balletbo i Serra #define PD_LOG_PORT_SHIFT    5
5295840d9f13SEnric Balletbo i Serra #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
5296840d9f13SEnric Balletbo i Serra 				      ((size) & PD_LOG_SIZE_MASK))
5297840d9f13SEnric Balletbo i Serra #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
5298840d9f13SEnric Balletbo i Serra #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
5299840d9f13SEnric Balletbo i Serra 
5300840d9f13SEnric Balletbo i Serra /* PD event log : entry types */
5301840d9f13SEnric Balletbo i Serra /* PD MCU events */
5302840d9f13SEnric Balletbo i Serra #define PD_EVENT_MCU_BASE       0x00
5303840d9f13SEnric Balletbo i Serra #define PD_EVENT_MCU_CHARGE             (PD_EVENT_MCU_BASE+0)
5304840d9f13SEnric Balletbo i Serra #define PD_EVENT_MCU_CONNECT            (PD_EVENT_MCU_BASE+1)
5305840d9f13SEnric Balletbo i Serra /* Reserved for custom board event */
5306840d9f13SEnric Balletbo i Serra #define PD_EVENT_MCU_BOARD_CUSTOM       (PD_EVENT_MCU_BASE+2)
5307840d9f13SEnric Balletbo i Serra /* PD generic accessory events */
5308840d9f13SEnric Balletbo i Serra #define PD_EVENT_ACC_BASE       0x20
5309840d9f13SEnric Balletbo i Serra #define PD_EVENT_ACC_RW_FAIL   (PD_EVENT_ACC_BASE+0)
5310840d9f13SEnric Balletbo i Serra #define PD_EVENT_ACC_RW_ERASE  (PD_EVENT_ACC_BASE+1)
5311840d9f13SEnric Balletbo i Serra /* PD power supply events */
5312840d9f13SEnric Balletbo i Serra #define PD_EVENT_PS_BASE        0x40
5313840d9f13SEnric Balletbo i Serra #define PD_EVENT_PS_FAULT      (PD_EVENT_PS_BASE+0)
5314840d9f13SEnric Balletbo i Serra /* PD video dongles events */
5315840d9f13SEnric Balletbo i Serra #define PD_EVENT_VIDEO_BASE     0x60
5316840d9f13SEnric Balletbo i Serra #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
5317840d9f13SEnric Balletbo i Serra #define PD_EVENT_VIDEO_CODEC   (PD_EVENT_VIDEO_BASE+1)
5318840d9f13SEnric Balletbo i Serra /* Returned in the "type" field, when there is no entry available */
5319840d9f13SEnric Balletbo i Serra #define PD_EVENT_NO_ENTRY       0xff
5320840d9f13SEnric Balletbo i Serra 
5321840d9f13SEnric Balletbo i Serra /*
5322840d9f13SEnric Balletbo i Serra  * PD_EVENT_MCU_CHARGE event definition :
5323840d9f13SEnric Balletbo i Serra  * the payload is "struct usb_chg_measures"
5324840d9f13SEnric Balletbo i Serra  * the data field contains the port state flags as defined below :
5325840d9f13SEnric Balletbo i Serra  */
5326840d9f13SEnric Balletbo i Serra /* Port partner is a dual role device */
5327840d9f13SEnric Balletbo i Serra #define CHARGE_FLAGS_DUAL_ROLE         BIT(15)
5328840d9f13SEnric Balletbo i Serra /* Port is the pending override port */
5329840d9f13SEnric Balletbo i Serra #define CHARGE_FLAGS_DELAYED_OVERRIDE  BIT(14)
5330840d9f13SEnric Balletbo i Serra /* Port is the override port */
5331840d9f13SEnric Balletbo i Serra #define CHARGE_FLAGS_OVERRIDE          BIT(13)
5332840d9f13SEnric Balletbo i Serra /* Charger type */
5333840d9f13SEnric Balletbo i Serra #define CHARGE_FLAGS_TYPE_SHIFT               3
5334840d9f13SEnric Balletbo i Serra #define CHARGE_FLAGS_TYPE_MASK       (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5335840d9f13SEnric Balletbo i Serra /* Power delivery role */
5336840d9f13SEnric Balletbo i Serra #define CHARGE_FLAGS_ROLE_MASK         (7 <<  0)
5337840d9f13SEnric Balletbo i Serra 
5338840d9f13SEnric Balletbo i Serra /*
5339840d9f13SEnric Balletbo i Serra  * PD_EVENT_PS_FAULT data field flags definition :
5340840d9f13SEnric Balletbo i Serra  */
5341840d9f13SEnric Balletbo i Serra #define PS_FAULT_OCP                          1
5342840d9f13SEnric Balletbo i Serra #define PS_FAULT_FAST_OCP                     2
5343840d9f13SEnric Balletbo i Serra #define PS_FAULT_OVP                          3
5344840d9f13SEnric Balletbo i Serra #define PS_FAULT_DISCH                        4
5345840d9f13SEnric Balletbo i Serra 
5346840d9f13SEnric Balletbo i Serra /*
5347840d9f13SEnric Balletbo i Serra  * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
5348840d9f13SEnric Balletbo i Serra  */
5349840d9f13SEnric Balletbo i Serra struct mcdp_version {
5350840d9f13SEnric Balletbo i Serra 	uint8_t major;
5351840d9f13SEnric Balletbo i Serra 	uint8_t minor;
5352840d9f13SEnric Balletbo i Serra 	uint16_t build;
5353840d9f13SEnric Balletbo i Serra } __ec_align4;
5354840d9f13SEnric Balletbo i Serra 
5355840d9f13SEnric Balletbo i Serra struct mcdp_info {
5356840d9f13SEnric Balletbo i Serra 	uint8_t family[2];
5357840d9f13SEnric Balletbo i Serra 	uint8_t chipid[2];
5358840d9f13SEnric Balletbo i Serra 	struct mcdp_version irom;
5359840d9f13SEnric Balletbo i Serra 	struct mcdp_version fw;
5360840d9f13SEnric Balletbo i Serra } __ec_align4;
5361840d9f13SEnric Balletbo i Serra 
5362840d9f13SEnric Balletbo i Serra /* struct mcdp_info field decoding */
5363840d9f13SEnric Balletbo i Serra #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5364840d9f13SEnric Balletbo i Serra #define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5365840d9f13SEnric Balletbo i Serra 
5366840d9f13SEnric Balletbo i Serra /* Get/Set USB-PD Alternate mode info */
5367840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_GET_AMODE 0x0116
5368840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_get_mode_request {
5369840d9f13SEnric Balletbo i Serra 	uint16_t svid_idx; /* SVID index to get */
5370840d9f13SEnric Balletbo i Serra 	uint8_t port;      /* port */
5371840d9f13SEnric Balletbo i Serra } __ec_align_size1;
5372840d9f13SEnric Balletbo i Serra 
5373840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_get_mode_response {
5374840d9f13SEnric Balletbo i Serra 	uint16_t svid;   /* SVID */
5375840d9f13SEnric Balletbo i Serra 	uint16_t opos;    /* Object Position */
5376840d9f13SEnric Balletbo i Serra 	uint32_t vdo[6]; /* Mode VDOs */
5377840d9f13SEnric Balletbo i Serra } __ec_align4;
5378840d9f13SEnric Balletbo i Serra 
5379840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_SET_AMODE 0x0117
5380840d9f13SEnric Balletbo i Serra 
5381840d9f13SEnric Balletbo i Serra enum pd_mode_cmd {
5382840d9f13SEnric Balletbo i Serra 	PD_EXIT_MODE = 0,
5383840d9f13SEnric Balletbo i Serra 	PD_ENTER_MODE = 1,
5384840d9f13SEnric Balletbo i Serra 	/* Not a command.  Do NOT remove. */
5385840d9f13SEnric Balletbo i Serra 	PD_MODE_CMD_COUNT,
5386840d9f13SEnric Balletbo i Serra };
5387840d9f13SEnric Balletbo i Serra 
5388840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_set_mode_request {
5389840d9f13SEnric Balletbo i Serra 	uint32_t cmd;  /* enum pd_mode_cmd */
5390840d9f13SEnric Balletbo i Serra 	uint16_t svid; /* SVID to set */
5391840d9f13SEnric Balletbo i Serra 	uint8_t opos;  /* Object Position */
5392840d9f13SEnric Balletbo i Serra 	uint8_t port;  /* port */
5393840d9f13SEnric Balletbo i Serra } __ec_align4;
5394840d9f13SEnric Balletbo i Serra 
5395840d9f13SEnric Balletbo i Serra /* Ask the PD MCU to record a log of a requested type */
5396840d9f13SEnric Balletbo i Serra #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5397840d9f13SEnric Balletbo i Serra 
5398840d9f13SEnric Balletbo i Serra struct ec_params_pd_write_log_entry {
5399840d9f13SEnric Balletbo i Serra 	uint8_t type; /* event type : see PD_EVENT_xx above */
5400840d9f13SEnric Balletbo i Serra 	uint8_t port; /* port#, or 0 for events unrelated to a given port */
5401840d9f13SEnric Balletbo i Serra } __ec_align1;
5402840d9f13SEnric Balletbo i Serra 
5403840d9f13SEnric Balletbo i Serra 
5404840d9f13SEnric Balletbo i Serra /* Control USB-PD chip */
5405840d9f13SEnric Balletbo i Serra #define EC_CMD_PD_CONTROL 0x0119
5406840d9f13SEnric Balletbo i Serra 
5407840d9f13SEnric Balletbo i Serra enum ec_pd_control_cmd {
5408840d9f13SEnric Balletbo i Serra 	PD_SUSPEND = 0,      /* Suspend the PD chip (EC: stop talking to PD) */
5409840d9f13SEnric Balletbo i Serra 	PD_RESUME,           /* Resume the PD chip (EC: start talking to PD) */
5410840d9f13SEnric Balletbo i Serra 	PD_RESET,            /* Force reset the PD chip */
5411840d9f13SEnric Balletbo i Serra 	PD_CONTROL_DISABLE,  /* Disable further calls to this command */
5412840d9f13SEnric Balletbo i Serra 	PD_CHIP_ON,          /* Power on the PD chip */
5413840d9f13SEnric Balletbo i Serra };
5414840d9f13SEnric Balletbo i Serra 
5415840d9f13SEnric Balletbo i Serra struct ec_params_pd_control {
5416840d9f13SEnric Balletbo i Serra 	uint8_t chip;         /* chip id */
5417840d9f13SEnric Balletbo i Serra 	uint8_t subcmd;
5418840d9f13SEnric Balletbo i Serra } __ec_align1;
5419840d9f13SEnric Balletbo i Serra 
5420840d9f13SEnric Balletbo i Serra /* Get info about USB-C SS muxes */
5421840d9f13SEnric Balletbo i Serra #define EC_CMD_USB_PD_MUX_INFO 0x011A
5422840d9f13SEnric Balletbo i Serra 
5423840d9f13SEnric Balletbo i Serra struct ec_params_usb_pd_mux_info {
5424840d9f13SEnric Balletbo i Serra 	uint8_t port; /* USB-C port number */
5425840d9f13SEnric Balletbo i Serra } __ec_align1;
5426840d9f13SEnric Balletbo i Serra 
5427840d9f13SEnric Balletbo i Serra /* Flags representing mux state */
5428e32b16c3SPrashant Malani #define USB_PD_MUX_NONE               0      /* Open switch */
5429840d9f13SEnric Balletbo i Serra #define USB_PD_MUX_USB_ENABLED        BIT(0) /* USB connected */
5430840d9f13SEnric Balletbo i Serra #define USB_PD_MUX_DP_ENABLED         BIT(1) /* DP connected */
5431840d9f13SEnric Balletbo i Serra #define USB_PD_MUX_POLARITY_INVERTED  BIT(2) /* CC line Polarity inverted */
5432840d9f13SEnric Balletbo i Serra #define USB_PD_MUX_HPD_IRQ            BIT(3) /* HPD IRQ is asserted */
5433840d9f13SEnric Balletbo i Serra #define USB_PD_MUX_HPD_LVL            BIT(4) /* HPD level is asserted */
5434e32b16c3SPrashant Malani #define USB_PD_MUX_SAFE_MODE          BIT(5) /* DP is in safe mode */
5435e32b16c3SPrashant Malani #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
5436e32b16c3SPrashant Malani #define USB_PD_MUX_USB4_ENABLED       BIT(7) /* USB4 enabled */
5437840d9f13SEnric Balletbo i Serra 
5438840d9f13SEnric Balletbo i Serra struct ec_response_usb_pd_mux_info {
5439840d9f13SEnric Balletbo i Serra 	uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
5440840d9f13SEnric Balletbo i Serra } __ec_align1;
5441840d9f13SEnric Balletbo i Serra 
5442840d9f13SEnric Balletbo i Serra #define EC_CMD_PD_CHIP_INFO		0x011B
5443840d9f13SEnric Balletbo i Serra 
5444840d9f13SEnric Balletbo i Serra struct ec_params_pd_chip_info {
5445840d9f13SEnric Balletbo i Serra 	uint8_t port;	/* USB-C port number */
5446840d9f13SEnric Balletbo i Serra 	uint8_t renew;	/* Force renewal */
5447840d9f13SEnric Balletbo i Serra } __ec_align1;
5448840d9f13SEnric Balletbo i Serra 
5449840d9f13SEnric Balletbo i Serra struct ec_response_pd_chip_info {
5450840d9f13SEnric Balletbo i Serra 	uint16_t vendor_id;
5451840d9f13SEnric Balletbo i Serra 	uint16_t product_id;
5452840d9f13SEnric Balletbo i Serra 	uint16_t device_id;
5453840d9f13SEnric Balletbo i Serra 	union {
5454840d9f13SEnric Balletbo i Serra 		uint8_t fw_version_string[8];
5455840d9f13SEnric Balletbo i Serra 		uint64_t fw_version_number;
5456840d9f13SEnric Balletbo i Serra 	};
5457840d9f13SEnric Balletbo i Serra } __ec_align2;
5458840d9f13SEnric Balletbo i Serra 
5459840d9f13SEnric Balletbo i Serra struct ec_response_pd_chip_info_v1 {
5460840d9f13SEnric Balletbo i Serra 	uint16_t vendor_id;
5461840d9f13SEnric Balletbo i Serra 	uint16_t product_id;
5462840d9f13SEnric Balletbo i Serra 	uint16_t device_id;
5463840d9f13SEnric Balletbo i Serra 	union {
5464840d9f13SEnric Balletbo i Serra 		uint8_t fw_version_string[8];
5465840d9f13SEnric Balletbo i Serra 		uint64_t fw_version_number;
5466840d9f13SEnric Balletbo i Serra 	};
5467840d9f13SEnric Balletbo i Serra 	union {
5468840d9f13SEnric Balletbo i Serra 		uint8_t min_req_fw_version_string[8];
5469840d9f13SEnric Balletbo i Serra 		uint64_t min_req_fw_version_number;
5470840d9f13SEnric Balletbo i Serra 	};
5471840d9f13SEnric Balletbo i Serra } __ec_align2;
5472840d9f13SEnric Balletbo i Serra 
5473840d9f13SEnric Balletbo i Serra /* Run RW signature verification and get status */
5474840d9f13SEnric Balletbo i Serra #define EC_CMD_RWSIG_CHECK_STATUS	0x011C
5475840d9f13SEnric Balletbo i Serra 
5476840d9f13SEnric Balletbo i Serra struct ec_response_rwsig_check_status {
5477840d9f13SEnric Balletbo i Serra 	uint32_t status;
5478840d9f13SEnric Balletbo i Serra } __ec_align4;
5479840d9f13SEnric Balletbo i Serra 
5480840d9f13SEnric Balletbo i Serra /* For controlling RWSIG task */
5481840d9f13SEnric Balletbo i Serra #define EC_CMD_RWSIG_ACTION	0x011D
5482840d9f13SEnric Balletbo i Serra 
5483840d9f13SEnric Balletbo i Serra enum rwsig_action {
5484840d9f13SEnric Balletbo i Serra 	RWSIG_ACTION_ABORT = 0,		/* Abort RWSIG and prevent jumping */
5485840d9f13SEnric Balletbo i Serra 	RWSIG_ACTION_CONTINUE = 1,	/* Jump to RW immediately */
5486840d9f13SEnric Balletbo i Serra };
5487840d9f13SEnric Balletbo i Serra 
5488840d9f13SEnric Balletbo i Serra struct ec_params_rwsig_action {
5489840d9f13SEnric Balletbo i Serra 	uint32_t action;
5490840d9f13SEnric Balletbo i Serra } __ec_align4;
5491840d9f13SEnric Balletbo i Serra 
5492840d9f13SEnric Balletbo i Serra /* Run verification on a slot */
5493840d9f13SEnric Balletbo i Serra #define EC_CMD_EFS_VERIFY	0x011E
5494840d9f13SEnric Balletbo i Serra 
5495840d9f13SEnric Balletbo i Serra struct ec_params_efs_verify {
5496840d9f13SEnric Balletbo i Serra 	uint8_t region;		/* enum ec_flash_region */
5497840d9f13SEnric Balletbo i Serra } __ec_align1;
5498840d9f13SEnric Balletbo i Serra 
5499840d9f13SEnric Balletbo i Serra /*
5500840d9f13SEnric Balletbo i Serra  * Retrieve info from Cros Board Info store. Response is based on the data
5501840d9f13SEnric Balletbo i Serra  * type. Integers return a uint32. Strings return a string, using the response
5502840d9f13SEnric Balletbo i Serra  * size to determine how big it is.
5503840d9f13SEnric Balletbo i Serra  */
5504840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_CROS_BOARD_INFO	0x011F
5505840d9f13SEnric Balletbo i Serra /*
5506840d9f13SEnric Balletbo i Serra  * Write info into Cros Board Info on EEPROM. Write fails if the board has
5507840d9f13SEnric Balletbo i Serra  * hardware write-protect enabled.
5508840d9f13SEnric Balletbo i Serra  */
5509840d9f13SEnric Balletbo i Serra #define EC_CMD_SET_CROS_BOARD_INFO	0x0120
5510840d9f13SEnric Balletbo i Serra 
5511840d9f13SEnric Balletbo i Serra enum cbi_data_tag {
5512840d9f13SEnric Balletbo i Serra 	CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */
5513840d9f13SEnric Balletbo i Serra 	CBI_TAG_OEM_ID = 1,        /* uint32_t or smaller */
5514840d9f13SEnric Balletbo i Serra 	CBI_TAG_SKU_ID = 2,        /* uint32_t or smaller */
5515840d9f13SEnric Balletbo i Serra 	CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */
5516840d9f13SEnric Balletbo i Serra 	CBI_TAG_OEM_NAME = 4,      /* variable length ascii, nul terminated. */
5517840d9f13SEnric Balletbo i Serra 	CBI_TAG_MODEL_ID = 5,      /* uint32_t or smaller */
5518840d9f13SEnric Balletbo i Serra 	CBI_TAG_COUNT,
5519840d9f13SEnric Balletbo i Serra };
5520840d9f13SEnric Balletbo i Serra 
5521840d9f13SEnric Balletbo i Serra /*
5522840d9f13SEnric Balletbo i Serra  * Flags to control read operation
5523840d9f13SEnric Balletbo i Serra  *
5524840d9f13SEnric Balletbo i Serra  * RELOAD:  Invalidate cache and read data from EEPROM. Useful to verify
5525840d9f13SEnric Balletbo i Serra  *          write was successful without reboot.
5526840d9f13SEnric Balletbo i Serra  */
5527840d9f13SEnric Balletbo i Serra #define CBI_GET_RELOAD		BIT(0)
5528840d9f13SEnric Balletbo i Serra 
5529840d9f13SEnric Balletbo i Serra struct ec_params_get_cbi {
5530840d9f13SEnric Balletbo i Serra 	uint32_t tag;		/* enum cbi_data_tag */
5531840d9f13SEnric Balletbo i Serra 	uint32_t flag;		/* CBI_GET_* */
5532840d9f13SEnric Balletbo i Serra } __ec_align4;
5533840d9f13SEnric Balletbo i Serra 
5534840d9f13SEnric Balletbo i Serra /*
5535840d9f13SEnric Balletbo i Serra  * Flags to control write behavior.
5536840d9f13SEnric Balletbo i Serra  *
5537840d9f13SEnric Balletbo i Serra  * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
5538840d9f13SEnric Balletbo i Serra  *          useful when writing multiple fields in a row.
5539840d9f13SEnric Balletbo i Serra  * INIT:    Need to be set when creating a new CBI from scratch. All fields
5540840d9f13SEnric Balletbo i Serra  *          will be initialized to zero first.
5541840d9f13SEnric Balletbo i Serra  */
5542840d9f13SEnric Balletbo i Serra #define CBI_SET_NO_SYNC		BIT(0)
5543840d9f13SEnric Balletbo i Serra #define CBI_SET_INIT		BIT(1)
5544840d9f13SEnric Balletbo i Serra 
5545840d9f13SEnric Balletbo i Serra struct ec_params_set_cbi {
5546840d9f13SEnric Balletbo i Serra 	uint32_t tag;		/* enum cbi_data_tag */
5547840d9f13SEnric Balletbo i Serra 	uint32_t flag;		/* CBI_SET_* */
5548840d9f13SEnric Balletbo i Serra 	uint32_t size;		/* Data size */
5549840d9f13SEnric Balletbo i Serra 	uint8_t data[];		/* For string and raw data */
5550840d9f13SEnric Balletbo i Serra } __ec_align1;
5551840d9f13SEnric Balletbo i Serra 
5552840d9f13SEnric Balletbo i Serra /*
5553840d9f13SEnric Balletbo i Serra  * Information about resets of the AP by the EC and the EC's own uptime.
5554840d9f13SEnric Balletbo i Serra  */
5555840d9f13SEnric Balletbo i Serra #define EC_CMD_GET_UPTIME_INFO 0x0121
5556840d9f13SEnric Balletbo i Serra 
5557840d9f13SEnric Balletbo i Serra struct ec_response_uptime_info {
5558840d9f13SEnric Balletbo i Serra 	/*
5559840d9f13SEnric Balletbo i Serra 	 * Number of milliseconds since the last EC boot. Sysjump resets
5560840d9f13SEnric Balletbo i Serra 	 * typically do not restart the EC's time_since_boot epoch.
5561840d9f13SEnric Balletbo i Serra 	 *
5562840d9f13SEnric Balletbo i Serra 	 * WARNING: The EC's sense of time is much less accurate than the AP's
5563840d9f13SEnric Balletbo i Serra 	 * sense of time, in both phase and frequency.  This timebase is similar
5564840d9f13SEnric Balletbo i Serra 	 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error.
5565840d9f13SEnric Balletbo i Serra 	 */
5566840d9f13SEnric Balletbo i Serra 	uint32_t time_since_ec_boot_ms;
5567840d9f13SEnric Balletbo i Serra 
5568840d9f13SEnric Balletbo i Serra 	/*
5569840d9f13SEnric Balletbo i Serra 	 * Number of times the AP was reset by the EC since the last EC boot.
5570840d9f13SEnric Balletbo i Serra 	 * Note that the AP may be held in reset by the EC during the initial
5571840d9f13SEnric Balletbo i Serra 	 * boot sequence, such that the very first AP boot may count as more
5572840d9f13SEnric Balletbo i Serra 	 * than one here.
5573840d9f13SEnric Balletbo i Serra 	 */
5574840d9f13SEnric Balletbo i Serra 	uint32_t ap_resets_since_ec_boot;
5575840d9f13SEnric Balletbo i Serra 
5576840d9f13SEnric Balletbo i Serra 	/*
5577840d9f13SEnric Balletbo i Serra 	 * The set of flags which describe the EC's most recent reset.  See
5578840d9f13SEnric Balletbo i Serra 	 * include/system.h RESET_FLAG_* for details.
5579840d9f13SEnric Balletbo i Serra 	 */
5580840d9f13SEnric Balletbo i Serra 	uint32_t ec_reset_flags;
5581840d9f13SEnric Balletbo i Serra 
5582840d9f13SEnric Balletbo i Serra 	/* Empty log entries have both the cause and timestamp set to zero. */
5583840d9f13SEnric Balletbo i Serra 	struct ap_reset_log_entry {
5584840d9f13SEnric Balletbo i Serra 		/*
5585840d9f13SEnric Balletbo i Serra 		 * See include/chipset.h: enum chipset_{reset,shutdown}_reason
5586840d9f13SEnric Balletbo i Serra 		 * for details.
5587840d9f13SEnric Balletbo i Serra 		 */
5588840d9f13SEnric Balletbo i Serra 		uint16_t reset_cause;
5589840d9f13SEnric Balletbo i Serra 
5590840d9f13SEnric Balletbo i Serra 		/* Reserved for protocol growth. */
5591840d9f13SEnric Balletbo i Serra 		uint16_t reserved;
5592840d9f13SEnric Balletbo i Serra 
5593840d9f13SEnric Balletbo i Serra 		/*
5594840d9f13SEnric Balletbo i Serra 		 * The time of the reset's assertion, in milliseconds since the
5595840d9f13SEnric Balletbo i Serra 		 * last EC boot, in the same epoch as time_since_ec_boot_ms.
5596840d9f13SEnric Balletbo i Serra 		 * Set to zero if the log entry is empty.
5597840d9f13SEnric Balletbo i Serra 		 */
5598840d9f13SEnric Balletbo i Serra 		uint32_t reset_time_ms;
5599840d9f13SEnric Balletbo i Serra 	} recent_ap_reset[4];
5600840d9f13SEnric Balletbo i Serra } __ec_align4;
5601840d9f13SEnric Balletbo i Serra 
5602840d9f13SEnric Balletbo i Serra /*
5603840d9f13SEnric Balletbo i Serra  * Add entropy to the device secret (stored in the rollback region).
5604840d9f13SEnric Balletbo i Serra  *
5605840d9f13SEnric Balletbo i Serra  * Depending on the chip, the operation may take a long time (e.g. to erase
5606840d9f13SEnric Balletbo i Serra  * flash), so the commands are asynchronous.
5607840d9f13SEnric Balletbo i Serra  */
5608840d9f13SEnric Balletbo i Serra #define EC_CMD_ADD_ENTROPY	0x0122
5609840d9f13SEnric Balletbo i Serra 
5610840d9f13SEnric Balletbo i Serra enum add_entropy_action {
5611840d9f13SEnric Balletbo i Serra 	/* Add entropy to the current secret. */
5612840d9f13SEnric Balletbo i Serra 	ADD_ENTROPY_ASYNC = 0,
5613840d9f13SEnric Balletbo i Serra 	/*
5614840d9f13SEnric Balletbo i Serra 	 * Add entropy, and also make sure that the previous secret is erased.
5615840d9f13SEnric Balletbo i Serra 	 * (this can be implemented by adding entropy multiple times until
5616840d9f13SEnric Balletbo i Serra 	 * all rolback blocks have been overwritten).
5617840d9f13SEnric Balletbo i Serra 	 */
5618840d9f13SEnric Balletbo i Serra 	ADD_ENTROPY_RESET_ASYNC = 1,
5619840d9f13SEnric Balletbo i Serra 	/* Read back result from the previous operation. */
5620840d9f13SEnric Balletbo i Serra 	ADD_ENTROPY_GET_RESULT = 2,
5621840d9f13SEnric Balletbo i Serra };
5622840d9f13SEnric Balletbo i Serra 
5623840d9f13SEnric Balletbo i Serra struct ec_params_rollback_add_entropy {
5624840d9f13SEnric Balletbo i Serra 	uint8_t action;
5625840d9f13SEnric Balletbo i Serra } __ec_align1;
5626840d9f13SEnric Balletbo i Serra 
5627840d9f13SEnric Balletbo i Serra /*
5628840d9f13SEnric Balletbo i Serra  * Perform a single read of a given ADC channel.
5629840d9f13SEnric Balletbo i Serra  */
5630840d9f13SEnric Balletbo i Serra #define EC_CMD_ADC_READ		0x0123
5631840d9f13SEnric Balletbo i Serra 
5632840d9f13SEnric Balletbo i Serra struct ec_params_adc_read {
5633840d9f13SEnric Balletbo i Serra 	uint8_t adc_channel;
5634840d9f13SEnric Balletbo i Serra } __ec_align1;
5635840d9f13SEnric Balletbo i Serra 
5636840d9f13SEnric Balletbo i Serra struct ec_response_adc_read {
5637840d9f13SEnric Balletbo i Serra 	int32_t adc_value;
5638840d9f13SEnric Balletbo i Serra } __ec_align4;
5639840d9f13SEnric Balletbo i Serra 
5640840d9f13SEnric Balletbo i Serra /*
5641840d9f13SEnric Balletbo i Serra  * Read back rollback info
5642840d9f13SEnric Balletbo i Serra  */
5643840d9f13SEnric Balletbo i Serra #define EC_CMD_ROLLBACK_INFO		0x0124
5644840d9f13SEnric Balletbo i Serra 
5645840d9f13SEnric Balletbo i Serra struct ec_response_rollback_info {
5646840d9f13SEnric Balletbo i Serra 	int32_t id; /* Incrementing number to indicate which region to use. */
5647840d9f13SEnric Balletbo i Serra 	int32_t rollback_min_version;
5648840d9f13SEnric Balletbo i Serra 	int32_t rw_rollback_version;
5649840d9f13SEnric Balletbo i Serra } __ec_align4;
5650840d9f13SEnric Balletbo i Serra 
5651840d9f13SEnric Balletbo i Serra 
5652840d9f13SEnric Balletbo i Serra /* Issue AP reset */
5653840d9f13SEnric Balletbo i Serra #define EC_CMD_AP_RESET 0x0125
5654840d9f13SEnric Balletbo i Serra 
56555fa1dd81STzung-Bi Shih /*
565656d629afSDaisuke Nojiri  * Get the number of peripheral charge ports
565756d629afSDaisuke Nojiri  */
565856d629afSDaisuke Nojiri #define EC_CMD_PCHG_COUNT 0x0134
565956d629afSDaisuke Nojiri 
566056d629afSDaisuke Nojiri #define EC_PCHG_MAX_PORTS 8
566156d629afSDaisuke Nojiri 
566256d629afSDaisuke Nojiri struct ec_response_pchg_count {
566356d629afSDaisuke Nojiri 	uint8_t port_count;
566456d629afSDaisuke Nojiri } __ec_align1;
566556d629afSDaisuke Nojiri 
56665fa1dd81STzung-Bi Shih /*
566756d629afSDaisuke Nojiri  * Get the status of a peripheral charge port
566856d629afSDaisuke Nojiri  */
566956d629afSDaisuke Nojiri #define EC_CMD_PCHG 0x0135
567056d629afSDaisuke Nojiri 
567156d629afSDaisuke Nojiri struct ec_params_pchg {
567256d629afSDaisuke Nojiri 	uint8_t port;
567356d629afSDaisuke Nojiri } __ec_align1;
567456d629afSDaisuke Nojiri 
567556d629afSDaisuke Nojiri struct ec_response_pchg {
567656d629afSDaisuke Nojiri 	uint32_t error;			/* enum pchg_error */
567756d629afSDaisuke Nojiri 	uint8_t state;			/* enum pchg_state state */
567856d629afSDaisuke Nojiri 	uint8_t battery_percentage;
567956d629afSDaisuke Nojiri 	uint8_t unused0;
568056d629afSDaisuke Nojiri 	uint8_t unused1;
568156d629afSDaisuke Nojiri 	/* Fields added in version 1 */
568256d629afSDaisuke Nojiri 	uint32_t fw_version;
568356d629afSDaisuke Nojiri 	uint32_t dropped_event_count;
568456d629afSDaisuke Nojiri } __ec_align2;
568556d629afSDaisuke Nojiri 
568656d629afSDaisuke Nojiri enum pchg_state {
568756d629afSDaisuke Nojiri 	/* Charger is reset and not initialized. */
568856d629afSDaisuke Nojiri 	PCHG_STATE_RESET = 0,
568956d629afSDaisuke Nojiri 	/* Charger is initialized or disabled. */
569056d629afSDaisuke Nojiri 	PCHG_STATE_INITIALIZED,
569156d629afSDaisuke Nojiri 	/* Charger is enabled and ready to detect a device. */
569256d629afSDaisuke Nojiri 	PCHG_STATE_ENABLED,
569356d629afSDaisuke Nojiri 	/* Device is in proximity. */
569456d629afSDaisuke Nojiri 	PCHG_STATE_DETECTED,
569556d629afSDaisuke Nojiri 	/* Device is being charged. */
569656d629afSDaisuke Nojiri 	PCHG_STATE_CHARGING,
569756d629afSDaisuke Nojiri 	/* Device is fully charged. It implies DETECTED (& not charging). */
569856d629afSDaisuke Nojiri 	PCHG_STATE_FULL,
569956d629afSDaisuke Nojiri 	/* In download (a.k.a. firmware update) mode */
570056d629afSDaisuke Nojiri 	PCHG_STATE_DOWNLOAD,
570156d629afSDaisuke Nojiri 	/* In download mode. Ready for receiving data. */
570256d629afSDaisuke Nojiri 	PCHG_STATE_DOWNLOADING,
570356d629afSDaisuke Nojiri 	/* Device is ready for data communication. */
570456d629afSDaisuke Nojiri 	PCHG_STATE_CONNECTED,
570556d629afSDaisuke Nojiri 	/* Put no more entry below */
570656d629afSDaisuke Nojiri 	PCHG_STATE_COUNT,
570756d629afSDaisuke Nojiri };
570856d629afSDaisuke Nojiri 
570956d629afSDaisuke Nojiri #define EC_PCHG_STATE_TEXT { \
571056d629afSDaisuke Nojiri 	[PCHG_STATE_RESET] = "RESET", \
571156d629afSDaisuke Nojiri 	[PCHG_STATE_INITIALIZED] = "INITIALIZED", \
571256d629afSDaisuke Nojiri 	[PCHG_STATE_ENABLED] = "ENABLED", \
571356d629afSDaisuke Nojiri 	[PCHG_STATE_DETECTED] = "DETECTED", \
571456d629afSDaisuke Nojiri 	[PCHG_STATE_CHARGING] = "CHARGING", \
571556d629afSDaisuke Nojiri 	[PCHG_STATE_FULL] = "FULL", \
571656d629afSDaisuke Nojiri 	[PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \
571756d629afSDaisuke Nojiri 	[PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \
571856d629afSDaisuke Nojiri 	[PCHG_STATE_CONNECTED] = "CONNECTED", \
571956d629afSDaisuke Nojiri 	}
572056d629afSDaisuke Nojiri 
572184530100SDaisuke Nojiri /*
572284530100SDaisuke Nojiri  * Update firmware of peripheral chip
572384530100SDaisuke Nojiri  */
572484530100SDaisuke Nojiri #define EC_CMD_PCHG_UPDATE 0x0136
572584530100SDaisuke Nojiri 
572684530100SDaisuke Nojiri /* Port number is encoded in bit[28:31]. */
572784530100SDaisuke Nojiri #define EC_MKBP_PCHG_PORT_SHIFT		28
572884530100SDaisuke Nojiri /* Utility macro for converting MKBP event to port number. */
572984530100SDaisuke Nojiri #define EC_MKBP_PCHG_EVENT_TO_PORT(e)	(((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
573084530100SDaisuke Nojiri /* Utility macro for extracting event bits. */
573184530100SDaisuke Nojiri #define EC_MKBP_PCHG_EVENT_MASK(e)	((e) \
573284530100SDaisuke Nojiri 					& GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0))
573384530100SDaisuke Nojiri 
573484530100SDaisuke Nojiri #define EC_MKBP_PCHG_UPDATE_OPENED	BIT(0)
573584530100SDaisuke Nojiri #define EC_MKBP_PCHG_WRITE_COMPLETE	BIT(1)
573684530100SDaisuke Nojiri #define EC_MKBP_PCHG_UPDATE_CLOSED	BIT(2)
573784530100SDaisuke Nojiri #define EC_MKBP_PCHG_UPDATE_ERROR	BIT(3)
573884530100SDaisuke Nojiri #define EC_MKBP_PCHG_DEVICE_EVENT	BIT(4)
573984530100SDaisuke Nojiri 
574084530100SDaisuke Nojiri enum ec_pchg_update_cmd {
574184530100SDaisuke Nojiri 	/* Reset chip to normal mode. */
574284530100SDaisuke Nojiri 	EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0,
574384530100SDaisuke Nojiri 	/* Reset and put a chip in update (a.k.a. download) mode. */
574484530100SDaisuke Nojiri 	EC_PCHG_UPDATE_CMD_OPEN,
574584530100SDaisuke Nojiri 	/* Write a block of data containing FW image. */
574684530100SDaisuke Nojiri 	EC_PCHG_UPDATE_CMD_WRITE,
574784530100SDaisuke Nojiri 	/* Close update session. */
574884530100SDaisuke Nojiri 	EC_PCHG_UPDATE_CMD_CLOSE,
574984530100SDaisuke Nojiri 	/* End of commands */
575084530100SDaisuke Nojiri 	EC_PCHG_UPDATE_CMD_COUNT,
575184530100SDaisuke Nojiri };
575284530100SDaisuke Nojiri 
575384530100SDaisuke Nojiri struct ec_params_pchg_update {
575484530100SDaisuke Nojiri 	/* PCHG port number */
575584530100SDaisuke Nojiri 	uint8_t port;
575684530100SDaisuke Nojiri 	/* enum ec_pchg_update_cmd */
575784530100SDaisuke Nojiri 	uint8_t cmd;
575884530100SDaisuke Nojiri 	/* Padding */
575984530100SDaisuke Nojiri 	uint8_t reserved0;
576084530100SDaisuke Nojiri 	uint8_t reserved1;
576184530100SDaisuke Nojiri 	/* Version of new firmware */
576284530100SDaisuke Nojiri 	uint32_t version;
576384530100SDaisuke Nojiri 	/* CRC32 of new firmware */
576484530100SDaisuke Nojiri 	uint32_t crc32;
576584530100SDaisuke Nojiri 	/* Address in chip memory where <data> is written to */
576684530100SDaisuke Nojiri 	uint32_t addr;
576784530100SDaisuke Nojiri 	/* Size of <data> */
576884530100SDaisuke Nojiri 	uint32_t size;
576984530100SDaisuke Nojiri 	/* Partial data of new firmware */
577084530100SDaisuke Nojiri 	uint8_t data[];
577184530100SDaisuke Nojiri } __ec_align4;
577284530100SDaisuke Nojiri 
577384530100SDaisuke Nojiri BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT
577484530100SDaisuke Nojiri 	     < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8));
577584530100SDaisuke Nojiri 
577684530100SDaisuke Nojiri struct ec_response_pchg_update {
577784530100SDaisuke Nojiri 	/* Block size */
577884530100SDaisuke Nojiri 	uint32_t block_size;
577984530100SDaisuke Nojiri } __ec_align4;
578084530100SDaisuke Nojiri 
578184530100SDaisuke Nojiri 
5782840d9f13SEnric Balletbo i Serra /*****************************************************************************/
5783dff08cafSPi-Hsun Shih /* Voltage regulator controls */
5784dff08cafSPi-Hsun Shih 
5785dff08cafSPi-Hsun Shih /*
5786dff08cafSPi-Hsun Shih  * Get basic info of voltage regulator for given index.
5787dff08cafSPi-Hsun Shih  *
5788dff08cafSPi-Hsun Shih  * Returns the regulator name and supported voltage list in mV.
5789dff08cafSPi-Hsun Shih  */
5790a2335476SPi-Hsun Shih #define EC_CMD_REGULATOR_GET_INFO 0x012C
5791dff08cafSPi-Hsun Shih 
5792dff08cafSPi-Hsun Shih /* Maximum length of regulator name */
5793dff08cafSPi-Hsun Shih #define EC_REGULATOR_NAME_MAX_LEN 16
5794dff08cafSPi-Hsun Shih 
5795dff08cafSPi-Hsun Shih /* Maximum length of the supported voltage list. */
5796dff08cafSPi-Hsun Shih #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16
5797dff08cafSPi-Hsun Shih 
5798dff08cafSPi-Hsun Shih struct ec_params_regulator_get_info {
5799dff08cafSPi-Hsun Shih 	uint32_t index;
5800dff08cafSPi-Hsun Shih } __ec_align4;
5801dff08cafSPi-Hsun Shih 
5802dff08cafSPi-Hsun Shih struct ec_response_regulator_get_info {
5803dff08cafSPi-Hsun Shih 	char name[EC_REGULATOR_NAME_MAX_LEN];
5804dff08cafSPi-Hsun Shih 	uint16_t num_voltages;
5805dff08cafSPi-Hsun Shih 	uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT];
5806a2335476SPi-Hsun Shih } __ec_align2;
5807dff08cafSPi-Hsun Shih 
5808dff08cafSPi-Hsun Shih /*
5809dff08cafSPi-Hsun Shih  * Configure the regulator as enabled / disabled.
5810dff08cafSPi-Hsun Shih  */
5811a2335476SPi-Hsun Shih #define EC_CMD_REGULATOR_ENABLE 0x012D
5812dff08cafSPi-Hsun Shih 
5813dff08cafSPi-Hsun Shih struct ec_params_regulator_enable {
5814dff08cafSPi-Hsun Shih 	uint32_t index;
5815dff08cafSPi-Hsun Shih 	uint8_t enable;
5816dff08cafSPi-Hsun Shih } __ec_align4;
5817dff08cafSPi-Hsun Shih 
5818dff08cafSPi-Hsun Shih /*
5819dff08cafSPi-Hsun Shih  * Query if the regulator is enabled.
5820dff08cafSPi-Hsun Shih  *
5821dff08cafSPi-Hsun Shih  * Returns 1 if the regulator is enabled, 0 if not.
5822dff08cafSPi-Hsun Shih  */
5823a2335476SPi-Hsun Shih #define EC_CMD_REGULATOR_IS_ENABLED 0x012E
5824dff08cafSPi-Hsun Shih 
5825dff08cafSPi-Hsun Shih struct ec_params_regulator_is_enabled {
5826dff08cafSPi-Hsun Shih 	uint32_t index;
5827dff08cafSPi-Hsun Shih } __ec_align4;
5828dff08cafSPi-Hsun Shih 
5829dff08cafSPi-Hsun Shih struct ec_response_regulator_is_enabled {
5830dff08cafSPi-Hsun Shih 	uint8_t enabled;
5831dff08cafSPi-Hsun Shih } __ec_align1;
5832dff08cafSPi-Hsun Shih 
5833dff08cafSPi-Hsun Shih /*
5834dff08cafSPi-Hsun Shih  * Set voltage for the voltage regulator within the range specified.
5835dff08cafSPi-Hsun Shih  *
5836dff08cafSPi-Hsun Shih  * The driver should select the voltage in range closest to min_mv.
5837dff08cafSPi-Hsun Shih  *
5838dff08cafSPi-Hsun Shih  * Also note that this might be called before the regulator is enabled, and the
5839dff08cafSPi-Hsun Shih  * setting should be in effect after the regulator is enabled.
5840dff08cafSPi-Hsun Shih  */
5841a2335476SPi-Hsun Shih #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
5842dff08cafSPi-Hsun Shih 
5843dff08cafSPi-Hsun Shih struct ec_params_regulator_set_voltage {
5844dff08cafSPi-Hsun Shih 	uint32_t index;
5845dff08cafSPi-Hsun Shih 	uint32_t min_mv;
5846dff08cafSPi-Hsun Shih 	uint32_t max_mv;
5847dff08cafSPi-Hsun Shih } __ec_align4;
5848dff08cafSPi-Hsun Shih 
5849dff08cafSPi-Hsun Shih /*
5850dff08cafSPi-Hsun Shih  * Get the currently configured voltage for the voltage regulator.
5851dff08cafSPi-Hsun Shih  *
5852a2335476SPi-Hsun Shih  * Note that this might be called before the regulator is enabled, and this
5853a2335476SPi-Hsun Shih  * should return the configured output voltage if the regulator is enabled.
5854dff08cafSPi-Hsun Shih  */
5855a2335476SPi-Hsun Shih #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
5856dff08cafSPi-Hsun Shih 
5857dff08cafSPi-Hsun Shih struct ec_params_regulator_get_voltage {
5858dff08cafSPi-Hsun Shih 	uint32_t index;
5859dff08cafSPi-Hsun Shih } __ec_align4;
5860dff08cafSPi-Hsun Shih 
5861dff08cafSPi-Hsun Shih struct ec_response_regulator_get_voltage {
5862dff08cafSPi-Hsun Shih 	uint32_t voltage_mv;
5863dff08cafSPi-Hsun Shih } __ec_align4;
5864dff08cafSPi-Hsun Shih 
5865cd2c40ffSPrashant Malani /*
5866cd2c40ffSPrashant Malani  * Gather all discovery information for the given port and partner type.
5867cd2c40ffSPrashant Malani  *
5868cd2c40ffSPrashant Malani  * Note that if discovery has not yet completed, only the currently completed
5869cd2c40ffSPrashant Malani  * responses will be filled in.   If the discovery data structures are changed
5870cd2c40ffSPrashant Malani  * in the process of the command running, BUSY will be returned.
5871cd2c40ffSPrashant Malani  *
5872cd2c40ffSPrashant Malani  * VDO field sizes are set to the maximum possible number of VDOs a VDM may
5873cd2c40ffSPrashant Malani  * contain, while the number of SVIDs here is selected to fit within the PROTO2
5874cd2c40ffSPrashant Malani  * maximum parameter size.
5875cd2c40ffSPrashant Malani  */
5876cd2c40ffSPrashant Malani #define EC_CMD_TYPEC_DISCOVERY 0x0131
5877cd2c40ffSPrashant Malani 
5878cd2c40ffSPrashant Malani enum typec_partner_type {
5879cd2c40ffSPrashant Malani 	TYPEC_PARTNER_SOP = 0,
5880cd2c40ffSPrashant Malani 	TYPEC_PARTNER_SOP_PRIME = 1,
5881cd2c40ffSPrashant Malani };
5882cd2c40ffSPrashant Malani 
5883cd2c40ffSPrashant Malani struct ec_params_typec_discovery {
5884cd2c40ffSPrashant Malani 	uint8_t port;
5885cd2c40ffSPrashant Malani 	uint8_t partner_type; /* enum typec_partner_type */
5886cd2c40ffSPrashant Malani } __ec_align1;
5887cd2c40ffSPrashant Malani 
5888cd2c40ffSPrashant Malani struct svid_mode_info {
5889cd2c40ffSPrashant Malani 	uint16_t svid;
5890cd2c40ffSPrashant Malani 	uint16_t mode_count;  /* Number of modes partner sent */
5891cd2c40ffSPrashant Malani 	uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5892cd2c40ffSPrashant Malani };
5893cd2c40ffSPrashant Malani 
5894cd2c40ffSPrashant Malani struct ec_response_typec_discovery {
5895cd2c40ffSPrashant Malani 	uint8_t identity_count;    /* Number of identity VDOs partner sent */
5896cd2c40ffSPrashant Malani 	uint8_t svid_count;	   /* Number of SVIDs partner sent */
5897cd2c40ffSPrashant Malani 	uint16_t reserved;
5898cd2c40ffSPrashant Malani 	uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
58995224f790SGustavo A. R. Silva 	struct svid_mode_info svids[];
5900cd2c40ffSPrashant Malani } __ec_align1;
5901cd2c40ffSPrashant Malani 
5902b64afd94SPrashant Malani /* USB Type-C commands for AP-controlled device policy. */
5903b64afd94SPrashant Malani #define EC_CMD_TYPEC_CONTROL 0x0132
5904b64afd94SPrashant Malani 
5905b64afd94SPrashant Malani enum typec_control_command {
5906b64afd94SPrashant Malani 	TYPEC_CONTROL_COMMAND_EXIT_MODES,
5907b64afd94SPrashant Malani 	TYPEC_CONTROL_COMMAND_CLEAR_EVENTS,
5908b64afd94SPrashant Malani 	TYPEC_CONTROL_COMMAND_ENTER_MODE,
590977947238SPrashant Malani 	TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY,
591077947238SPrashant Malani 	TYPEC_CONTROL_COMMAND_USB_MUX_SET,
59110e0dba88SPrashant Malani 	TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE,
59120e0dba88SPrashant Malani 	TYPEC_CONTROL_COMMAND_SEND_VDM_REQ,
5913b64afd94SPrashant Malani };
5914b64afd94SPrashant Malani 
591577947238SPrashant Malani /* Replies the AP may specify to the TBT EnterMode command as a UFP */
591677947238SPrashant Malani enum typec_tbt_ufp_reply {
591777947238SPrashant Malani 	TYPEC_TBT_UFP_REPLY_NAK,
591877947238SPrashant Malani 	TYPEC_TBT_UFP_REPLY_ACK,
591977947238SPrashant Malani };
592077947238SPrashant Malani 
592177947238SPrashant Malani struct typec_usb_mux_set {
592277947238SPrashant Malani 	uint8_t mux_index;	/* Index of the mux to set in the chain */
592377947238SPrashant Malani 	uint8_t mux_flags;	/* USB_PD_MUX_*-encoded USB mux state to set */
592477947238SPrashant Malani } __ec_align1;
592577947238SPrashant Malani 
59260e0dba88SPrashant Malani #define VDO_MAX_SIZE 7
59270e0dba88SPrashant Malani 
59280e0dba88SPrashant Malani struct typec_vdm_req {
59290e0dba88SPrashant Malani 	/* VDM data, including VDM header */
59300e0dba88SPrashant Malani 	uint32_t vdm_data[VDO_MAX_SIZE];
59310e0dba88SPrashant Malani 	/* Number of 32-bit fields filled in */
59320e0dba88SPrashant Malani 	uint8_t vdm_data_objects;
59330e0dba88SPrashant Malani 	/* Partner to address - see enum typec_partner_type */
59340e0dba88SPrashant Malani 	uint8_t partner_type;
59350e0dba88SPrashant Malani } __ec_align1;
59360e0dba88SPrashant Malani 
5937b64afd94SPrashant Malani struct ec_params_typec_control {
5938b64afd94SPrashant Malani 	uint8_t port;
5939b64afd94SPrashant Malani 	uint8_t command;	/* enum typec_control_command */
5940b64afd94SPrashant Malani 	uint16_t reserved;
5941b64afd94SPrashant Malani 
5942b64afd94SPrashant Malani 	/*
5943b64afd94SPrashant Malani 	 * This section will be interpreted based on |command|. Define a
5944b64afd94SPrashant Malani 	 * placeholder structure to avoid having to increase the size and bump
5945b64afd94SPrashant Malani 	 * the command version when adding new sub-commands.
5946b64afd94SPrashant Malani 	 */
5947b64afd94SPrashant Malani 	union {
5948b64afd94SPrashant Malani 		uint32_t clear_events_mask;
5949b64afd94SPrashant Malani 		uint8_t mode_to_enter;      /* enum typec_mode */
595077947238SPrashant Malani 		uint8_t tbt_ufp_reply;      /* enum typec_tbt_ufp_reply */
595177947238SPrashant Malani 		struct typec_usb_mux_set mux_params;
59520e0dba88SPrashant Malani 		/* Used for VMD_REQ */
59530e0dba88SPrashant Malani 		struct typec_vdm_req vdm_req_params;
5954b64afd94SPrashant Malani 		uint8_t placeholder[128];
5955b64afd94SPrashant Malani 	};
5956b64afd94SPrashant Malani } __ec_align1;
5957b64afd94SPrashant Malani 
5958cd2c40ffSPrashant Malani /*
5959cd2c40ffSPrashant Malani  * Gather all status information for a port.
5960cd2c40ffSPrashant Malani  *
5961cd2c40ffSPrashant Malani  * Note: this covers many of the return fields from the deprecated
5962cd2c40ffSPrashant Malani  * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the
5963cd2c40ffSPrashant Malani  * discovery data.  The "enum pd_cc_states" is defined with the deprecated
5964cd2c40ffSPrashant Malani  * EC_CMD_USB_PD_CONTROL command.
5965cd2c40ffSPrashant Malani  *
5966cd2c40ffSPrashant Malani  * This also combines in the EC_CMD_USB_PD_MUX_INFO flags.
5967cd2c40ffSPrashant Malani  */
5968cd2c40ffSPrashant Malani #define EC_CMD_TYPEC_STATUS 0x0133
5969cd2c40ffSPrashant Malani 
5970cd2c40ffSPrashant Malani /*
5971cd2c40ffSPrashant Malani  * Power role.
5972cd2c40ffSPrashant Malani  *
5973cd2c40ffSPrashant Malani  * Note this is also used for PD header creation, and values align to those in
5974cd2c40ffSPrashant Malani  * the Power Delivery Specification Revision 3.0 (See
5975cd2c40ffSPrashant Malani  * 6.2.1.1.4 Port Power Role).
5976cd2c40ffSPrashant Malani  */
5977cd2c40ffSPrashant Malani enum pd_power_role {
5978cd2c40ffSPrashant Malani 	PD_ROLE_SINK = 0,
5979cd2c40ffSPrashant Malani 	PD_ROLE_SOURCE = 1
5980cd2c40ffSPrashant Malani };
5981cd2c40ffSPrashant Malani 
5982cd2c40ffSPrashant Malani /*
5983cd2c40ffSPrashant Malani  * Data role.
5984cd2c40ffSPrashant Malani  *
5985cd2c40ffSPrashant Malani  * Note this is also used for PD header creation, and the first two values
5986cd2c40ffSPrashant Malani  * align to those in the Power Delivery Specification Revision 3.0 (See
5987cd2c40ffSPrashant Malani  * 6.2.1.1.6 Port Data Role).
5988cd2c40ffSPrashant Malani  */
5989cd2c40ffSPrashant Malani enum pd_data_role {
5990cd2c40ffSPrashant Malani 	PD_ROLE_UFP = 0,
5991cd2c40ffSPrashant Malani 	PD_ROLE_DFP = 1,
5992cd2c40ffSPrashant Malani 	PD_ROLE_DISCONNECTED = 2,
5993cd2c40ffSPrashant Malani };
5994cd2c40ffSPrashant Malani 
5995cd2c40ffSPrashant Malani enum pd_vconn_role {
5996cd2c40ffSPrashant Malani 	PD_ROLE_VCONN_OFF = 0,
5997cd2c40ffSPrashant Malani 	PD_ROLE_VCONN_SRC = 1,
5998cd2c40ffSPrashant Malani };
5999cd2c40ffSPrashant Malani 
6000cd2c40ffSPrashant Malani /*
6001cd2c40ffSPrashant Malani  * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,
6002cd2c40ffSPrashant Malani  * regardless of whether a debug accessory is connected.
6003cd2c40ffSPrashant Malani  */
6004cd2c40ffSPrashant Malani enum tcpc_cc_polarity {
6005cd2c40ffSPrashant Malani 	/*
6006cd2c40ffSPrashant Malani 	 * _CCx: is used to indicate the polarity while not connected to
6007cd2c40ffSPrashant Malani 	 * a Debug Accessory.  Only one CC line will assert a resistor and
6008cd2c40ffSPrashant Malani 	 * the other will be open.
6009cd2c40ffSPrashant Malani 	 */
6010cd2c40ffSPrashant Malani 	POLARITY_CC1 = 0,
6011cd2c40ffSPrashant Malani 	POLARITY_CC2 = 1,
6012cd2c40ffSPrashant Malani 
6013cd2c40ffSPrashant Malani 	/*
6014cd2c40ffSPrashant Malani 	 * _CCx_DTS is used to indicate the polarity while connected to a
6015cd2c40ffSPrashant Malani 	 * SRC Debug Accessory.  Assert resistors on both lines.
6016cd2c40ffSPrashant Malani 	 */
6017cd2c40ffSPrashant Malani 	POLARITY_CC1_DTS = 2,
6018cd2c40ffSPrashant Malani 	POLARITY_CC2_DTS = 3,
6019cd2c40ffSPrashant Malani 
6020cd2c40ffSPrashant Malani 	/*
6021cd2c40ffSPrashant Malani 	 * The current TCPC code relies on these specific POLARITY values.
6022cd2c40ffSPrashant Malani 	 * Adding in a check to verify if the list grows for any reason
6023cd2c40ffSPrashant Malani 	 * that this will give a hint that other places need to be
6024cd2c40ffSPrashant Malani 	 * adjusted.
6025cd2c40ffSPrashant Malani 	 */
6026cd2c40ffSPrashant Malani 	POLARITY_COUNT
6027cd2c40ffSPrashant Malani };
6028cd2c40ffSPrashant Malani 
6029cd2c40ffSPrashant Malani #define PD_STATUS_EVENT_SOP_DISC_DONE		BIT(0)
6030cd2c40ffSPrashant Malani #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE	BIT(1)
603167880f1bSPrashant Malani #define PD_STATUS_EVENT_HARD_RESET		BIT(2)
603277947238SPrashant Malani #define PD_STATUS_EVENT_DISCONNECTED		BIT(3)
603377947238SPrashant Malani #define PD_STATUS_EVENT_MUX_0_SET_DONE		BIT(4)
603477947238SPrashant Malani #define PD_STATUS_EVENT_MUX_1_SET_DONE		BIT(5)
60350e0dba88SPrashant Malani #define PD_STATUS_EVENT_VDM_REQ_REPLY		BIT(6)
60360e0dba88SPrashant Malani #define PD_STATUS_EVENT_VDM_REQ_FAILED		BIT(7)
60374b1936cdSPrashant Malani #define PD_STATUS_EVENT_VDM_ATTENTION		BIT(8)
6038cd2c40ffSPrashant Malani 
6039cd2c40ffSPrashant Malani struct ec_params_typec_status {
6040cd2c40ffSPrashant Malani 	uint8_t port;
6041cd2c40ffSPrashant Malani } __ec_align1;
6042cd2c40ffSPrashant Malani 
6043cd2c40ffSPrashant Malani struct ec_response_typec_status {
6044cd2c40ffSPrashant Malani 	uint8_t pd_enabled;		/* PD communication enabled - bool */
6045cd2c40ffSPrashant Malani 	uint8_t dev_connected;		/* Device connected - bool */
6046cd2c40ffSPrashant Malani 	uint8_t sop_connected;		/* Device is SOP PD capable - bool */
6047cd2c40ffSPrashant Malani 	uint8_t source_cap_count;	/* Number of Source Cap PDOs */
6048cd2c40ffSPrashant Malani 
6049cd2c40ffSPrashant Malani 	uint8_t power_role;		/* enum pd_power_role */
6050cd2c40ffSPrashant Malani 	uint8_t data_role;		/* enum pd_data_role */
6051cd2c40ffSPrashant Malani 	uint8_t vconn_role;		/* enum pd_vconn_role */
6052cd2c40ffSPrashant Malani 	uint8_t sink_cap_count;		/* Number of Sink Cap PDOs */
6053cd2c40ffSPrashant Malani 
6054cd2c40ffSPrashant Malani 	uint8_t polarity;		/* enum tcpc_cc_polarity */
6055cd2c40ffSPrashant Malani 	uint8_t cc_state;		/* enum pd_cc_states */
6056cd2c40ffSPrashant Malani 	uint8_t dp_pin;			/* DP pin mode (MODE_DP_IN_[A-E]) */
6057cd2c40ffSPrashant Malani 	uint8_t mux_state;		/* USB_PD_MUX* - encoded mux state */
6058cd2c40ffSPrashant Malani 
6059cd2c40ffSPrashant Malani 	char tc_state[32];		/* TC state name */
6060cd2c40ffSPrashant Malani 
6061cd2c40ffSPrashant Malani 	uint32_t events;		/* PD_STATUS_EVENT bitmask */
6062cd2c40ffSPrashant Malani 
6063cd2c40ffSPrashant Malani 	/*
6064cd2c40ffSPrashant Malani 	 * BCD PD revisions for partners
6065cd2c40ffSPrashant Malani 	 *
6066cd2c40ffSPrashant Malani 	 * The format has the PD major reversion in the upper nibble, and PD
6067cd2c40ffSPrashant Malani 	 * minor version in the next nibble.  Following two nibbles are
6068cd2c40ffSPrashant Malani 	 * currently 0.
6069cd2c40ffSPrashant Malani 	 * ex. PD 3.2 would map to 0x3200
6070cd2c40ffSPrashant Malani 	 *
6071cd2c40ffSPrashant Malani 	 * PD major/minor will be 0 if no PD device is connected.
6072cd2c40ffSPrashant Malani 	 */
6073cd2c40ffSPrashant Malani 	uint16_t sop_revision;
6074cd2c40ffSPrashant Malani 	uint16_t sop_prime_revision;
6075cd2c40ffSPrashant Malani 
6076cd2c40ffSPrashant Malani 	uint32_t source_cap_pdos[7];	/* Max 7 PDOs can be present */
6077cd2c40ffSPrashant Malani 
6078cd2c40ffSPrashant Malani 	uint32_t sink_cap_pdos[7];	/* Max 7 PDOs can be present */
6079cd2c40ffSPrashant Malani } __ec_align1;
6080cd2c40ffSPrashant Malani 
60810e0dba88SPrashant Malani /*
60824b1936cdSPrashant Malani  * Gather the response to the most recent VDM REQ from the AP, as well
60834b1936cdSPrashant Malani  * as popping the oldest VDM:Attention from the DPM queue
60840e0dba88SPrashant Malani  */
60850e0dba88SPrashant Malani #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C
60860e0dba88SPrashant Malani 
60870e0dba88SPrashant Malani struct ec_params_typec_vdm_response {
60880e0dba88SPrashant Malani 	uint8_t port;
60890e0dba88SPrashant Malani } __ec_align1;
60900e0dba88SPrashant Malani 
60910e0dba88SPrashant Malani struct ec_response_typec_vdm_response {
60920e0dba88SPrashant Malani 	/* Number of 32-bit fields filled in */
60930e0dba88SPrashant Malani 	uint8_t vdm_data_objects;
60940e0dba88SPrashant Malani 	/* Partner to address - see enum typec_partner_type */
60950e0dba88SPrashant Malani 	uint8_t partner_type;
60964b1936cdSPrashant Malani 	/* enum ec_status describing VDM response */
60974b1936cdSPrashant Malani 	uint16_t vdm_response_err;
60980e0dba88SPrashant Malani 	/* VDM data, including VDM header */
60990e0dba88SPrashant Malani 	uint32_t vdm_response[VDO_MAX_SIZE];
61004b1936cdSPrashant Malani 	/* Number of 32-bit Attention fields filled in */
61014b1936cdSPrashant Malani 	uint8_t vdm_attention_objects;
61024b1936cdSPrashant Malani 	/* Number of remaining messages to consume */
61034b1936cdSPrashant Malani 	uint8_t vdm_attention_left;
61044b1936cdSPrashant Malani 	/* Reserved */
61054b1936cdSPrashant Malani 	uint16_t reserved1;
61064b1936cdSPrashant Malani 	/* VDM:Attention contents */
61074b1936cdSPrashant Malani 	uint32_t vdm_attention[2];
61080e0dba88SPrashant Malani } __ec_align1;
61090e0dba88SPrashant Malani 
61100e0dba88SPrashant Malani #undef VDO_MAX_SIZE
61110e0dba88SPrashant Malani 
6112401d07d5SPavan Holla /*
6113401d07d5SPavan Holla  * UCSI OPM-PPM commands
6114401d07d5SPavan Holla  *
6115401d07d5SPavan Holla  * These commands are used for communication between OPM and PPM.
6116401d07d5SPavan Holla  * Only UCSI3.0 is tested.
6117401d07d5SPavan Holla  */
6118401d07d5SPavan Holla 
6119401d07d5SPavan Holla #define EC_CMD_UCSI_PPM_SET 0x0140
6120401d07d5SPavan Holla 
6121401d07d5SPavan Holla /* The data size is stored in the host command protocol header. */
6122401d07d5SPavan Holla struct ec_params_ucsi_ppm_set {
6123401d07d5SPavan Holla 	uint16_t offset;
6124401d07d5SPavan Holla 	uint8_t data[];
6125401d07d5SPavan Holla } __ec_align2;
6126401d07d5SPavan Holla 
6127401d07d5SPavan Holla #define EC_CMD_UCSI_PPM_GET 0x0141
6128401d07d5SPavan Holla 
6129401d07d5SPavan Holla /* For 'GET' sub-commands, data will be returned as a raw payload. */
6130401d07d5SPavan Holla struct ec_params_ucsi_ppm_get {
6131401d07d5SPavan Holla 	uint16_t offset;
6132401d07d5SPavan Holla 	uint8_t size;
6133401d07d5SPavan Holla } __ec_align2;
6134401d07d5SPavan Holla 
6135dff08cafSPi-Hsun Shih /*****************************************************************************/
6136840d9f13SEnric Balletbo i Serra /* The command range 0x200-0x2FF is reserved for Rotor. */
6137840d9f13SEnric Balletbo i Serra 
6138840d9f13SEnric Balletbo i Serra /*****************************************************************************/
6139840d9f13SEnric Balletbo i Serra /*
6140840d9f13SEnric Balletbo i Serra  * Reserve a range of host commands for the CR51 firmware.
6141840d9f13SEnric Balletbo i Serra  */
6142840d9f13SEnric Balletbo i Serra #define EC_CMD_CR51_BASE 0x0300
6143840d9f13SEnric Balletbo i Serra #define EC_CMD_CR51_LAST 0x03FF
6144840d9f13SEnric Balletbo i Serra 
6145840d9f13SEnric Balletbo i Serra /*****************************************************************************/
6146840d9f13SEnric Balletbo i Serra /* Fingerprint MCU commands: range 0x0400-0x040x */
6147840d9f13SEnric Balletbo i Serra 
6148840d9f13SEnric Balletbo i Serra /* Fingerprint SPI sensor passthru command: prototyping ONLY */
6149840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_PASSTHRU 0x0400
6150840d9f13SEnric Balletbo i Serra 
6151840d9f13SEnric Balletbo i Serra #define EC_FP_FLAG_NOT_COMPLETE 0x1
6152840d9f13SEnric Balletbo i Serra 
6153840d9f13SEnric Balletbo i Serra struct ec_params_fp_passthru {
6154840d9f13SEnric Balletbo i Serra 	uint16_t len;		/* Number of bytes to write then read */
6155840d9f13SEnric Balletbo i Serra 	uint16_t flags;		/* EC_FP_FLAG_xxx */
6156840d9f13SEnric Balletbo i Serra 	uint8_t data[];		/* Data to send */
6157840d9f13SEnric Balletbo i Serra } __ec_align2;
6158840d9f13SEnric Balletbo i Serra 
6159840d9f13SEnric Balletbo i Serra /* Configure the Fingerprint MCU behavior */
6160840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_MODE 0x0402
6161840d9f13SEnric Balletbo i Serra 
6162840d9f13SEnric Balletbo i Serra /* Put the sensor in its lowest power mode */
6163840d9f13SEnric Balletbo i Serra #define FP_MODE_DEEPSLEEP      BIT(0)
6164840d9f13SEnric Balletbo i Serra /* Wait to see a finger on the sensor */
6165840d9f13SEnric Balletbo i Serra #define FP_MODE_FINGER_DOWN    BIT(1)
6166840d9f13SEnric Balletbo i Serra /* Poll until the finger has left the sensor */
6167840d9f13SEnric Balletbo i Serra #define FP_MODE_FINGER_UP      BIT(2)
6168840d9f13SEnric Balletbo i Serra /* Capture the current finger image */
6169840d9f13SEnric Balletbo i Serra #define FP_MODE_CAPTURE        BIT(3)
6170840d9f13SEnric Balletbo i Serra /* Finger enrollment session on-going */
6171840d9f13SEnric Balletbo i Serra #define FP_MODE_ENROLL_SESSION BIT(4)
6172840d9f13SEnric Balletbo i Serra /* Enroll the current finger image */
6173840d9f13SEnric Balletbo i Serra #define FP_MODE_ENROLL_IMAGE   BIT(5)
6174840d9f13SEnric Balletbo i Serra /* Try to match the current finger image */
6175840d9f13SEnric Balletbo i Serra #define FP_MODE_MATCH          BIT(6)
6176840d9f13SEnric Balletbo i Serra /* Reset and re-initialize the sensor. */
6177840d9f13SEnric Balletbo i Serra #define FP_MODE_RESET_SENSOR   BIT(7)
6178840d9f13SEnric Balletbo i Serra /* special value: don't change anything just read back current mode */
6179840d9f13SEnric Balletbo i Serra #define FP_MODE_DONT_CHANGE    BIT(31)
6180840d9f13SEnric Balletbo i Serra 
6181840d9f13SEnric Balletbo i Serra #define FP_VALID_MODES (FP_MODE_DEEPSLEEP      | \
6182840d9f13SEnric Balletbo i Serra 			FP_MODE_FINGER_DOWN    | \
6183840d9f13SEnric Balletbo i Serra 			FP_MODE_FINGER_UP      | \
6184840d9f13SEnric Balletbo i Serra 			FP_MODE_CAPTURE        | \
6185840d9f13SEnric Balletbo i Serra 			FP_MODE_ENROLL_SESSION | \
6186840d9f13SEnric Balletbo i Serra 			FP_MODE_ENROLL_IMAGE   | \
6187840d9f13SEnric Balletbo i Serra 			FP_MODE_MATCH          | \
6188840d9f13SEnric Balletbo i Serra 			FP_MODE_RESET_SENSOR   | \
6189840d9f13SEnric Balletbo i Serra 			FP_MODE_DONT_CHANGE)
6190840d9f13SEnric Balletbo i Serra 
6191840d9f13SEnric Balletbo i Serra /* Capture types defined in bits [30..28] */
6192840d9f13SEnric Balletbo i Serra #define FP_MODE_CAPTURE_TYPE_SHIFT 28
6193840d9f13SEnric Balletbo i Serra #define FP_MODE_CAPTURE_TYPE_MASK  (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
6194840d9f13SEnric Balletbo i Serra /*
6195840d9f13SEnric Balletbo i Serra  * This enum must remain ordered, if you add new values you must ensure that
6196840d9f13SEnric Balletbo i Serra  * FP_CAPTURE_TYPE_MAX is still the last one.
6197840d9f13SEnric Balletbo i Serra  */
6198840d9f13SEnric Balletbo i Serra enum fp_capture_type {
6199840d9f13SEnric Balletbo i Serra 	/* Full blown vendor-defined capture (produces 'frame_size' bytes) */
6200840d9f13SEnric Balletbo i Serra 	FP_CAPTURE_VENDOR_FORMAT = 0,
6201840d9f13SEnric Balletbo i Serra 	/* Simple raw image capture (produces width x height x bpp bits) */
6202840d9f13SEnric Balletbo i Serra 	FP_CAPTURE_SIMPLE_IMAGE = 1,
6203840d9f13SEnric Balletbo i Serra 	/* Self test pattern (e.g. checkerboard) */
6204840d9f13SEnric Balletbo i Serra 	FP_CAPTURE_PATTERN0 = 2,
6205840d9f13SEnric Balletbo i Serra 	/* Self test pattern (e.g. inverted checkerboard) */
6206840d9f13SEnric Balletbo i Serra 	FP_CAPTURE_PATTERN1 = 3,
6207840d9f13SEnric Balletbo i Serra 	/* Capture for Quality test with fixed contrast */
6208840d9f13SEnric Balletbo i Serra 	FP_CAPTURE_QUALITY_TEST = 4,
6209840d9f13SEnric Balletbo i Serra 	/* Capture for pixel reset value test */
6210840d9f13SEnric Balletbo i Serra 	FP_CAPTURE_RESET_TEST = 5,
6211840d9f13SEnric Balletbo i Serra 	FP_CAPTURE_TYPE_MAX,
6212840d9f13SEnric Balletbo i Serra };
6213840d9f13SEnric Balletbo i Serra /* Extracts the capture type from the sensor 'mode' word */
6214840d9f13SEnric Balletbo i Serra #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \
6215840d9f13SEnric Balletbo i Serra 				       >> FP_MODE_CAPTURE_TYPE_SHIFT)
6216840d9f13SEnric Balletbo i Serra 
6217840d9f13SEnric Balletbo i Serra struct ec_params_fp_mode {
6218840d9f13SEnric Balletbo i Serra 	uint32_t mode; /* as defined by FP_MODE_ constants */
6219840d9f13SEnric Balletbo i Serra } __ec_align4;
6220840d9f13SEnric Balletbo i Serra 
6221840d9f13SEnric Balletbo i Serra struct ec_response_fp_mode {
6222840d9f13SEnric Balletbo i Serra 	uint32_t mode; /* as defined by FP_MODE_ constants */
6223840d9f13SEnric Balletbo i Serra } __ec_align4;
6224840d9f13SEnric Balletbo i Serra 
6225840d9f13SEnric Balletbo i Serra /* Retrieve Fingerprint sensor information */
6226840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_INFO 0x0403
6227840d9f13SEnric Balletbo i Serra 
6228840d9f13SEnric Balletbo i Serra /* Number of dead pixels detected on the last maintenance */
6229840d9f13SEnric Balletbo i Serra #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
6230840d9f13SEnric Balletbo i Serra /* Unknown number of dead pixels detected on the last maintenance */
6231840d9f13SEnric Balletbo i Serra #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
6232840d9f13SEnric Balletbo i Serra /* No interrupt from the sensor */
6233840d9f13SEnric Balletbo i Serra #define FP_ERROR_NO_IRQ    BIT(12)
6234840d9f13SEnric Balletbo i Serra /* SPI communication error */
6235840d9f13SEnric Balletbo i Serra #define FP_ERROR_SPI_COMM  BIT(13)
6236840d9f13SEnric Balletbo i Serra /* Invalid sensor Hardware ID */
6237840d9f13SEnric Balletbo i Serra #define FP_ERROR_BAD_HWID  BIT(14)
6238840d9f13SEnric Balletbo i Serra /* Sensor initialization failed */
6239840d9f13SEnric Balletbo i Serra #define FP_ERROR_INIT_FAIL BIT(15)
6240840d9f13SEnric Balletbo i Serra 
6241840d9f13SEnric Balletbo i Serra struct ec_response_fp_info_v0 {
6242840d9f13SEnric Balletbo i Serra 	/* Sensor identification */
6243840d9f13SEnric Balletbo i Serra 	uint32_t vendor_id;
6244840d9f13SEnric Balletbo i Serra 	uint32_t product_id;
6245840d9f13SEnric Balletbo i Serra 	uint32_t model_id;
6246840d9f13SEnric Balletbo i Serra 	uint32_t version;
6247840d9f13SEnric Balletbo i Serra 	/* Image frame characteristics */
6248840d9f13SEnric Balletbo i Serra 	uint32_t frame_size;
6249840d9f13SEnric Balletbo i Serra 	uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
6250840d9f13SEnric Balletbo i Serra 	uint16_t width;
6251840d9f13SEnric Balletbo i Serra 	uint16_t height;
6252840d9f13SEnric Balletbo i Serra 	uint16_t bpp;
6253840d9f13SEnric Balletbo i Serra 	uint16_t errors; /* see FP_ERROR_ flags above */
6254840d9f13SEnric Balletbo i Serra } __ec_align4;
6255840d9f13SEnric Balletbo i Serra 
6256840d9f13SEnric Balletbo i Serra struct ec_response_fp_info {
6257840d9f13SEnric Balletbo i Serra 	/* Sensor identification */
6258840d9f13SEnric Balletbo i Serra 	uint32_t vendor_id;
6259840d9f13SEnric Balletbo i Serra 	uint32_t product_id;
6260840d9f13SEnric Balletbo i Serra 	uint32_t model_id;
6261840d9f13SEnric Balletbo i Serra 	uint32_t version;
6262840d9f13SEnric Balletbo i Serra 	/* Image frame characteristics */
6263840d9f13SEnric Balletbo i Serra 	uint32_t frame_size;
6264840d9f13SEnric Balletbo i Serra 	uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
6265840d9f13SEnric Balletbo i Serra 	uint16_t width;
6266840d9f13SEnric Balletbo i Serra 	uint16_t height;
6267840d9f13SEnric Balletbo i Serra 	uint16_t bpp;
6268840d9f13SEnric Balletbo i Serra 	uint16_t errors; /* see FP_ERROR_ flags above */
6269840d9f13SEnric Balletbo i Serra 	/* Template/finger current information */
6270840d9f13SEnric Balletbo i Serra 	uint32_t template_size;  /* max template size in bytes */
6271840d9f13SEnric Balletbo i Serra 	uint16_t template_max;   /* maximum number of fingers/templates */
6272840d9f13SEnric Balletbo i Serra 	uint16_t template_valid; /* number of valid fingers/templates */
6273840d9f13SEnric Balletbo i Serra 	uint32_t template_dirty; /* bitmap of templates with MCU side changes */
6274840d9f13SEnric Balletbo i Serra 	uint32_t template_version; /* version of the template format */
6275840d9f13SEnric Balletbo i Serra } __ec_align4;
6276840d9f13SEnric Balletbo i Serra 
6277840d9f13SEnric Balletbo i Serra /* Get the last captured finger frame or a template content */
6278840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_FRAME 0x0404
6279840d9f13SEnric Balletbo i Serra 
6280840d9f13SEnric Balletbo i Serra /* constants defining the 'offset' field which also contains the frame index */
6281840d9f13SEnric Balletbo i Serra #define FP_FRAME_INDEX_SHIFT       28
6282840d9f13SEnric Balletbo i Serra /* Frame buffer where the captured image is stored */
6283840d9f13SEnric Balletbo i Serra #define FP_FRAME_INDEX_RAW_IMAGE    0
6284840d9f13SEnric Balletbo i Serra /* First frame buffer holding a template */
6285840d9f13SEnric Balletbo i Serra #define FP_FRAME_INDEX_TEMPLATE     1
6286840d9f13SEnric Balletbo i Serra #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
6287840d9f13SEnric Balletbo i Serra #define FP_FRAME_OFFSET_MASK       0x0FFFFFFF
6288840d9f13SEnric Balletbo i Serra 
6289840d9f13SEnric Balletbo i Serra /* Version of the format of the encrypted templates. */
6290840d9f13SEnric Balletbo i Serra #define FP_TEMPLATE_FORMAT_VERSION 3
6291840d9f13SEnric Balletbo i Serra 
6292840d9f13SEnric Balletbo i Serra /* Constants for encryption parameters */
6293840d9f13SEnric Balletbo i Serra #define FP_CONTEXT_NONCE_BYTES 12
6294840d9f13SEnric Balletbo i Serra #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
6295840d9f13SEnric Balletbo i Serra #define FP_CONTEXT_TAG_BYTES 16
6296840d9f13SEnric Balletbo i Serra #define FP_CONTEXT_SALT_BYTES 16
6297840d9f13SEnric Balletbo i Serra #define FP_CONTEXT_TPM_BYTES 32
6298840d9f13SEnric Balletbo i Serra 
6299840d9f13SEnric Balletbo i Serra struct ec_fp_template_encryption_metadata {
6300840d9f13SEnric Balletbo i Serra 	/*
6301840d9f13SEnric Balletbo i Serra 	 * Version of the structure format (N=3).
6302840d9f13SEnric Balletbo i Serra 	 */
6303840d9f13SEnric Balletbo i Serra 	uint16_t struct_version;
6304840d9f13SEnric Balletbo i Serra 	/* Reserved bytes, set to 0. */
6305840d9f13SEnric Balletbo i Serra 	uint16_t reserved;
6306840d9f13SEnric Balletbo i Serra 	/*
6307840d9f13SEnric Balletbo i Serra 	 * The salt is *only* ever used for key derivation. The nonce is unique,
6308840d9f13SEnric Balletbo i Serra 	 * a different one is used for every message.
6309840d9f13SEnric Balletbo i Serra 	 */
6310840d9f13SEnric Balletbo i Serra 	uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
6311840d9f13SEnric Balletbo i Serra 	uint8_t salt[FP_CONTEXT_SALT_BYTES];
6312840d9f13SEnric Balletbo i Serra 	uint8_t tag[FP_CONTEXT_TAG_BYTES];
6313840d9f13SEnric Balletbo i Serra };
6314840d9f13SEnric Balletbo i Serra 
6315840d9f13SEnric Balletbo i Serra struct ec_params_fp_frame {
6316840d9f13SEnric Balletbo i Serra 	/*
6317840d9f13SEnric Balletbo i Serra 	 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE
6318840d9f13SEnric Balletbo i Serra 	 * in the high nibble, and the real offset within the frame in
6319840d9f13SEnric Balletbo i Serra 	 * FP_FRAME_OFFSET_MASK.
6320840d9f13SEnric Balletbo i Serra 	 */
6321840d9f13SEnric Balletbo i Serra 	uint32_t offset;
6322840d9f13SEnric Balletbo i Serra 	uint32_t size;
6323840d9f13SEnric Balletbo i Serra } __ec_align4;
6324840d9f13SEnric Balletbo i Serra 
6325840d9f13SEnric Balletbo i Serra /* Load a template into the MCU */
6326840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_TEMPLATE 0x0405
6327840d9f13SEnric Balletbo i Serra 
6328840d9f13SEnric Balletbo i Serra /* Flag in the 'size' field indicating that the full template has been sent */
6329840d9f13SEnric Balletbo i Serra #define FP_TEMPLATE_COMMIT 0x80000000
6330840d9f13SEnric Balletbo i Serra 
6331840d9f13SEnric Balletbo i Serra struct ec_params_fp_template {
6332840d9f13SEnric Balletbo i Serra 	uint32_t offset;
6333840d9f13SEnric Balletbo i Serra 	uint32_t size;
6334840d9f13SEnric Balletbo i Serra 	uint8_t data[];
6335840d9f13SEnric Balletbo i Serra } __ec_align4;
6336840d9f13SEnric Balletbo i Serra 
6337840d9f13SEnric Balletbo i Serra /* Clear the current fingerprint user context and set a new one */
6338840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_CONTEXT 0x0406
6339840d9f13SEnric Balletbo i Serra 
6340840d9f13SEnric Balletbo i Serra struct ec_params_fp_context {
6341840d9f13SEnric Balletbo i Serra 	uint32_t userid[FP_CONTEXT_USERID_WORDS];
6342840d9f13SEnric Balletbo i Serra } __ec_align4;
6343840d9f13SEnric Balletbo i Serra 
6344840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_STATS 0x0407
6345840d9f13SEnric Balletbo i Serra 
6346840d9f13SEnric Balletbo i Serra #define FPSTATS_CAPTURE_INV  BIT(0)
6347840d9f13SEnric Balletbo i Serra #define FPSTATS_MATCHING_INV BIT(1)
6348840d9f13SEnric Balletbo i Serra 
6349840d9f13SEnric Balletbo i Serra struct ec_response_fp_stats {
6350840d9f13SEnric Balletbo i Serra 	uint32_t capture_time_us;
6351840d9f13SEnric Balletbo i Serra 	uint32_t matching_time_us;
6352840d9f13SEnric Balletbo i Serra 	uint32_t overall_time_us;
6353840d9f13SEnric Balletbo i Serra 	struct {
6354840d9f13SEnric Balletbo i Serra 		uint32_t lo;
6355840d9f13SEnric Balletbo i Serra 		uint32_t hi;
6356840d9f13SEnric Balletbo i Serra 	} overall_t0;
6357840d9f13SEnric Balletbo i Serra 	uint8_t timestamps_invalid;
6358840d9f13SEnric Balletbo i Serra 	int8_t template_matched;
6359840d9f13SEnric Balletbo i Serra } __ec_align2;
6360840d9f13SEnric Balletbo i Serra 
6361840d9f13SEnric Balletbo i Serra #define EC_CMD_FP_SEED 0x0408
6362840d9f13SEnric Balletbo i Serra struct ec_params_fp_seed {
6363840d9f13SEnric Balletbo i Serra 	/*
6364840d9f13SEnric Balletbo i Serra 	 * Version of the structure format (N=3).
6365840d9f13SEnric Balletbo i Serra 	 */
6366840d9f13SEnric Balletbo i Serra 	uint16_t struct_version;
6367840d9f13SEnric Balletbo i Serra 	/* Reserved bytes, set to 0. */
6368840d9f13SEnric Balletbo i Serra 	uint16_t reserved;
6369840d9f13SEnric Balletbo i Serra 	/* Seed from the TPM. */
6370840d9f13SEnric Balletbo i Serra 	uint8_t seed[FP_CONTEXT_TPM_BYTES];
6371840d9f13SEnric Balletbo i Serra } __ec_align4;
6372840d9f13SEnric Balletbo i Serra 
63734c07e2ddSLinus Torvalds #define EC_CMD_FP_ENC_STATUS 0x0409
63744c07e2ddSLinus Torvalds 
63754c07e2ddSLinus Torvalds /* FP TPM seed has been set or not */
63764c07e2ddSLinus Torvalds #define FP_ENC_STATUS_SEED_SET BIT(0)
63774c07e2ddSLinus Torvalds 
63784c07e2ddSLinus Torvalds struct ec_response_fp_encryption_status {
63794c07e2ddSLinus Torvalds 	/* Used bits in encryption engine status */
63804c07e2ddSLinus Torvalds 	uint32_t valid_flags;
63814c07e2ddSLinus Torvalds 	/* Encryption engine status */
63824c07e2ddSLinus Torvalds 	uint32_t status;
63834c07e2ddSLinus Torvalds } __ec_align4;
63844c07e2ddSLinus Torvalds 
6385840d9f13SEnric Balletbo i Serra /*****************************************************************************/
6386840d9f13SEnric Balletbo i Serra /* Touchpad MCU commands: range 0x0500-0x05FF */
6387840d9f13SEnric Balletbo i Serra 
6388840d9f13SEnric Balletbo i Serra /* Perform touchpad self test */
6389840d9f13SEnric Balletbo i Serra #define EC_CMD_TP_SELF_TEST 0x0500
6390840d9f13SEnric Balletbo i Serra 
6391840d9f13SEnric Balletbo i Serra /* Get number of frame types, and the size of each type */
6392840d9f13SEnric Balletbo i Serra #define EC_CMD_TP_FRAME_INFO 0x0501
6393840d9f13SEnric Balletbo i Serra 
6394840d9f13SEnric Balletbo i Serra struct ec_response_tp_frame_info {
6395840d9f13SEnric Balletbo i Serra 	uint32_t n_frames;
639688354105SGustavo A. R. Silva 	uint32_t frame_sizes[];
6397840d9f13SEnric Balletbo i Serra } __ec_align4;
6398840d9f13SEnric Balletbo i Serra 
6399840d9f13SEnric Balletbo i Serra /* Create a snapshot of current frame readings */
6400840d9f13SEnric Balletbo i Serra #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
6401840d9f13SEnric Balletbo i Serra 
6402840d9f13SEnric Balletbo i Serra /* Read the frame */
6403840d9f13SEnric Balletbo i Serra #define EC_CMD_TP_FRAME_GET 0x0503
6404840d9f13SEnric Balletbo i Serra 
6405840d9f13SEnric Balletbo i Serra struct ec_params_tp_frame_get {
6406840d9f13SEnric Balletbo i Serra 	uint32_t frame_index;
6407840d9f13SEnric Balletbo i Serra 	uint32_t offset;
6408840d9f13SEnric Balletbo i Serra 	uint32_t size;
6409840d9f13SEnric Balletbo i Serra } __ec_align4;
6410840d9f13SEnric Balletbo i Serra 
6411840d9f13SEnric Balletbo i Serra /*****************************************************************************/
6412840d9f13SEnric Balletbo i Serra /* EC-EC communication commands: range 0x0600-0x06FF */
6413840d9f13SEnric Balletbo i Serra 
6414840d9f13SEnric Balletbo i Serra #define EC_COMM_TEXT_MAX 8
6415840d9f13SEnric Balletbo i Serra 
6416840d9f13SEnric Balletbo i Serra /*
6417840d9f13SEnric Balletbo i Serra  * Get battery static information, i.e. information that never changes, or
6418840d9f13SEnric Balletbo i Serra  * very infrequently.
6419840d9f13SEnric Balletbo i Serra  */
6420840d9f13SEnric Balletbo i Serra #define EC_CMD_BATTERY_GET_STATIC 0x0600
6421840d9f13SEnric Balletbo i Serra 
6422840d9f13SEnric Balletbo i Serra /**
6423840d9f13SEnric Balletbo i Serra  * struct ec_params_battery_static_info - Battery static info parameters
6424840d9f13SEnric Balletbo i Serra  * @index: Battery index.
6425840d9f13SEnric Balletbo i Serra  */
6426840d9f13SEnric Balletbo i Serra struct ec_params_battery_static_info {
6427840d9f13SEnric Balletbo i Serra 	uint8_t index;
6428840d9f13SEnric Balletbo i Serra } __ec_align_size1;
6429840d9f13SEnric Balletbo i Serra 
6430840d9f13SEnric Balletbo i Serra /**
6431840d9f13SEnric Balletbo i Serra  * struct ec_response_battery_static_info - Battery static info response
6432840d9f13SEnric Balletbo i Serra  * @design_capacity: Battery Design Capacity (mAh)
6433840d9f13SEnric Balletbo i Serra  * @design_voltage: Battery Design Voltage (mV)
6434840d9f13SEnric Balletbo i Serra  * @manufacturer: Battery Manufacturer String
6435840d9f13SEnric Balletbo i Serra  * @model: Battery Model Number String
6436840d9f13SEnric Balletbo i Serra  * @serial: Battery Serial Number String
6437840d9f13SEnric Balletbo i Serra  * @type: Battery Type String
6438840d9f13SEnric Balletbo i Serra  * @cycle_count: Battery Cycle Count
6439840d9f13SEnric Balletbo i Serra  */
6440840d9f13SEnric Balletbo i Serra struct ec_response_battery_static_info {
6441840d9f13SEnric Balletbo i Serra 	uint16_t design_capacity;
6442840d9f13SEnric Balletbo i Serra 	uint16_t design_voltage;
6443840d9f13SEnric Balletbo i Serra 	char manufacturer[EC_COMM_TEXT_MAX];
6444840d9f13SEnric Balletbo i Serra 	char model[EC_COMM_TEXT_MAX];
6445840d9f13SEnric Balletbo i Serra 	char serial[EC_COMM_TEXT_MAX];
6446840d9f13SEnric Balletbo i Serra 	char type[EC_COMM_TEXT_MAX];
6447840d9f13SEnric Balletbo i Serra 	/* TODO(crbug.com/795991): Consider moving to dynamic structure. */
6448840d9f13SEnric Balletbo i Serra 	uint32_t cycle_count;
6449840d9f13SEnric Balletbo i Serra } __ec_align4;
6450840d9f13SEnric Balletbo i Serra 
6451840d9f13SEnric Balletbo i Serra /*
6452840d9f13SEnric Balletbo i Serra  * Get battery dynamic information, i.e. information that is likely to change
6453840d9f13SEnric Balletbo i Serra  * every time it is read.
6454840d9f13SEnric Balletbo i Serra  */
6455840d9f13SEnric Balletbo i Serra #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
6456840d9f13SEnric Balletbo i Serra 
6457840d9f13SEnric Balletbo i Serra /**
6458840d9f13SEnric Balletbo i Serra  * struct ec_params_battery_dynamic_info - Battery dynamic info parameters
6459840d9f13SEnric Balletbo i Serra  * @index: Battery index.
6460840d9f13SEnric Balletbo i Serra  */
6461840d9f13SEnric Balletbo i Serra struct ec_params_battery_dynamic_info {
6462840d9f13SEnric Balletbo i Serra 	uint8_t index;
6463840d9f13SEnric Balletbo i Serra } __ec_align_size1;
6464840d9f13SEnric Balletbo i Serra 
6465840d9f13SEnric Balletbo i Serra /**
6466840d9f13SEnric Balletbo i Serra  * struct ec_response_battery_dynamic_info - Battery dynamic info response
6467840d9f13SEnric Balletbo i Serra  * @actual_voltage: Battery voltage (mV)
6468840d9f13SEnric Balletbo i Serra  * @actual_current: Battery current (mA); negative=discharging
6469840d9f13SEnric Balletbo i Serra  * @remaining_capacity: Remaining capacity (mAh)
6470840d9f13SEnric Balletbo i Serra  * @full_capacity: Capacity (mAh, might change occasionally)
6471840d9f13SEnric Balletbo i Serra  * @flags: Flags, see EC_BATT_FLAG_*
6472840d9f13SEnric Balletbo i Serra  * @desired_voltage: Charging voltage desired by battery (mV)
6473840d9f13SEnric Balletbo i Serra  * @desired_current: Charging current desired by battery (mA)
6474840d9f13SEnric Balletbo i Serra  */
6475840d9f13SEnric Balletbo i Serra struct ec_response_battery_dynamic_info {
6476840d9f13SEnric Balletbo i Serra 	int16_t actual_voltage;
6477840d9f13SEnric Balletbo i Serra 	int16_t actual_current;
6478840d9f13SEnric Balletbo i Serra 	int16_t remaining_capacity;
6479840d9f13SEnric Balletbo i Serra 	int16_t full_capacity;
6480840d9f13SEnric Balletbo i Serra 	int16_t flags;
6481840d9f13SEnric Balletbo i Serra 	int16_t desired_voltage;
6482840d9f13SEnric Balletbo i Serra 	int16_t desired_current;
6483840d9f13SEnric Balletbo i Serra } __ec_align2;
6484840d9f13SEnric Balletbo i Serra 
6485840d9f13SEnric Balletbo i Serra /*
6486840d9f13SEnric Balletbo i Serra  * Control charger chip. Used to control charger chip on the slave.
6487840d9f13SEnric Balletbo i Serra  */
6488840d9f13SEnric Balletbo i Serra #define EC_CMD_CHARGER_CONTROL 0x0602
6489840d9f13SEnric Balletbo i Serra 
6490840d9f13SEnric Balletbo i Serra /**
6491840d9f13SEnric Balletbo i Serra  * struct ec_params_charger_control - Charger control parameters
6492840d9f13SEnric Balletbo i Serra  * @max_current: Charger current (mA). Positive to allow base to draw up to
6493840d9f13SEnric Balletbo i Serra  *     max_current and (possibly) charge battery, negative to request current
6494840d9f13SEnric Balletbo i Serra  *     from base (OTG).
6495840d9f13SEnric Balletbo i Serra  * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is
6496840d9f13SEnric Balletbo i Serra  *     >= 0.
6497840d9f13SEnric Balletbo i Serra  * @allow_charging: Allow base battery charging (only makes sense if
6498840d9f13SEnric Balletbo i Serra  *     max_current > 0).
6499840d9f13SEnric Balletbo i Serra  */
6500840d9f13SEnric Balletbo i Serra struct ec_params_charger_control {
6501840d9f13SEnric Balletbo i Serra 	int16_t max_current;
6502840d9f13SEnric Balletbo i Serra 	uint16_t otg_voltage;
6503840d9f13SEnric Balletbo i Serra 	uint8_t allow_charging;
6504840d9f13SEnric Balletbo i Serra } __ec_align_size1;
6505840d9f13SEnric Balletbo i Serra 
65068553a979SUtkarsh Patel /* Get ACK from the USB-C SS muxes */
65078553a979SUtkarsh Patel #define EC_CMD_USB_PD_MUX_ACK 0x0603
65088553a979SUtkarsh Patel 
65098553a979SUtkarsh Patel struct ec_params_usb_pd_mux_ack {
65108553a979SUtkarsh Patel 	uint8_t port; /* USB-C port number */
65118553a979SUtkarsh Patel } __ec_align1;
65128553a979SUtkarsh Patel 
6513840d9f13SEnric Balletbo i Serra /*****************************************************************************/
6514840d9f13SEnric Balletbo i Serra /*
6515840d9f13SEnric Balletbo i Serra  * Reserve a range of host commands for board-specific, experimental, or
6516840d9f13SEnric Balletbo i Serra  * special purpose features. These can be (re)used without updating this file.
6517840d9f13SEnric Balletbo i Serra  *
6518840d9f13SEnric Balletbo i Serra  * CAUTION: Don't go nuts with this. Shipping products should document ALL
6519840d9f13SEnric Balletbo i Serra  * their EC commands for easier development, testing, debugging, and support.
6520840d9f13SEnric Balletbo i Serra  *
6521840d9f13SEnric Balletbo i Serra  * All commands MUST be #defined to be 4-digit UPPER CASE hex values
6522840d9f13SEnric Balletbo i Serra  * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
6523840d9f13SEnric Balletbo i Serra  *
6524840d9f13SEnric Balletbo i Serra  * In your experimental code, you may want to do something like this:
6525840d9f13SEnric Balletbo i Serra  *
6526840d9f13SEnric Balletbo i Serra  *   #define EC_CMD_MAGIC_FOO 0x0000
6527840d9f13SEnric Balletbo i Serra  *   #define EC_CMD_MAGIC_BAR 0x0001
6528840d9f13SEnric Balletbo i Serra  *   #define EC_CMD_MAGIC_HEY 0x0002
6529840d9f13SEnric Balletbo i Serra  *
6530840d9f13SEnric Balletbo i Serra  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
6531840d9f13SEnric Balletbo i Serra  *      EC_VER_MASK(0);
6532840d9f13SEnric Balletbo i Serra  *
6533840d9f13SEnric Balletbo i Serra  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
6534840d9f13SEnric Balletbo i Serra  *      EC_VER_MASK(0);
6535840d9f13SEnric Balletbo i Serra  *
6536840d9f13SEnric Balletbo i Serra  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
6537840d9f13SEnric Balletbo i Serra  *      EC_VER_MASK(0);
6538840d9f13SEnric Balletbo i Serra  */
6539840d9f13SEnric Balletbo i Serra #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
6540840d9f13SEnric Balletbo i Serra #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
6541840d9f13SEnric Balletbo i Serra 
6542840d9f13SEnric Balletbo i Serra /*
6543840d9f13SEnric Balletbo i Serra  * Given the private host command offset, calculate the true private host
6544840d9f13SEnric Balletbo i Serra  * command value.
6545840d9f13SEnric Balletbo i Serra  */
6546840d9f13SEnric Balletbo i Serra #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
6547840d9f13SEnric Balletbo i Serra 	(EC_CMD_BOARD_SPECIFIC_BASE + (command))
6548840d9f13SEnric Balletbo i Serra 
6549840d9f13SEnric Balletbo i Serra /*****************************************************************************/
6550840d9f13SEnric Balletbo i Serra /*
6551840d9f13SEnric Balletbo i Serra  * Passthru commands
6552840d9f13SEnric Balletbo i Serra  *
6553840d9f13SEnric Balletbo i Serra  * Some platforms have sub-processors chained to each other.  For example.
6554840d9f13SEnric Balletbo i Serra  *
6555840d9f13SEnric Balletbo i Serra  *     AP <--> EC <--> PD MCU
6556840d9f13SEnric Balletbo i Serra  *
6557840d9f13SEnric Balletbo i Serra  * The top 2 bits of the command number are used to indicate which device the
6558840d9f13SEnric Balletbo i Serra  * command is intended for.  Device 0 is always the device receiving the
6559840d9f13SEnric Balletbo i Serra  * command; other device mapping is board-specific.
6560840d9f13SEnric Balletbo i Serra  *
6561840d9f13SEnric Balletbo i Serra  * When a device receives a command to be passed to a sub-processor, it passes
6562840d9f13SEnric Balletbo i Serra  * it on with the device number set back to 0.  This allows the sub-processor
6563840d9f13SEnric Balletbo i Serra  * to remain blissfully unaware of whether the command originated on the next
6564840d9f13SEnric Balletbo i Serra  * device up the chain, or was passed through from the AP.
6565840d9f13SEnric Balletbo i Serra  *
6566840d9f13SEnric Balletbo i Serra  * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
6567840d9f13SEnric Balletbo i Serra  *     AP sends command 0x4002 to the EC
6568840d9f13SEnric Balletbo i Serra  *     EC sends command 0x0002 to the PD MCU
6569840d9f13SEnric Balletbo i Serra  *     EC forwards PD MCU response back to the AP
6570840d9f13SEnric Balletbo i Serra  */
6571840d9f13SEnric Balletbo i Serra 
6572840d9f13SEnric Balletbo i Serra /* Offset and max command number for sub-device n */
6573840d9f13SEnric Balletbo i Serra #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
6574840d9f13SEnric Balletbo i Serra #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
6575840d9f13SEnric Balletbo i Serra 
6576840d9f13SEnric Balletbo i Serra /*****************************************************************************/
6577840d9f13SEnric Balletbo i Serra /*
6578840d9f13SEnric Balletbo i Serra  * Deprecated constants. These constants have been renamed for clarity. The
6579840d9f13SEnric Balletbo i Serra  * meaning and size has not changed. Programs that use the old names should
6580840d9f13SEnric Balletbo i Serra  * switch to the new names soon, as the old names may not be carried forward
6581840d9f13SEnric Balletbo i Serra  * forever.
6582840d9f13SEnric Balletbo i Serra  */
6583840d9f13SEnric Balletbo i Serra #define EC_HOST_PARAM_SIZE      EC_PROTO2_MAX_PARAM_SIZE
6584840d9f13SEnric Balletbo i Serra #define EC_LPC_ADDR_OLD_PARAM   EC_HOST_CMD_REGION1
6585840d9f13SEnric Balletbo i Serra #define EC_OLD_PARAM_SIZE       EC_HOST_CMD_REGION_SIZE
6586840d9f13SEnric Balletbo i Serra 
6587840d9f13SEnric Balletbo i Serra 
6588840d9f13SEnric Balletbo i Serra 
6589840d9f13SEnric Balletbo i Serra #endif  /* __CROS_EC_COMMANDS_H */
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