1 /* 2 * Interface the generic pinconfig portions of the pinctrl subsystem 3 * 4 * Copyright (C) 2011 ST-Ericsson SA 5 * Written on behalf of Linaro for ST-Ericsson 6 * This interface is used in the core to keep track of pins. 7 * 8 * Author: Linus Walleij <[email protected]> 9 * 10 * License terms: GNU General Public License (GPL) version 2 11 */ 12 #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H 13 #define __LINUX_PINCTRL_PINCONF_GENERIC_H 14 15 /** 16 * enum pin_config_param - possible pin configuration parameters 17 * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it 18 * weakly drives the last value on a tristate bus, also known as a "bus 19 * holder", "bus keeper" or "repeater". This allows another device on the 20 * bus to change the value by driving the bus high or low and switching to 21 * tristate. The argument is ignored. 22 * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a 23 * transition from say pull-up to pull-down implies that you disable 24 * pull-up in the process, this setting disables all biasing. 25 * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance 26 * mode, also know as "third-state" (tristate) or "high-Z" or "floating". 27 * On output pins this effectively disconnects the pin, which is useful 28 * if for example some other pin is going to drive the signal connected 29 * to it for a while. Pins used for input are usually always high 30 * impedance. 31 * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high 32 * impedance to GROUND). If the argument is != 0 pull-down is enabled, 33 * if it is 0, pull-down is total, i.e. the pin is connected to GROUND. 34 * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based 35 * on embedded knowledge of the controller hardware, like current mux 36 * function. The pull direction and possibly strength too will normally 37 * be decided completely inside the hardware block and not be readable 38 * from the kernel side. 39 * If the argument is != 0 pull up/down is enabled, if it is 0, the 40 * configuration is ignored. The proper way to disable it is to use 41 * @PIN_CONFIG_BIAS_DISABLE. 42 * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high 43 * impedance to VDD). If the argument is != 0 pull-up is enabled, 44 * if it is 0, pull-up is total, i.e. the pin is connected to VDD. 45 * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open 46 * collector) which means it is usually wired with other output ports 47 * which are then pulled up with an external resistor. Setting this 48 * config will enable open drain mode, the argument is ignored. 49 * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source 50 * (open emitter). Setting this config will enable open source mode, the 51 * argument is ignored. 52 * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and 53 * low, this is the most typical case and is typically achieved with two 54 * active transistors on the output. Setting this config will enable 55 * push-pull mode, the argument is ignored. 56 * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current 57 * passed as argument. The argument is in mA. 58 * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, 59 * which means it will wait for signals to settle when reading inputs. The 60 * argument gives the debounce time in usecs. Setting the 61 * argument to zero turns debouncing off. 62 * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not 63 * affect the pin's ability to drive output. 1 enables input, 0 disables 64 * input. 65 * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in 66 * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis, 67 * the threshold value is given on a custom format as argument when 68 * setting pins to this mode. 69 * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin. 70 * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, 71 * schmitt-trigger mode is disabled. 72 * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power 73 * operation, if several modes of operation are supported these can be 74 * passed in the argument on a custom form, else just use argument 1 75 * to indicate low power mode, argument 0 turns low power mode off. 76 * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode 77 * without driving a value there. For most platforms this reduces to 78 * enable the output buffers and then let the pin controller current 79 * configuration (eg. the currently selected mux function) drive values on 80 * the line. Use argument 1 to enable output mode, argument 0 to disable 81 * it. 82 * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a 83 * value on the line. Use argument 1 to indicate high level, argument 0 to 84 * indicate low level. (Please see Documentation/driver-api/pinctl.rst, 85 * section "GPIO mode pitfalls" for a discussion around this parameter.) 86 * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power 87 * supplies, the argument to this parameter (on a custom format) tells 88 * the driver which alternative power source to use. 89 * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state. 90 * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to 91 * this parameter (on a custom format) tells the driver which alternative 92 * slew rate to use. 93 * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs) 94 * or latch delay (on outputs) this parameter (in a custom format) 95 * specifies the clock skew or latch delay. It typically controls how 96 * many double inverters are put in front of the line. 97 * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset 98 * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if 99 * you need to pass in custom configurations to the pin controller, use 100 * PIN_CONFIG_END+1 as the base offset. 101 * @PIN_CONFIG_MAX: this is the maximum configuration value that can be 102 * presented using the packed format. 103 */ 104 enum pin_config_param { 105 PIN_CONFIG_BIAS_BUS_HOLD, 106 PIN_CONFIG_BIAS_DISABLE, 107 PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 108 PIN_CONFIG_BIAS_PULL_DOWN, 109 PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 110 PIN_CONFIG_BIAS_PULL_UP, 111 PIN_CONFIG_DRIVE_OPEN_DRAIN, 112 PIN_CONFIG_DRIVE_OPEN_SOURCE, 113 PIN_CONFIG_DRIVE_PUSH_PULL, 114 PIN_CONFIG_DRIVE_STRENGTH, 115 PIN_CONFIG_INPUT_DEBOUNCE, 116 PIN_CONFIG_INPUT_ENABLE, 117 PIN_CONFIG_INPUT_SCHMITT, 118 PIN_CONFIG_INPUT_SCHMITT_ENABLE, 119 PIN_CONFIG_LOW_POWER_MODE, 120 PIN_CONFIG_OUTPUT_ENABLE, 121 PIN_CONFIG_OUTPUT, 122 PIN_CONFIG_POWER_SOURCE, 123 PIN_CONFIG_SLEEP_HARDWARE_STATE, 124 PIN_CONFIG_SLEW_RATE, 125 PIN_CONFIG_SKEW_DELAY, 126 PIN_CONFIG_PERSIST_STATE, 127 PIN_CONFIG_END = 0x7F, 128 PIN_CONFIG_MAX = 0xFF, 129 }; 130 131 /* 132 * Helpful configuration macro to be used in tables etc. 133 */ 134 #define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL)) 135 136 /* 137 * The following inlines stuffs a configuration parameter and data value 138 * into and out of an unsigned long argument, as used by the generic pin config 139 * system. We put the parameter in the lower 8 bits and the argument in the 140 * upper 24 bits. 141 */ 142 143 static inline enum pin_config_param pinconf_to_config_param(unsigned long config) 144 { 145 return (enum pin_config_param) (config & 0xffUL); 146 } 147 148 static inline u32 pinconf_to_config_argument(unsigned long config) 149 { 150 return (u32) ((config >> 8) & 0xffffffUL); 151 } 152 153 static inline unsigned long pinconf_to_config_packed(enum pin_config_param param, 154 u32 argument) 155 { 156 return PIN_CONF_PACKED(param, argument); 157 } 158 159 #ifdef CONFIG_GENERIC_PINCONF 160 161 #ifdef CONFIG_DEBUG_FS 162 #define PCONFDUMP(a, b, c, d) { \ 163 .param = a, .display = b, .format = c, .has_arg = d \ 164 } 165 166 struct pin_config_item { 167 const enum pin_config_param param; 168 const char * const display; 169 const char * const format; 170 bool has_arg; 171 }; 172 #endif /* CONFIG_DEBUG_FS */ 173 174 #ifdef CONFIG_OF 175 176 #include <linux/device.h> 177 #include <linux/pinctrl/machine.h> 178 struct pinctrl_dev; 179 struct pinctrl_map; 180 181 struct pinconf_generic_params { 182 const char * const property; 183 enum pin_config_param param; 184 u32 default_value; 185 }; 186 187 int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev, 188 struct device_node *np, struct pinctrl_map **map, 189 unsigned *reserved_maps, unsigned *num_maps, 190 enum pinctrl_map_type type); 191 int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev, 192 struct device_node *np_config, struct pinctrl_map **map, 193 unsigned *num_maps, enum pinctrl_map_type type); 194 void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev, 195 struct pinctrl_map *map, unsigned num_maps); 196 197 static inline int pinconf_generic_dt_node_to_map_group( 198 struct pinctrl_dev *pctldev, struct device_node *np_config, 199 struct pinctrl_map **map, unsigned *num_maps) 200 { 201 return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, 202 PIN_MAP_TYPE_CONFIGS_GROUP); 203 } 204 205 static inline int pinconf_generic_dt_node_to_map_pin( 206 struct pinctrl_dev *pctldev, struct device_node *np_config, 207 struct pinctrl_map **map, unsigned *num_maps) 208 { 209 return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, 210 PIN_MAP_TYPE_CONFIGS_PIN); 211 } 212 213 static inline int pinconf_generic_dt_node_to_map_all( 214 struct pinctrl_dev *pctldev, struct device_node *np_config, 215 struct pinctrl_map **map, unsigned *num_maps) 216 { 217 /* 218 * passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser 219 * to infer the map type from the DT properties used. 220 */ 221 return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, 222 PIN_MAP_TYPE_INVALID); 223 } 224 #endif 225 226 #endif /* CONFIG_GENERIC_PINCONF */ 227 228 #endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */ 229